./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 18:08:57,896 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 18:08:57,988 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 18:08:57,999 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 18:08:58,000 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 18:08:58,038 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 18:08:58,040 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 18:08:58,040 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 18:08:58,041 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 18:08:58,043 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 18:08:58,044 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 18:08:58,045 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 18:08:58,046 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 18:08:58,046 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 18:08:58,050 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 18:08:58,050 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 18:08:58,051 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 18:08:58,051 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 18:08:58,051 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 18:08:58,052 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 18:08:58,052 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 18:08:58,052 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 18:08:58,053 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 18:08:58,053 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 18:08:58,055 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 18:08:58,055 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 18:08:58,056 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 18:08:58,056 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 18:08:58,057 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 18:08:58,057 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 18:08:58,058 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 18:08:58,058 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 18:08:58,059 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 18:08:58,059 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 18:08:58,059 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 18:08:58,059 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 18:08:58,060 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 18:08:58,060 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 18:08:58,061 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 18:08:58,061 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 [2024-11-08 18:08:58,392 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 18:08:58,422 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 18:08:58,425 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 18:08:58,426 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 18:08:58,427 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 18:08:58,428 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c Unable to find full path for "g++" [2024-11-08 18:09:00,483 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 18:09:00,673 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 18:09:00,674 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-08 18:09:00,682 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/data/50c994719/f54ed35cb0bf434c9b9115fe959a0a92/FLAGadbcb8682 [2024-11-08 18:09:01,039 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/data/50c994719/f54ed35cb0bf434c9b9115fe959a0a92 [2024-11-08 18:09:01,042 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 18:09:01,044 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 18:09:01,045 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 18:09:01,046 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 18:09:01,052 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 18:09:01,053 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,054 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4902e571 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01, skipping insertion in model container [2024-11-08 18:09:01,054 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,079 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 18:09:01,274 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 18:09:01,291 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 18:09:01,307 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 18:09:01,327 INFO L204 MainTranslator]: Completed translation [2024-11-08 18:09:01,328 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01 WrapperNode [2024-11-08 18:09:01,328 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 18:09:01,329 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 18:09:01,329 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 18:09:01,330 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 18:09:01,339 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,346 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,363 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 62 [2024-11-08 18:09:01,363 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 18:09:01,364 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 18:09:01,364 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 18:09:01,364 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 18:09:01,376 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,376 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,378 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,392 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [1, 2]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [0, 1]. [2024-11-08 18:09:01,392 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,393 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,398 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,405 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,406 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,407 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,413 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 18:09:01,414 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 18:09:01,414 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 18:09:01,414 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 18:09:01,415 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (1/1) ... [2024-11-08 18:09:01,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:01,438 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:01,451 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:01,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 18:09:01,496 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-08 18:09:01,496 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-08 18:09:01,496 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 18:09:01,496 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 18:09:01,496 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-08 18:09:01,497 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-08 18:09:01,497 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-08 18:09:01,497 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-08 18:09:01,599 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 18:09:01,604 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 18:09:01,824 INFO L? ?]: Removed 14 outVars from TransFormulas that were not future-live. [2024-11-08 18:09:01,825 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 18:09:01,849 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 18:09:01,849 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-08 18:09:01,851 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:09:01 BoogieIcfgContainer [2024-11-08 18:09:01,851 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 18:09:01,852 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 18:09:01,852 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 18:09:01,858 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 18:09:01,859 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:09:01,859 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 06:09:01" (1/3) ... [2024-11-08 18:09:01,860 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@f23ed0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 06:09:01, skipping insertion in model container [2024-11-08 18:09:01,861 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:09:01,861 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:09:01" (2/3) ... [2024-11-08 18:09:01,862 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@f23ed0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 06:09:01, skipping insertion in model container [2024-11-08 18:09:01,863 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:09:01,864 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:09:01" (3/3) ... [2024-11-08 18:09:01,865 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration.c [2024-11-08 18:09:01,939 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 18:09:01,939 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 18:09:01,940 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 18:09:01,940 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 18:09:01,940 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 18:09:01,940 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 18:09:01,940 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 18:09:01,941 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 18:09:01,946 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:01,963 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-08 18:09:01,963 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:01,963 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:01,967 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-08 18:09:01,967 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-08 18:09:01,967 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 18:09:01,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:01,969 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-08 18:09:01,969 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:01,970 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:01,970 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-08 18:09:01,970 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-08 18:09:01,976 INFO L745 eck$LassoCheckResult]: Stem: 15#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 17#L26-3true [2024-11-08 18:09:01,976 INFO L747 eck$LassoCheckResult]: Loop: 17#L26-3true assume main_~i~1#1 % 4294967296 < 32; 6#L26-1true assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10#L17-3true assume !(foo_~i~0#1 <= foo_~size#1); 11#L17-4true foo_#res#1 := foo_~i~0#1; 3#foo_returnLabel#1true main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 17#L26-3true [2024-11-08 18:09:01,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:01,982 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-08 18:09:01,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:01,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47736189] [2024-11-08 18:09:01,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:01,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:02,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:02,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,132 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:02,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:02,135 INFO L85 PathProgramCache]: Analyzing trace with hash 34519890, now seen corresponding path program 1 times [2024-11-08 18:09:02,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:02,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682695318] [2024-11-08 18:09:02,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:02,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:02,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,165 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:02,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,205 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:02,209 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:02,209 INFO L85 PathProgramCache]: Analyzing trace with hash 1805959376, now seen corresponding path program 1 times [2024-11-08 18:09:02,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:02,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520878634] [2024-11-08 18:09:02,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:02,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:02,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:02,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:02,495 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:02,496 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520878634] [2024-11-08 18:09:02,496 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1520878634] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:09:02,497 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:09:02,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 18:09:02,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1295113700] [2024-11-08 18:09:02,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:09:02,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:02,729 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 18:09:02,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 18:09:02,732 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:02,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:02,822 INFO L93 Difference]: Finished difference Result 28 states and 37 transitions. [2024-11-08 18:09:02,824 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 37 transitions. [2024-11-08 18:09:02,826 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2024-11-08 18:09:02,830 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 23 states and 29 transitions. [2024-11-08 18:09:02,831 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-08 18:09:02,832 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-08 18:09:02,833 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 29 transitions. [2024-11-08 18:09:02,833 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:02,833 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 29 transitions. [2024-11-08 18:09:02,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 29 transitions. [2024-11-08 18:09:02,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 16. [2024-11-08 18:09:02,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.25) internal successors, (20), 15 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:02,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 20 transitions. [2024-11-08 18:09:02,860 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 20 transitions. [2024-11-08 18:09:02,862 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 18:09:02,870 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 20 transitions. [2024-11-08 18:09:02,870 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 18:09:02,871 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 20 transitions. [2024-11-08 18:09:02,871 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-08 18:09:02,872 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:02,872 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:02,872 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-08 18:09:02,872 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-08 18:09:02,876 INFO L745 eck$LassoCheckResult]: Stem: 67#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 68#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 71#L26-3 assume main_~i~1#1 % 4294967296 < 32; 64#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 65#L17-3 assume foo_~i~0#1 <= foo_~size#1; 69#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 70#L17-3 [2024-11-08 18:09:02,876 INFO L747 eck$LassoCheckResult]: Loop: 70#L17-3 assume foo_~i~0#1 <= foo_~size#1; 74#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 70#L17-3 [2024-11-08 18:09:02,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:02,877 INFO L85 PathProgramCache]: Analyzing trace with hash 889540525, now seen corresponding path program 1 times [2024-11-08 18:09:02,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:02,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741690619] [2024-11-08 18:09:02,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:02,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:02,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,913 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:02,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,947 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:02,948 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:02,948 INFO L85 PathProgramCache]: Analyzing trace with hash 1446, now seen corresponding path program 1 times [2024-11-08 18:09:02,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:02,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401154508] [2024-11-08 18:09:02,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:02,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:02,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,969 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:02,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:02,976 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:02,981 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:02,981 INFO L85 PathProgramCache]: Analyzing trace with hash 149953106, now seen corresponding path program 2 times [2024-11-08 18:09:02,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:02,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917603222] [2024-11-08 18:09:02,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:02,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:03,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:03,186 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:03,186 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:03,186 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917603222] [2024-11-08 18:09:03,189 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [917603222] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:03,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [744656421] [2024-11-08 18:09:03,189 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 18:09:03,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:03,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:03,195 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:03,198 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-08 18:09:03,286 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 18:09:03,287 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:03,288 INFO L255 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-08 18:09:03,291 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:03,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:03,423 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 18:09:03,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [744656421] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:09:03,424 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 18:09:03,424 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 8 [2024-11-08 18:09:03,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [618769014] [2024-11-08 18:09:03,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:09:03,512 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:03,514 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 18:09:03,514 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-08 18:09:03,515 INFO L87 Difference]: Start difference. First operand 16 states and 20 transitions. cyclomatic complexity: 6 Second operand has 5 states, 5 states have (on average 1.6) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:03,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:03,609 INFO L93 Difference]: Finished difference Result 22 states and 26 transitions. [2024-11-08 18:09:03,609 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 26 transitions. [2024-11-08 18:09:03,610 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-08 18:09:03,611 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 26 transitions. [2024-11-08 18:09:03,611 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2024-11-08 18:09:03,611 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-08 18:09:03,611 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 26 transitions. [2024-11-08 18:09:03,612 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:03,612 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 26 transitions. [2024-11-08 18:09:03,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 26 transitions. [2024-11-08 18:09:03,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 17. [2024-11-08 18:09:03,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.2352941176470589) internal successors, (21), 16 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:03,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2024-11-08 18:09:03,614 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 21 transitions. [2024-11-08 18:09:03,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 18:09:03,616 INFO L425 stractBuchiCegarLoop]: Abstraction has 17 states and 21 transitions. [2024-11-08 18:09:03,616 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 18:09:03,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 21 transitions. [2024-11-08 18:09:03,617 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-08 18:09:03,617 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:03,617 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:03,618 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:09:03,618 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-08 18:09:03,618 INFO L745 eck$LassoCheckResult]: Stem: 143#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 144#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 147#L26-3 assume main_~i~1#1 % 4294967296 < 32; 140#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 141#L17-3 assume foo_~i~0#1 <= foo_~size#1; 145#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 146#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 148#L17-4 [2024-11-08 18:09:03,618 INFO L747 eck$LassoCheckResult]: Loop: 148#L17-4 foo_#res#1 := foo_~i~0#1; 135#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 136#L26-3 assume main_~i~1#1 % 4294967296 < 32; 149#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 150#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 148#L17-4 [2024-11-08 18:09:03,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:03,619 INFO L85 PathProgramCache]: Analyzing trace with hash 1805952521, now seen corresponding path program 1 times [2024-11-08 18:09:03,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:03,620 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067942040] [2024-11-08 18:09:03,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:03,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:03,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:03,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:03,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:03,645 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:03,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:03,646 INFO L85 PathProgramCache]: Analyzing trace with hash 51574350, now seen corresponding path program 2 times [2024-11-08 18:09:03,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:03,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345204719] [2024-11-08 18:09:03,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:03,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:03,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:03,657 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:03,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:03,669 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:03,670 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:03,670 INFO L85 PathProgramCache]: Analyzing trace with hash -1878207162, now seen corresponding path program 1 times [2024-11-08 18:09:03,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:03,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475285467] [2024-11-08 18:09:03,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:03,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:03,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:03,826 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:03,827 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:03,827 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475285467] [2024-11-08 18:09:03,827 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1475285467] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:03,827 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1216752941] [2024-11-08 18:09:03,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:03,828 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:03,828 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:03,832 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:03,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-08 18:09:03,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:03,918 INFO L255 TraceCheckSpWp]: Trace formula consists of 87 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-08 18:09:03,919 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:03,982 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:03,982 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:04,058 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:04,059 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1216752941] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:04,059 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:04,059 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2024-11-08 18:09:04,059 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627961216] [2024-11-08 18:09:04,060 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:04,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:04,207 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 18:09:04,208 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-08 18:09:04,208 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. cyclomatic complexity: 6 Second operand has 9 states, 8 states have (on average 4.0) internal successors, (32), 9 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:04,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:04,361 INFO L93 Difference]: Finished difference Result 25 states and 28 transitions. [2024-11-08 18:09:04,361 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 28 transitions. [2024-11-08 18:09:04,362 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-08 18:09:04,362 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 28 transitions. [2024-11-08 18:09:04,363 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2024-11-08 18:09:04,363 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-08 18:09:04,363 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 28 transitions. [2024-11-08 18:09:04,363 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:04,363 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 28 transitions. [2024-11-08 18:09:04,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 28 transitions. [2024-11-08 18:09:04,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 20. [2024-11-08 18:09:04,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.15) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:04,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 23 transitions. [2024-11-08 18:09:04,369 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 23 transitions. [2024-11-08 18:09:04,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 18:09:04,371 INFO L425 stractBuchiCegarLoop]: Abstraction has 20 states and 23 transitions. [2024-11-08 18:09:04,371 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 18:09:04,371 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 23 transitions. [2024-11-08 18:09:04,372 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-08 18:09:04,372 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:04,372 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:04,372 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:09:04,373 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1, 1, 1, 1] [2024-11-08 18:09:04,373 INFO L745 eck$LassoCheckResult]: Stem: 271#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 272#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 276#L26-3 assume main_~i~1#1 % 4294967296 < 32; 268#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 269#L17-3 assume foo_~i~0#1 <= foo_~size#1; 275#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 280#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 277#L17-4 [2024-11-08 18:09:04,373 INFO L747 eck$LassoCheckResult]: Loop: 277#L17-4 foo_#res#1 := foo_~i~0#1; 263#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 264#L26-3 assume main_~i~1#1 % 4294967296 < 32; 278#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 279#L17-3 assume foo_~i~0#1 <= foo_~size#1; 273#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 274#L17-3 assume foo_~i~0#1 <= foo_~size#1; 282#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 281#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 277#L17-4 [2024-11-08 18:09:04,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:04,373 INFO L85 PathProgramCache]: Analyzing trace with hash 1805952521, now seen corresponding path program 2 times [2024-11-08 18:09:04,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:04,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023783129] [2024-11-08 18:09:04,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:04,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:04,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:04,396 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:04,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:04,415 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:04,415 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:04,415 INFO L85 PathProgramCache]: Analyzing trace with hash -1197880060, now seen corresponding path program 1 times [2024-11-08 18:09:04,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:04,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249967305] [2024-11-08 18:09:04,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:04,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:04,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:04,439 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:04,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:04,459 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:04,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:04,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1729851388, now seen corresponding path program 2 times [2024-11-08 18:09:04,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:04,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093246544] [2024-11-08 18:09:04,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:04,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:04,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:04,495 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:04,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:04,514 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:04,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2024-11-08 18:09:05,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2024-11-08 18:09:05,192 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:09:05,192 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:09:05,192 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:09:05,193 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:09:05,193 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 18:09:05,193 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:05,193 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:09:05,193 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:09:05,193 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration4_Lasso [2024-11-08 18:09:05,193 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:09:05,194 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:09:05,214 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,531 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,538 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,540 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,543 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,545 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,549 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,552 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,554 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,557 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,561 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,563 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,566 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,568 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:05,899 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 18:09:05,904 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 18:09:05,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:05,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:05,907 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:05,910 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-08 18:09:05,912 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:05,927 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:05,928 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:05,928 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:05,928 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:05,941 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:05,942 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:05,956 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:05,975 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-08 18:09:05,976 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:05,976 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:05,978 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:05,980 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-08 18:09:05,981 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:05,995 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:05,996 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:05,996 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:05,996 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:05,996 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:05,997 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:05,997 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:05,999 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,016 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-11-08 18:09:06,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,017 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,018 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,021 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-08 18:09:06,023 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,036 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,037 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,037 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,037 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,046 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,046 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,054 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,072 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-11-08 18:09:06,072 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,072 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,074 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,075 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-08 18:09:06,077 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,091 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,091 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,092 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,092 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,099 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,099 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,107 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,125 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-11-08 18:09:06,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,127 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,129 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-08 18:09:06,130 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,144 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,144 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,144 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,144 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,146 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,146 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,150 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,168 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-11-08 18:09:06,169 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,170 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,171 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,174 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-08 18:09:06,175 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,189 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,190 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,190 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,190 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,194 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,195 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,199 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,222 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-11-08 18:09:06,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,224 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,226 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-08 18:09:06,227 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,239 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,240 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,240 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,240 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,247 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,247 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,266 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,284 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2024-11-08 18:09:06,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,285 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,286 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,288 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-08 18:09:06,289 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,303 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,303 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,303 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,303 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,306 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,306 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,314 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,332 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-08 18:09:06,332 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,332 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,334 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,341 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-08 18:09:06,342 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,356 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,356 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,356 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,357 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,361 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,361 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,368 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:06,387 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:06,388 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,389 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,390 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-08 18:09:06,393 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:06,407 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:06,407 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:06,407 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:06,408 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:06,410 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:06,411 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:06,416 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 18:09:06,427 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-11-08 18:09:06,427 INFO L444 ModelExtractionUtils]: 2 out of 7 variables were initially zero. Simplification set additionally 2 variables to zero. [2024-11-08 18:09:06,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:06,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:06,435 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:06,446 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-08 18:09:06,446 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 18:09:06,464 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-08 18:09:06,464 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 18:09:06,465 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 1 Supporting invariants [] [2024-11-08 18:09:06,483 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-08 18:09:06,518 INFO L156 tatePredicateManager]: 6 out of 6 supporting invariants were superfluous and have been removed [2024-11-08 18:09:06,563 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:06,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:06,583 INFO L255 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:09:06,584 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:06,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:06,627 INFO L255 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-08 18:09:06,628 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:06,754 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-08 18:09:06,803 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:06,806 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2024-11-08 18:09:06,808 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 20 states and 23 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:06,929 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 20 states and 23 transitions. cyclomatic complexity: 5. Second operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 39 states and 46 transitions. Complement of second has 13 states. [2024-11-08 18:09:06,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 1 stem states 5 non-accepting loop states 1 accepting loop states [2024-11-08 18:09:06,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:06,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 23 transitions. [2024-11-08 18:09:06,933 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 7 letters. Loop has 9 letters. [2024-11-08 18:09:06,934 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:06,934 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 16 letters. Loop has 9 letters. [2024-11-08 18:09:06,934 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:06,934 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 7 letters. Loop has 18 letters. [2024-11-08 18:09:06,935 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:06,935 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 46 transitions. [2024-11-08 18:09:06,936 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-08 18:09:06,936 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 39 states and 46 transitions. [2024-11-08 18:09:06,936 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2024-11-08 18:09:06,937 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-08 18:09:06,937 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 46 transitions. [2024-11-08 18:09:06,937 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:06,937 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 46 transitions. [2024-11-08 18:09:06,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 46 transitions. [2024-11-08 18:09:06,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 35. [2024-11-08 18:09:06,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.2) internal successors, (42), 34 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:06,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 42 transitions. [2024-11-08 18:09:06,940 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35 states and 42 transitions. [2024-11-08 18:09:06,940 INFO L425 stractBuchiCegarLoop]: Abstraction has 35 states and 42 transitions. [2024-11-08 18:09:06,940 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-08 18:09:06,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 42 transitions. [2024-11-08 18:09:06,941 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-08 18:09:06,941 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:06,941 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:06,942 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:09:06,942 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-08 18:09:06,942 INFO L745 eck$LassoCheckResult]: Stem: 441#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 442#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 448#L26-3 assume main_~i~1#1 % 4294967296 < 32; 436#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 437#L17-3 assume foo_~i~0#1 <= foo_~size#1; 456#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 455#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 452#L17-4 foo_#res#1 := foo_~i~0#1; 429#foo_returnLabel#1 [2024-11-08 18:09:06,942 INFO L747 eck$LassoCheckResult]: Loop: 429#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 430#L26-3 assume main_~i~1#1 % 4294967296 < 32; 451#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 443#L17-3 assume foo_~i~0#1 <= foo_~size#1; 444#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 446#L17-3 assume foo_~i~0#1 <= foo_~size#1; 461#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 460#L17-3 assume foo_~i~0#1 <= foo_~size#1; 454#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 453#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 449#L17-4 foo_#res#1 := foo_~i~0#1; 429#foo_returnLabel#1 [2024-11-08 18:09:06,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:06,943 INFO L85 PathProgramCache]: Analyzing trace with hash 149953327, now seen corresponding path program 1 times [2024-11-08 18:09:06,943 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:06,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714983546] [2024-11-08 18:09:06,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:06,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:06,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:06,954 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:06,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:06,963 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:06,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:06,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1837293137, now seen corresponding path program 2 times [2024-11-08 18:09:06,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:06,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839762437] [2024-11-08 18:09:06,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:06,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:06,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:06,975 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:06,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:06,990 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:06,991 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:06,991 INFO L85 PathProgramCache]: Analyzing trace with hash -1310073407, now seen corresponding path program 3 times [2024-11-08 18:09:06,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:06,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832737439] [2024-11-08 18:09:06,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:06,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:07,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:07,189 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:07,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:07,189 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832737439] [2024-11-08 18:09:07,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832737439] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:07,190 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1785025621] [2024-11-08 18:09:07,190 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 18:09:07,190 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:07,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:07,193 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:07,196 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-08 18:09:07,273 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-08 18:09:07,273 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:07,274 INFO L255 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-08 18:09:07,275 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:07,371 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:07,371 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:07,458 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:07,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1785025621] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:07,458 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:07,459 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2024-11-08 18:09:07,459 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547558847] [2024-11-08 18:09:07,462 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:07,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 32 [2024-11-08 18:09:07,854 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:07,854 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-08 18:09:07,855 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2024-11-08 18:09:07,855 INFO L87 Difference]: Start difference. First operand 35 states and 42 transitions. cyclomatic complexity: 10 Second operand has 12 states, 12 states have (on average 3.25) internal successors, (39), 12 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:08,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:08,047 INFO L93 Difference]: Finished difference Result 60 states and 69 transitions. [2024-11-08 18:09:08,047 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 60 states and 69 transitions. [2024-11-08 18:09:08,049 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-08 18:09:08,051 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 60 states to 55 states and 64 transitions. [2024-11-08 18:09:08,051 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2024-11-08 18:09:08,052 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2024-11-08 18:09:08,052 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 64 transitions. [2024-11-08 18:09:08,052 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:08,052 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 64 transitions. [2024-11-08 18:09:08,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 64 transitions. [2024-11-08 18:09:08,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 46. [2024-11-08 18:09:08,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.173913043478261) internal successors, (54), 45 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:08,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 54 transitions. [2024-11-08 18:09:08,057 INFO L240 hiAutomatonCegarLoop]: Abstraction has 46 states and 54 transitions. [2024-11-08 18:09:08,057 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 18:09:08,058 INFO L425 stractBuchiCegarLoop]: Abstraction has 46 states and 54 transitions. [2024-11-08 18:09:08,058 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-08 18:09:08,058 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 54 transitions. [2024-11-08 18:09:08,059 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-08 18:09:08,060 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:08,060 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:08,060 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:09:08,060 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-08 18:09:08,061 INFO L745 eck$LassoCheckResult]: Stem: 671#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 672#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 679#L26-3 assume main_~i~1#1 % 4294967296 < 32; 666#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 667#L17-3 assume foo_~i~0#1 <= foo_~size#1; 694#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 689#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 690#L17-4 foo_#res#1 := foo_~i~0#1; 659#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 660#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 670#L26-4 main_~i~1#1 := 0; 663#L29-3 [2024-11-08 18:09:08,061 INFO L747 eck$LassoCheckResult]: Loop: 663#L29-3 assume main_~i~1#1 % 4294967296 < 32; 664#L29-1 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 665#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 663#L29-3 [2024-11-08 18:09:08,061 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:08,061 INFO L85 PathProgramCache]: Analyzing trace with hash 493602701, now seen corresponding path program 1 times [2024-11-08 18:09:08,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:08,062 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134765261] [2024-11-08 18:09:08,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:08,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:08,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:08,144 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:08,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:08,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134765261] [2024-11-08 18:09:08,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1134765261] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:08,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [997393279] [2024-11-08 18:09:08,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:08,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:08,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:08,147 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:08,149 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-08 18:09:08,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:08,223 INFO L255 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-08 18:09:08,224 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:08,246 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:08,246 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:08,300 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 18:09:08,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [997393279] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:08,300 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:08,300 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-08 18:09:08,301 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [931209688] [2024-11-08 18:09:08,301 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:08,301 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:09:08,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:08,302 INFO L85 PathProgramCache]: Analyzing trace with hash 63720, now seen corresponding path program 1 times [2024-11-08 18:09:08,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:08,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [721196219] [2024-11-08 18:09:08,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:08,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:08,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:08,308 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:08,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:08,312 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:08,378 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:08,378 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 18:09:08,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2024-11-08 18:09:08,379 INFO L87 Difference]: Start difference. First operand 46 states and 54 transitions. cyclomatic complexity: 11 Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:08,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:08,495 INFO L93 Difference]: Finished difference Result 84 states and 94 transitions. [2024-11-08 18:09:08,495 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84 states and 94 transitions. [2024-11-08 18:09:08,497 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2024-11-08 18:09:08,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84 states to 81 states and 91 transitions. [2024-11-08 18:09:08,498 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2024-11-08 18:09:08,498 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2024-11-08 18:09:08,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 81 states and 91 transitions. [2024-11-08 18:09:08,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:08,499 INFO L218 hiAutomatonCegarLoop]: Abstraction has 81 states and 91 transitions. [2024-11-08 18:09:08,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states and 91 transitions. [2024-11-08 18:09:08,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 66. [2024-11-08 18:09:08,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.1363636363636365) internal successors, (75), 65 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:08,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 75 transitions. [2024-11-08 18:09:08,505 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 75 transitions. [2024-11-08 18:09:08,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 18:09:08,506 INFO L425 stractBuchiCegarLoop]: Abstraction has 66 states and 75 transitions. [2024-11-08 18:09:08,506 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-08 18:09:08,506 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 75 transitions. [2024-11-08 18:09:08,508 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2024-11-08 18:09:08,508 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:08,508 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:08,509 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 3, 3, 2, 2, 2, 1, 1] [2024-11-08 18:09:08,509 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-08 18:09:08,509 INFO L745 eck$LassoCheckResult]: Stem: 873#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 874#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 875#L26-3 assume main_~i~1#1 % 4294967296 < 32; 922#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 921#L17-3 assume foo_~i~0#1 <= foo_~size#1; 920#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 906#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 880#L17-4 foo_#res#1 := foo_~i~0#1; 863#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 864#L26-3 assume main_~i~1#1 % 4294967296 < 32; 870#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 871#L17-3 assume foo_~i~0#1 <= foo_~size#1; 877#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 879#L17-3 assume foo_~i~0#1 <= foo_~size#1; 924#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 923#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 881#L17-4 foo_#res#1 := foo_~i~0#1; 861#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 862#L26-3 assume main_~i~1#1 % 4294967296 < 32; 868#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 869#L17-3 assume foo_~i~0#1 <= foo_~size#1; 876#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 878#L17-3 assume foo_~i~0#1 <= foo_~size#1; 926#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 925#L17-3 assume foo_~i~0#1 <= foo_~size#1; 910#L17-1 [2024-11-08 18:09:08,509 INFO L747 eck$LassoCheckResult]: Loop: 910#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 909#L17-3 assume foo_~i~0#1 <= foo_~size#1; 910#L17-1 [2024-11-08 18:09:08,510 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:08,510 INFO L85 PathProgramCache]: Analyzing trace with hash 2079139682, now seen corresponding path program 4 times [2024-11-08 18:09:08,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:08,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802986054] [2024-11-08 18:09:08,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:08,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:08,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:08,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:08,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:08,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:08,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:08,569 INFO L85 PathProgramCache]: Analyzing trace with hash 1596, now seen corresponding path program 2 times [2024-11-08 18:09:08,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:08,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [278776419] [2024-11-08 18:09:08,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:08,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:08,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:08,575 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:08,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:08,582 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:08,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:08,583 INFO L85 PathProgramCache]: Analyzing trace with hash 893442397, now seen corresponding path program 5 times [2024-11-08 18:09:08,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:08,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790204370] [2024-11-08 18:09:08,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:08,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:08,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:08,831 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 4 proven. 50 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-08 18:09:08,831 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:08,832 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1790204370] [2024-11-08 18:09:08,832 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1790204370] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:08,832 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [462248696] [2024-11-08 18:09:08,832 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 18:09:08,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:08,832 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:08,834 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:08,836 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-08 18:09:08,966 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-11-08 18:09:08,967 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:08,968 INFO L255 TraceCheckSpWp]: Trace formula consists of 176 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-08 18:09:08,970 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:09,116 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 9 proven. 45 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-08 18:09:09,117 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:09,231 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 9 proven. 45 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-08 18:09:09,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [462248696] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:09,232 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:09,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2024-11-08 18:09:09,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [267964030] [2024-11-08 18:09:09,233 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:09,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:09,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-08 18:09:09,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2024-11-08 18:09:09,316 INFO L87 Difference]: Start difference. First operand 66 states and 75 transitions. cyclomatic complexity: 13 Second operand has 15 states, 14 states have (on average 3.142857142857143) internal successors, (44), 15 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:09,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:09,573 INFO L93 Difference]: Finished difference Result 79 states and 87 transitions. [2024-11-08 18:09:09,573 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 87 transitions. [2024-11-08 18:09:09,575 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-08 18:09:09,575 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 79 states and 87 transitions. [2024-11-08 18:09:09,576 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2024-11-08 18:09:09,576 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2024-11-08 18:09:09,576 INFO L73 IsDeterministic]: Start isDeterministic. Operand 79 states and 87 transitions. [2024-11-08 18:09:09,576 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:09,576 INFO L218 hiAutomatonCegarLoop]: Abstraction has 79 states and 87 transitions. [2024-11-08 18:09:09,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states and 87 transitions. [2024-11-08 18:09:09,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 68. [2024-11-08 18:09:09,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.1176470588235294) internal successors, (76), 67 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:09,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 76 transitions. [2024-11-08 18:09:09,581 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 76 transitions. [2024-11-08 18:09:09,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-08 18:09:09,582 INFO L425 stractBuchiCegarLoop]: Abstraction has 68 states and 76 transitions. [2024-11-08 18:09:09,582 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-08 18:09:09,582 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 76 transitions. [2024-11-08 18:09:09,583 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-08 18:09:09,583 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:09,583 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:09,584 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 3, 3, 1, 1] [2024-11-08 18:09:09,584 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-08 18:09:09,584 INFO L745 eck$LassoCheckResult]: Stem: 1212#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1213#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1220#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1221#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1265#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1263#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1252#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1222#L17-4 foo_#res#1 := foo_~i~0#1; 1223#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1261#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1259#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1257#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1255#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1251#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1250#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1249#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1246#L17-4 foo_#res#1 := foo_~i~0#1; 1202#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1203#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1209#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1210#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1267#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1266#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1264#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1253#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1247#L17-4 foo_#res#1 := foo_~i~0#1; 1245#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1244#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1226#L26-1 [2024-11-08 18:09:09,584 INFO L747 eck$LassoCheckResult]: Loop: 1226#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1242#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1240#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1238#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1236#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1234#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1231#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1230#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1228#L17-4 foo_#res#1 := foo_~i~0#1; 1227#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1225#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1226#L26-1 [2024-11-08 18:09:09,585 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:09,585 INFO L85 PathProgramCache]: Analyzing trace with hash 1927123259, now seen corresponding path program 6 times [2024-11-08 18:09:09,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:09,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215982753] [2024-11-08 18:09:09,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:09,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:09,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:09,821 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 14 proven. 34 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-08 18:09:09,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:09,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215982753] [2024-11-08 18:09:09,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [215982753] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:09,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [298440190] [2024-11-08 18:09:09,822 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 18:09:09,822 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:09,823 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:09,825 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:09,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-08 18:09:09,929 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 6 check-sat command(s) [2024-11-08 18:09:09,929 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:09,930 INFO L255 TraceCheckSpWp]: Trace formula consists of 177 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-08 18:09:09,933 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:10,041 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-08 18:09:10,041 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:10,163 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-08 18:09:10,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [298440190] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:10,163 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:10,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2024-11-08 18:09:10,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297913998] [2024-11-08 18:09:10,164 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:10,164 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:09:10,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:10,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1508456569, now seen corresponding path program 3 times [2024-11-08 18:09:10,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:10,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1097886427] [2024-11-08 18:09:10,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:10,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:10,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:10,182 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:10,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:10,194 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:10,501 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:10,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-08 18:09:10,501 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-11-08 18:09:10,502 INFO L87 Difference]: Start difference. First operand 68 states and 76 transitions. cyclomatic complexity: 11 Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:10,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:10,808 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2024-11-08 18:09:10,809 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 78 transitions. [2024-11-08 18:09:10,809 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-08 18:09:10,810 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 52 states and 54 transitions. [2024-11-08 18:09:10,810 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2024-11-08 18:09:10,811 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-08 18:09:10,811 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 54 transitions. [2024-11-08 18:09:10,811 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:10,811 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 54 transitions. [2024-11-08 18:09:10,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 54 transitions. [2024-11-08 18:09:10,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 45. [2024-11-08 18:09:10,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 44 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:10,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2024-11-08 18:09:10,815 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 47 transitions. [2024-11-08 18:09:10,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-08 18:09:10,816 INFO L425 stractBuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2024-11-08 18:09:10,816 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-08 18:09:10,817 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 47 transitions. [2024-11-08 18:09:10,817 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-08 18:09:10,817 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:10,817 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:10,821 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-08 18:09:10,821 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-08 18:09:10,821 INFO L745 eck$LassoCheckResult]: Stem: 1542#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1543#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1544#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1578#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1577#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1576#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1574#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1573#L17-4 foo_#res#1 := foo_~i~0#1; 1534#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1535#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1539#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1540#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1547#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1545#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1546#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1575#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1548#L17-4 foo_#res#1 := foo_~i~0#1; 1549#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1572#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1571#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1570#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1569#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1568#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1567#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1566#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1565#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1564#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1563#L17-4 foo_#res#1 := foo_~i~0#1; 1562#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1561#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1551#L26-1 [2024-11-08 18:09:10,822 INFO L747 eck$LassoCheckResult]: Loop: 1551#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1560#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1559#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1558#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1557#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1556#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1555#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1554#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1553#L17-4 foo_#res#1 := foo_~i~0#1; 1552#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1550#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1551#L26-1 [2024-11-08 18:09:10,822 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:10,822 INFO L85 PathProgramCache]: Analyzing trace with hash 630348128, now seen corresponding path program 7 times [2024-11-08 18:09:10,822 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:10,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598062077] [2024-11-08 18:09:10,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:10,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:10,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:10,852 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:10,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:10,875 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:10,876 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:10,876 INFO L85 PathProgramCache]: Analyzing trace with hash -1508456569, now seen corresponding path program 4 times [2024-11-08 18:09:10,876 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:10,876 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110159352] [2024-11-08 18:09:10,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:10,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:10,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:10,887 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:10,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:10,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:10,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:10,898 INFO L85 PathProgramCache]: Analyzing trace with hash 1320103112, now seen corresponding path program 8 times [2024-11-08 18:09:10,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:10,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701586637] [2024-11-08 18:09:10,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:10,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:10,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:11,233 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 48 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-08 18:09:11,233 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:11,234 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701586637] [2024-11-08 18:09:11,234 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [701586637] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:11,234 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934414004] [2024-11-08 18:09:11,234 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 18:09:11,234 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:11,235 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:11,237 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:11,239 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-08 18:09:11,367 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 18:09:11,368 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:11,369 INFO L255 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 18:09:11,374 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:11,537 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-08 18:09:11,537 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:11,701 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-08 18:09:11,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934414004] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:11,702 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:11,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2024-11-08 18:09:11,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [516487792] [2024-11-08 18:09:11,703 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:11,979 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:11,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-08 18:09:11,980 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=254, Unknown=0, NotChecked=0, Total=342 [2024-11-08 18:09:11,980 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. cyclomatic complexity: 4 Second operand has 19 states, 19 states have (on average 3.1052631578947367) internal successors, (59), 19 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:12,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:12,416 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2024-11-08 18:09:12,416 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 59 transitions. [2024-11-08 18:09:12,417 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-08 18:09:12,418 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 59 transitions. [2024-11-08 18:09:12,418 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2024-11-08 18:09:12,418 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2024-11-08 18:09:12,418 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 59 transitions. [2024-11-08 18:09:12,418 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:12,418 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 59 transitions. [2024-11-08 18:09:12,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 59 transitions. [2024-11-08 18:09:12,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 47. [2024-11-08 18:09:12,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0425531914893618) internal successors, (49), 46 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:12,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2024-11-08 18:09:12,422 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 49 transitions. [2024-11-08 18:09:12,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-08 18:09:12,424 INFO L425 stractBuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2024-11-08 18:09:12,425 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-08 18:09:12,426 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 49 transitions. [2024-11-08 18:09:12,426 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2024-11-08 18:09:12,426 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:12,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:12,431 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-08 18:09:12,431 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2024-11-08 18:09:12,432 INFO L745 eck$LassoCheckResult]: Stem: 1928#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1929#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1930#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1925#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1926#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1931#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1964#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1962#L17-4 foo_#res#1 := foo_~i~0#1; 1920#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1921#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1934#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1966#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1932#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1933#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1965#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1963#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1935#L17-4 foo_#res#1 := foo_~i~0#1; 1936#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1961#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1960#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1959#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1958#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1957#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1956#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1955#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1954#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1953#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1952#L17-4 foo_#res#1 := foo_~i~0#1; 1951#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1950#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1938#L26-1 [2024-11-08 18:09:12,432 INFO L747 eck$LassoCheckResult]: Loop: 1938#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1949#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1948#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1947#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1946#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1945#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1944#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1943#L17-3 assume foo_~i~0#1 <= foo_~size#1; 1942#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1941#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1940#L17-4 foo_#res#1 := foo_~i~0#1; 1939#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1937#L26-3 assume main_~i~1#1 % 4294967296 < 32; 1938#L26-1 [2024-11-08 18:09:12,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:12,433 INFO L85 PathProgramCache]: Analyzing trace with hash 630348128, now seen corresponding path program 9 times [2024-11-08 18:09:12,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:12,433 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916190326] [2024-11-08 18:09:12,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:12,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:12,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:12,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:12,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:12,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:12,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:12,483 INFO L85 PathProgramCache]: Analyzing trace with hash 1867984044, now seen corresponding path program 5 times [2024-11-08 18:09:12,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:12,484 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941139073] [2024-11-08 18:09:12,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:12,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:12,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:12,495 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:12,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:12,505 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:12,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:12,506 INFO L85 PathProgramCache]: Analyzing trace with hash 1399539117, now seen corresponding path program 10 times [2024-11-08 18:09:12,506 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:12,506 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126628465] [2024-11-08 18:09:12,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:12,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:12,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:12,541 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:12,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:12,573 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:14,367 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:09:14,368 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:09:14,368 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:09:14,368 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:09:14,368 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 18:09:14,368 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:14,368 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:09:14,369 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:09:14,369 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration10_Lasso [2024-11-08 18:09:14,369 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:09:14,369 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:09:14,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,380 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,385 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,392 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,396 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,399 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,402 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,406 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,410 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,413 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,415 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,418 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,421 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,423 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,426 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:14,842 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 18:09:14,842 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 18:09:14,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:14,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:14,844 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:14,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-11-08 18:09:14,847 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:14,859 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:14,859 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:14,859 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:14,859 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:14,859 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:14,860 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:14,860 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:14,861 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:14,875 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:14,875 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:14,875 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:14,876 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:14,877 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-08 18:09:14,878 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:14,894 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:14,894 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:14,894 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:14,894 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:14,894 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:14,895 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:14,895 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:14,898 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:14,911 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:14,912 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:14,912 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:14,913 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:14,914 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-11-08 18:09:14,915 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:14,927 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:14,928 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:14,928 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:14,928 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:14,928 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:14,928 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:14,928 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:14,930 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:14,943 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:14,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:14,943 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:14,944 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:14,945 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-11-08 18:09:14,946 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:14,958 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:14,958 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:14,958 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:14,958 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:14,958 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:14,959 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:14,959 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:14,960 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:14,973 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:14,974 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:14,974 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:14,975 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:14,976 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-11-08 18:09:14,977 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:14,989 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:14,989 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:14,989 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:14,989 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:14,989 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:14,990 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:14,990 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:14,993 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,015 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2024-11-08 18:09:15,017 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,017 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,019 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,021 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-11-08 18:09:15,023 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,038 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,039 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,039 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,039 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,039 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,040 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,040 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,044 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,063 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,064 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,064 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,066 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,068 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-11-08 18:09:15,069 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,085 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,085 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,085 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,085 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,086 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,086 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,086 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,090 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,110 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2024-11-08 18:09:15,110 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,110 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,112 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,115 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-11-08 18:09:15,116 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,132 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,132 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,132 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,132 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,132 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,133 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,133 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,141 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,160 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2024-11-08 18:09:15,161 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,161 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,163 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,165 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2024-11-08 18:09:15,166 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,181 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,181 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,181 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,181 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,182 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,182 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,183 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,187 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,205 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,206 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,206 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,207 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,209 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2024-11-08 18:09:15,209 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,221 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,221 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,222 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,222 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,222 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,222 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,222 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,223 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,237 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,238 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,238 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,239 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,240 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2024-11-08 18:09:15,241 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,253 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,253 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,253 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,253 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,253 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,254 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,254 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,255 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,269 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,269 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,270 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2024-11-08 18:09:15,272 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,284 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,284 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,284 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,284 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,284 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,285 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,285 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,287 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,304 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,304 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,305 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,307 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-11-08 18:09:15,308 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,319 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,320 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,320 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,320 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,320 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,320 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,320 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,322 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,333 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2024-11-08 18:09:15,334 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,334 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,335 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,336 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-11-08 18:09:15,337 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,348 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,348 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,348 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,348 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,348 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,349 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,349 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,350 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,363 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2024-11-08 18:09:15,363 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,365 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,366 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2024-11-08 18:09:15,366 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,378 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,379 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:15,379 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,379 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,379 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,379 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:15,379 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:15,381 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,393 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,394 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,395 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,397 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2024-11-08 18:09:15,397 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,409 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,409 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,409 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,409 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,412 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:15,412 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:15,418 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,435 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Ended with exit code 0 [2024-11-08 18:09:15,436 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,436 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,437 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,439 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,439 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2024-11-08 18:09:15,451 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,451 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,451 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,451 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,453 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:15,453 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:15,459 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:15,472 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,472 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,472 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,473 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2024-11-08 18:09:15,475 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:15,487 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:15,487 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:15,487 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:15,487 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:15,490 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:15,490 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:15,497 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 18:09:15,511 INFO L443 ModelExtractionUtils]: Simplification made 6 calls to the SMT solver. [2024-11-08 18:09:15,512 INFO L444 ModelExtractionUtils]: 3 out of 10 variables were initially zero. Simplification set additionally 4 variables to zero. [2024-11-08 18:09:15,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:15,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:15,513 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:15,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2024-11-08 18:09:15,514 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 18:09:15,531 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-08 18:09:15,531 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 18:09:15,531 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 7 Supporting invariants [] [2024-11-08 18:09:15,549 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2024-11-08 18:09:15,565 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2024-11-08 18:09:15,579 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:15,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:15,647 INFO L255 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:09:15,649 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:15,744 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:15,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:15,757 INFO L255 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 18:09:15,758 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:15,947 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:15,947 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 8 loop predicates [2024-11-08 18:09:15,948 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4 Second operand has 9 states, 9 states have (on average 2.5555555555555554) internal successors, (23), 9 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:16,078 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4. Second operand has 9 states, 9 states have (on average 2.5555555555555554) internal successors, (23), 9 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 96 states and 103 transitions. Complement of second has 17 states. [2024-11-08 18:09:16,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 9 states 1 stem states 7 non-accepting loop states 1 accepting loop states [2024-11-08 18:09:16,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 2.5555555555555554) internal successors, (23), 9 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:16,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 28 transitions. [2024-11-08 18:09:16,081 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 28 transitions. Stem has 30 letters. Loop has 13 letters. [2024-11-08 18:09:16,082 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:16,082 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 28 transitions. Stem has 43 letters. Loop has 13 letters. [2024-11-08 18:09:16,082 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:16,082 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 28 transitions. Stem has 30 letters. Loop has 26 letters. [2024-11-08 18:09:16,083 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:16,083 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 103 transitions. [2024-11-08 18:09:16,084 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 19 [2024-11-08 18:09:16,085 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 71 states and 78 transitions. [2024-11-08 18:09:16,085 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2024-11-08 18:09:16,085 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2024-11-08 18:09:16,085 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71 states and 78 transitions. [2024-11-08 18:09:16,085 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:16,085 INFO L218 hiAutomatonCegarLoop]: Abstraction has 71 states and 78 transitions. [2024-11-08 18:09:16,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states and 78 transitions. [2024-11-08 18:09:16,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 67. [2024-11-08 18:09:16,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 67 states have (on average 1.1044776119402986) internal successors, (74), 66 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:16,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 74 transitions. [2024-11-08 18:09:16,090 INFO L240 hiAutomatonCegarLoop]: Abstraction has 67 states and 74 transitions. [2024-11-08 18:09:16,090 INFO L425 stractBuchiCegarLoop]: Abstraction has 67 states and 74 transitions. [2024-11-08 18:09:16,090 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-08 18:09:16,090 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 67 states and 74 transitions. [2024-11-08 18:09:16,091 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 [2024-11-08 18:09:16,091 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:16,091 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:16,092 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-08 18:09:16,092 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 1, 1, 1, 1, 1] [2024-11-08 18:09:16,092 INFO L745 eck$LassoCheckResult]: Stem: 2264#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2265#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2272#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2259#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2260#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2271#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2268#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2269#L17-4 foo_#res#1 := foo_~i~0#1; 2275#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2312#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2261#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2262#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2318#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2316#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2314#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2313#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2311#L17-4 foo_#res#1 := foo_~i~0#1; 2310#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2308#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2306#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2304#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2302#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2300#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2298#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2296#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2294#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2291#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2289#L17-4 foo_#res#1 := foo_~i~0#1; 2287#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2285#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2284#L26-1 [2024-11-08 18:09:16,092 INFO L747 eck$LassoCheckResult]: Loop: 2284#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2266#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2267#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2270#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2283#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2282#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2281#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2280#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2279#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2278#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2277#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2276#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2274#L17-4 foo_#res#1 := foo_~i~0#1; 2252#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2253#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2284#L26-1 [2024-11-08 18:09:16,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:16,093 INFO L85 PathProgramCache]: Analyzing trace with hash 630348128, now seen corresponding path program 11 times [2024-11-08 18:09:16,093 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:16,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750047970] [2024-11-08 18:09:16,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:16,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:16,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:16,117 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:16,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:16,147 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:16,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:16,149 INFO L85 PathProgramCache]: Analyzing trace with hash -367862639, now seen corresponding path program 6 times [2024-11-08 18:09:16,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:16,150 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46365050] [2024-11-08 18:09:16,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:16,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:16,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:16,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:16,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:16,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:16,174 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:16,174 INFO L85 PathProgramCache]: Analyzing trace with hash 428128594, now seen corresponding path program 12 times [2024-11-08 18:09:16,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:16,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889136681] [2024-11-08 18:09:16,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:16,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:16,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:16,567 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 43 proven. 131 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-08 18:09:16,567 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:16,567 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [889136681] [2024-11-08 18:09:16,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [889136681] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:16,568 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [942142774] [2024-11-08 18:09:16,568 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 18:09:16,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:16,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:16,569 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:16,571 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2024-11-08 18:09:16,748 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2024-11-08 18:09:16,749 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:16,751 INFO L255 TraceCheckSpWp]: Trace formula consists of 278 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-08 18:09:16,754 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:16,956 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 44 proven. 130 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-08 18:09:16,957 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:17,145 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 44 proven. 130 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-08 18:09:17,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [942142774] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:17,145 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:17,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 22 [2024-11-08 18:09:17,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [330259719] [2024-11-08 18:09:17,146 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:17,544 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:17,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-08 18:09:17,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=353, Unknown=0, NotChecked=0, Total=462 [2024-11-08 18:09:17,545 INFO L87 Difference]: Start difference. First operand 67 states and 74 transitions. cyclomatic complexity: 10 Second operand has 22 states, 22 states have (on average 3.1363636363636362) internal successors, (69), 22 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:17,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:17,935 INFO L93 Difference]: Finished difference Result 101 states and 107 transitions. [2024-11-08 18:09:17,935 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 107 transitions. [2024-11-08 18:09:17,936 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 [2024-11-08 18:09:17,937 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 91 states and 97 transitions. [2024-11-08 18:09:17,937 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2024-11-08 18:09:17,937 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2024-11-08 18:09:17,937 INFO L73 IsDeterministic]: Start isDeterministic. Operand 91 states and 97 transitions. [2024-11-08 18:09:17,937 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:17,937 INFO L218 hiAutomatonCegarLoop]: Abstraction has 91 states and 97 transitions. [2024-11-08 18:09:17,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states and 97 transitions. [2024-11-08 18:09:17,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 77. [2024-11-08 18:09:17,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.077922077922078) internal successors, (83), 76 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:17,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 83 transitions. [2024-11-08 18:09:17,948 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 83 transitions. [2024-11-08 18:09:17,948 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-08 18:09:17,949 INFO L425 stractBuchiCegarLoop]: Abstraction has 77 states and 83 transitions. [2024-11-08 18:09:17,949 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-08 18:09:17,949 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 83 transitions. [2024-11-08 18:09:17,950 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 [2024-11-08 18:09:17,950 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:17,950 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:17,951 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 5, 4, 4, 4, 4, 1, 1] [2024-11-08 18:09:17,951 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 1, 1, 1, 1, 1] [2024-11-08 18:09:17,952 INFO L745 eck$LassoCheckResult]: Stem: 2749#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2750#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2756#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2744#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2745#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2799#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2800#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2759#L17-4 foo_#res#1 := foo_~i~0#1; 2760#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2757#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2746#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2747#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2753#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2755#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2813#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2795#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2796#L17-4 foo_#res#1 := foo_~i~0#1; 2791#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2792#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2812#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2810#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2808#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2807#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2806#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2801#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2802#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2778#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2779#L17-4 foo_#res#1 := foo_~i~0#1; 2739#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2740#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2788#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2789#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2784#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2785#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2811#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2809#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2777#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2776#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2775#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2774#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2773#L17-4 foo_#res#1 := foo_~i~0#1; 2766#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2763#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2765#L26-1 [2024-11-08 18:09:17,952 INFO L747 eck$LassoCheckResult]: Loop: 2765#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2751#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2752#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2754#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2772#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2771#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2770#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2769#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2768#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2767#L17-3 assume foo_~i~0#1 <= foo_~size#1; 2762#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2761#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2758#L17-4 foo_#res#1 := foo_~i~0#1; 2737#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2738#L26-3 assume main_~i~1#1 % 4294967296 < 32; 2765#L26-1 [2024-11-08 18:09:17,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:17,953 INFO L85 PathProgramCache]: Analyzing trace with hash 1399539117, now seen corresponding path program 13 times [2024-11-08 18:09:17,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:17,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [124408273] [2024-11-08 18:09:17,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:17,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:17,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:17,997 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:18,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:18,033 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:18,033 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:18,033 INFO L85 PathProgramCache]: Analyzing trace with hash -367862639, now seen corresponding path program 7 times [2024-11-08 18:09:18,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:18,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689911261] [2024-11-08 18:09:18,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:18,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:18,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:18,046 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:18,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:18,060 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:18,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:18,064 INFO L85 PathProgramCache]: Analyzing trace with hash -770307739, now seen corresponding path program 14 times [2024-11-08 18:09:18,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:18,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908638235] [2024-11-08 18:09:18,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:18,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:18,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:18,129 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:18,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:18,173 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:22,072 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:09:22,072 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:09:22,072 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:09:22,072 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:09:22,073 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 18:09:22,073 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,073 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:09:22,073 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:09:22,073 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration12_Lasso [2024-11-08 18:09:22,073 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:09:22,073 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:09:22,076 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,078 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,081 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,084 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,087 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,090 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,093 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,095 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,098 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,403 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,406 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,408 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,410 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,412 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,416 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,418 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,420 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:22,674 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 18:09:22,674 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 18:09:22,674 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,674 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,679 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,682 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2024-11-08 18:09:22,685 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,700 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,700 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,701 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,701 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,701 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,701 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,701 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,704 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,719 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:22,719 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,720 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,721 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,722 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2024-11-08 18:09:22,723 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,734 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,735 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,735 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,735 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,735 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,735 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,735 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,737 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,748 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Ended with exit code 0 [2024-11-08 18:09:22,749 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,749 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,750 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,751 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2024-11-08 18:09:22,751 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,763 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,763 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,763 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,764 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,764 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,764 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,764 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,765 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,778 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Ended with exit code 0 [2024-11-08 18:09:22,778 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,778 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,779 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,781 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2024-11-08 18:09:22,781 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,793 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,793 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,793 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,793 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,794 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,794 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,794 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,796 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,811 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2024-11-08 18:09:22,812 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,812 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,813 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2024-11-08 18:09:22,815 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,827 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,827 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,827 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,827 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,827 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,828 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,828 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,829 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,841 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:22,843 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,844 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,846 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,848 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2024-11-08 18:09:22,858 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,858 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,859 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,859 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,859 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,859 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,859 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,861 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,873 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:22,874 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,875 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,879 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2024-11-08 18:09:22,879 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,891 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,891 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,891 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,892 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,892 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,892 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,892 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,893 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,908 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:22,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,908 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,909 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,911 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2024-11-08 18:09:22,911 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,923 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,923 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:22,923 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,923 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,923 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,924 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:22,924 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:22,925 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,937 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:22,937 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,939 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2024-11-08 18:09:22,941 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,953 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,953 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,953 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,953 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,955 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:22,955 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:22,960 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:22,972 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:22,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:22,972 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:22,974 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:22,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2024-11-08 18:09:22,979 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:22,994 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:22,994 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:22,994 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:22,994 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:22,996 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:22,996 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:23,001 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:23,021 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:23,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:23,023 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:23,024 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:23,027 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2024-11-08 18:09:23,028 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:23,043 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:23,043 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:23,043 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:23,044 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:23,044 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:23,044 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:23,044 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:23,047 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:23,066 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Ended with exit code 0 [2024-11-08 18:09:23,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:23,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:23,068 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:23,071 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2024-11-08 18:09:23,072 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:23,087 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:23,087 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:23,087 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:23,087 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:23,091 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:23,094 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:23,102 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:23,123 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:23,123 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:23,124 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:23,126 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:23,128 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Waiting until timeout for monitored process [2024-11-08 18:09:23,129 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:23,145 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:23,145 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:23,145 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:23,145 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:23,148 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:23,148 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:23,157 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 18:09:23,164 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-11-08 18:09:23,164 INFO L444 ModelExtractionUtils]: 5 out of 10 variables were initially zero. Simplification set additionally 2 variables to zero. [2024-11-08 18:09:23,165 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:23,165 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:23,166 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:23,167 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (53)] Waiting until timeout for monitored process [2024-11-08 18:09:23,167 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 18:09:23,184 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-08 18:09:23,184 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 18:09:23,184 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 9 Supporting invariants [] [2024-11-08 18:09:23,199 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Ended with exit code 0 [2024-11-08 18:09:23,230 INFO L156 tatePredicateManager]: 9 out of 9 supporting invariants were superfluous and have been removed [2024-11-08 18:09:23,248 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:23,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:23,315 INFO L255 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:09:23,317 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:23,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:23,405 INFO L255 TraceCheckSpWp]: Trace formula consists of 91 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-08 18:09:23,406 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:23,654 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (53)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:23,697 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:23,698 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 9 loop predicates [2024-11-08 18:09:23,698 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 77 states and 83 transitions. cyclomatic complexity: 9 Second operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 10 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:23,867 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 77 states and 83 transitions. cyclomatic complexity: 9. Second operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 10 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 167 states and 183 transitions. Complement of second has 19 states. [2024-11-08 18:09:23,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 10 states 1 stem states 8 non-accepting loop states 1 accepting loop states [2024-11-08 18:09:23,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 2.5) internal successors, (25), 10 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:23,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 31 transitions. [2024-11-08 18:09:23,869 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 31 transitions. Stem has 43 letters. Loop has 15 letters. [2024-11-08 18:09:23,869 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:23,870 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 31 transitions. Stem has 58 letters. Loop has 15 letters. [2024-11-08 18:09:23,870 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:23,870 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 31 transitions. Stem has 43 letters. Loop has 30 letters. [2024-11-08 18:09:23,870 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:23,871 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 183 transitions. [2024-11-08 18:09:23,873 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 21 [2024-11-08 18:09:23,874 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 109 states and 121 transitions. [2024-11-08 18:09:23,874 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 [2024-11-08 18:09:23,874 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2024-11-08 18:09:23,874 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 121 transitions. [2024-11-08 18:09:23,874 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:23,874 INFO L218 hiAutomatonCegarLoop]: Abstraction has 109 states and 121 transitions. [2024-11-08 18:09:23,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 121 transitions. [2024-11-08 18:09:23,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 99. [2024-11-08 18:09:23,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.1111111111111112) internal successors, (110), 98 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:23,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 110 transitions. [2024-11-08 18:09:23,880 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 110 transitions. [2024-11-08 18:09:23,880 INFO L425 stractBuchiCegarLoop]: Abstraction has 99 states and 110 transitions. [2024-11-08 18:09:23,880 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-08 18:09:23,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 110 transitions. [2024-11-08 18:09:23,881 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 20 [2024-11-08 18:09:23,881 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:23,882 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:23,882 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 5, 4, 4, 4, 4, 1, 1] [2024-11-08 18:09:23,882 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 6, 1, 1, 1, 1, 1] [2024-11-08 18:09:23,883 INFO L745 eck$LassoCheckResult]: Stem: 3251#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3252#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3260#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3246#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3247#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3317#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3313#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3314#L17-4 foo_#res#1 := foo_~i~0#1; 3309#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3310#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3321#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3320#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3318#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3319#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3315#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3316#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3311#L17-4 foo_#res#1 := foo_~i~0#1; 3312#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3261#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3248#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3249#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3324#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3325#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3326#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3255#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3256#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3322#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3323#L17-4 foo_#res#1 := foo_~i~0#1; 3337#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3336#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3335#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3334#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3333#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3332#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3331#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3330#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3329#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3328#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3327#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3281#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3282#L17-4 foo_#res#1 := foo_~i~0#1; 3277#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3278#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3274#L26-1 [2024-11-08 18:09:23,883 INFO L747 eck$LassoCheckResult]: Loop: 3274#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3253#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3254#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3257#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3273#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3272#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3271#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3270#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3269#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3268#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3267#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3266#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3265#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3264#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3262#L17-4 foo_#res#1 := foo_~i~0#1; 3239#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3240#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3274#L26-1 [2024-11-08 18:09:23,883 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:23,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1399539117, now seen corresponding path program 15 times [2024-11-08 18:09:23,884 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:23,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2238803] [2024-11-08 18:09:23,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:23,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:23,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:23,916 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:23,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:23,944 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:23,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:23,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1532877002, now seen corresponding path program 8 times [2024-11-08 18:09:23,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:23,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357391415] [2024-11-08 18:09:23,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:23,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:23,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:23,956 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:23,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:23,967 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:23,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:23,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1735561462, now seen corresponding path program 16 times [2024-11-08 18:09:23,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:23,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295487970] [2024-11-08 18:09:23,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:23,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:23,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:24,391 INFO L134 CoverageAnalysis]: Checked inductivity of 375 backedges. 64 proven. 281 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-08 18:09:24,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:24,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295487970] [2024-11-08 18:09:24,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1295487970] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:24,392 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [566133459] [2024-11-08 18:09:24,392 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-08 18:09:24,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:24,392 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:24,394 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:24,395 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2024-11-08 18:09:24,551 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-08 18:09:24,551 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:24,554 INFO L255 TraceCheckSpWp]: Trace formula consists of 367 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-08 18:09:24,556 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:24,800 INFO L134 CoverageAnalysis]: Checked inductivity of 375 backedges. 73 proven. 272 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-08 18:09:24,800 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:25,010 INFO L134 CoverageAnalysis]: Checked inductivity of 375 backedges. 73 proven. 272 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-08 18:09:25,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [566133459] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:25,011 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:25,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 26 [2024-11-08 18:09:25,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1894546585] [2024-11-08 18:09:25,012 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:25,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:25,642 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-08 18:09:25,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=502, Unknown=0, NotChecked=0, Total=650 [2024-11-08 18:09:25,643 INFO L87 Difference]: Start difference. First operand 99 states and 110 transitions. cyclomatic complexity: 15 Second operand has 26 states, 26 states have (on average 3.076923076923077) internal successors, (80), 26 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:26,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:26,248 INFO L93 Difference]: Finished difference Result 159 states and 173 transitions. [2024-11-08 18:09:26,249 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 159 states and 173 transitions. [2024-11-08 18:09:26,250 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 20 [2024-11-08 18:09:26,251 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 159 states to 147 states and 161 transitions. [2024-11-08 18:09:26,251 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2024-11-08 18:09:26,252 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2024-11-08 18:09:26,252 INFO L73 IsDeterministic]: Start isDeterministic. Operand 147 states and 161 transitions. [2024-11-08 18:09:26,252 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:26,252 INFO L218 hiAutomatonCegarLoop]: Abstraction has 147 states and 161 transitions. [2024-11-08 18:09:26,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states and 161 transitions. [2024-11-08 18:09:26,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 126. [2024-11-08 18:09:26,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 126 states have (on average 1.1111111111111112) internal successors, (140), 125 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:26,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 140 transitions. [2024-11-08 18:09:26,258 INFO L240 hiAutomatonCegarLoop]: Abstraction has 126 states and 140 transitions. [2024-11-08 18:09:26,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-11-08 18:09:26,259 INFO L425 stractBuchiCegarLoop]: Abstraction has 126 states and 140 transitions. [2024-11-08 18:09:26,260 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-08 18:09:26,260 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 126 states and 140 transitions. [2024-11-08 18:09:26,260 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 20 [2024-11-08 18:09:26,261 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:26,261 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:26,261 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2024-11-08 18:09:26,262 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-08 18:09:26,262 INFO L745 eck$LassoCheckResult]: Stem: 3932#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3933#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3939#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3927#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3928#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3995#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3994#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3993#L17-4 foo_#res#1 := foo_~i~0#1; 3992#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3991#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3990#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3989#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3988#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3987#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3986#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3985#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3984#L17-4 foo_#res#1 := foo_~i~0#1; 3983#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3982#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3981#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3980#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3979#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3978#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3977#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3976#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3975#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3974#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3973#L17-4 foo_#res#1 := foo_~i~0#1; 3972#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3971#L26-3 assume main_~i~1#1 % 4294967296 < 32; 3970#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3969#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3968#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3967#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3966#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3965#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3964#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3963#L17-3 assume foo_~i~0#1 <= foo_~size#1; 3962#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3961#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3960#L17-4 foo_#res#1 := foo_~i~0#1; 3959#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3947#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 3931#L26-4 main_~i~1#1 := 0; 3925#L29-3 [2024-11-08 18:09:26,262 INFO L747 eck$LassoCheckResult]: Loop: 3925#L29-3 assume main_~i~1#1 % 4294967296 < 32; 3926#L29-1 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 3924#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3925#L29-3 [2024-11-08 18:09:26,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:26,263 INFO L85 PathProgramCache]: Analyzing trace with hash 436040379, now seen corresponding path program 2 times [2024-11-08 18:09:26,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:26,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901086353] [2024-11-08 18:09:26,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:26,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:26,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:26,467 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-08 18:09:26,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:26,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901086353] [2024-11-08 18:09:26,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901086353] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:26,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [997344942] [2024-11-08 18:09:26,468 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 18:09:26,468 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:26,468 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:26,470 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:26,472 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2024-11-08 18:09:26,631 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 18:09:26,631 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:26,633 INFO L255 TraceCheckSpWp]: Trace formula consists of 268 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 18:09:26,635 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:26,724 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-08 18:09:26,725 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:26,884 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-08 18:09:26,884 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [997344942] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:26,884 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:26,884 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-08 18:09:26,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1534272113] [2024-11-08 18:09:26,885 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:26,885 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:09:26,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:26,885 INFO L85 PathProgramCache]: Analyzing trace with hash 63720, now seen corresponding path program 2 times [2024-11-08 18:09:26,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:26,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225301867] [2024-11-08 18:09:26,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:26,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:26,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:26,890 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:26,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:26,893 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:26,949 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:26,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-08 18:09:26,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2024-11-08 18:09:26,950 INFO L87 Difference]: Start difference. First operand 126 states and 140 transitions. cyclomatic complexity: 18 Second operand has 13 states, 13 states have (on average 4.923076923076923) internal successors, (64), 13 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:27,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:27,407 INFO L93 Difference]: Finished difference Result 383 states and 431 transitions. [2024-11-08 18:09:27,407 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 383 states and 431 transitions. [2024-11-08 18:09:27,410 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 28 [2024-11-08 18:09:27,412 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 383 states to 383 states and 431 transitions. [2024-11-08 18:09:27,412 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 121 [2024-11-08 18:09:27,413 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 121 [2024-11-08 18:09:27,413 INFO L73 IsDeterministic]: Start isDeterministic. Operand 383 states and 431 transitions. [2024-11-08 18:09:27,413 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:27,413 INFO L218 hiAutomatonCegarLoop]: Abstraction has 383 states and 431 transitions. [2024-11-08 18:09:27,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states and 431 transitions. [2024-11-08 18:09:27,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 345. [2024-11-08 18:09:27,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 345 states, 345 states have (on average 1.1333333333333333) internal successors, (391), 344 states have internal predecessors, (391), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:27,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 391 transitions. [2024-11-08 18:09:27,426 INFO L240 hiAutomatonCegarLoop]: Abstraction has 345 states and 391 transitions. [2024-11-08 18:09:27,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-08 18:09:27,427 INFO L425 stractBuchiCegarLoop]: Abstraction has 345 states and 391 transitions. [2024-11-08 18:09:27,427 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-08 18:09:27,427 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 345 states and 391 transitions. [2024-11-08 18:09:27,429 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 28 [2024-11-08 18:09:27,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:27,429 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:27,431 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [20, 19, 6, 6, 5, 5, 5, 1, 1] [2024-11-08 18:09:27,431 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-08 18:09:27,431 INFO L745 eck$LassoCheckResult]: Stem: 4723#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4724#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 4730#L26-3 assume main_~i~1#1 % 4294967296 < 32; 4731#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5028#L17-3 assume foo_~i~0#1 <= foo_~size#1; 5026#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5024#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5022#L17-4 foo_#res#1 := foo_~i~0#1; 5021#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5018#L26-3 assume main_~i~1#1 % 4294967296 < 32; 5016#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5014#L17-3 assume foo_~i~0#1 <= foo_~size#1; 5012#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5011#L17-3 assume foo_~i~0#1 <= foo_~size#1; 5008#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5005#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5002#L17-4 foo_#res#1 := foo_~i~0#1; 4999#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4996#L26-3 assume main_~i~1#1 % 4294967296 < 32; 4993#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4990#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4987#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4984#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4981#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4975#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4971#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4967#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4964#L17-4 foo_#res#1 := foo_~i~0#1; 4962#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4960#L26-3 assume main_~i~1#1 % 4294967296 < 32; 4958#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4956#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4954#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4952#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4950#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4947#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4944#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4940#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4937#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4936#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4935#L17-4 foo_#res#1 := foo_~i~0#1; 4934#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4932#L26-3 assume main_~i~1#1 % 4294967296 < 32; 4931#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4930#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4929#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4928#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4926#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4866#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4862#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4857#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4858#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4915#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4914#L17-4 foo_#res#1 := foo_~i~0#1; 4912#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4911#L26-3 assume main_~i~1#1 % 4294967296 < 32; 4718#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4719#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4725#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4726#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4813#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4811#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4809#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4807#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4805#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4803#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4801#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4799#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4797#L17-1 [2024-11-08 18:09:27,431 INFO L747 eck$LassoCheckResult]: Loop: 4797#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4796#L17-3 assume foo_~i~0#1 <= foo_~size#1; 4797#L17-1 [2024-11-08 18:09:27,432 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:27,432 INFO L85 PathProgramCache]: Analyzing trace with hash -1271381045, now seen corresponding path program 17 times [2024-11-08 18:09:27,432 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:27,432 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144872391] [2024-11-08 18:09:27,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:27,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:27,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:27,885 INFO L134 CoverageAnalysis]: Checked inductivity of 521 backedges. 314 proven. 152 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-11-08 18:09:27,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:27,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144872391] [2024-11-08 18:09:27,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144872391] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:27,886 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1131534620] [2024-11-08 18:09:27,886 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 18:09:27,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:27,886 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:27,889 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:27,890 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2024-11-08 18:09:28,108 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2024-11-08 18:09:28,108 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:28,112 INFO L255 TraceCheckSpWp]: Trace formula consists of 375 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-11-08 18:09:28,118 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:28,358 INFO L134 CoverageAnalysis]: Checked inductivity of 521 backedges. 328 proven. 140 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-11-08 18:09:28,358 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:28,641 INFO L134 CoverageAnalysis]: Checked inductivity of 521 backedges. 356 proven. 112 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2024-11-08 18:09:28,641 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1131534620] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:28,641 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:28,642 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 26 [2024-11-08 18:09:28,642 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [737867728] [2024-11-08 18:09:28,642 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:28,643 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:09:28,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:28,643 INFO L85 PathProgramCache]: Analyzing trace with hash 1596, now seen corresponding path program 3 times [2024-11-08 18:09:28,643 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:28,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190765347] [2024-11-08 18:09:28,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:28,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:28,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:28,651 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:28,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:28,656 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:28,749 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:28,749 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-08 18:09:28,750 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=510, Unknown=0, NotChecked=0, Total=650 [2024-11-08 18:09:28,750 INFO L87 Difference]: Start difference. First operand 345 states and 391 transitions. cyclomatic complexity: 60 Second operand has 26 states, 26 states have (on average 3.1923076923076925) internal successors, (83), 26 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:29,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:29,671 INFO L93 Difference]: Finished difference Result 343 states and 370 transitions. [2024-11-08 18:09:29,672 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 343 states and 370 transitions. [2024-11-08 18:09:29,676 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 28 [2024-11-08 18:09:29,678 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 343 states to 254 states and 276 transitions. [2024-11-08 18:09:29,678 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 105 [2024-11-08 18:09:29,678 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 105 [2024-11-08 18:09:29,678 INFO L73 IsDeterministic]: Start isDeterministic. Operand 254 states and 276 transitions. [2024-11-08 18:09:29,679 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:29,679 INFO L218 hiAutomatonCegarLoop]: Abstraction has 254 states and 276 transitions. [2024-11-08 18:09:29,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states and 276 transitions. [2024-11-08 18:09:29,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 242. [2024-11-08 18:09:29,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.0909090909090908) internal successors, (264), 241 states have internal predecessors, (264), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:29,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 264 transitions. [2024-11-08 18:09:29,688 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 264 transitions. [2024-11-08 18:09:29,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2024-11-08 18:09:29,689 INFO L425 stractBuchiCegarLoop]: Abstraction has 242 states and 264 transitions. [2024-11-08 18:09:29,689 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-08 18:09:29,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 264 transitions. [2024-11-08 18:09:29,691 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 28 [2024-11-08 18:09:29,691 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:29,692 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:29,693 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [21, 20, 6, 6, 5, 5, 5, 1, 1] [2024-11-08 18:09:29,693 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-08 18:09:29,694 INFO L745 eck$LassoCheckResult]: Stem: 5882#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5883#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 5890#L26-3 assume main_~i~1#1 % 4294967296 < 32; 5877#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5878#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6111#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6109#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6108#L17-4 foo_#res#1 := foo_~i~0#1; 6107#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5892#L26-3 assume main_~i~1#1 % 4294967296 < 32; 5879#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5880#L17-3 assume foo_~i~0#1 <= foo_~size#1; 5889#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5886#L17-3 assume foo_~i~0#1 <= foo_~size#1; 5887#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6110#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5894#L17-4 foo_#res#1 := foo_~i~0#1; 5872#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5873#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6106#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6105#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6104#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6103#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6102#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6101#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6100#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6099#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6098#L17-4 foo_#res#1 := foo_~i~0#1; 6097#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6096#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6095#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6094#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6093#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6092#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6091#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6090#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6089#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6088#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6087#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6086#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6085#L17-4 foo_#res#1 := foo_~i~0#1; 6084#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6083#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6082#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6081#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6080#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6078#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6076#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6074#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6072#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6070#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6068#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6066#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6065#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6053#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6052#L17-4 foo_#res#1 := foo_~i~0#1; 6051#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6049#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6048#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6046#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6044#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6042#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6039#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6036#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6033#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6030#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6027#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6024#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6021#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6018#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6016#L17-1 [2024-11-08 18:09:29,694 INFO L747 eck$LassoCheckResult]: Loop: 6016#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6015#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6016#L17-1 [2024-11-08 18:09:29,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:29,695 INFO L85 PathProgramCache]: Analyzing trace with hash 1138532144, now seen corresponding path program 18 times [2024-11-08 18:09:29,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:29,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359228993] [2024-11-08 18:09:29,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:29,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:29,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:29,748 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:29,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:29,798 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:29,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:29,798 INFO L85 PathProgramCache]: Analyzing trace with hash 1596, now seen corresponding path program 4 times [2024-11-08 18:09:29,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:29,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394649937] [2024-11-08 18:09:29,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:29,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:29,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:29,804 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:29,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:29,808 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:29,808 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:29,808 INFO L85 PathProgramCache]: Analyzing trace with hash -1087269461, now seen corresponding path program 19 times [2024-11-08 18:09:29,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:29,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415736203] [2024-11-08 18:09:29,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:29,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:29,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:30,341 INFO L134 CoverageAnalysis]: Checked inductivity of 611 backedges. 25 proven. 531 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-11-08 18:09:30,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:30,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415736203] [2024-11-08 18:09:30,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [415736203] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:30,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [766296304] [2024-11-08 18:09:30,343 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 18:09:30,343 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:30,343 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:30,345 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:30,348 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2024-11-08 18:09:30,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:30,554 INFO L255 TraceCheckSpWp]: Trace formula consists of 443 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-11-08 18:09:30,556 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:30,843 INFO L134 CoverageAnalysis]: Checked inductivity of 611 backedges. 36 proven. 520 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-11-08 18:09:30,843 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:31,064 INFO L134 CoverageAnalysis]: Checked inductivity of 611 backedges. 36 proven. 520 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-11-08 18:09:31,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [766296304] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:31,065 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:31,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 23 [2024-11-08 18:09:31,065 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245821610] [2024-11-08 18:09:31,065 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:31,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:31,131 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-11-08 18:09:31,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=414, Unknown=0, NotChecked=0, Total=552 [2024-11-08 18:09:31,132 INFO L87 Difference]: Start difference. First operand 242 states and 264 transitions. cyclomatic complexity: 32 Second operand has 24 states, 23 states have (on average 3.347826086956522) internal successors, (77), 24 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:31,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:31,762 INFO L93 Difference]: Finished difference Result 260 states and 280 transitions. [2024-11-08 18:09:31,763 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 260 states and 280 transitions. [2024-11-08 18:09:31,765 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 26 [2024-11-08 18:09:31,767 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 260 states to 260 states and 280 transitions. [2024-11-08 18:09:31,767 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2024-11-08 18:09:31,767 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2024-11-08 18:09:31,767 INFO L73 IsDeterministic]: Start isDeterministic. Operand 260 states and 280 transitions. [2024-11-08 18:09:31,767 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:09:31,768 INFO L218 hiAutomatonCegarLoop]: Abstraction has 260 states and 280 transitions. [2024-11-08 18:09:31,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states and 280 transitions. [2024-11-08 18:09:31,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 242. [2024-11-08 18:09:31,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.0826446280991735) internal successors, (262), 241 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:31,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 262 transitions. [2024-11-08 18:09:31,774 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 262 transitions. [2024-11-08 18:09:31,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-11-08 18:09:31,775 INFO L425 stractBuchiCegarLoop]: Abstraction has 242 states and 262 transitions. [2024-11-08 18:09:31,775 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-08 18:09:31,776 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 262 transitions. [2024-11-08 18:09:31,777 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 26 [2024-11-08 18:09:31,778 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:31,778 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:31,780 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [26, 25, 7, 7, 6, 6, 6, 1, 1] [2024-11-08 18:09:31,780 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-08 18:09:31,781 INFO L745 eck$LassoCheckResult]: Stem: 6893#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6894#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 6899#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6900#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7107#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7105#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7103#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7101#L17-4 foo_#res#1 := foo_~i~0#1; 7099#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6901#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6902#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7109#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7108#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7106#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7104#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7102#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7100#L17-4 foo_#res#1 := foo_~i~0#1; 7098#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7097#L26-3 assume main_~i~1#1 % 4294967296 < 32; 7096#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7095#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7094#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7093#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7092#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7091#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7090#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7089#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7088#L17-4 foo_#res#1 := foo_~i~0#1; 7087#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7086#L26-3 assume main_~i~1#1 % 4294967296 < 32; 7085#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7084#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7083#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7082#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7081#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7080#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7079#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7078#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7077#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7076#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7075#L17-4 foo_#res#1 := foo_~i~0#1; 7074#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7073#L26-3 assume main_~i~1#1 % 4294967296 < 32; 7072#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7071#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7070#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7069#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7068#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7067#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7066#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7065#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7064#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7063#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7062#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7061#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7060#L17-4 foo_#res#1 := foo_~i~0#1; 7059#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7058#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6890#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6891#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6896#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6898#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7122#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7121#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7120#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7119#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7118#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7117#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7116#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7115#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7112#L17-4 foo_#res#1 := foo_~i~0#1; 7111#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7110#L26-3 assume main_~i~1#1 % 4294967296 < 32; 6888#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6889#L17-3 assume foo_~i~0#1 <= foo_~size#1; 6895#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6897#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7050#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7047#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7044#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7041#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7038#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7035#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7032#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7029#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7016#L17-1 [2024-11-08 18:09:31,781 INFO L747 eck$LassoCheckResult]: Loop: 7016#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7014#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7016#L17-1 [2024-11-08 18:09:31,781 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:31,781 INFO L85 PathProgramCache]: Analyzing trace with hash 969754744, now seen corresponding path program 20 times [2024-11-08 18:09:31,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:31,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668513841] [2024-11-08 18:09:31,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:31,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:31,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:32,358 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 500 proven. 288 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-11-08 18:09:32,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:32,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668513841] [2024-11-08 18:09:32,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1668513841] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:32,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1089663992] [2024-11-08 18:09:32,359 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 18:09:32,360 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:32,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:32,362 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:32,363 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2024-11-08 18:09:32,587 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 18:09:32,588 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:09:32,591 INFO L255 TraceCheckSpWp]: Trace formula consists of 520 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-08 18:09:32,593 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:32,844 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 568 proven. 220 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-11-08 18:09:32,845 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:09:33,079 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 568 proven. 220 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-11-08 18:09:33,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1089663992] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:09:33,079 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:09:33,079 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2024-11-08 18:09:33,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522135643] [2024-11-08 18:09:33,080 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:09:33,080 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:09:33,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:33,081 INFO L85 PathProgramCache]: Analyzing trace with hash 1596, now seen corresponding path program 5 times [2024-11-08 18:09:33,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:33,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717548251] [2024-11-08 18:09:33,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:33,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:33,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:33,086 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:33,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:33,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:33,169 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:09:33,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-08 18:09:33,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=342, Unknown=0, NotChecked=0, Total=462 [2024-11-08 18:09:33,170 INFO L87 Difference]: Start difference. First operand 242 states and 262 transitions. cyclomatic complexity: 28 Second operand has 22 states, 22 states have (on average 3.590909090909091) internal successors, (79), 22 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:33,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:09:33,759 INFO L93 Difference]: Finished difference Result 249 states and 258 transitions. [2024-11-08 18:09:33,759 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 258 transitions. [2024-11-08 18:09:33,761 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 27 [2024-11-08 18:09:33,762 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 166 states and 171 transitions. [2024-11-08 18:09:33,762 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 112 [2024-11-08 18:09:33,763 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 166 [2024-11-08 18:09:33,763 INFO L73 IsDeterministic]: Start isDeterministic. Operand 166 states and 171 transitions. [2024-11-08 18:09:33,764 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:33,764 INFO L218 hiAutomatonCegarLoop]: Abstraction has 166 states and 171 transitions. [2024-11-08 18:09:33,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states and 171 transitions. [2024-11-08 18:09:33,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 147. [2024-11-08 18:09:33,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 147 states have (on average 1.034013605442177) internal successors, (152), 146 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:33,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 152 transitions. [2024-11-08 18:09:33,768 INFO L240 hiAutomatonCegarLoop]: Abstraction has 147 states and 152 transitions. [2024-11-08 18:09:33,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-11-08 18:09:33,769 INFO L425 stractBuchiCegarLoop]: Abstraction has 147 states and 152 transitions. [2024-11-08 18:09:33,769 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-08 18:09:33,770 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 152 transitions. [2024-11-08 18:09:33,771 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 26 [2024-11-08 18:09:33,771 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:33,771 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:33,772 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [27, 26, 7, 7, 6, 6, 6, 1, 1] [2024-11-08 18:09:33,773 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-08 18:09:33,773 INFO L745 eck$LassoCheckResult]: Stem: 7953#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7954#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 7958#L26-3 assume main_~i~1#1 % 4294967296 < 32; 8091#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8090#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8088#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8086#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7959#L17-4 foo_#res#1 := foo_~i~0#1; 7945#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7946#L26-3 assume main_~i~1#1 % 4294967296 < 32; 7950#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7951#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7957#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7955#L17-3 assume foo_~i~0#1 <= foo_~size#1; 7956#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8089#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8087#L17-4 foo_#res#1 := foo_~i~0#1; 8085#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8084#L26-3 assume main_~i~1#1 % 4294967296 < 32; 8083#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8082#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8081#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8080#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8079#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8078#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8077#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8076#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8075#L17-4 foo_#res#1 := foo_~i~0#1; 8074#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8073#L26-3 assume main_~i~1#1 % 4294967296 < 32; 8072#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8071#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8070#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8069#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8068#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8067#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8066#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8065#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8064#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8063#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8062#L17-4 foo_#res#1 := foo_~i~0#1; 8061#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8060#L26-3 assume main_~i~1#1 % 4294967296 < 32; 8059#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8058#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8057#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8056#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8055#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8054#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8053#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8052#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8051#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8050#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8049#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8048#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8047#L17-4 foo_#res#1 := foo_~i~0#1; 8046#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8045#L26-3 assume main_~i~1#1 % 4294967296 < 32; 8044#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8043#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8042#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8041#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8040#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8039#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8038#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8037#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8036#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8035#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8034#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8033#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8032#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8031#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8030#L17-4 foo_#res#1 := foo_~i~0#1; 8029#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8028#L26-3 assume main_~i~1#1 % 4294967296 < 32; 8027#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8026#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8025#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8024#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8023#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8022#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8021#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8020#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8019#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8018#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8017#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8016#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8015#L17-1 [2024-11-08 18:09:33,773 INFO L747 eck$LassoCheckResult]: Loop: 8015#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8014#L17-3 assume foo_~i~0#1 <= foo_~size#1; 8015#L17-1 [2024-11-08 18:09:33,774 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:33,774 INFO L85 PathProgramCache]: Analyzing trace with hash -1203557219, now seen corresponding path program 21 times [2024-11-08 18:09:33,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:33,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124702058] [2024-11-08 18:09:33,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:33,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:33,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:33,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:33,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:33,921 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:33,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:33,922 INFO L85 PathProgramCache]: Analyzing trace with hash 1596, now seen corresponding path program 6 times [2024-11-08 18:09:33,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:33,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1806417610] [2024-11-08 18:09:33,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:33,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:33,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:33,927 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:33,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:33,931 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:33,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:33,932 INFO L85 PathProgramCache]: Analyzing trace with hash -1272284200, now seen corresponding path program 22 times [2024-11-08 18:09:33,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:33,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128715982] [2024-11-08 18:09:33,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:33,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:34,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:34,004 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:09:34,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:09:34,074 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:09:55,177 WARN L286 SmtUtils]: Spent 21.00s on a formula simplification. DAG size of input: 652 DAG size of output: 431 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 18:09:55,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 10 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 46 [2024-11-08 18:09:55,902 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:09:55,902 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:09:55,902 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:09:55,902 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:09:55,902 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 18:09:55,902 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:55,902 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:09:55,902 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:09:55,902 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration18_Lasso [2024-11-08 18:09:55,902 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:09:55,903 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:09:55,905 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,910 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,913 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,915 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,919 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,922 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,924 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,927 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:55,931 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,375 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,378 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,385 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,391 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:09:56,807 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 18:09:56,808 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 18:09:56,808 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:56,808 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:56,810 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:56,813 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Waiting until timeout for monitored process [2024-11-08 18:09:56,813 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:56,825 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:56,825 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:56,825 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:56,825 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:56,827 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:56,827 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:56,830 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:56,842 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Ended with exit code 0 [2024-11-08 18:09:56,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:56,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:56,843 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:56,844 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Waiting until timeout for monitored process [2024-11-08 18:09:56,845 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:56,857 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:56,857 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:56,857 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:56,858 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:56,858 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:56,858 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:56,858 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:56,860 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:56,873 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:56,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:56,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:56,875 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:56,876 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Waiting until timeout for monitored process [2024-11-08 18:09:56,877 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:56,890 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:56,890 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:56,890 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:56,890 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:56,890 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:56,890 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:56,891 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:56,892 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:56,904 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:56,905 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:56,905 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:56,907 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:56,908 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Waiting until timeout for monitored process [2024-11-08 18:09:56,908 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:56,923 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:56,923 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:56,923 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:56,923 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:56,923 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:56,924 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:56,924 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:56,925 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:56,939 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Ended with exit code 0 [2024-11-08 18:09:56,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:56,939 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:56,940 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:56,942 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Waiting until timeout for monitored process [2024-11-08 18:09:56,943 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:56,955 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:56,955 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:56,955 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:56,955 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:56,955 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:56,956 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:56,956 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:56,957 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:56,969 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:56,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:56,969 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:56,970 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:56,971 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (64)] Waiting until timeout for monitored process [2024-11-08 18:09:56,972 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:56,984 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:56,984 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:56,984 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:56,984 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:56,984 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:56,985 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:56,985 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:56,986 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,000 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (64)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,000 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,001 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,002 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (65)] Waiting until timeout for monitored process [2024-11-08 18:09:57,003 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,015 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,015 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:57,015 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,015 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,015 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,015 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:57,016 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:57,017 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,031 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (65)] Ended with exit code 0 [2024-11-08 18:09:57,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,031 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,033 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,035 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Waiting until timeout for monitored process [2024-11-08 18:09:57,035 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,047 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,047 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:57,047 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,047 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,047 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,047 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:57,047 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:57,049 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,066 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Ended with exit code 0 [2024-11-08 18:09:57,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,067 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,069 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Waiting until timeout for monitored process [2024-11-08 18:09:57,069 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,082 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,082 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,082 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,082 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,084 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,084 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,087 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,099 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Ended with exit code 0 [2024-11-08 18:09:57,099 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,100 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,101 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,102 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Waiting until timeout for monitored process [2024-11-08 18:09:57,102 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,114 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,114 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,114 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,114 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,115 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,116 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,119 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,146 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Ended with exit code 0 [2024-11-08 18:09:57,147 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,147 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,148 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,149 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Waiting until timeout for monitored process [2024-11-08 18:09:57,149 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,161 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,161 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,162 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,162 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,163 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,163 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,169 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,184 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Ended with exit code 0 [2024-11-08 18:09:57,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,186 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,187 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Waiting until timeout for monitored process [2024-11-08 18:09:57,187 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,199 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,200 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,200 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,200 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,201 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,201 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,205 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,218 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Ended with exit code 0 [2024-11-08 18:09:57,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,219 INFO L229 MonitoredProcess]: Starting monitored process 71 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,220 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Waiting until timeout for monitored process [2024-11-08 18:09:57,221 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,233 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,233 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,233 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,233 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,234 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,235 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,238 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,250 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,251 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,252 INFO L229 MonitoredProcess]: Starting monitored process 72 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,253 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (72)] Waiting until timeout for monitored process [2024-11-08 18:09:57,253 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,265 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,265 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,266 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,266 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,268 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,268 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,274 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,286 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (72)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,288 INFO L229 MonitoredProcess]: Starting monitored process 73 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,289 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (73)] Waiting until timeout for monitored process [2024-11-08 18:09:57,290 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,302 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,302 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,302 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,302 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,303 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,304 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,307 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,319 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (73)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,319 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,319 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,320 INFO L229 MonitoredProcess]: Starting monitored process 74 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,321 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (74)] Waiting until timeout for monitored process [2024-11-08 18:09:57,322 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,334 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,334 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,334 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,334 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,336 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,336 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,339 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,351 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (74)] Ended with exit code 0 [2024-11-08 18:09:57,351 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,351 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,352 INFO L229 MonitoredProcess]: Starting monitored process 75 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (75)] Waiting until timeout for monitored process [2024-11-08 18:09:57,354 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,366 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,366 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,367 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,367 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,368 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,368 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,372 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,385 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (75)] Ended with exit code 0 [2024-11-08 18:09:57,385 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,385 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,386 INFO L229 MonitoredProcess]: Starting monitored process 76 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,388 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (76)] Waiting until timeout for monitored process [2024-11-08 18:09:57,389 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,401 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,401 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,401 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,401 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,403 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,403 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,406 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,418 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (76)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,418 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,419 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,420 INFO L229 MonitoredProcess]: Starting monitored process 77 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,421 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (77)] Waiting until timeout for monitored process [2024-11-08 18:09:57,421 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,433 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,433 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,434 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,434 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,435 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,435 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,440 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,460 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (77)] Ended with exit code 0 [2024-11-08 18:09:57,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,461 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,462 INFO L229 MonitoredProcess]: Starting monitored process 78 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,464 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (78)] Waiting until timeout for monitored process [2024-11-08 18:09:57,465 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,479 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,480 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,480 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,480 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,482 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,482 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,488 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,500 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (78)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,500 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,500 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,501 INFO L229 MonitoredProcess]: Starting monitored process 79 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,502 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (79)] Waiting until timeout for monitored process [2024-11-08 18:09:57,503 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,515 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,515 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,515 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,515 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,518 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,518 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,523 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,543 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (79)] Ended with exit code 0 [2024-11-08 18:09:57,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,543 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,544 INFO L229 MonitoredProcess]: Starting monitored process 80 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,545 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (80)] Waiting until timeout for monitored process [2024-11-08 18:09:57,546 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,558 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,558 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,558 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,558 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,559 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,559 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,563 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,576 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (80)] Ended with exit code 0 [2024-11-08 18:09:57,576 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,577 INFO L229 MonitoredProcess]: Starting monitored process 81 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,578 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (81)] Waiting until timeout for monitored process [2024-11-08 18:09:57,579 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,591 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,591 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,591 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,591 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,593 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,593 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,597 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,609 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (81)] Ended with exit code 0 [2024-11-08 18:09:57,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,609 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,610 INFO L229 MonitoredProcess]: Starting monitored process 82 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,612 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (82)] Waiting until timeout for monitored process [2024-11-08 18:09:57,612 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,624 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,624 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:09:57,624 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,625 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,625 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,625 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:09:57,625 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:09:57,626 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,639 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (82)] Ended with exit code 0 [2024-11-08 18:09:57,639 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,639 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,640 INFO L229 MonitoredProcess]: Starting monitored process 83 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,641 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (83)] Waiting until timeout for monitored process [2024-11-08 18:09:57,642 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,654 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,654 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,654 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,654 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,656 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,656 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,659 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:09:57,671 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (83)] Ended with exit code 0 [2024-11-08 18:09:57,672 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,672 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,673 INFO L229 MonitoredProcess]: Starting monitored process 84 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,674 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (84)] Waiting until timeout for monitored process [2024-11-08 18:09:57,675 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:09:57,687 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:09:57,687 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:09:57,687 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:09:57,688 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:09:57,694 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:09:57,694 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:09:57,706 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 18:09:57,740 INFO L443 ModelExtractionUtils]: Simplification made 16 calls to the SMT solver. [2024-11-08 18:09:57,740 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 13 variables to zero. [2024-11-08 18:09:57,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:09:57,740 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:57,742 INFO L229 MonitoredProcess]: Starting monitored process 85 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:09:57,743 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (85)] Waiting until timeout for monitored process [2024-11-08 18:09:57,743 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 18:09:57,756 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-08 18:09:57,756 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 18:09:57,756 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~i~0#1, ULTIMATE.start_foo_~size#1) = -1*ULTIMATE.start_foo_~i~0#1 + 1*ULTIMATE.start_foo_~size#1 Supporting invariants [] [2024-11-08 18:09:57,775 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (84)] Forceful destruction successful, exit code 0 [2024-11-08 18:09:57,800 INFO L156 tatePredicateManager]: 9 out of 9 supporting invariants were superfluous and have been removed [2024-11-08 18:09:57,814 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:57,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:57,922 INFO L255 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:09:57,923 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:58,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:58,044 INFO L255 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 18:09:58,044 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:58,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:58,053 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-08 18:09:58,053 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 147 states and 152 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,062 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 147 states and 152 transitions. cyclomatic complexity: 10. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 147 states and 152 transitions. Complement of second has 3 states. [2024-11-08 18:09:58,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-08 18:09:58,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 6 transitions. [2024-11-08 18:09:58,066 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 6 transitions. Stem has 87 letters. Loop has 2 letters. [2024-11-08 18:09:58,067 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:58,067 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-08 18:09:58,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:58,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:58,210 INFO L255 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:09:58,212 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:58,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:58,340 INFO L255 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 18:09:58,341 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:58,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:58,350 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-08 18:09:58,350 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 147 states and 152 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,364 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 147 states and 152 transitions. cyclomatic complexity: 10. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 148 states and 153 transitions. Complement of second has 5 states. [2024-11-08 18:09:58,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-08 18:09:58,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2024-11-08 18:09:58,365 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 87 letters. Loop has 2 letters. [2024-11-08 18:09:58,366 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:58,366 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-08 18:09:58,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:58,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:58,491 INFO L255 TraceCheckSpWp]: Trace formula consists of 532 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:09:58,493 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:58,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:58,631 INFO L255 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 18:09:58,631 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:09:58,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:09:58,645 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-08 18:09:58,645 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 147 states and 152 transitions. cyclomatic complexity: 10 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,660 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 147 states and 152 transitions. cyclomatic complexity: 10. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 182 states and 191 transitions. Complement of second has 4 states. [2024-11-08 18:09:58,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-08 18:09:58,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 18 transitions. [2024-11-08 18:09:58,662 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 18 transitions. Stem has 87 letters. Loop has 2 letters. [2024-11-08 18:09:58,662 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:58,662 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 18 transitions. Stem has 89 letters. Loop has 2 letters. [2024-11-08 18:09:58,663 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:58,663 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 18 transitions. Stem has 87 letters. Loop has 4 letters. [2024-11-08 18:09:58,663 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:09:58,664 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 182 states and 191 transitions. [2024-11-08 18:09:58,665 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 20 [2024-11-08 18:09:58,666 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 182 states to 147 states and 152 transitions. [2024-11-08 18:09:58,666 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2024-11-08 18:09:58,666 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 103 [2024-11-08 18:09:58,667 INFO L73 IsDeterministic]: Start isDeterministic. Operand 147 states and 152 transitions. [2024-11-08 18:09:58,667 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:09:58,667 INFO L218 hiAutomatonCegarLoop]: Abstraction has 147 states and 152 transitions. [2024-11-08 18:09:58,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states and 152 transitions. [2024-11-08 18:09:58,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2024-11-08 18:09:58,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 147 states, 147 states have (on average 1.034013605442177) internal successors, (152), 146 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:09:58,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 152 transitions. [2024-11-08 18:09:58,671 INFO L240 hiAutomatonCegarLoop]: Abstraction has 147 states and 152 transitions. [2024-11-08 18:09:58,671 INFO L425 stractBuchiCegarLoop]: Abstraction has 147 states and 152 transitions. [2024-11-08 18:09:58,671 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-08 18:09:58,672 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 147 states and 152 transitions. [2024-11-08 18:09:58,672 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 20 [2024-11-08 18:09:58,673 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:09:58,673 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:09:58,674 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [39, 39, 10, 9, 9, 9, 9, 1, 1] [2024-11-08 18:09:58,674 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 6, 1, 1, 1, 1, 1] [2024-11-08 18:09:58,675 INFO L745 eck$LassoCheckResult]: Stem: 9440#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9441#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 9442#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9578#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9577#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9576#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9575#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9572#L17-4 foo_#res#1 := foo_~i~0#1; 9432#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9433#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9437#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9438#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9443#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9446#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9574#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9573#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9448#L17-4 foo_#res#1 := foo_~i~0#1; 9449#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9571#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9570#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9569#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9568#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9567#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9566#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9565#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9564#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9563#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9562#L17-4 foo_#res#1 := foo_~i~0#1; 9561#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9560#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9559#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9558#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9557#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9556#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9555#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9554#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9553#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9552#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9551#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9550#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9549#L17-4 foo_#res#1 := foo_~i~0#1; 9548#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9547#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9546#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9545#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9544#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9543#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9542#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9541#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9540#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9539#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9538#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9537#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9536#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9535#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9534#L17-4 foo_#res#1 := foo_~i~0#1; 9533#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9532#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9531#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9530#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9529#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9528#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9527#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9526#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9525#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9524#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9523#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9522#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9521#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9520#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9519#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9518#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9517#L17-4 foo_#res#1 := foo_~i~0#1; 9516#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9515#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9514#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9513#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9512#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9511#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9447#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9444#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9445#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9510#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9509#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9508#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9507#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9506#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9505#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9504#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9503#L17-4 foo_#res#1 := foo_~i~0#1; 9502#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9501#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9500#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9499#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9498#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9497#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9496#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9495#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9494#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9493#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9492#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9491#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9490#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9489#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9488#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9487#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9486#L17-4 foo_#res#1 := foo_~i~0#1; 9485#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9484#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9483#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9482#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9481#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9480#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9479#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9478#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9477#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9476#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9475#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9474#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9473#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9472#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9471#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9470#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9469#L17-4 foo_#res#1 := foo_~i~0#1; 9468#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9467#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9451#L26-1 [2024-11-08 18:09:58,675 INFO L747 eck$LassoCheckResult]: Loop: 9451#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9466#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9465#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9464#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9463#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9462#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9461#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9460#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9459#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9458#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9457#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9456#L17-3 assume foo_~i~0#1 <= foo_~size#1; 9455#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9454#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9453#L17-4 foo_#res#1 := foo_~i~0#1; 9452#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9450#L26-3 assume main_~i~1#1 % 4294967296 < 32; 9451#L26-1 [2024-11-08 18:09:58,676 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:09:58,676 INFO L85 PathProgramCache]: Analyzing trace with hash 580309157, now seen corresponding path program 23 times [2024-11-08 18:09:58,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:09:58,676 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524483493] [2024-11-08 18:09:58,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:09:58,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:09:58,821 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (85)] Ended with exit code 0 [2024-11-08 18:09:58,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:09:59,792 INFO L134 CoverageAnalysis]: Checked inductivity of 2022 backedges. 875 proven. 137 refuted. 0 times theorem prover too weak. 1010 trivial. 0 not checked. [2024-11-08 18:09:59,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:09:59,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524483493] [2024-11-08 18:09:59,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1524483493] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:09:59,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [126104471] [2024-11-08 18:09:59,793 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 18:09:59,794 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:09:59,794 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:09:59,796 INFO L229 MonitoredProcess]: Starting monitored process 86 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:09:59,798 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (86)] Waiting until timeout for monitored process [2024-11-08 18:10:00,264 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2024-11-08 18:10:00,264 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:10:00,268 INFO L255 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-08 18:10:00,270 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:10:00,625 INFO L134 CoverageAnalysis]: Checked inductivity of 2022 backedges. 1378 proven. 132 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2024-11-08 18:10:00,625 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:10:01,041 INFO L134 CoverageAnalysis]: Checked inductivity of 2022 backedges. 1389 proven. 121 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2024-11-08 18:10:01,042 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [126104471] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:10:01,042 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:10:01,042 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 44 [2024-11-08 18:10:01,042 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638547806] [2024-11-08 18:10:01,042 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:10:01,043 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:10:01,043 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:01,043 INFO L85 PathProgramCache]: Analyzing trace with hash -1532877002, now seen corresponding path program 9 times [2024-11-08 18:10:01,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:01,044 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018563331] [2024-11-08 18:10:01,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:01,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:01,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:01,061 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:01,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:01,073 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:01,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:10:01,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2024-11-08 18:10:01,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=345, Invalid=1547, Unknown=0, NotChecked=0, Total=1892 [2024-11-08 18:10:01,648 INFO L87 Difference]: Start difference. First operand 147 states and 152 transitions. cyclomatic complexity: 10 Second operand has 44 states, 44 states have (on average 2.2954545454545454) internal successors, (101), 44 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:02,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:10:02,188 INFO L93 Difference]: Finished difference Result 159 states and 164 transitions. [2024-11-08 18:10:02,188 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 159 states and 164 transitions. [2024-11-08 18:10:02,189 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 23 [2024-11-08 18:10:02,190 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 159 states to 159 states and 164 transitions. [2024-11-08 18:10:02,190 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 103 [2024-11-08 18:10:02,190 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 103 [2024-11-08 18:10:02,190 INFO L73 IsDeterministic]: Start isDeterministic. Operand 159 states and 164 transitions. [2024-11-08 18:10:02,190 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:10:02,191 INFO L218 hiAutomatonCegarLoop]: Abstraction has 159 states and 164 transitions. [2024-11-08 18:10:02,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states and 164 transitions. [2024-11-08 18:10:02,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 155. [2024-11-08 18:10:02,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 155 states have (on average 1.032258064516129) internal successors, (160), 154 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:02,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 160 transitions. [2024-11-08 18:10:02,194 INFO L240 hiAutomatonCegarLoop]: Abstraction has 155 states and 160 transitions. [2024-11-08 18:10:02,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-11-08 18:10:02,195 INFO L425 stractBuchiCegarLoop]: Abstraction has 155 states and 160 transitions. [2024-11-08 18:10:02,195 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-08 18:10:02,195 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155 states and 160 transitions. [2024-11-08 18:10:02,196 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 22 [2024-11-08 18:10:02,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:10:02,197 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:10:02,198 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [42, 42, 10, 9, 9, 9, 9, 1, 1] [2024-11-08 18:10:02,198 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 7, 1, 1, 1, 1, 1] [2024-11-08 18:10:02,199 INFO L745 eck$LassoCheckResult]: Stem: 10573#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10574#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 10580#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10719#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10718#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10717#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10715#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10713#L17-4 foo_#res#1 := foo_~i~0#1; 10565#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10566#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10570#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10571#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10575#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10576#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10716#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10714#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10581#L17-4 foo_#res#1 := foo_~i~0#1; 10582#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10712#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10711#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10710#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10709#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10708#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10707#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10706#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10705#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10704#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10703#L17-4 foo_#res#1 := foo_~i~0#1; 10702#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10701#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10700#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10699#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10698#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10697#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10696#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10695#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10694#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10693#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10692#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10691#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10690#L17-4 foo_#res#1 := foo_~i~0#1; 10689#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10688#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10687#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10686#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10685#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10684#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10683#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10682#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10681#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10680#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10679#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10678#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10677#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10676#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10675#L17-4 foo_#res#1 := foo_~i~0#1; 10674#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10673#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10672#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10671#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10670#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10669#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10668#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10667#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10666#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10665#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10664#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10663#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10662#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10661#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10660#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10659#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10658#L17-4 foo_#res#1 := foo_~i~0#1; 10657#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10656#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10655#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10654#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10653#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10652#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10577#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10578#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10579#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10651#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10650#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10649#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10648#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10647#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10646#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10645#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10644#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10643#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10642#L17-4 foo_#res#1 := foo_~i~0#1; 10641#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10640#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10639#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10638#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10637#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10636#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10635#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10634#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10633#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10632#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10631#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10630#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10629#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10628#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10627#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10626#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10625#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10624#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10623#L17-4 foo_#res#1 := foo_~i~0#1; 10622#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10621#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10620#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10619#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10618#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10617#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10616#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10615#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10614#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10613#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10612#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10611#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10610#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10609#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10608#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10607#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10606#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10605#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10604#L17-4 foo_#res#1 := foo_~i~0#1; 10603#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10602#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10584#L26-1 [2024-11-08 18:10:02,199 INFO L747 eck$LassoCheckResult]: Loop: 10584#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10601#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10600#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10599#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10598#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10597#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10596#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10595#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10594#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10593#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10592#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10591#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10590#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10589#L17-3 assume foo_~i~0#1 <= foo_~size#1; 10588#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10587#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10586#L17-4 foo_#res#1 := foo_~i~0#1; 10585#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10583#L26-3 assume main_~i~1#1 % 4294967296 < 32; 10584#L26-1 [2024-11-08 18:10:02,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:02,200 INFO L85 PathProgramCache]: Analyzing trace with hash -564687446, now seen corresponding path program 24 times [2024-11-08 18:10:02,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:02,200 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107200696] [2024-11-08 18:10:02,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:02,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:02,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:10:03,127 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1032 proven. 186 refuted. 0 times theorem prover too weak. 1071 trivial. 0 not checked. [2024-11-08 18:10:03,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:10:03,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107200696] [2024-11-08 18:10:03,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2107200696] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:10:03,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1053482338] [2024-11-08 18:10:03,127 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 18:10:03,127 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:10:03,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:10:03,129 INFO L229 MonitoredProcess]: Starting monitored process 87 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:10:03,130 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (87)] Waiting until timeout for monitored process [2024-11-08 18:10:03,723 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2024-11-08 18:10:03,723 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:10:03,728 INFO L255 TraceCheckSpWp]: Trace formula consists of 718 conjuncts, 25 conjuncts are in the unsatisfiable core [2024-11-08 18:10:03,732 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:10:04,288 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 405 proven. 1580 refuted. 0 times theorem prover too weak. 304 trivial. 0 not checked. [2024-11-08 18:10:04,289 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:10:04,852 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 609 proven. 1376 refuted. 0 times theorem prover too weak. 304 trivial. 0 not checked. [2024-11-08 18:10:04,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1053482338] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:10:04,853 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:10:04,853 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 41 [2024-11-08 18:10:04,853 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727673082] [2024-11-08 18:10:04,853 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:10:04,854 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:10:04,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:04,854 INFO L85 PathProgramCache]: Analyzing trace with hash -125215589, now seen corresponding path program 10 times [2024-11-08 18:10:04,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:04,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357802657] [2024-11-08 18:10:04,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:04,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:04,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:04,867 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:04,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:04,879 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:05,617 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:10:05,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-11-08 18:10:05,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=283, Invalid=1357, Unknown=0, NotChecked=0, Total=1640 [2024-11-08 18:10:05,618 INFO L87 Difference]: Start difference. First operand 155 states and 160 transitions. cyclomatic complexity: 10 Second operand has 41 states, 41 states have (on average 2.8048780487804876) internal successors, (115), 41 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:07,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:10:07,394 INFO L93 Difference]: Finished difference Result 164 states and 169 transitions. [2024-11-08 18:10:07,394 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 164 states and 169 transitions. [2024-11-08 18:10:07,396 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 25 [2024-11-08 18:10:07,396 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 164 states to 164 states and 169 transitions. [2024-11-08 18:10:07,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 103 [2024-11-08 18:10:07,397 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 103 [2024-11-08 18:10:07,397 INFO L73 IsDeterministic]: Start isDeterministic. Operand 164 states and 169 transitions. [2024-11-08 18:10:07,397 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:10:07,397 INFO L218 hiAutomatonCegarLoop]: Abstraction has 164 states and 169 transitions. [2024-11-08 18:10:07,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states and 169 transitions. [2024-11-08 18:10:07,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 161. [2024-11-08 18:10:07,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 161 states, 161 states have (on average 1.031055900621118) internal successors, (166), 160 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:07,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 166 transitions. [2024-11-08 18:10:07,402 INFO L240 hiAutomatonCegarLoop]: Abstraction has 161 states and 166 transitions. [2024-11-08 18:10:07,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-11-08 18:10:07,403 INFO L425 stractBuchiCegarLoop]: Abstraction has 161 states and 166 transitions. [2024-11-08 18:10:07,403 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-11-08 18:10:07,403 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 161 states and 166 transitions. [2024-11-08 18:10:07,404 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2024-11-08 18:10:07,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:10:07,405 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:10:07,406 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [44, 44, 10, 9, 9, 9, 9, 1, 1] [2024-11-08 18:10:07,406 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [8, 8, 1, 1, 1, 1, 1] [2024-11-08 18:10:07,406 INFO L745 eck$LassoCheckResult]: Stem: 11812#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11813#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 11819#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11964#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11963#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11962#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11960#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11958#L17-4 foo_#res#1 := foo_~i~0#1; 11804#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11805#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11809#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11810#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11814#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11817#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11961#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11959#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11820#L17-4 foo_#res#1 := foo_~i~0#1; 11821#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11957#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11956#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11955#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11954#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11953#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11952#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11951#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11950#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11949#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11948#L17-4 foo_#res#1 := foo_~i~0#1; 11947#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11946#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11945#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11944#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11943#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11942#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11941#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11940#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11939#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11938#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11937#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11936#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11935#L17-4 foo_#res#1 := foo_~i~0#1; 11934#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11933#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11932#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11931#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11930#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11929#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11928#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11927#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11926#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11925#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11924#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11923#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11922#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11921#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11920#L17-4 foo_#res#1 := foo_~i~0#1; 11919#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11918#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11917#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11916#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11915#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11914#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11913#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11912#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11911#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11910#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11909#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11908#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11907#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11906#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11905#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11904#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11903#L17-4 foo_#res#1 := foo_~i~0#1; 11902#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11901#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11900#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11899#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11898#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11815#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11816#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11818#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11897#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11896#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11895#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11894#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11893#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11892#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11891#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11890#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11889#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11888#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11887#L17-4 foo_#res#1 := foo_~i~0#1; 11886#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11885#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11884#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11883#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11882#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11881#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11880#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11879#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11878#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11877#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11876#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11875#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11874#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11873#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11872#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11871#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11870#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11869#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11868#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11867#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11866#L17-4 foo_#res#1 := foo_~i~0#1; 11865#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11864#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11863#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11862#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11861#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11860#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11859#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11858#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11857#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11856#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11855#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11854#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11853#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11852#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11851#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11850#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11849#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11848#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11847#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11846#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11845#L17-4 foo_#res#1 := foo_~i~0#1; 11844#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11843#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11823#L26-1 [2024-11-08 18:10:07,407 INFO L747 eck$LassoCheckResult]: Loop: 11823#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11842#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11841#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11840#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11839#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11838#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11837#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11836#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11835#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11834#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11833#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11832#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11831#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11830#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11829#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11828#L17-3 assume foo_~i~0#1 <= foo_~size#1; 11827#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11826#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11825#L17-4 foo_#res#1 := foo_~i~0#1; 11824#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11822#L26-3 assume main_~i~1#1 % 4294967296 < 32; 11823#L26-1 [2024-11-08 18:10:07,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:07,407 INFO L85 PathProgramCache]: Analyzing trace with hash 637515978, now seen corresponding path program 25 times [2024-11-08 18:10:07,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:07,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696289509] [2024-11-08 18:10:07,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:07,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:07,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:10:08,430 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1376 proven. 897 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-11-08 18:10:08,430 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:10:08,431 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696289509] [2024-11-08 18:10:08,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1696289509] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:10:08,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [858362216] [2024-11-08 18:10:08,432 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 18:10:08,432 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:10:08,432 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:10:08,434 INFO L229 MonitoredProcess]: Starting monitored process 88 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:10:08,436 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (88)] Waiting until timeout for monitored process [2024-11-08 18:10:08,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:10:08,772 INFO L255 TraceCheckSpWp]: Trace formula consists of 819 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-11-08 18:10:08,775 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:10:09,248 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1525 proven. 748 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-11-08 18:10:09,248 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:10:09,608 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1525 proven. 748 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2024-11-08 18:10:09,609 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [858362216] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:10:09,609 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:10:09,609 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 31 [2024-11-08 18:10:09,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [515143565] [2024-11-08 18:10:09,609 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:10:09,610 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:10:09,610 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:09,610 INFO L85 PathProgramCache]: Analyzing trace with hash -277295936, now seen corresponding path program 11 times [2024-11-08 18:10:09,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:09,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45251467] [2024-11-08 18:10:09,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:09,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:09,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:09,626 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:09,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:09,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:10,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:10:10,802 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-11-08 18:10:10,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=699, Unknown=0, NotChecked=0, Total=930 [2024-11-08 18:10:10,802 INFO L87 Difference]: Start difference. First operand 161 states and 166 transitions. cyclomatic complexity: 10 Second operand has 31 states, 31 states have (on average 3.5161290322580645) internal successors, (109), 31 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:12,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:10:12,061 INFO L93 Difference]: Finished difference Result 191 states and 196 transitions. [2024-11-08 18:10:12,061 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 191 states and 196 transitions. [2024-11-08 18:10:12,063 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2024-11-08 18:10:12,064 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 191 states to 191 states and 196 transitions. [2024-11-08 18:10:12,064 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2024-11-08 18:10:12,064 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2024-11-08 18:10:12,064 INFO L73 IsDeterministic]: Start isDeterministic. Operand 191 states and 196 transitions. [2024-11-08 18:10:12,065 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:10:12,065 INFO L218 hiAutomatonCegarLoop]: Abstraction has 191 states and 196 transitions. [2024-11-08 18:10:12,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states and 196 transitions. [2024-11-08 18:10:12,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 165. [2024-11-08 18:10:12,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 165 states have (on average 1.0303030303030303) internal successors, (170), 164 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:12,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 170 transitions. [2024-11-08 18:10:12,071 INFO L240 hiAutomatonCegarLoop]: Abstraction has 165 states and 170 transitions. [2024-11-08 18:10:12,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2024-11-08 18:10:12,072 INFO L425 stractBuchiCegarLoop]: Abstraction has 165 states and 170 transitions. [2024-11-08 18:10:12,073 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-11-08 18:10:12,073 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 165 states and 170 transitions. [2024-11-08 18:10:12,074 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2024-11-08 18:10:12,074 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:10:12,074 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:10:12,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2024-11-08 18:10:12,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 1, 1, 1, 1, 1] [2024-11-08 18:10:12,075 INFO L745 eck$LassoCheckResult]: Stem: 13100#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13101#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 13107#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13256#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13255#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13252#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13250#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13108#L17-4 foo_#res#1 := foo_~i~0#1; 13092#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13093#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13098#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13099#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13102#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13103#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13254#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13253#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13251#L17-4 foo_#res#1 := foo_~i~0#1; 13249#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13248#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13247#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13246#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13245#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13244#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13243#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13242#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13241#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13240#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13239#L17-4 foo_#res#1 := foo_~i~0#1; 13238#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13237#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13236#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13235#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13234#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13233#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13232#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13231#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13230#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13229#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13228#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13227#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13226#L17-4 foo_#res#1 := foo_~i~0#1; 13225#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13224#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13223#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13222#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13221#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13220#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13219#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13218#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13217#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13216#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13215#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13214#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13213#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13212#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13211#L17-4 foo_#res#1 := foo_~i~0#1; 13210#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13209#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13208#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13207#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13206#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13205#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13204#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13203#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13202#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13201#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13200#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13199#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13198#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13197#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13196#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13195#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13194#L17-4 foo_#res#1 := foo_~i~0#1; 13193#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13192#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13191#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13190#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13189#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13106#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13104#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13105#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13188#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13187#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13186#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13185#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13184#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13183#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13182#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13181#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13180#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13179#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13178#L17-4 foo_#res#1 := foo_~i~0#1; 13177#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13176#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13175#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13174#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13173#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13172#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13171#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13170#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13169#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13168#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13167#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13166#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13165#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13164#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13163#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13162#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13161#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13160#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13159#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13158#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13157#L17-4 foo_#res#1 := foo_~i~0#1; 13156#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13155#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13154#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13153#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13152#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13151#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13150#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13149#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13148#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13147#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13146#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13145#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13144#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13143#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13142#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13141#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13140#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13139#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13138#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13137#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13136#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13135#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13134#L17-4 foo_#res#1 := foo_~i~0#1; 13133#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13132#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13110#L26-1 [2024-11-08 18:10:12,075 INFO L747 eck$LassoCheckResult]: Loop: 13110#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 13131#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13130#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13129#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13128#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13127#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13126#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13125#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13124#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13123#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13122#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13121#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13120#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13119#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13118#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13117#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13116#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13115#L17-3 assume foo_~i~0#1 <= foo_~size#1; 13114#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 13113#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 13112#L17-4 foo_#res#1 := foo_~i~0#1; 13111#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 13109#L26-3 assume main_~i~1#1 % 4294967296 < 32; 13110#L26-1 [2024-11-08 18:10:12,077 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:12,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1731667665, now seen corresponding path program 26 times [2024-11-08 18:10:12,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:12,079 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38999356] [2024-11-08 18:10:12,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:12,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:12,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:12,227 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:12,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:12,338 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:12,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:12,339 INFO L85 PathProgramCache]: Analyzing trace with hash -397621339, now seen corresponding path program 12 times [2024-11-08 18:10:12,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:12,339 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604186281] [2024-11-08 18:10:12,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:12,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:12,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:12,355 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:12,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:12,368 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:12,369 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:12,369 INFO L85 PathProgramCache]: Analyzing trace with hash -1998095689, now seen corresponding path program 27 times [2024-11-08 18:10:12,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:12,369 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460967344] [2024-11-08 18:10:12,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:12,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:12,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:10:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2240 proven. 1112 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-08 18:10:13,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:10:13,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460967344] [2024-11-08 18:10:13,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460967344] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:10:13,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1265779846] [2024-11-08 18:10:13,600 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 18:10:13,601 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:10:13,601 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:10:13,603 INFO L229 MonitoredProcess]: Starting monitored process 89 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:10:13,605 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (89)] Waiting until timeout for monitored process [2024-11-08 18:10:14,175 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2024-11-08 18:10:14,175 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:10:14,182 INFO L255 TraceCheckSpWp]: Trace formula consists of 677 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-08 18:10:14,186 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:10:14,901 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 1662 proven. 271 refuted. 0 times theorem prover too weak. 1704 trivial. 0 not checked. [2024-11-08 18:10:14,902 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:10:15,781 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 1671 proven. 262 refuted. 0 times theorem prover too weak. 1704 trivial. 0 not checked. [2024-11-08 18:10:15,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1265779846] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:10:15,782 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:10:15,782 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 23, 23] total 60 [2024-11-08 18:10:15,782 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441631157] [2024-11-08 18:10:15,782 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:10:17,009 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:10:17,009 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2024-11-08 18:10:17,010 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=562, Invalid=2978, Unknown=0, NotChecked=0, Total=3540 [2024-11-08 18:10:17,011 INFO L87 Difference]: Start difference. First operand 165 states and 170 transitions. cyclomatic complexity: 10 Second operand has 60 states, 60 states have (on average 2.9166666666666665) internal successors, (175), 60 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:20,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:10:20,854 INFO L93 Difference]: Finished difference Result 280 states and 290 transitions. [2024-11-08 18:10:20,854 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 280 states and 290 transitions. [2024-11-08 18:10:20,856 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 29 [2024-11-08 18:10:20,857 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 280 states to 280 states and 290 transitions. [2024-11-08 18:10:20,857 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 152 [2024-11-08 18:10:20,858 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 152 [2024-11-08 18:10:20,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 280 states and 290 transitions. [2024-11-08 18:10:20,858 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:10:20,858 INFO L218 hiAutomatonCegarLoop]: Abstraction has 280 states and 290 transitions. [2024-11-08 18:10:20,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states and 290 transitions. [2024-11-08 18:10:20,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 210. [2024-11-08 18:10:20,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 210 states have (on average 1.0380952380952382) internal successors, (218), 209 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:10:20,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 218 transitions. [2024-11-08 18:10:20,864 INFO L240 hiAutomatonCegarLoop]: Abstraction has 210 states and 218 transitions. [2024-11-08 18:10:20,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-11-08 18:10:20,865 INFO L425 stractBuchiCegarLoop]: Abstraction has 210 states and 218 transitions. [2024-11-08 18:10:20,865 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-11-08 18:10:20,865 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 210 states and 218 transitions. [2024-11-08 18:10:20,866 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2024-11-08 18:10:20,866 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:10:20,867 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:10:20,868 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2024-11-08 18:10:20,868 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 1, 1, 1, 1, 1] [2024-11-08 18:10:20,868 INFO L745 eck$LassoCheckResult]: Stem: 14704#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 14705#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 14711#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14881#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14880#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14879#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14878#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14877#L17-4 foo_#res#1 := foo_~i~0#1; 14876#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14875#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14874#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14873#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14872#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14871#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14870#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14869#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14868#L17-4 foo_#res#1 := foo_~i~0#1; 14867#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14866#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14865#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14864#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14863#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14862#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14861#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14860#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14859#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14858#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14857#L17-4 foo_#res#1 := foo_~i~0#1; 14856#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14855#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14854#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14853#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14852#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14851#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14850#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14849#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14848#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14847#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14846#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14845#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14844#L17-4 foo_#res#1 := foo_~i~0#1; 14843#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14842#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14841#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14840#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14839#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14838#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14837#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14836#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14835#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14834#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14833#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14832#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14831#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14830#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14829#L17-4 foo_#res#1 := foo_~i~0#1; 14828#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14827#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14826#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14825#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14824#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14823#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14822#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14821#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14820#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14819#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14818#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14817#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14816#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14815#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14814#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14813#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14812#L17-4 foo_#res#1 := foo_~i~0#1; 14811#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14810#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14809#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14808#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14807#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14806#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14805#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14804#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14803#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14802#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14801#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14800#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14799#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14798#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14797#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14796#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14795#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14793#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14792#L17-4 foo_#res#1 := foo_~i~0#1; 14791#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14790#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14789#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14788#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14787#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14786#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14785#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14784#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14783#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14782#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14781#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14780#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14779#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14778#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14777#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14776#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14775#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14774#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14773#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14771#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14769#L17-4 foo_#res#1 := foo_~i~0#1; 14767#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14765#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14763#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14761#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14759#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14758#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14757#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14756#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14755#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14754#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14753#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14752#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14751#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14750#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14749#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14748#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14747#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14746#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14745#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14744#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14743#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14742#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14741#L17-4 foo_#res#1 := foo_~i~0#1; 14740#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14739#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14715#L26-1 [2024-11-08 18:10:20,869 INFO L747 eck$LassoCheckResult]: Loop: 14715#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 14738#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14737#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14736#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14735#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14734#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14733#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14732#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14731#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14730#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14729#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14728#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14727#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14726#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14725#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14724#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14723#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14722#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14721#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14720#L17-3 assume foo_~i~0#1 <= foo_~size#1; 14719#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 14718#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 14717#L17-4 foo_#res#1 := foo_~i~0#1; 14716#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 14714#L26-3 assume main_~i~1#1 % 4294967296 < 32; 14715#L26-1 [2024-11-08 18:10:20,869 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:20,869 INFO L85 PathProgramCache]: Analyzing trace with hash -1731667665, now seen corresponding path program 28 times [2024-11-08 18:10:20,869 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:20,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933421331] [2024-11-08 18:10:20,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:20,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:20,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:20,972 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:21,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:21,074 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:21,075 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:21,075 INFO L85 PathProgramCache]: Analyzing trace with hash -66216630, now seen corresponding path program 13 times [2024-11-08 18:10:21,075 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:21,075 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039234809] [2024-11-08 18:10:21,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:21,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:21,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:21,092 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:21,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:21,106 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:10:21,106 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:10:21,106 INFO L85 PathProgramCache]: Analyzing trace with hash -523775012, now seen corresponding path program 29 times [2024-11-08 18:10:21,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:10:21,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971606962] [2024-11-08 18:10:21,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:10:21,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:10:21,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:21,242 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:10:21,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:10:21,362 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:13:07,188 WARN L286 SmtUtils]: Spent 2.73m on a formula simplification. DAG size of input: 1009 DAG size of output: 657 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 18:13:08,140 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:13:08,140 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:13:08,140 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:13:08,141 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:13:08,141 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 18:13:08,141 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:08,141 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:13:08,141 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:13:08,141 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration23_Lasso [2024-11-08 18:13:08,141 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:13:08,141 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:13:08,143 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,148 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,152 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,155 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,157 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,160 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,162 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,165 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,599 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,602 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,605 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,608 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,610 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,613 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,615 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,618 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,625 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:08,627 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:13:09,002 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 18:13:09,002 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 18:13:09,002 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,003 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,007 INFO L229 MonitoredProcess]: Starting monitored process 90 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,009 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (90)] Waiting until timeout for monitored process [2024-11-08 18:13:09,010 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,021 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,022 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,022 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,022 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,022 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,022 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,022 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,024 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,034 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (90)] Ended with exit code 0 [2024-11-08 18:13:09,035 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,035 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,036 INFO L229 MonitoredProcess]: Starting monitored process 91 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,037 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (91)] Waiting until timeout for monitored process [2024-11-08 18:13:09,037 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,048 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,048 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,048 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,048 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,048 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,049 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,049 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,050 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,063 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (91)] Ended with exit code 0 [2024-11-08 18:13:09,063 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,063 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,064 INFO L229 MonitoredProcess]: Starting monitored process 92 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (92)] Waiting until timeout for monitored process [2024-11-08 18:13:09,066 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,076 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,076 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,077 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,077 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,077 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,077 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,077 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,078 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,089 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (92)] Ended with exit code 0 [2024-11-08 18:13:09,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,089 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,090 INFO L229 MonitoredProcess]: Starting monitored process 93 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,091 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (93)] Waiting until timeout for monitored process [2024-11-08 18:13:09,092 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,103 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,103 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,103 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,103 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,103 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,103 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,103 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,105 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,118 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (93)] Ended with exit code 0 [2024-11-08 18:13:09,118 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,118 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,119 INFO L229 MonitoredProcess]: Starting monitored process 94 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,120 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (94)] Waiting until timeout for monitored process [2024-11-08 18:13:09,121 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,131 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,132 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,132 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,132 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,132 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,132 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,132 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,133 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,145 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (94)] Ended with exit code 0 [2024-11-08 18:13:09,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,145 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,146 INFO L229 MonitoredProcess]: Starting monitored process 95 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,147 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (95)] Waiting until timeout for monitored process [2024-11-08 18:13:09,148 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,159 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,159 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,160 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,160 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,160 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,160 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,160 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,161 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,172 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (95)] Ended with exit code 0 [2024-11-08 18:13:09,172 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,172 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,173 INFO L229 MonitoredProcess]: Starting monitored process 96 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,174 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (96)] Waiting until timeout for monitored process [2024-11-08 18:13:09,175 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,186 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,186 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,186 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,186 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,187 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,187 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,191 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,203 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (96)] Ended with exit code 0 [2024-11-08 18:13:09,203 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,203 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,204 INFO L229 MonitoredProcess]: Starting monitored process 97 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,205 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (97)] Waiting until timeout for monitored process [2024-11-08 18:13:09,206 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,216 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,217 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,217 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,217 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,218 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,218 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,222 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,234 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (97)] Ended with exit code 0 [2024-11-08 18:13:09,234 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,234 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,235 INFO L229 MonitoredProcess]: Starting monitored process 98 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,236 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (98)] Waiting until timeout for monitored process [2024-11-08 18:13:09,237 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,247 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,248 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,248 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,248 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,249 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,249 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,253 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,266 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (98)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,266 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,266 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,267 INFO L229 MonitoredProcess]: Starting monitored process 99 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,268 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (99)] Waiting until timeout for monitored process [2024-11-08 18:13:09,269 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,280 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,281 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,281 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,281 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,282 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,282 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,287 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,298 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (99)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,299 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,299 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,300 INFO L229 MonitoredProcess]: Starting monitored process 100 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,301 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (100)] Waiting until timeout for monitored process [2024-11-08 18:13:09,301 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,313 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,313 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,313 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,313 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,314 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,315 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,318 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,330 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (100)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,330 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,330 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,332 INFO L229 MonitoredProcess]: Starting monitored process 101 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,333 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (101)] Waiting until timeout for monitored process [2024-11-08 18:13:09,334 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,345 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,345 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,345 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,345 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,347 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,347 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,352 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,363 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (101)] Ended with exit code 0 [2024-11-08 18:13:09,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,364 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,366 INFO L229 MonitoredProcess]: Starting monitored process 102 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (102)] Waiting until timeout for monitored process [2024-11-08 18:13:09,369 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,382 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,382 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,382 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,382 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,383 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,384 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,387 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,398 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (102)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,400 INFO L229 MonitoredProcess]: Starting monitored process 103 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,401 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (103)] Waiting until timeout for monitored process [2024-11-08 18:13:09,402 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,413 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,413 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,413 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,413 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,415 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,415 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,419 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,430 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (103)] Ended with exit code 0 [2024-11-08 18:13:09,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,432 INFO L229 MonitoredProcess]: Starting monitored process 104 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,433 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (104)] Waiting until timeout for monitored process [2024-11-08 18:13:09,433 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,444 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,444 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,444 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,444 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,446 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,446 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,449 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,462 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (104)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,462 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,463 INFO L229 MonitoredProcess]: Starting monitored process 105 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,464 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (105)] Waiting until timeout for monitored process [2024-11-08 18:13:09,465 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,476 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,476 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,476 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,476 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,476 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,476 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,477 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,478 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,490 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (105)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,490 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,490 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,491 INFO L229 MonitoredProcess]: Starting monitored process 106 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,492 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (106)] Waiting until timeout for monitored process [2024-11-08 18:13:09,493 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,503 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,504 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,504 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,504 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,506 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,506 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,510 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,522 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (106)] Ended with exit code 0 [2024-11-08 18:13:09,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,522 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,523 INFO L229 MonitoredProcess]: Starting monitored process 107 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,524 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (107)] Waiting until timeout for monitored process [2024-11-08 18:13:09,525 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,535 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,535 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,535 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,536 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,537 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,537 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,541 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,552 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (107)] Ended with exit code 0 [2024-11-08 18:13:09,553 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,553 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,554 INFO L229 MonitoredProcess]: Starting monitored process 108 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,555 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (108)] Waiting until timeout for monitored process [2024-11-08 18:13:09,555 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,566 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,566 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,566 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,566 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,568 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,568 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,573 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,585 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (108)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,585 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,585 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,586 INFO L229 MonitoredProcess]: Starting monitored process 109 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (109)] Waiting until timeout for monitored process [2024-11-08 18:13:09,588 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,598 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,599 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,599 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,599 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,600 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,600 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,604 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,616 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (109)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,616 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,617 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,618 INFO L229 MonitoredProcess]: Starting monitored process 110 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,618 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (110)] Waiting until timeout for monitored process [2024-11-08 18:13:09,619 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,630 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,630 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,630 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,630 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,631 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,631 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,635 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,646 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (110)] Ended with exit code 0 [2024-11-08 18:13:09,646 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,646 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,647 INFO L229 MonitoredProcess]: Starting monitored process 111 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,648 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (111)] Waiting until timeout for monitored process [2024-11-08 18:13:09,649 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,660 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,660 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,660 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,660 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,662 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,662 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,665 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,677 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (111)] Ended with exit code 0 [2024-11-08 18:13:09,677 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,678 INFO L229 MonitoredProcess]: Starting monitored process 112 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,679 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (112)] Waiting until timeout for monitored process [2024-11-08 18:13:09,680 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,690 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,690 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,691 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,691 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,691 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,691 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,691 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,692 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,704 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (112)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,704 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,705 INFO L229 MonitoredProcess]: Starting monitored process 113 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,706 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (113)] Waiting until timeout for monitored process [2024-11-08 18:13:09,707 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,717 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,717 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,718 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,718 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,718 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,718 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,718 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,719 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,731 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (113)] Ended with exit code 0 [2024-11-08 18:13:09,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,731 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,732 INFO L229 MonitoredProcess]: Starting monitored process 114 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (114)] Waiting until timeout for monitored process [2024-11-08 18:13:09,733 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,744 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,745 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,745 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,745 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,745 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,745 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,745 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,746 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,758 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (114)] Ended with exit code 0 [2024-11-08 18:13:09,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,758 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,759 INFO L229 MonitoredProcess]: Starting monitored process 115 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,760 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (115)] Waiting until timeout for monitored process [2024-11-08 18:13:09,760 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,771 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,771 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,771 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,772 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,772 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,772 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,772 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,773 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,785 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (115)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:09,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,785 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,786 INFO L229 MonitoredProcess]: Starting monitored process 116 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (116)] Waiting until timeout for monitored process [2024-11-08 18:13:09,788 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,799 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,799 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,799 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,799 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,799 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,800 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,800 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,801 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,812 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (116)] Ended with exit code 0 [2024-11-08 18:13:09,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,814 INFO L229 MonitoredProcess]: Starting monitored process 117 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,815 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (117)] Waiting until timeout for monitored process [2024-11-08 18:13:09,816 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,827 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,827 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,827 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,827 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,827 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,827 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,827 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,828 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,839 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (117)] Ended with exit code 0 [2024-11-08 18:13:09,840 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,840 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,841 INFO L229 MonitoredProcess]: Starting monitored process 118 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,842 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (118)] Waiting until timeout for monitored process [2024-11-08 18:13:09,842 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,853 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,853 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:13:09,854 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,854 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,854 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,854 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:13:09,854 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:13:09,855 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:13:09,867 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (118)] Ended with exit code 0 [2024-11-08 18:13:09,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,868 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,869 INFO L229 MonitoredProcess]: Starting monitored process 119 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,870 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (119)] Waiting until timeout for monitored process [2024-11-08 18:13:09,870 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:13:09,881 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:13:09,881 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:13:09,881 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:13:09,881 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:13:09,883 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:13:09,883 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:13:09,888 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 18:13:09,898 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2024-11-08 18:13:09,898 INFO L444 ModelExtractionUtils]: 0 out of 7 variables were initially zero. Simplification set additionally 4 variables to zero. [2024-11-08 18:13:09,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:13:09,898 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:09,899 INFO L229 MonitoredProcess]: Starting monitored process 120 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:13:09,900 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (120)] Waiting until timeout for monitored process [2024-11-08 18:13:09,901 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 18:13:09,912 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-08 18:13:09,912 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 18:13:09,913 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 19 Supporting invariants [] [2024-11-08 18:13:09,928 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (119)] Ended with exit code 0 [2024-11-08 18:13:09,968 INFO L156 tatePredicateManager]: 13 out of 13 supporting invariants were superfluous and have been removed [2024-11-08 18:13:09,983 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:10,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:13:10,162 INFO L255 TraceCheckSpWp]: Trace formula consists of 831 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:13:10,164 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:13:10,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:13:10,399 INFO L255 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 17 conjuncts are in the unsatisfiable core [2024-11-08 18:13:10,400 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:13:10,827 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:13:10,827 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 14 loop predicates [2024-11-08 18:13:10,827 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 210 states and 218 transitions. cyclomatic complexity: 13 Second operand has 15 states, 15 states have (on average 2.3333333333333335) internal successors, (35), 15 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:13:11,108 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (120)] Forceful destruction successful, exit code 0 [2024-11-08 18:13:11,166 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 210 states and 218 transitions. cyclomatic complexity: 13. Second operand has 15 states, 15 states have (on average 2.3333333333333335) internal successors, (35), 15 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 523 states and 554 transitions. Complement of second has 29 states. [2024-11-08 18:13:11,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 15 states 1 stem states 13 non-accepting loop states 1 accepting loop states [2024-11-08 18:13:11,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 2.3333333333333335) internal successors, (35), 15 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:13:11,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 46 transitions. [2024-11-08 18:13:11,167 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 15 states and 46 transitions. Stem has 138 letters. Loop has 25 letters. [2024-11-08 18:13:11,167 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:13:11,167 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 15 states and 46 transitions. Stem has 163 letters. Loop has 25 letters. [2024-11-08 18:13:11,168 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:13:11,168 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 15 states and 46 transitions. Stem has 138 letters. Loop has 50 letters. [2024-11-08 18:13:11,168 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:13:11,168 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 523 states and 554 transitions. [2024-11-08 18:13:11,171 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 31 [2024-11-08 18:13:11,173 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 523 states to 444 states and 472 transitions. [2024-11-08 18:13:11,173 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 37 [2024-11-08 18:13:11,173 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2024-11-08 18:13:11,173 INFO L73 IsDeterministic]: Start isDeterministic. Operand 444 states and 472 transitions. [2024-11-08 18:13:11,174 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:13:11,174 INFO L218 hiAutomatonCegarLoop]: Abstraction has 444 states and 472 transitions. [2024-11-08 18:13:11,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 444 states and 472 transitions. [2024-11-08 18:13:11,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 444 to 369. [2024-11-08 18:13:11,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 369 states, 369 states have (on average 1.0731707317073171) internal successors, (396), 368 states have internal predecessors, (396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:13:11,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369 states to 369 states and 396 transitions. [2024-11-08 18:13:11,182 INFO L240 hiAutomatonCegarLoop]: Abstraction has 369 states and 396 transitions. [2024-11-08 18:13:11,182 INFO L425 stractBuchiCegarLoop]: Abstraction has 369 states and 396 transitions. [2024-11-08 18:13:11,182 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-11-08 18:13:11,182 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 369 states and 396 transitions. [2024-11-08 18:13:11,184 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 30 [2024-11-08 18:13:11,184 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:13:11,184 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:13:11,186 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2024-11-08 18:13:11,187 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 11, 1, 1, 1, 1, 1] [2024-11-08 18:13:11,187 INFO L745 eck$LassoCheckResult]: Stem: 16050#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 16051#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 16052#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16265#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16264#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16263#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16262#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16261#L17-4 foo_#res#1 := foo_~i~0#1; 16260#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16259#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16258#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16257#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16256#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16255#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16254#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16253#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16252#L17-4 foo_#res#1 := foo_~i~0#1; 16251#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16250#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16249#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16248#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16247#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16246#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16245#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16244#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16243#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16242#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16241#L17-4 foo_#res#1 := foo_~i~0#1; 16240#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16239#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16238#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16237#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16236#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16235#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16234#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16233#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16232#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16231#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16230#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16229#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16228#L17-4 foo_#res#1 := foo_~i~0#1; 16227#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16226#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16225#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16224#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16223#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16222#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16221#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16220#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16219#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16218#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16217#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16216#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16215#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16214#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16213#L17-4 foo_#res#1 := foo_~i~0#1; 16212#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16211#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16210#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16209#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16208#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16207#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16206#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16205#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16204#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16203#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16202#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16201#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16200#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16199#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16198#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16197#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16196#L17-4 foo_#res#1 := foo_~i~0#1; 16195#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16193#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16192#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16191#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16190#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16189#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16188#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16187#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16186#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16185#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16184#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16183#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16182#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16181#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16180#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16179#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16178#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16176#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16175#L17-4 foo_#res#1 := foo_~i~0#1; 16174#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16173#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16172#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16171#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16170#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16169#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16168#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16167#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16166#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16165#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16164#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16163#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16162#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16161#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16160#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16159#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16158#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16157#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16156#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16154#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16153#L17-4 foo_#res#1 := foo_~i~0#1; 16152#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16150#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16149#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16148#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16147#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16146#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16145#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16144#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16143#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16142#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16141#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16140#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16139#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16138#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16137#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16136#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16135#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16134#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16133#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16132#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16127#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16128#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16119#L17-4 foo_#res#1 := foo_~i~0#1; 16117#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16115#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16062#L26-1 [2024-11-08 18:13:11,187 INFO L747 eck$LassoCheckResult]: Loop: 16062#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16114#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16113#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16112#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16111#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16110#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16109#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16108#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16107#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16106#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16105#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16104#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16103#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16102#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16101#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16100#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16099#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16098#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16097#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16096#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16095#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16094#L17-3 assume foo_~i~0#1 <= foo_~size#1; 16070#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16069#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16067#L17-4 foo_#res#1 := foo_~i~0#1; 16065#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16061#L26-3 assume main_~i~1#1 % 4294967296 < 32; 16062#L26-1 [2024-11-08 18:13:11,188 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:11,188 INFO L85 PathProgramCache]: Analyzing trace with hash -1731667665, now seen corresponding path program 30 times [2024-11-08 18:13:11,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:13:11,188 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537530068] [2024-11-08 18:13:11,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:13:11,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:13:11,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:11,281 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:13:11,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:11,368 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:13:11,369 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:11,369 INFO L85 PathProgramCache]: Analyzing trace with hash 586128815, now seen corresponding path program 14 times [2024-11-08 18:13:11,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:13:11,369 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508330989] [2024-11-08 18:13:11,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:13:11,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:13:11,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:11,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:13:11,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:11,396 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:13:11,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:11,397 INFO L85 PathProgramCache]: Analyzing trace with hash -1040812095, now seen corresponding path program 31 times [2024-11-08 18:13:11,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:13:11,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [809393181] [2024-11-08 18:13:11,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:13:11,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:13:11,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:13:12,493 INFO L134 CoverageAnalysis]: Checked inductivity of 3875 backedges. 229 proven. 3361 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-08 18:13:12,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:13:12,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [809393181] [2024-11-08 18:13:12,493 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [809393181] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:13:12,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2095896328] [2024-11-08 18:13:12,494 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 18:13:12,494 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:13:12,494 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:13:12,495 INFO L229 MonitoredProcess]: Starting monitored process 121 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:13:12,497 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (121)] Waiting until timeout for monitored process [2024-11-08 18:13:12,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:13:12,885 INFO L255 TraceCheckSpWp]: Trace formula consists of 992 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-08 18:13:12,888 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:13:13,479 INFO L134 CoverageAnalysis]: Checked inductivity of 3875 backedges. 248 proven. 3342 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-08 18:13:13,479 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:13:13,919 INFO L134 CoverageAnalysis]: Checked inductivity of 3875 backedges. 248 proven. 3342 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-08 18:13:13,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2095896328] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:13:13,919 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:13:13,920 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23] total 36 [2024-11-08 18:13:13,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [322649076] [2024-11-08 18:13:13,920 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:13:16,390 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:13:16,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-11-08 18:13:16,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=958, Unknown=0, NotChecked=0, Total=1260 [2024-11-08 18:13:16,391 INFO L87 Difference]: Start difference. First operand 369 states and 396 transitions. cyclomatic complexity: 35 Second operand has 36 states, 36 states have (on average 3.5) internal successors, (126), 36 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:13:17,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:13:17,945 INFO L93 Difference]: Finished difference Result 329 states and 335 transitions. [2024-11-08 18:13:17,945 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 329 states and 335 transitions. [2024-11-08 18:13:17,947 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 30 [2024-11-08 18:13:17,948 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 329 states to 253 states and 259 transitions. [2024-11-08 18:13:17,948 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 44 [2024-11-08 18:13:17,948 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 44 [2024-11-08 18:13:17,949 INFO L73 IsDeterministic]: Start isDeterministic. Operand 253 states and 259 transitions. [2024-11-08 18:13:17,949 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:13:17,949 INFO L218 hiAutomatonCegarLoop]: Abstraction has 253 states and 259 transitions. [2024-11-08 18:13:17,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states and 259 transitions. [2024-11-08 18:13:17,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 221. [2024-11-08 18:13:17,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 221 states, 221 states have (on average 1.0271493212669682) internal successors, (227), 220 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:13:17,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 227 transitions. [2024-11-08 18:13:17,961 INFO L240 hiAutomatonCegarLoop]: Abstraction has 221 states and 227 transitions. [2024-11-08 18:13:17,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2024-11-08 18:13:17,965 INFO L425 stractBuchiCegarLoop]: Abstraction has 221 states and 227 transitions. [2024-11-08 18:13:17,965 INFO L332 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2024-11-08 18:13:17,965 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 221 states and 227 transitions. [2024-11-08 18:13:17,970 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 30 [2024-11-08 18:13:17,970 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:13:17,970 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:13:17,971 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [55, 55, 11, 10, 10, 10, 10, 1, 1] [2024-11-08 18:13:17,971 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 11, 1, 1, 1, 1, 1] [2024-11-08 18:13:17,971 INFO L745 eck$LassoCheckResult]: Stem: 17903#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 17904#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 17905#L26-3 assume main_~i~1#1 % 4294967296 < 32; 17898#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 17899#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17908#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18110#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 17915#L17-4 foo_#res#1 := foo_~i~0#1; 17916#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18107#L26-3 assume main_~i~1#1 % 4294967296 < 32; 17900#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 17901#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17910#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17911#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18111#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18109#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18108#L17-4 foo_#res#1 := foo_~i~0#1; 17893#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 17894#L26-3 assume main_~i~1#1 % 4294967296 < 32; 17913#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18106#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18105#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18104#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18103#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18102#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18101#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18100#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18099#L17-4 foo_#res#1 := foo_~i~0#1; 18098#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18097#L26-3 assume main_~i~1#1 % 4294967296 < 32; 18096#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18095#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18094#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18093#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18092#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18091#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18090#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18089#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18088#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18087#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18086#L17-4 foo_#res#1 := foo_~i~0#1; 18085#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18084#L26-3 assume main_~i~1#1 % 4294967296 < 32; 18083#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18082#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18081#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18080#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18079#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18078#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18077#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18076#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18075#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18074#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18073#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18072#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18071#L17-4 foo_#res#1 := foo_~i~0#1; 18070#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18069#L26-3 assume main_~i~1#1 % 4294967296 < 32; 18068#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18067#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18066#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18065#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18064#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18063#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18062#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18061#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18060#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18059#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18058#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18057#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18056#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18055#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18054#L17-4 foo_#res#1 := foo_~i~0#1; 18053#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18052#L26-3 assume main_~i~1#1 % 4294967296 < 32; 18051#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18050#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18049#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18048#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18047#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18046#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18045#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18044#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18043#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18042#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18041#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18040#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18039#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18038#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18037#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18036#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18035#L17-4 foo_#res#1 := foo_~i~0#1; 18034#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18033#L26-3 assume main_~i~1#1 % 4294967296 < 32; 18032#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18031#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18030#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18029#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18028#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18027#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18026#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18025#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18023#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18022#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18021#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18019#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18018#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18017#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18015#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18014#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18013#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18011#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 18010#L17-4 foo_#res#1 := foo_~i~0#1; 18009#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18007#L26-3 assume main_~i~1#1 % 4294967296 < 32; 18006#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 18005#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18003#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18002#L17-3 assume foo_~i~0#1 <= foo_~size#1; 18001#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17999#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17998#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17997#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17995#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17994#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17993#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17991#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17990#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17989#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17987#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17986#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17985#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17981#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17982#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17977#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 17975#L17-4 foo_#res#1 := foo_~i~0#1; 17976#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 18024#L26-3 assume main_~i~1#1 % 4294967296 < 32; 17972#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 17970#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17971#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18016#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17966#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17964#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17965#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18008#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17960#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17958#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17959#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 18000#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17954#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17952#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17953#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17992#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17948#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17946#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17947#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17984#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17983#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17941#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 17940#L17-4 foo_#res#1 := foo_~i~0#1; 17925#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 17922#L26-3 assume main_~i~1#1 % 4294967296 < 32; 17912#L26-1 [2024-11-08 18:13:17,972 INFO L747 eck$LassoCheckResult]: Loop: 17912#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 17906#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17907#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17909#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17939#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17938#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17937#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17936#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17935#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17934#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17933#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17932#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17931#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17930#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17929#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17928#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17927#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17926#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17924#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17921#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17920#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17919#L17-3 assume foo_~i~0#1 <= foo_~size#1; 17918#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 17917#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 17914#L17-4 foo_#res#1 := foo_~i~0#1; 17891#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 17892#L26-3 assume main_~i~1#1 % 4294967296 < 32; 17912#L26-1 [2024-11-08 18:13:17,972 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:17,972 INFO L85 PathProgramCache]: Analyzing trace with hash -523775012, now seen corresponding path program 32 times [2024-11-08 18:13:17,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:13:17,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607646736] [2024-11-08 18:13:17,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:13:17,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:13:18,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:18,091 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:13:18,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:18,199 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:13:18,199 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:18,200 INFO L85 PathProgramCache]: Analyzing trace with hash 586128815, now seen corresponding path program 15 times [2024-11-08 18:13:18,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:13:18,200 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852912581] [2024-11-08 18:13:18,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:13:18,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:13:18,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:18,214 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:13:18,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:18,227 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:13:18,227 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:13:18,231 INFO L85 PathProgramCache]: Analyzing trace with hash 1236089076, now seen corresponding path program 33 times [2024-11-08 18:13:18,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:13:18,232 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056141995] [2024-11-08 18:13:18,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:13:18,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:13:18,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:18,399 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:13:18,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:13:18,528 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:16:42,253 WARN L286 SmtUtils]: Spent 3.36m on a formula simplification. DAG size of input: 1186 DAG size of output: 761 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 18:16:43,643 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:16:43,644 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:16:43,644 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:16:43,644 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:16:43,644 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 18:16:43,644 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:43,644 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:16:43,644 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:16:43,644 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration25_Lasso [2024-11-08 18:16:43,644 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:16:43,644 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:16:43,646 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,650 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,652 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,654 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,657 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,660 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,664 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,666 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,668 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,670 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:43,671 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:44,622 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:44,624 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:44,627 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:44,633 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:44,636 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:16:44,931 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 18:16:44,931 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 18:16:44,931 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:44,931 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:44,934 INFO L229 MonitoredProcess]: Starting monitored process 122 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:44,935 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (122)] Waiting until timeout for monitored process [2024-11-08 18:16:44,937 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:44,948 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:44,949 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:44,949 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:44,949 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:44,949 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:44,949 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:44,950 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:44,951 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:44,963 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (122)] Forceful destruction successful, exit code 0 [2024-11-08 18:16:44,963 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:44,963 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:44,964 INFO L229 MonitoredProcess]: Starting monitored process 123 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:44,965 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (123)] Waiting until timeout for monitored process [2024-11-08 18:16:44,966 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:44,977 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:44,977 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:44,977 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:44,977 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:44,977 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:44,977 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:44,978 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:44,980 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:44,995 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (123)] Ended with exit code 0 [2024-11-08 18:16:44,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:44,996 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:44,997 INFO L229 MonitoredProcess]: Starting monitored process 124 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:44,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (124)] Waiting until timeout for monitored process [2024-11-08 18:16:44,998 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,009 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,009 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,009 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,009 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,009 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,010 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,010 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,011 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,022 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (124)] Ended with exit code 0 [2024-11-08 18:16:45,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,022 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,023 INFO L229 MonitoredProcess]: Starting monitored process 125 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,025 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (125)] Waiting until timeout for monitored process [2024-11-08 18:16:45,025 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,036 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,036 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,036 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,036 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,037 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,037 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,037 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,038 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,051 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (125)] Ended with exit code 0 [2024-11-08 18:16:45,051 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,052 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,053 INFO L229 MonitoredProcess]: Starting monitored process 126 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,054 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (126)] Waiting until timeout for monitored process [2024-11-08 18:16:45,054 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,065 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,065 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,065 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,065 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,065 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,066 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,066 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,067 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,078 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (126)] Ended with exit code 0 [2024-11-08 18:16:45,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,079 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,080 INFO L229 MonitoredProcess]: Starting monitored process 127 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,081 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (127)] Waiting until timeout for monitored process [2024-11-08 18:16:45,081 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,093 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,093 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,093 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,093 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,093 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,093 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,093 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,097 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,114 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (127)] Forceful destruction successful, exit code 0 [2024-11-08 18:16:45,114 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,114 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,115 INFO L229 MonitoredProcess]: Starting monitored process 128 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,117 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (128)] Waiting until timeout for monitored process [2024-11-08 18:16:45,118 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,129 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,129 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,129 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,129 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,129 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,130 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,130 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,131 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,142 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (128)] Ended with exit code 0 [2024-11-08 18:16:45,142 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,143 INFO L229 MonitoredProcess]: Starting monitored process 129 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (129)] Waiting until timeout for monitored process [2024-11-08 18:16:45,145 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,156 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,156 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,156 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,156 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,156 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,156 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,156 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,158 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,169 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (129)] Forceful destruction successful, exit code 0 [2024-11-08 18:16:45,170 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,170 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,171 INFO L229 MonitoredProcess]: Starting monitored process 130 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,172 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (130)] Waiting until timeout for monitored process [2024-11-08 18:16:45,173 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,184 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,184 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,184 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,184 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,185 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,185 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,185 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,186 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,198 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (130)] Ended with exit code 0 [2024-11-08 18:16:45,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,199 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,200 INFO L229 MonitoredProcess]: Starting monitored process 131 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,201 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (131)] Waiting until timeout for monitored process [2024-11-08 18:16:45,202 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,212 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,213 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 18:16:45,213 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,213 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,213 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,213 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 18:16:45,213 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 18:16:45,215 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,226 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (131)] Ended with exit code 0 [2024-11-08 18:16:45,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,228 INFO L229 MonitoredProcess]: Starting monitored process 132 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,229 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (132)] Waiting until timeout for monitored process [2024-11-08 18:16:45,229 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,240 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,240 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,240 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,240 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,242 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:16:45,242 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:16:45,246 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,257 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (132)] Ended with exit code 0 [2024-11-08 18:16:45,257 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,257 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,258 INFO L229 MonitoredProcess]: Starting monitored process 133 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,259 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (133)] Waiting until timeout for monitored process [2024-11-08 18:16:45,261 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,275 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,275 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,275 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,276 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,278 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:16:45,278 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:16:45,281 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,294 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (133)] Forceful destruction successful, exit code 0 [2024-11-08 18:16:45,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,294 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,295 INFO L229 MonitoredProcess]: Starting monitored process 134 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,296 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (134)] Waiting until timeout for monitored process [2024-11-08 18:16:45,297 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,307 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,307 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,307 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,308 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,309 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:16:45,309 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:16:45,313 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 18:16:45,324 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (134)] Ended with exit code 0 [2024-11-08 18:16:45,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,324 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,325 INFO L229 MonitoredProcess]: Starting monitored process 135 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,326 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (135)] Waiting until timeout for monitored process [2024-11-08 18:16:45,327 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 18:16:45,338 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 18:16:45,338 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 18:16:45,338 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 18:16:45,338 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 18:16:45,341 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 18:16:45,341 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 18:16:45,348 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 18:16:45,360 INFO L443 ModelExtractionUtils]: Simplification made 7 calls to the SMT solver. [2024-11-08 18:16:45,360 INFO L444 ModelExtractionUtils]: 9 out of 16 variables were initially zero. Simplification set additionally 4 variables to zero. [2024-11-08 18:16:45,361 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:16:45,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:45,362 INFO L229 MonitoredProcess]: Starting monitored process 136 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:16:45,363 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (136)] Waiting until timeout for monitored process [2024-11-08 18:16:45,363 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 18:16:45,376 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-08 18:16:45,376 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 18:16:45,376 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 21 Supporting invariants [] [2024-11-08 18:16:45,391 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (135)] Ended with exit code 0 [2024-11-08 18:16:45,435 INFO L156 tatePredicateManager]: 16 out of 16 supporting invariants were superfluous and have been removed [2024-11-08 18:16:45,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:16:45,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:16:45,651 INFO L255 TraceCheckSpWp]: Trace formula consists of 980 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 18:16:45,653 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:16:45,860 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (136)] Ended with exit code 0 [2024-11-08 18:16:45,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:16:45,914 INFO L255 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-08 18:16:45,915 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:16:46,306 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:16:46,306 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 15 loop predicates [2024-11-08 18:16:46,307 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 221 states and 227 transitions. cyclomatic complexity: 9 Second operand has 16 states, 16 states have (on average 2.3125) internal successors, (37), 16 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:16:46,640 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 221 states and 227 transitions. cyclomatic complexity: 9. Second operand has 16 states, 16 states have (on average 2.3125) internal successors, (37), 16 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 449 states and 465 transitions. Complement of second has 31 states. [2024-11-08 18:16:46,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 16 states 1 stem states 14 non-accepting loop states 1 accepting loop states [2024-11-08 18:16:46,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 2.3125) internal successors, (37), 16 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:16:46,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 49 transitions. [2024-11-08 18:16:46,641 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 16 states and 49 transitions. Stem has 163 letters. Loop has 27 letters. [2024-11-08 18:16:46,641 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:16:46,641 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 16 states and 49 transitions. Stem has 190 letters. Loop has 27 letters. [2024-11-08 18:16:46,642 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:16:46,642 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 16 states and 49 transitions. Stem has 163 letters. Loop has 54 letters. [2024-11-08 18:16:46,642 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 18:16:46,642 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 449 states and 465 transitions. [2024-11-08 18:16:46,645 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 33 [2024-11-08 18:16:46,646 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 449 states to 265 states and 277 transitions. [2024-11-08 18:16:46,646 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2024-11-08 18:16:46,646 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-11-08 18:16:46,646 INFO L73 IsDeterministic]: Start isDeterministic. Operand 265 states and 277 transitions. [2024-11-08 18:16:46,646 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:16:46,646 INFO L218 hiAutomatonCegarLoop]: Abstraction has 265 states and 277 transitions. [2024-11-08 18:16:46,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265 states and 277 transitions. [2024-11-08 18:16:46,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265 to 255. [2024-11-08 18:16:46,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 255 states, 255 states have (on average 1.0431372549019609) internal successors, (266), 254 states have internal predecessors, (266), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:16:46,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 266 transitions. [2024-11-08 18:16:46,651 INFO L240 hiAutomatonCegarLoop]: Abstraction has 255 states and 266 transitions. [2024-11-08 18:16:46,652 INFO L425 stractBuchiCegarLoop]: Abstraction has 255 states and 266 transitions. [2024-11-08 18:16:46,652 INFO L332 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2024-11-08 18:16:46,652 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 255 states and 266 transitions. [2024-11-08 18:16:46,653 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 32 [2024-11-08 18:16:46,653 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:16:46,653 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:16:46,654 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [55, 55, 11, 10, 10, 10, 10, 1, 1] [2024-11-08 18:16:46,654 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 12, 1, 1, 1, 1, 1] [2024-11-08 18:16:46,655 INFO L745 eck$LassoCheckResult]: Stem: 19279#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 19280#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 19286#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19274#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19275#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19283#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19285#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19288#L17-4 foo_#res#1 := foo_~i~0#1; 19269#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19270#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19276#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19277#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19521#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19520#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19519#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19518#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19517#L17-4 foo_#res#1 := foo_~i~0#1; 19516#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19515#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19514#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19513#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19512#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19511#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19510#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19509#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19508#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19507#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19506#L17-4 foo_#res#1 := foo_~i~0#1; 19505#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19504#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19503#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19502#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19501#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19500#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19499#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19498#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19497#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19496#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19495#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19494#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19493#L17-4 foo_#res#1 := foo_~i~0#1; 19492#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19491#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19490#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19489#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19488#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19487#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19486#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19485#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19484#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19483#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19482#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19481#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19480#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19479#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19478#L17-4 foo_#res#1 := foo_~i~0#1; 19477#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19476#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19475#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19474#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19473#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19472#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19471#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19470#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19469#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19468#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19467#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19466#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19465#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19464#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19463#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19462#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19461#L17-4 foo_#res#1 := foo_~i~0#1; 19460#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19459#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19458#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19457#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19456#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19455#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19454#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19453#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19452#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19451#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19450#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19449#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19448#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19447#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19446#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19445#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19444#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19443#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19442#L17-4 foo_#res#1 := foo_~i~0#1; 19441#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19440#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19439#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19438#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19437#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19436#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19435#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19434#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19433#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19432#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19431#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19430#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19429#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19428#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19427#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19426#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19425#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19423#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19421#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19420#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19419#L17-4 foo_#res#1 := foo_~i~0#1; 19418#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19417#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19416#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19415#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19414#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19413#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19412#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19411#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19410#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19409#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19408#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19406#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19404#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19402#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19401#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19400#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19398#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19397#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19396#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19393#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19394#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19389#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19390#L17-4 foo_#res#1 := foo_~i~0#1; 19424#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19422#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19357#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19358#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19351#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19352#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19347#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19348#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19343#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19344#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19339#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19340#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19335#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19336#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19332#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19331#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19330#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19328#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19329#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19399#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19323#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19324#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19320#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19318#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19319#L17-4 foo_#res#1 := foo_~i~0#1; 19294#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19295#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19291#L26-1 [2024-11-08 18:16:46,655 INFO L747 eck$LassoCheckResult]: Loop: 19291#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19281#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19282#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19284#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19315#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19314#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19313#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19312#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19311#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19310#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19309#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19308#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19307#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19306#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19305#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19304#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19303#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19302#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19301#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19300#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19299#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19298#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19297#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19296#L17-3 assume foo_~i~0#1 <= foo_~size#1; 19290#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19289#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19287#L17-4 foo_#res#1 := foo_~i~0#1; 19267#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19268#L26-3 assume main_~i~1#1 % 4294967296 < 32; 19291#L26-1 [2024-11-08 18:16:46,656 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:16:46,656 INFO L85 PathProgramCache]: Analyzing trace with hash -523775012, now seen corresponding path program 34 times [2024-11-08 18:16:46,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:16:46,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563244449] [2024-11-08 18:16:46,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:16:46,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:16:46,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:16:46,758 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:16:46,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:16:46,859 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:16:46,859 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:16:46,859 INFO L85 PathProgramCache]: Analyzing trace with hash 424876244, now seen corresponding path program 16 times [2024-11-08 18:16:46,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:16:46,859 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762081867] [2024-11-08 18:16:46,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:16:46,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:16:46,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:16:46,875 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:16:46,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:16:46,888 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:16:46,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:16:46,888 INFO L85 PathProgramCache]: Analyzing trace with hash -2028538151, now seen corresponding path program 35 times [2024-11-08 18:16:46,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:16:46,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144604760] [2024-11-08 18:16:46,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:16:46,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:16:46,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:16:48,226 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 274 proven. 4786 refuted. 0 times theorem prover too weak. 385 trivial. 0 not checked. [2024-11-08 18:16:48,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:16:48,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144604760] [2024-11-08 18:16:48,227 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2144604760] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:16:48,227 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1779299910] [2024-11-08 18:16:48,227 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 18:16:48,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:16:48,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:48,232 INFO L229 MonitoredProcess]: Starting monitored process 137 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:16:48,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (137)] Waiting until timeout for monitored process [2024-11-08 18:16:49,605 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 20 check-sat command(s) [2024-11-08 18:16:49,605 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:16:49,612 INFO L255 TraceCheckSpWp]: Trace formula consists of 1125 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-11-08 18:16:49,617 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:16:50,396 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 924 proven. 4129 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2024-11-08 18:16:50,396 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:16:51,079 INFO L134 CoverageAnalysis]: Checked inductivity of 5445 backedges. 924 proven. 4129 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2024-11-08 18:16:51,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1779299910] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:16:51,079 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:16:51,079 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 27, 27] total 46 [2024-11-08 18:16:51,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695659100] [2024-11-08 18:16:51,080 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:16:54,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:16:54,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2024-11-08 18:16:54,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=390, Invalid=1680, Unknown=0, NotChecked=0, Total=2070 [2024-11-08 18:16:54,220 INFO L87 Difference]: Start difference. First operand 255 states and 266 transitions. cyclomatic complexity: 15 Second operand has 46 states, 46 states have (on average 3.3260869565217392) internal successors, (153), 46 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:16:57,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:16:57,537 INFO L93 Difference]: Finished difference Result 369 states and 383 transitions. [2024-11-08 18:16:57,537 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 369 states and 383 transitions. [2024-11-08 18:16:57,539 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 32 [2024-11-08 18:16:57,540 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 369 states to 345 states and 359 transitions. [2024-11-08 18:16:57,541 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 47 [2024-11-08 18:16:57,541 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 47 [2024-11-08 18:16:57,541 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 359 transitions. [2024-11-08 18:16:57,541 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:16:57,541 INFO L218 hiAutomatonCegarLoop]: Abstraction has 345 states and 359 transitions. [2024-11-08 18:16:57,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 359 transitions. [2024-11-08 18:16:57,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 306. [2024-11-08 18:16:57,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 306 states, 306 states have (on average 1.0457516339869282) internal successors, (320), 305 states have internal predecessors, (320), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:16:57,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 320 transitions. [2024-11-08 18:16:57,547 INFO L240 hiAutomatonCegarLoop]: Abstraction has 306 states and 320 transitions. [2024-11-08 18:16:57,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 123 states. [2024-11-08 18:16:57,549 INFO L425 stractBuchiCegarLoop]: Abstraction has 306 states and 320 transitions. [2024-11-08 18:16:57,549 INFO L332 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2024-11-08 18:16:57,549 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 306 states and 320 transitions. [2024-11-08 18:16:57,551 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 32 [2024-11-08 18:16:57,551 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:16:57,551 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:16:57,552 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [55, 55, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-08 18:16:57,552 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-08 18:16:57,552 INFO L745 eck$LassoCheckResult]: Stem: 21310#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 21311#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 21317#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21305#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21306#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21504#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21503#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21502#L17-4 foo_#res#1 := foo_~i~0#1; 21501#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21500#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21499#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21498#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21497#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21496#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21495#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21494#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21493#L17-4 foo_#res#1 := foo_~i~0#1; 21492#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21491#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21490#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21489#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21488#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21487#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21486#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21485#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21484#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21483#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21482#L17-4 foo_#res#1 := foo_~i~0#1; 21481#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21480#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21479#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21478#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21477#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21476#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21475#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21474#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21473#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21472#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21471#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21470#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21469#L17-4 foo_#res#1 := foo_~i~0#1; 21468#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21467#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21466#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21465#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21464#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21463#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21462#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21461#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21460#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21459#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21458#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21457#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21456#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21455#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21454#L17-4 foo_#res#1 := foo_~i~0#1; 21453#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21452#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21451#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21450#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21449#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21448#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21447#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21446#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21445#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21444#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21443#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21442#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21441#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21440#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21439#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21438#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21437#L17-4 foo_#res#1 := foo_~i~0#1; 21436#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21435#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21434#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21433#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21432#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21431#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21430#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21429#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21428#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21427#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21426#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21425#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21424#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21423#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21422#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21421#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21420#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21419#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21418#L17-4 foo_#res#1 := foo_~i~0#1; 21417#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21416#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21415#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21414#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21413#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21412#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21411#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21410#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21409#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21408#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21407#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21406#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21405#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21404#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21403#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21402#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21401#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21400#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21399#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21398#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21397#L17-4 foo_#res#1 := foo_~i~0#1; 21396#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21395#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21394#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21393#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21392#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21391#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21390#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21389#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21388#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21387#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21386#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21385#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21384#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21383#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21382#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21381#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21380#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21379#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21378#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21377#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21376#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21375#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21374#L17-4 foo_#res#1 := foo_~i~0#1; 21373#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21372#L26-3 assume main_~i~1#1 % 4294967296 < 32; 21371#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 21370#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21369#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21368#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21367#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21366#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21365#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21364#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21362#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21360#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21358#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21356#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21354#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21352#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21350#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21348#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21346#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21344#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21342#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21340#L17-3 assume foo_~i~0#1 <= foo_~size#1; 21338#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 21336#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 21334#L17-4 foo_#res#1 := foo_~i~0#1; 21332#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 21329#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 21309#L26-4 main_~i~1#1 := 0; 21302#L29-3 [2024-11-08 18:16:57,553 INFO L747 eck$LassoCheckResult]: Loop: 21302#L29-3 assume main_~i~1#1 % 4294967296 < 32; 21303#L29-1 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 21304#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 21302#L29-3 [2024-11-08 18:16:57,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:16:57,553 INFO L85 PathProgramCache]: Analyzing trace with hash 942844524, now seen corresponding path program 3 times [2024-11-08 18:16:57,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:16:57,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991776202] [2024-11-08 18:16:57,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:16:57,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:16:57,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:16:58,286 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 0 proven. 3370 refuted. 0 times theorem prover too weak. 385 trivial. 0 not checked. [2024-11-08 18:16:58,286 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:16:58,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991776202] [2024-11-08 18:16:58,287 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [991776202] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:16:58,287 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [394695559] [2024-11-08 18:16:58,287 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 18:16:58,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:16:58,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:16:58,289 INFO L229 MonitoredProcess]: Starting monitored process 138 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:16:58,291 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (138)] Waiting until timeout for monitored process [2024-11-08 18:16:58,853 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2024-11-08 18:16:58,853 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 18:16:58,857 INFO L255 TraceCheckSpWp]: Trace formula consists of 631 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-08 18:16:58,861 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:16:59,601 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 1062 proven. 110 refuted. 0 times theorem prover too weak. 2583 trivial. 0 not checked. [2024-11-08 18:16:59,601 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:17:00,611 INFO L134 CoverageAnalysis]: Checked inductivity of 3755 backedges. 0 proven. 1172 refuted. 0 times theorem prover too weak. 2583 trivial. 0 not checked. [2024-11-08 18:17:00,611 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [394695559] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:17:00,611 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:17:00,612 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 16, 16] total 41 [2024-11-08 18:17:00,612 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240672908] [2024-11-08 18:17:00,612 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:17:00,612 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:17:00,613 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:00,613 INFO L85 PathProgramCache]: Analyzing trace with hash 63720, now seen corresponding path program 3 times [2024-11-08 18:17:00,613 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:00,613 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725054931] [2024-11-08 18:17:00,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:00,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:00,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:00,618 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:17:00,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:00,627 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:17:00,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:17:00,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-11-08 18:17:00,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=534, Invalid=1106, Unknown=0, NotChecked=0, Total=1640 [2024-11-08 18:17:00,738 INFO L87 Difference]: Start difference. First operand 306 states and 320 transitions. cyclomatic complexity: 18 Second operand has 41 states, 41 states have (on average 3.4146341463414633) internal successors, (140), 41 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:17:06,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:17:06,354 INFO L93 Difference]: Finished difference Result 581 states and 634 transitions. [2024-11-08 18:17:06,354 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 581 states and 634 transitions. [2024-11-08 18:17:06,356 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 55 [2024-11-08 18:17:06,358 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 581 states to 581 states and 634 transitions. [2024-11-08 18:17:06,358 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 62 [2024-11-08 18:17:06,359 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 62 [2024-11-08 18:17:06,359 INFO L73 IsDeterministic]: Start isDeterministic. Operand 581 states and 634 transitions. [2024-11-08 18:17:06,359 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 18:17:06,359 INFO L218 hiAutomatonCegarLoop]: Abstraction has 581 states and 634 transitions. [2024-11-08 18:17:06,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581 states and 634 transitions. [2024-11-08 18:17:06,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 411. [2024-11-08 18:17:06,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 411 states, 411 states have (on average 1.0608272506082725) internal successors, (436), 410 states have internal predecessors, (436), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:17:06,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 436 transitions. [2024-11-08 18:17:06,367 INFO L240 hiAutomatonCegarLoop]: Abstraction has 411 states and 436 transitions. [2024-11-08 18:17:06,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 127 states. [2024-11-08 18:17:06,369 INFO L425 stractBuchiCegarLoop]: Abstraction has 411 states and 436 transitions. [2024-11-08 18:17:06,369 INFO L332 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2024-11-08 18:17:06,369 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 411 states and 436 transitions. [2024-11-08 18:17:06,371 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 55 [2024-11-08 18:17:06,371 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:17:06,371 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:17:06,372 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [78, 78, 12, 12, 12, 11, 11, 1, 1] [2024-11-08 18:17:06,372 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 12, 1, 1, 1, 1, 1] [2024-11-08 18:17:06,373 INFO L745 eck$LassoCheckResult]: Stem: 23467#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 23468#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 23469#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23462#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23463#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23798#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23797#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23796#L17-4 foo_#res#1 := foo_~i~0#1; 23795#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23794#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23793#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23792#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23791#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23790#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23789#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23788#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23787#L17-4 foo_#res#1 := foo_~i~0#1; 23786#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23785#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23784#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23783#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23782#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23781#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23780#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23779#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23778#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23777#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23776#L17-4 foo_#res#1 := foo_~i~0#1; 23775#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23774#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23773#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23772#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23771#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23770#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23769#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23768#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23767#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23766#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23765#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23764#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23763#L17-4 foo_#res#1 := foo_~i~0#1; 23762#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23761#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23760#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23759#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23758#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23757#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23756#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23755#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23754#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23753#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23752#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23751#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23750#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23749#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23748#L17-4 foo_#res#1 := foo_~i~0#1; 23747#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23746#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23745#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23744#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23743#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23742#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23741#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23740#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23739#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23738#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23737#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23736#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23735#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23734#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23733#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23732#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23731#L17-4 foo_#res#1 := foo_~i~0#1; 23730#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23729#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23728#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23727#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23726#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23725#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23724#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23723#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23722#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23721#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23720#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23719#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23718#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23717#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23716#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23715#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23714#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23713#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23712#L17-4 foo_#res#1 := foo_~i~0#1; 23711#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23710#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23709#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23708#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23707#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23706#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23705#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23704#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23703#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23702#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23701#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23700#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23699#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23698#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23697#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23696#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23695#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23694#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23693#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23692#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23691#L17-4 foo_#res#1 := foo_~i~0#1; 23690#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23689#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23688#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23687#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23686#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23685#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23684#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23683#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23682#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23681#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23680#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23679#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23678#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23677#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23676#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23675#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23674#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23673#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23672#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23671#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23670#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23669#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23668#L17-4 foo_#res#1 := foo_~i~0#1; 23667#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23666#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23665#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23664#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23663#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23662#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23661#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23660#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23659#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23658#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23657#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23656#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23655#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23654#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23653#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23652#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23651#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23650#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23649#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23648#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23647#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23646#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23645#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23644#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23643#L17-4 foo_#res#1 := foo_~i~0#1; 23642#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23639#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23641#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23843#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23842#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23841#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23840#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23839#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23838#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23837#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23836#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23835#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23834#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23833#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23832#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23831#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23830#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23829#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23828#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23827#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23826#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23825#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23824#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23823#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23822#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23590#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23587#L17-4 foo_#res#1 := foo_~i~0#1; 23586#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23584#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23583#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23582#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23581#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23580#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23578#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23576#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23574#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23572#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23570#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23568#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23566#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23564#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23562#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23560#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23558#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23556#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23554#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23552#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23550#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23548#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23546#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23544#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23542#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23540#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23537#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23536#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23485#L17-4 [2024-11-08 18:17:06,373 INFO L747 eck$LassoCheckResult]: Loop: 23485#L17-4 foo_#res#1 := foo_~i~0#1; 23532#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 23530#L26-3 assume main_~i~1#1 % 4294967296 < 32; 23479#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 23527#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23526#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23525#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23524#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23523#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23522#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23521#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23520#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23519#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23518#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23517#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23516#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23515#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23514#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23513#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23512#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23511#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23510#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23509#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23508#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23507#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23506#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23505#L17-3 assume foo_~i~0#1 <= foo_~size#1; 23504#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 23503#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 23485#L17-4 [2024-11-08 18:17:06,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:06,374 INFO L85 PathProgramCache]: Analyzing trace with hash 72060323, now seen corresponding path program 36 times [2024-11-08 18:17:06,374 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:06,374 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130318998] [2024-11-08 18:17:06,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:06,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:06,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:06,520 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:17:06,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:06,686 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:17:06,687 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:06,687 INFO L85 PathProgramCache]: Analyzing trace with hash -113534574, now seen corresponding path program 17 times [2024-11-08 18:17:06,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:06,687 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711680033] [2024-11-08 18:17:06,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:06,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:06,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:06,703 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:17:06,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:06,716 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:17:06,717 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:06,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1151059760, now seen corresponding path program 37 times [2024-11-08 18:17:06,717 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:06,717 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [226523433] [2024-11-08 18:17:06,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:06,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:06,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:17:08,434 INFO L134 CoverageAnalysis]: Checked inductivity of 9546 backedges. 6347 proven. 2549 refuted. 0 times theorem prover too weak. 650 trivial. 0 not checked. [2024-11-08 18:17:08,434 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:17:08,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [226523433] [2024-11-08 18:17:08,435 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [226523433] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 18:17:08,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1909357641] [2024-11-08 18:17:08,435 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 18:17:08,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 18:17:08,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:17:08,436 INFO L229 MonitoredProcess]: Starting monitored process 139 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 18:17:08,465 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_23d63a31-358c-403f-93ad-efb5e57951c6/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (139)] Waiting until timeout for monitored process [2024-11-08 18:17:08,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:17:08,978 INFO L255 TraceCheckSpWp]: Trace formula consists of 1474 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-11-08 18:17:08,980 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 18:17:09,656 INFO L134 CoverageAnalysis]: Checked inductivity of 9546 backedges. 6646 proven. 2250 refuted. 0 times theorem prover too weak. 650 trivial. 0 not checked. [2024-11-08 18:17:09,656 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 18:17:10,340 INFO L134 CoverageAnalysis]: Checked inductivity of 9546 backedges. 6646 proven. 2250 refuted. 0 times theorem prover too weak. 650 trivial. 0 not checked. [2024-11-08 18:17:10,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1909357641] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 18:17:10,341 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 18:17:10,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 42 [2024-11-08 18:17:10,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374142585] [2024-11-08 18:17:10,341 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 18:17:13,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 66 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 131 [2024-11-08 18:17:13,518 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:17:13,519 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2024-11-08 18:17:13,520 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1371, Unknown=0, NotChecked=0, Total=1806 [2024-11-08 18:17:13,520 INFO L87 Difference]: Start difference. First operand 411 states and 436 transitions. cyclomatic complexity: 31 Second operand has 43 states, 42 states have (on average 3.5714285714285716) internal successors, (150), 43 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:17:16,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:17:16,257 INFO L93 Difference]: Finished difference Result 457 states and 475 transitions. [2024-11-08 18:17:16,257 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 457 states and 475 transitions. [2024-11-08 18:17:16,259 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 55 [2024-11-08 18:17:16,260 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 457 states to 310 states and 322 transitions. [2024-11-08 18:17:16,261 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 58 [2024-11-08 18:17:16,261 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 244 [2024-11-08 18:17:16,261 INFO L73 IsDeterministic]: Start isDeterministic. Operand 310 states and 322 transitions. [2024-11-08 18:17:16,262 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:17:16,262 INFO L218 hiAutomatonCegarLoop]: Abstraction has 310 states and 322 transitions. [2024-11-08 18:17:16,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states and 322 transitions. [2024-11-08 18:17:16,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 272. [2024-11-08 18:17:16,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 272 states, 272 states have (on average 1.0441176470588236) internal successors, (284), 271 states have internal predecessors, (284), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:17:16,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272 states to 272 states and 284 transitions. [2024-11-08 18:17:16,267 INFO L240 hiAutomatonCegarLoop]: Abstraction has 272 states and 284 transitions. [2024-11-08 18:17:16,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 107 states. [2024-11-08 18:17:16,268 INFO L425 stractBuchiCegarLoop]: Abstraction has 272 states and 284 transitions. [2024-11-08 18:17:16,268 INFO L332 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2024-11-08 18:17:16,268 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 272 states and 284 transitions. [2024-11-08 18:17:16,269 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 55 [2024-11-08 18:17:16,269 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:17:16,269 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:17:16,271 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [78, 78, 12, 12, 12, 11, 11, 1, 1] [2024-11-08 18:17:16,271 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [13, 13, 1, 1, 1, 1, 1] [2024-11-08 18:17:16,271 INFO L745 eck$LassoCheckResult]: Stem: 26027#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 26028#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 26034#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26290#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26288#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26286#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26284#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26035#L17-4 foo_#res#1 := foo_~i~0#1; 26019#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26020#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26024#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26025#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26029#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26032#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26289#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26287#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26285#L17-4 foo_#res#1 := foo_~i~0#1; 26283#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26282#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26281#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26280#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26279#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26278#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26277#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26276#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26275#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26274#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26273#L17-4 foo_#res#1 := foo_~i~0#1; 26272#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26271#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26270#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26269#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26268#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26267#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26266#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26265#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26264#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26263#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26262#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26261#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26260#L17-4 foo_#res#1 := foo_~i~0#1; 26259#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26258#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26257#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26256#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26255#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26254#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26253#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26252#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26251#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26250#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26249#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26248#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26247#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26246#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26245#L17-4 foo_#res#1 := foo_~i~0#1; 26244#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26243#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26242#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26241#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26240#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26239#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26238#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26237#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26236#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26235#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26234#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26233#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26232#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26231#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26230#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26229#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26228#L17-4 foo_#res#1 := foo_~i~0#1; 26227#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26226#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26225#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26224#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26223#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26222#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26221#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26220#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26219#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26218#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26217#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26216#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26215#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26214#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26213#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26212#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26211#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26210#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26209#L17-4 foo_#res#1 := foo_~i~0#1; 26208#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26207#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26206#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26205#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26204#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26203#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26202#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26201#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26200#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26199#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26198#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26197#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26196#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26195#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26194#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26193#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26192#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26191#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26190#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26189#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26188#L17-4 foo_#res#1 := foo_~i~0#1; 26187#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26186#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26185#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26184#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26183#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26182#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26181#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26180#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26179#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26178#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26177#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26176#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26175#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26174#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26173#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26172#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26171#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26170#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26169#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26168#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26167#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26166#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26165#L17-4 foo_#res#1 := foo_~i~0#1; 26164#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26163#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26162#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26161#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26160#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26159#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26158#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26157#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26156#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26155#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26154#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26153#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26152#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26151#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26150#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26149#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26148#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26147#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26146#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26145#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26144#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26143#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26142#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26141#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26140#L17-4 foo_#res#1 := foo_~i~0#1; 26139#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26138#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26137#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26136#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26135#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26134#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26133#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26132#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26131#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26130#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26129#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26128#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26127#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26126#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26125#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26124#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26123#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26122#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26121#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26120#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26119#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26118#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26117#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26116#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26115#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26114#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26113#L17-4 foo_#res#1 := foo_~i~0#1; 26112#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26111#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26110#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26109#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26108#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26030#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26031#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26033#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26107#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26106#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26105#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26104#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26103#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26102#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26101#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26100#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26099#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26098#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26097#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26096#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26095#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26094#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26093#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26092#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26091#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26090#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26089#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26088#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26043#L17-4 [2024-11-08 18:17:16,272 INFO L747 eck$LassoCheckResult]: Loop: 26043#L17-4 foo_#res#1 := foo_~i~0#1; 26087#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26086#L26-3 assume main_~i~1#1 % 4294967296 < 32; 26037#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26085#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26084#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26083#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26082#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26081#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26080#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26079#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26078#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26077#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26076#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26075#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26074#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26073#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26072#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26071#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26070#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26069#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26068#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26067#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26066#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26065#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26064#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26063#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26062#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26061#L17-3 assume foo_~i~0#1 <= foo_~size#1; 26060#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26059#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26043#L17-4 [2024-11-08 18:17:16,272 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:16,272 INFO L85 PathProgramCache]: Analyzing trace with hash 72060323, now seen corresponding path program 38 times [2024-11-08 18:17:16,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:16,273 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338802850] [2024-11-08 18:17:16,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:16,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:16,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:16,405 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:17:16,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:16,531 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:17:16,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:16,531 INFO L85 PathProgramCache]: Analyzing trace with hash -1732549299, now seen corresponding path program 18 times [2024-11-08 18:17:16,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:16,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632724231] [2024-11-08 18:17:16,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:16,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:16,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:16,546 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:17:16,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:16,561 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:17:16,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:17:16,561 INFO L85 PathProgramCache]: Analyzing trace with hash -1933139093, now seen corresponding path program 39 times [2024-11-08 18:17:16,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:17:16,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263034299] [2024-11-08 18:17:16,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:17:16,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:17:16,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:16,744 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:17:16,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:17:16,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:17:20,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 78 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 142