./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 17:14:25,992 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 17:14:26,075 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-08 17:14:26,081 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 17:14:26,082 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 17:14:26,110 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 17:14:26,111 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 17:14:26,111 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 17:14:26,112 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 17:14:26,113 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 17:14:26,114 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 17:14:26,114 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 17:14:26,115 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 17:14:26,115 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 17:14:26,116 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 17:14:26,116 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 17:14:26,117 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 17:14:26,117 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 17:14:26,118 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 17:14:26,118 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 17:14:26,119 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 17:14:26,124 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 17:14:26,124 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 17:14:26,125 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 17:14:26,125 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 17:14:26,125 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 17:14:26,126 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 17:14:26,126 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 17:14:26,126 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 17:14:26,127 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 17:14:26,127 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 17:14:26,127 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 17:14:26,132 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 17:14:26,132 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 17:14:26,133 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 17:14:26,133 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 17:14:26,134 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fbd99b1bfb27b318d252229087f8d9132096866b72085e8874326b5a6d541b4 [2024-11-08 17:14:26,493 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 17:14:26,536 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 17:14:26,539 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 17:14:26,541 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 17:14:26,543 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 17:14:26,544 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i Unable to find full path for "g++" [2024-11-08 17:14:28,893 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 17:14:29,235 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 17:14:29,236 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/sv-benchmarks/c/termination-memory-alloca/GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2024-11-08 17:14:29,251 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/data/c5baa9650/9049aefad2dc4e278b25bddc5c69a65c/FLAGdcf4141e7 [2024-11-08 17:14:29,475 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/data/c5baa9650/9049aefad2dc4e278b25bddc5c69a65c [2024-11-08 17:14:29,479 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 17:14:29,481 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 17:14:29,482 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 17:14:29,483 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 17:14:29,490 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 17:14:29,491 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 05:14:29" (1/1) ... [2024-11-08 17:14:29,493 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e7f104e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:29, skipping insertion in model container [2024-11-08 17:14:29,493 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 05:14:29" (1/1) ... [2024-11-08 17:14:29,563 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 17:14:29,984 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 17:14:30,000 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 17:14:30,082 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 17:14:30,125 INFO L204 MainTranslator]: Completed translation [2024-11-08 17:14:30,126 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30 WrapperNode [2024-11-08 17:14:30,127 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 17:14:30,128 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 17:14:30,128 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 17:14:30,129 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 17:14:30,139 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,158 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,183 INFO L138 Inliner]: procedures = 110, calls = 24, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 75 [2024-11-08 17:14:30,185 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 17:14:30,186 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 17:14:30,187 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 17:14:30,188 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 17:14:30,201 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,202 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,210 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,227 INFO L175 MemorySlicer]: Split 14 memory accesses to 3 slices as follows [5, 3, 6]. 43 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0, 0]. The 5 writes are split as follows [1, 1, 3]. [2024-11-08 17:14:30,228 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,228 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,233 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,237 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,239 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,240 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,243 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 17:14:30,244 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 17:14:30,245 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 17:14:30,245 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 17:14:30,246 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (1/1) ... [2024-11-08 17:14:30,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:30,271 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:30,293 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:30,299 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 17:14:30,339 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-08 17:14:30,340 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-08 17:14:30,341 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2024-11-08 17:14:30,341 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-08 17:14:30,341 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-08 17:14:30,342 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2024-11-08 17:14:30,342 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-08 17:14:30,342 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-08 17:14:30,342 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 17:14:30,343 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 17:14:30,557 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 17:14:30,560 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 17:14:30,761 INFO L? ?]: Removed 11 outVars from TransFormulas that were not future-live. [2024-11-08 17:14:30,762 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 17:14:30,776 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 17:14:30,777 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-08 17:14:30,777 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 05:14:30 BoogieIcfgContainer [2024-11-08 17:14:30,778 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 17:14:30,779 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 17:14:30,779 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 17:14:30,784 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 17:14:30,786 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:14:30,786 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 05:14:29" (1/3) ... [2024-11-08 17:14:30,787 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5ea678b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 05:14:30, skipping insertion in model container [2024-11-08 17:14:30,788 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:14:30,788 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:14:30" (2/3) ... [2024-11-08 17:14:30,788 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5ea678b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 05:14:30, skipping insertion in model container [2024-11-08 17:14:30,790 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:14:30,790 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 05:14:30" (3/3) ... [2024-11-08 17:14:30,792 INFO L332 chiAutomizerObserver]: Analyzing ICFG GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i [2024-11-08 17:14:30,883 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 17:14:30,883 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 17:14:30,884 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 17:14:30,885 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 17:14:30,885 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 17:14:30,885 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 17:14:30,886 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 17:14:30,886 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 17:14:30,894 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:30,918 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:30,918 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:30,919 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:30,926 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-08 17:14:30,926 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:30,926 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 17:14:30,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:30,930 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:30,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:30,931 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:30,931 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-08 17:14:30,931 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:30,942 INFO L745 eck$LassoCheckResult]: Stem: 12#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 9#L552true assume !main_#t~short9#1; 10#L552-2true assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 6#L556-2true [2024-11-08 17:14:30,943 INFO L747 eck$LassoCheckResult]: Loop: 6#L556-2true call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13#L555-1true assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4#L555-3true assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5#L556true assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6#L556-2true [2024-11-08 17:14:30,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:30,953 INFO L85 PathProgramCache]: Analyzing trace with hash 925671, now seen corresponding path program 1 times [2024-11-08 17:14:30,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:30,969 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284390738] [2024-11-08 17:14:30,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:30,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:31,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:31,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:31,397 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:31,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284390738] [2024-11-08 17:14:31,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [284390738] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:14:31,398 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:14:31,399 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-08 17:14:31,400 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064332198] [2024-11-08 17:14:31,401 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:14:31,406 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:31,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:31,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1388519, now seen corresponding path program 1 times [2024-11-08 17:14:31,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:31,408 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932148482] [2024-11-08 17:14:31,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:31,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:31,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:31,435 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:31,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:31,493 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:31,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:31,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 17:14:31,935 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 17:14:31,937 INFO L87 Difference]: Start difference. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.0) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:31,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:31,966 INFO L93 Difference]: Finished difference Result 14 states and 18 transitions. [2024-11-08 17:14:31,967 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 18 transitions. [2024-11-08 17:14:31,969 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:31,973 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 8 states and 10 transitions. [2024-11-08 17:14:31,974 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-08 17:14:31,974 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-08 17:14:31,975 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2024-11-08 17:14:31,975 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:14:31,975 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2024-11-08 17:14:31,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2024-11-08 17:14:32,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2024-11-08 17:14:32,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:32,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2024-11-08 17:14:32,009 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2024-11-08 17:14:32,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 17:14:32,016 INFO L425 stractBuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2024-11-08 17:14:32,016 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 17:14:32,016 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2024-11-08 17:14:32,018 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:32,018 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:32,018 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:32,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-08 17:14:32,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:32,019 INFO L745 eck$LassoCheckResult]: Stem: 40#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 41#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 43#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 36#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 37#L556-2 [2024-11-08 17:14:32,019 INFO L747 eck$LassoCheckResult]: Loop: 37#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 42#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 38#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 39#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 37#L556-2 [2024-11-08 17:14:32,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:32,020 INFO L85 PathProgramCache]: Analyzing trace with hash 925609, now seen corresponding path program 1 times [2024-11-08 17:14:32,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:32,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072684066] [2024-11-08 17:14:32,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:32,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:32,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:32,093 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:32,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:32,130 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:32,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:32,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1388519, now seen corresponding path program 2 times [2024-11-08 17:14:32,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:32,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071266998] [2024-11-08 17:14:32,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:32,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:32,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:32,147 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:32,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:32,160 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:32,161 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:32,161 INFO L85 PathProgramCache]: Analyzing trace with hash 121322383, now seen corresponding path program 1 times [2024-11-08 17:14:32,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:32,162 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281445058] [2024-11-08 17:14:32,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:32,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:32,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:32,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:32,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:32,245 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:33,604 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 17:14:33,605 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 17:14:33,605 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 17:14:33,605 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 17:14:33,605 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 17:14:33,605 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:33,606 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 17:14:33,606 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 17:14:33,606 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration2_Lasso [2024-11-08 17:14:33,606 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 17:14:33,607 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 17:14:33,634 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:33,642 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:33,647 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,493 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,499 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,504 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,509 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,512 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,517 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,522 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,526 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,530 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,533 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,537 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,542 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,546 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,550 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,554 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,558 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:34,561 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:35,205 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 17:14:35,213 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 17:14:35,215 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,218 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,222 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-11-08 17:14:35,224 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,242 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,242 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:35,243 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,243 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,243 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,245 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:35,245 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:35,251 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,276 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:35,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,276 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,279 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,281 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-08 17:14:35,283 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,301 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,301 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:35,301 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,302 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,302 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,305 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:35,305 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:35,308 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,326 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:35,327 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,327 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,328 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,329 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-08 17:14:35,330 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,344 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,344 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,344 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,345 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,352 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,353 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,363 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,385 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:35,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,388 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-08 17:14:35,392 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,408 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,408 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,408 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,408 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,413 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,413 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,421 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,443 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-11-08 17:14:35,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,444 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,445 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,446 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-08 17:14:35,448 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,461 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,461 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,461 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,462 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,473 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,473 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,487 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,508 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-11-08 17:14:35,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,509 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,512 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-08 17:14:35,515 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,532 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,532 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,532 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,532 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,535 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,535 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,539 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,560 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-11-08 17:14:35,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,561 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,563 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,564 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-08 17:14:35,566 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,583 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,583 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,584 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,584 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,589 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,589 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,597 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,619 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-11-08 17:14:35,620 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,620 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,621 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,626 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-08 17:14:35,627 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,644 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,644 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,645 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,645 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,657 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,658 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,672 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,694 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-11-08 17:14:35,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,695 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,697 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,699 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-08 17:14:35,701 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,719 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,719 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,720 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:35,720 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,726 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:35,726 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:35,736 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:35,755 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:35,756 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,756 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,757 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,760 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-08 17:14:35,764 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:35,778 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:35,778 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:35,779 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-08 17:14:35,779 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:35,805 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-08 17:14:35,805 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-08 17:14:35,860 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 17:14:35,943 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2024-11-08 17:14:35,943 INFO L444 ModelExtractionUtils]: 10 out of 31 variables were initially zero. Simplification set additionally 18 variables to zero. [2024-11-08 17:14:35,945 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:35,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:35,948 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:35,950 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-08 17:14:35,952 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 17:14:35,973 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2024-11-08 17:14:35,973 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 17:14:35,974 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1, v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_1) = 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_1 - 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_1 Supporting invariants [] [2024-11-08 17:14:35,998 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:36,138 INFO L156 tatePredicateManager]: 22 out of 23 supporting invariants were superfluous and have been removed [2024-11-08 17:14:36,148 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#1 [2024-11-08 17:14:36,149 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#1,GLOBAL] [2024-11-08 17:14:36,149 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#1,GLOBAL],[IdentifierExpression[~maxId~0!base,]]] [2024-11-08 17:14:36,151 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-08 17:14:36,151 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-08 17:14:36,152 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-08 17:14:36,192 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:36,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:36,244 INFO L255 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-08 17:14:36,247 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:36,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:36,290 INFO L255 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-08 17:14:36,292 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:36,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:36,387 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-08 17:14:36,389 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:36,487 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 16 states and 22 transitions. Complement of second has 7 states. [2024-11-08 17:14:36,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-08 17:14:36,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:36,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 9 transitions. [2024-11-08 17:14:36,494 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 9 transitions. Stem has 4 letters. Loop has 4 letters. [2024-11-08 17:14:36,495 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 17:14:36,495 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 9 transitions. Stem has 8 letters. Loop has 4 letters. [2024-11-08 17:14:36,496 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 17:14:36,496 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 9 transitions. Stem has 4 letters. Loop has 8 letters. [2024-11-08 17:14:36,496 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 17:14:36,496 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 22 transitions. [2024-11-08 17:14:36,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:36,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 22 transitions. [2024-11-08 17:14:36,500 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2024-11-08 17:14:36,501 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2024-11-08 17:14:36,501 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 22 transitions. [2024-11-08 17:14:36,501 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:36,502 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-11-08 17:14:36,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 22 transitions. [2024-11-08 17:14:36,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-11-08 17:14:36,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.375) internal successors, (22), 15 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:36,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 22 transitions. [2024-11-08 17:14:36,505 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-11-08 17:14:36,505 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 22 transitions. [2024-11-08 17:14:36,505 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 17:14:36,505 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 22 transitions. [2024-11-08 17:14:36,506 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:36,506 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:36,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:36,508 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:14:36,508 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:36,508 INFO L745 eck$LassoCheckResult]: Stem: 215#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 216#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 217#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 204#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 205#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 214#L555-1 assume !main_#t~short15#1; 206#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 207#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 210#L556-2 [2024-11-08 17:14:36,509 INFO L747 eck$LassoCheckResult]: Loop: 210#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 212#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 219#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 218#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 210#L556-2 [2024-11-08 17:14:36,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:36,509 INFO L85 PathProgramCache]: Analyzing trace with hash 121324307, now seen corresponding path program 1 times [2024-11-08 17:14:36,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:36,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528865992] [2024-11-08 17:14:36,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:36,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:36,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:36,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:36,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:36,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528865992] [2024-11-08 17:14:36,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [528865992] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:14:36,805 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:14:36,805 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 17:14:36,806 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627213511] [2024-11-08 17:14:36,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:14:36,806 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:36,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:36,807 INFO L85 PathProgramCache]: Analyzing trace with hash 1388519, now seen corresponding path program 3 times [2024-11-08 17:14:36,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:36,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75212945] [2024-11-08 17:14:36,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:36,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:36,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:36,818 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:36,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:36,827 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:37,083 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-11-08 17:14:37,147 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:37,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 17:14:37,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 17:14:37,148 INFO L87 Difference]: Start difference. First operand 16 states and 22 transitions. cyclomatic complexity: 8 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:37,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:37,204 INFO L93 Difference]: Finished difference Result 22 states and 28 transitions. [2024-11-08 17:14:37,204 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 28 transitions. [2024-11-08 17:14:37,205 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:37,208 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 28 transitions. [2024-11-08 17:14:37,209 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-08 17:14:37,209 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-08 17:14:37,210 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 28 transitions. [2024-11-08 17:14:37,210 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:37,210 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 28 transitions. [2024-11-08 17:14:37,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 28 transitions. [2024-11-08 17:14:37,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 18. [2024-11-08 17:14:37,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:37,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2024-11-08 17:14:37,214 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2024-11-08 17:14:37,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 17:14:37,216 INFO L425 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2024-11-08 17:14:37,218 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 17:14:37,219 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2024-11-08 17:14:37,219 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:37,219 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:37,220 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:37,220 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:14:37,220 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:37,220 INFO L745 eck$LassoCheckResult]: Stem: 259#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 260#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 264#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 251#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 252#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 265#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 253#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 254#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 257#L556-2 [2024-11-08 17:14:37,220 INFO L747 eck$LassoCheckResult]: Loop: 257#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 261#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 268#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 267#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 257#L556-2 [2024-11-08 17:14:37,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:37,225 INFO L85 PathProgramCache]: Analyzing trace with hash 121322385, now seen corresponding path program 1 times [2024-11-08 17:14:37,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:37,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279887702] [2024-11-08 17:14:37,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:37,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:37,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:37,277 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:37,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:37,318 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:37,322 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:37,322 INFO L85 PathProgramCache]: Analyzing trace with hash 1388519, now seen corresponding path program 4 times [2024-11-08 17:14:37,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:37,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382243038] [2024-11-08 17:14:37,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:37,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:37,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:37,335 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:37,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:37,344 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:37,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:37,345 INFO L85 PathProgramCache]: Analyzing trace with hash 958931831, now seen corresponding path program 1 times [2024-11-08 17:14:37,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:37,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957934735] [2024-11-08 17:14:37,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:37,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:37,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:37,391 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:37,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:37,420 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:38,949 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 17:14:38,949 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 17:14:38,949 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 17:14:38,949 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 17:14:38,949 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-08 17:14:38,949 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:38,950 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 17:14:38,950 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 17:14:38,950 INFO L132 ssoRankerPreferences]: Filename of dumped script: GulwaniJainKoskinen-2009PLDI-Fig1-alloca-2.i_Iteration4_Lasso [2024-11-08 17:14:38,950 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 17:14:38,950 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 17:14:38,956 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,964 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,967 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,970 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,975 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,978 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,981 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,984 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,987 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,990 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,992 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:38,997 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,000 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,015 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,018 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,020 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,023 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,026 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,031 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:39,034 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:14:40,044 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-08 17:14:40,045 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-08 17:14:40,045 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,045 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,048 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,050 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-08 17:14:40,051 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,064 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,065 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,065 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,065 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,065 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,066 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,066 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,069 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,089 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,089 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,091 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-08 17:14:40,095 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,109 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,109 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,109 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,110 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,110 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,110 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,110 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,115 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,132 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-08 17:14:40,132 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,132 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,134 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,136 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-11-08 17:14:40,137 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,151 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,151 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,151 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,151 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,151 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,152 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,152 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,155 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,172 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,173 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,173 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,174 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,176 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-11-08 17:14:40,179 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,194 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,194 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,194 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,194 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,194 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,195 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,195 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,198 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,217 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-11-08 17:14:40,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,218 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,219 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,221 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-11-08 17:14:40,222 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,237 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,237 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,238 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,238 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,238 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,238 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,238 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,240 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,258 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-11-08 17:14:40,259 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,259 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,261 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,262 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-11-08 17:14:40,263 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,277 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,278 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,278 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,278 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,279 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:40,280 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:40,285 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,303 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2024-11-08 17:14:40,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,304 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,306 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,307 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-11-08 17:14:40,308 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,322 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,323 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,323 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,323 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,323 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,324 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,324 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,325 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,343 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2024-11-08 17:14:40,344 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,346 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,348 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-11-08 17:14:40,352 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,367 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,367 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,367 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,367 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,367 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,368 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,368 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,370 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,392 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2024-11-08 17:14:40,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,392 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,394 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,396 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-08 17:14:40,397 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,411 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,411 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,411 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,411 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,412 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,412 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,412 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,416 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,430 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,430 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,430 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,431 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,441 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-11-08 17:14:40,442 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,454 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,454 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,454 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,454 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,454 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,454 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,455 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,456 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,469 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,471 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,472 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-11-08 17:14:40,473 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,484 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,485 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,485 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,485 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,485 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,485 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,485 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,487 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,500 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2024-11-08 17:14:40,500 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,502 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,503 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-11-08 17:14:40,503 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,515 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,515 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,515 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,515 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,515 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,516 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,516 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,517 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,530 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,531 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,532 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,533 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-11-08 17:14:40,534 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,546 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,546 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,546 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,546 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,548 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:40,548 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:40,552 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,568 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Ended with exit code 0 [2024-11-08 17:14:40,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,569 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-11-08 17:14:40,571 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,583 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,583 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,583 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,583 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,583 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,583 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,583 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,585 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,597 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,598 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,599 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,600 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-11-08 17:14:40,600 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,611 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,611 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,611 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,611 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,611 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,611 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,612 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,613 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,625 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2024-11-08 17:14:40,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,625 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,626 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,628 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,629 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2024-11-08 17:14:40,639 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,639 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,639 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,639 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,639 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,640 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,640 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,644 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,659 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,659 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,659 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,660 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,661 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2024-11-08 17:14:40,662 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,674 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,674 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,674 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,674 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,675 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-08 17:14:40,676 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-08 17:14:40,680 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,699 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,699 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,700 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,701 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2024-11-08 17:14:40,702 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,713 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,713 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,714 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,714 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,714 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,714 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,714 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,715 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,728 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,728 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,729 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,730 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2024-11-08 17:14:40,731 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,741 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,742 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-08 17:14:40,742 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,742 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-08 17:14:40,742 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,742 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-08 17:14:40,742 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-08 17:14:40,744 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-08 17:14:40,756 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2024-11-08 17:14:40,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,757 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,758 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,760 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-11-08 17:14:40,760 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-08 17:14:40,772 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-08 17:14:40,772 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-08 17:14:40,772 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2024-11-08 17:14:40,772 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-08 17:14:40,788 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2024-11-08 17:14:40,788 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2024-11-08 17:14:40,828 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-08 17:14:40,892 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2024-11-08 17:14:40,893 INFO L444 ModelExtractionUtils]: 8 out of 31 variables were initially zero. Simplification set additionally 20 variables to zero. [2024-11-08 17:14:40,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:14:40,893 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:40,898 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:14:40,899 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-11-08 17:14:40,900 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-08 17:14:40,914 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2024-11-08 17:14:40,914 INFO L474 LassoAnalysis]: Proved termination. [2024-11-08 17:14:40,914 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_2, v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_2) = 1*v_rep(select (select #memory_int#1 ULTIMATE.start_main_~maxId~0#1.base) ULTIMATE.start_main_~maxId~0#1.offset)_2 - 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~tmp~0#1.base) 0)_2 Supporting invariants [] [2024-11-08 17:14:40,934 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2024-11-08 17:14:41,085 INFO L156 tatePredicateManager]: 22 out of 23 supporting invariants were superfluous and have been removed [2024-11-08 17:14:41,089 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#1 [2024-11-08 17:14:41,089 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#1,GLOBAL] [2024-11-08 17:14:41,089 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#1,GLOBAL],[IdentifierExpression[~maxId~0!base,]]] [2024-11-08 17:14:41,089 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2024-11-08 17:14:41,089 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2024-11-08 17:14:41,090 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~tmp~0!base,]]] [2024-11-08 17:14:41,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:41,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:41,156 INFO L255 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-08 17:14:41,157 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:41,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:41,197 INFO L255 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-08 17:14:41,200 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:41,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:41,266 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.2 stem predicates 2 loop predicates [2024-11-08 17:14:41,266 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 18 states and 24 transitions. cyclomatic complexity: 8 Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:41,341 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 18 states and 24 transitions. cyclomatic complexity: 8. Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 26 states and 36 transitions. Complement of second has 8 states. [2024-11-08 17:14:41,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-08 17:14:41,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:41,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 15 transitions. [2024-11-08 17:14:41,345 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 15 transitions. Stem has 8 letters. Loop has 4 letters. [2024-11-08 17:14:41,345 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 17:14:41,345 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 15 transitions. Stem has 12 letters. Loop has 4 letters. [2024-11-08 17:14:41,345 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 17:14:41,346 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 15 transitions. Stem has 8 letters. Loop has 8 letters. [2024-11-08 17:14:41,346 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-08 17:14:41,346 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 36 transitions. [2024-11-08 17:14:41,349 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:41,350 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 36 transitions. [2024-11-08 17:14:41,352 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-11-08 17:14:41,352 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2024-11-08 17:14:41,352 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 36 transitions. [2024-11-08 17:14:41,353 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:41,353 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 36 transitions. [2024-11-08 17:14:41,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 36 transitions. [2024-11-08 17:14:41,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2024-11-08 17:14:41,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3846153846153846) internal successors, (36), 25 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:41,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 36 transitions. [2024-11-08 17:14:41,357 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 36 transitions. [2024-11-08 17:14:41,358 INFO L425 stractBuchiCegarLoop]: Abstraction has 26 states and 36 transitions. [2024-11-08 17:14:41,359 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-08 17:14:41,359 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 36 transitions. [2024-11-08 17:14:41,359 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:41,360 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:41,360 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:41,360 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-08 17:14:41,360 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:41,360 INFO L745 eck$LassoCheckResult]: Stem: 466#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 467#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 468#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 453#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 454#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 473#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 474#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 472#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 471#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 465#L555-1 assume !main_#t~short15#1; 477#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 459#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 460#L556-2 [2024-11-08 17:14:41,361 INFO L747 eck$LassoCheckResult]: Loop: 460#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 463#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 455#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 456#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 460#L556-2 [2024-11-08 17:14:41,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:41,361 INFO L85 PathProgramCache]: Analyzing trace with hash 958933755, now seen corresponding path program 1 times [2024-11-08 17:14:41,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:41,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139442383] [2024-11-08 17:14:41,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:41,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:41,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:41,429 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-08 17:14:41,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:41,429 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139442383] [2024-11-08 17:14:41,429 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1139442383] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:14:41,430 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:14:41,430 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 17:14:41,430 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1874249941] [2024-11-08 17:14:41,430 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:14:41,430 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:41,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:41,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1388519, now seen corresponding path program 5 times [2024-11-08 17:14:41,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:41,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868429779] [2024-11-08 17:14:41,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:41,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:41,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:41,441 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:41,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:41,448 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:41,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:41,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 17:14:41,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 17:14:41,663 INFO L87 Difference]: Start difference. First operand 26 states and 36 transitions. cyclomatic complexity: 13 Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:41,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:41,676 INFO L93 Difference]: Finished difference Result 31 states and 36 transitions. [2024-11-08 17:14:41,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 36 transitions. [2024-11-08 17:14:41,677 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:41,679 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 26 states and 31 transitions. [2024-11-08 17:14:41,680 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2024-11-08 17:14:41,680 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2024-11-08 17:14:41,680 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 31 transitions. [2024-11-08 17:14:41,680 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:41,680 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 31 transitions. [2024-11-08 17:14:41,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 31 transitions. [2024-11-08 17:14:41,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 24. [2024-11-08 17:14:41,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.2083333333333333) internal successors, (29), 23 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:41,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 29 transitions. [2024-11-08 17:14:41,685 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 29 transitions. [2024-11-08 17:14:41,686 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 17:14:41,686 INFO L425 stractBuchiCegarLoop]: Abstraction has 24 states and 29 transitions. [2024-11-08 17:14:41,688 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-08 17:14:41,688 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 29 transitions. [2024-11-08 17:14:41,688 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-08 17:14:41,688 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:41,689 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:41,689 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1] [2024-11-08 17:14:41,689 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-08 17:14:41,689 INFO L745 eck$LassoCheckResult]: Stem: 524#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 525#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 528#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 516#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 517#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 535#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 518#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 519#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 522#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 527#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 529#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 534#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 531#L556-2 [2024-11-08 17:14:41,692 INFO L747 eck$LassoCheckResult]: Loop: 531#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 533#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 532#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 530#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 531#L556-2 [2024-11-08 17:14:41,692 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:41,692 INFO L85 PathProgramCache]: Analyzing trace with hash 958931833, now seen corresponding path program 2 times [2024-11-08 17:14:41,692 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:41,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141723047] [2024-11-08 17:14:41,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:41,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:41,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:41,908 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2024-11-08 17:14:42,070 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:42,071 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:42,071 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141723047] [2024-11-08 17:14:42,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141723047] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:14:42,072 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1004549026] [2024-11-08 17:14:42,072 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 17:14:42,072 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:14:42,072 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:42,074 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:14:42,077 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2024-11-08 17:14:42,183 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 17:14:42,183 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:14:42,185 INFO L255 TraceCheckSpWp]: Trace formula consists of 171 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-08 17:14:42,187 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:42,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:42,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:14:42,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:42,356 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:42,357 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:14:42,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:42,432 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:42,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1004549026] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:14:42,433 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:14:42,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 9 [2024-11-08 17:14:42,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279828973] [2024-11-08 17:14:42,434 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:14:42,434 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:42,434 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:42,434 INFO L85 PathProgramCache]: Analyzing trace with hash 1388519, now seen corresponding path program 6 times [2024-11-08 17:14:42,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:42,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424539005] [2024-11-08 17:14:42,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:42,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:42,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:42,442 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:42,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:42,448 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:42,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:42,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-08 17:14:42,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-11-08 17:14:42,671 INFO L87 Difference]: Start difference. First operand 24 states and 29 transitions. cyclomatic complexity: 8 Second operand has 10 states, 9 states have (on average 2.111111111111111) internal successors, (19), 10 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:42,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:42,783 INFO L93 Difference]: Finished difference Result 34 states and 38 transitions. [2024-11-08 17:14:42,783 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 38 transitions. [2024-11-08 17:14:42,784 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2024-11-08 17:14:42,784 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 31 states and 35 transitions. [2024-11-08 17:14:42,784 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2024-11-08 17:14:42,784 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2024-11-08 17:14:42,785 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 35 transitions. [2024-11-08 17:14:42,785 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:42,785 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 35 transitions. [2024-11-08 17:14:42,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 35 transitions. [2024-11-08 17:14:42,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 28. [2024-11-08 17:14:42,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1428571428571428) internal successors, (32), 27 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:42,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2024-11-08 17:14:42,788 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 32 transitions. [2024-11-08 17:14:42,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 17:14:42,789 INFO L425 stractBuchiCegarLoop]: Abstraction has 28 states and 32 transitions. [2024-11-08 17:14:42,789 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-08 17:14:42,789 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 32 transitions. [2024-11-08 17:14:42,790 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2024-11-08 17:14:42,790 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:42,790 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:42,791 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 1, 1, 1, 1, 1] [2024-11-08 17:14:42,791 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1] [2024-11-08 17:14:42,791 INFO L745 eck$LassoCheckResult]: Stem: 675#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 676#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 677#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 661#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 662#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 681#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 680#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 679#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 678#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 673#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 665#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 666#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 672#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 674#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 663#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 664#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 667#L556-2 [2024-11-08 17:14:42,791 INFO L747 eck$LassoCheckResult]: Loop: 667#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 688#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 686#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 684#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 670#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 671#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 687#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 685#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 667#L556-2 [2024-11-08 17:14:42,792 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:42,792 INFO L85 PathProgramCache]: Analyzing trace with hash 1492297823, now seen corresponding path program 2 times [2024-11-08 17:14:42,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:42,792 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491046200] [2024-11-08 17:14:42,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:42,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:42,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:43,353 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:43,354 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:43,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491046200] [2024-11-08 17:14:43,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [491046200] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:14:43,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1185709017] [2024-11-08 17:14:43,355 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 17:14:43,355 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:14:43,355 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:43,357 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:14:43,360 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2024-11-08 17:14:43,473 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 17:14:43,473 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:14:43,475 INFO L255 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-11-08 17:14:43,480 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:43,682 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:14:43,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2024-11-08 17:14:43,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:14:43,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:43,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:43,906 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:43,907 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:14:44,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:44,093 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:44,093 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1185709017] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:14:44,093 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:14:44,093 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 18 [2024-11-08 17:14:44,094 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156116914] [2024-11-08 17:14:44,094 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:14:44,094 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:44,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:44,095 INFO L85 PathProgramCache]: Analyzing trace with hash -1868301105, now seen corresponding path program 1 times [2024-11-08 17:14:44,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:44,095 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24793637] [2024-11-08 17:14:44,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:44,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:44,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:44,106 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:44,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:44,114 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:44,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:44,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-08 17:14:44,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=270, Unknown=0, NotChecked=0, Total=342 [2024-11-08 17:14:44,456 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. cyclomatic complexity: 7 Second operand has 19 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 19 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:44,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:44,682 INFO L93 Difference]: Finished difference Result 42 states and 46 transitions. [2024-11-08 17:14:44,682 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 46 transitions. [2024-11-08 17:14:44,683 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2024-11-08 17:14:44,683 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 39 states and 43 transitions. [2024-11-08 17:14:44,684 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2024-11-08 17:14:44,684 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2024-11-08 17:14:44,684 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 43 transitions. [2024-11-08 17:14:44,684 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:44,684 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 43 transitions. [2024-11-08 17:14:44,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 43 transitions. [2024-11-08 17:14:44,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 36. [2024-11-08 17:14:44,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.1111111111111112) internal successors, (40), 35 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:44,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 40 transitions. [2024-11-08 17:14:44,689 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 40 transitions. [2024-11-08 17:14:44,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-08 17:14:44,691 INFO L425 stractBuchiCegarLoop]: Abstraction has 36 states and 40 transitions. [2024-11-08 17:14:44,691 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-08 17:14:44,691 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 40 transitions. [2024-11-08 17:14:44,692 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2024-11-08 17:14:44,694 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:44,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:44,694 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 2, 2, 1, 1, 1, 1] [2024-11-08 17:14:44,695 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 1] [2024-11-08 17:14:44,695 INFO L745 eck$LassoCheckResult]: Stem: 865#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 866#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 867#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 853#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 854#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 872#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 871#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 870#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 868#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 869#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 888#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 861#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 862#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 864#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 857#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 858#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 884#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 883#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 881#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 859#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 860#L556-2 [2024-11-08 17:14:44,696 INFO L747 eck$LassoCheckResult]: Loop: 860#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 863#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 855#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 856#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 877#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 887#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 886#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 885#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 879#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 882#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 880#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 878#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 860#L556-2 [2024-11-08 17:14:44,697 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:44,697 INFO L85 PathProgramCache]: Analyzing trace with hash -729527739, now seen corresponding path program 3 times [2024-11-08 17:14:44,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:44,697 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683805982] [2024-11-08 17:14:44,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:44,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:44,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:45,905 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:45,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:45,905 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683805982] [2024-11-08 17:14:45,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1683805982] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:14:45,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1786056128] [2024-11-08 17:14:45,906 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 17:14:45,906 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:14:45,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:45,909 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:14:45,911 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2024-11-08 17:14:46,058 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-08 17:14:46,058 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:14:46,060 INFO L255 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 25 conjuncts are in the unsatisfiable core [2024-11-08 17:14:46,065 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:46,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:14:46,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:46,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:14:46,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:14:46,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:46,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:14:46,453 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:14:46,454 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:14:46,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:14:46,742 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 14 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:14:46,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1786056128] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:14:46,743 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:14:46,743 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 20 [2024-11-08 17:14:46,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903619806] [2024-11-08 17:14:46,744 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:14:46,745 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:46,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:46,746 INFO L85 PathProgramCache]: Analyzing trace with hash 1905649333, now seen corresponding path program 2 times [2024-11-08 17:14:46,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:46,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237229715] [2024-11-08 17:14:46,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:46,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:46,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:46,772 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:46,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:46,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:47,416 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:47,417 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-11-08 17:14:47,417 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=357, Unknown=0, NotChecked=0, Total=420 [2024-11-08 17:14:47,418 INFO L87 Difference]: Start difference. First operand 36 states and 40 transitions. cyclomatic complexity: 7 Second operand has 21 states, 20 states have (on average 2.05) internal successors, (41), 21 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:48,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:48,008 INFO L93 Difference]: Finished difference Result 55 states and 59 transitions. [2024-11-08 17:14:48,008 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 59 transitions. [2024-11-08 17:14:48,009 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2024-11-08 17:14:48,012 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 39 states and 42 transitions. [2024-11-08 17:14:48,013 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2024-11-08 17:14:48,013 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 24 [2024-11-08 17:14:48,013 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 42 transitions. [2024-11-08 17:14:48,013 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:48,013 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 42 transitions. [2024-11-08 17:14:48,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 42 transitions. [2024-11-08 17:14:48,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 36. [2024-11-08 17:14:48,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.0833333333333333) internal successors, (39), 35 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:48,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 39 transitions. [2024-11-08 17:14:48,019 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 39 transitions. [2024-11-08 17:14:48,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-08 17:14:48,021 INFO L425 stractBuchiCegarLoop]: Abstraction has 36 states and 39 transitions. [2024-11-08 17:14:48,023 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-08 17:14:48,023 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 39 transitions. [2024-11-08 17:14:48,024 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2024-11-08 17:14:48,024 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:48,024 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:48,025 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 3, 2, 1, 1, 1, 1] [2024-11-08 17:14:48,025 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 3, 2, 1] [2024-11-08 17:14:48,025 INFO L745 eck$LassoCheckResult]: Stem: 1118#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1119#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1120#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1106#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1107#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1127#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1129#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1128#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1126#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1125#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1124#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1123#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1121#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1122#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1141#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1114#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1115#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1117#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1110#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1111#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1137#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1136#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1134#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1112#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1113#L556-2 [2024-11-08 17:14:48,025 INFO L747 eck$LassoCheckResult]: Loop: 1113#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1116#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1108#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1109#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1130#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1140#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1139#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1138#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1132#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1135#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1133#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1131#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1113#L556-2 [2024-11-08 17:14:48,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:48,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1152965163, now seen corresponding path program 4 times [2024-11-08 17:14:48,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:48,027 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231392315] [2024-11-08 17:14:48,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:48,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:48,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:48,761 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 2 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:48,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:48,762 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231392315] [2024-11-08 17:14:48,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1231392315] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:14:48,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [840843224] [2024-11-08 17:14:48,763 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-08 17:14:48,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:14:48,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:48,764 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:14:48,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2024-11-08 17:14:48,884 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-08 17:14:48,884 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:14:48,885 INFO L255 TraceCheckSpWp]: Trace formula consists of 282 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-08 17:14:48,889 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:48,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:14:49,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:49,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:14:49,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2024-11-08 17:14:49,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:14:49,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-08 17:14:49,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:49,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:49,398 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:49,398 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:14:49,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:49,679 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:49,679 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [840843224] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:14:49,679 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:14:49,679 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2024-11-08 17:14:49,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908690118] [2024-11-08 17:14:49,680 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:14:49,680 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:49,681 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:49,681 INFO L85 PathProgramCache]: Analyzing trace with hash 1905649333, now seen corresponding path program 3 times [2024-11-08 17:14:49,681 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:49,681 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335066608] [2024-11-08 17:14:49,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:49,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:49,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:49,701 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:49,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:49,712 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:50,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:50,260 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-08 17:14:50,261 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=498, Unknown=0, NotChecked=0, Total=600 [2024-11-08 17:14:50,261 INFO L87 Difference]: Start difference. First operand 36 states and 39 transitions. cyclomatic complexity: 6 Second operand has 25 states, 24 states have (on average 2.125) internal successors, (51), 25 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:50,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:50,722 INFO L93 Difference]: Finished difference Result 53 states and 56 transitions. [2024-11-08 17:14:50,722 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 56 transitions. [2024-11-08 17:14:50,723 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2024-11-08 17:14:50,724 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 50 states and 53 transitions. [2024-11-08 17:14:50,724 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2024-11-08 17:14:50,725 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2024-11-08 17:14:50,725 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 53 transitions. [2024-11-08 17:14:50,725 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:50,725 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 53 transitions. [2024-11-08 17:14:50,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 53 transitions. [2024-11-08 17:14:50,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 44. [2024-11-08 17:14:50,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 43 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:50,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 47 transitions. [2024-11-08 17:14:50,732 INFO L240 hiAutomatonCegarLoop]: Abstraction has 44 states and 47 transitions. [2024-11-08 17:14:50,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-08 17:14:50,733 INFO L425 stractBuchiCegarLoop]: Abstraction has 44 states and 47 transitions. [2024-11-08 17:14:50,734 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-08 17:14:50,734 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 47 transitions. [2024-11-08 17:14:50,735 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2024-11-08 17:14:50,735 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:50,735 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:50,736 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 4, 2, 1, 1, 1, 1] [2024-11-08 17:14:50,736 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 3, 1] [2024-11-08 17:14:50,736 INFO L745 eck$LassoCheckResult]: Stem: 1391#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1392#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1396#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1381#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1382#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1393#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1385#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1386#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1416#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1415#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1414#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1387#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1388#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1424#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1423#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1422#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1394#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1395#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1421#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1389#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1390#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1418#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1420#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1419#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1417#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1397#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1383#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1384#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1402#L556-2 [2024-11-08 17:14:50,736 INFO L747 eck$LassoCheckResult]: Loop: 1402#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1413#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1411#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1398#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1399#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1412#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1410#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1409#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1408#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1407#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1406#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1405#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1401#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1404#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1403#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1400#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1402#L556-2 [2024-11-08 17:14:50,737 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:50,738 INFO L85 PathProgramCache]: Analyzing trace with hash 721729041, now seen corresponding path program 5 times [2024-11-08 17:14:50,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:50,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133237991] [2024-11-08 17:14:50,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:50,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:50,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:51,950 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 7 proven. 53 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:51,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:51,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133237991] [2024-11-08 17:14:51,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2133237991] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:14:51,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343582020] [2024-11-08 17:14:51,951 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 17:14:51,952 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:14:51,952 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:51,954 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:14:51,955 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2024-11-08 17:14:52,108 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2024-11-08 17:14:52,108 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:14:52,111 INFO L255 TraceCheckSpWp]: Trace formula consists of 319 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-08 17:14:52,114 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:52,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:14:52,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:14:52,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:52,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:14:52,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:14:52,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:14:52,487 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:52,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:14:52,495 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 59 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:14:52,495 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:14:52,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:14:52,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:14:52,812 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 11 proven. 48 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:14:52,812 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343582020] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:14:52,812 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:14:52,813 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 12] total 24 [2024-11-08 17:14:52,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2135036777] [2024-11-08 17:14:52,813 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:14:52,813 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:52,814 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:52,814 INFO L85 PathProgramCache]: Analyzing trace with hash 1377070491, now seen corresponding path program 4 times [2024-11-08 17:14:52,814 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:52,814 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057157311] [2024-11-08 17:14:52,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:52,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:52,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:52,836 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:52,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:52,853 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:53,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:53,727 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-08 17:14:53,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=527, Unknown=0, NotChecked=0, Total=600 [2024-11-08 17:14:53,728 INFO L87 Difference]: Start difference. First operand 44 states and 47 transitions. cyclomatic complexity: 6 Second operand has 25 states, 24 states have (on average 2.25) internal successors, (54), 25 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:54,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:54,435 INFO L93 Difference]: Finished difference Result 70 states and 74 transitions. [2024-11-08 17:14:54,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 74 transitions. [2024-11-08 17:14:54,436 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2024-11-08 17:14:54,436 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 51 states and 54 transitions. [2024-11-08 17:14:54,437 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2024-11-08 17:14:54,437 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2024-11-08 17:14:54,437 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 54 transitions. [2024-11-08 17:14:54,437 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:54,437 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 54 transitions. [2024-11-08 17:14:54,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 54 transitions. [2024-11-08 17:14:54,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 48. [2024-11-08 17:14:54,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 1.0625) internal successors, (51), 47 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:54,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2024-11-08 17:14:54,441 INFO L240 hiAutomatonCegarLoop]: Abstraction has 48 states and 51 transitions. [2024-11-08 17:14:54,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-08 17:14:54,445 INFO L425 stractBuchiCegarLoop]: Abstraction has 48 states and 51 transitions. [2024-11-08 17:14:54,445 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-08 17:14:54,445 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 51 transitions. [2024-11-08 17:14:54,446 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2024-11-08 17:14:54,446 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:54,446 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:54,447 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [7, 7, 7, 5, 2, 1, 1, 1, 1] [2024-11-08 17:14:54,447 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 4, 3, 1] [2024-11-08 17:14:54,447 INFO L745 eck$LassoCheckResult]: Stem: 1728#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1729#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 1730#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 1715#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 1716#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1725#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1748#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1747#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1726#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1727#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1719#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1720#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1735#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1740#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1739#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1737#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1738#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1749#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1736#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1723#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1724#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1746#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1745#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1744#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1743#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1734#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1742#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1741#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1732#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1733#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1754#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1721#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1722#L556-2 [2024-11-08 17:14:54,447 INFO L747 eck$LassoCheckResult]: Loop: 1722#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1731#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1717#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1718#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1750#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1762#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1761#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1760#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1759#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1758#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1757#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1756#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 1752#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 1755#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 1753#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 1751#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 1722#L556-2 [2024-11-08 17:14:54,452 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:54,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1766457353, now seen corresponding path program 6 times [2024-11-08 17:14:54,452 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:54,452 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326359286] [2024-11-08 17:14:54,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:54,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:54,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:14:55,629 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 3 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:55,629 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:14:55,629 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326359286] [2024-11-08 17:14:55,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326359286] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:14:55,630 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [165925088] [2024-11-08 17:14:55,630 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 17:14:55,630 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:14:55,630 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:14:55,632 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:14:55,634 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2024-11-08 17:14:55,840 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2024-11-08 17:14:55,840 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:14:55,843 INFO L255 TraceCheckSpWp]: Trace formula consists of 356 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-08 17:14:55,852 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:14:55,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:14:55,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:14:56,048 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:56,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:14:56,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2024-11-08 17:14:56,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:14:56,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-08 17:14:56,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-08 17:14:56,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:56,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:14:56,516 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 4 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:56,516 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:14:56,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:14:56,875 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 4 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:14:56,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [165925088] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:14:56,876 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:14:56,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 29 [2024-11-08 17:14:56,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [647077956] [2024-11-08 17:14:56,876 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:14:56,877 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:14:56,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:56,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1377070491, now seen corresponding path program 5 times [2024-11-08 17:14:56,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:56,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382262986] [2024-11-08 17:14:56,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:56,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:56,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:56,892 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:14:56,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:14:56,903 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:14:57,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:14:57,636 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2024-11-08 17:14:57,637 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=733, Unknown=0, NotChecked=0, Total=870 [2024-11-08 17:14:57,637 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. cyclomatic complexity: 6 Second operand has 30 states, 29 states have (on average 2.4827586206896552) internal successors, (72), 30 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:58,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:14:58,185 INFO L93 Difference]: Finished difference Result 65 states and 68 transitions. [2024-11-08 17:14:58,185 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 68 transitions. [2024-11-08 17:14:58,186 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-08 17:14:58,188 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 62 states and 65 transitions. [2024-11-08 17:14:58,188 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-08 17:14:58,188 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-08 17:14:58,188 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 65 transitions. [2024-11-08 17:14:58,189 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:14:58,189 INFO L218 hiAutomatonCegarLoop]: Abstraction has 62 states and 65 transitions. [2024-11-08 17:14:58,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 65 transitions. [2024-11-08 17:14:58,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 56. [2024-11-08 17:14:58,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 55 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:14:58,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 59 transitions. [2024-11-08 17:14:58,193 INFO L240 hiAutomatonCegarLoop]: Abstraction has 56 states and 59 transitions. [2024-11-08 17:14:58,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-08 17:14:58,195 INFO L425 stractBuchiCegarLoop]: Abstraction has 56 states and 59 transitions. [2024-11-08 17:14:58,195 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-08 17:14:58,195 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 59 transitions. [2024-11-08 17:14:58,196 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-08 17:14:58,196 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:14:58,196 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:14:58,197 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 8, 8, 6, 2, 1, 1, 1, 1] [2024-11-08 17:14:58,197 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 5, 4, 1] [2024-11-08 17:14:58,197 INFO L745 eck$LassoCheckResult]: Stem: 2082#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2083#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2084#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2071#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2072#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2080#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2075#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2076#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2079#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2081#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2097#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2095#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2093#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2092#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2091#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2089#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2090#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2109#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2108#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2107#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2106#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2105#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2104#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2103#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2102#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2101#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2100#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2099#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2098#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2088#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2096#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2094#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2086#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2087#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2114#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2077#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2078#L556-2 [2024-11-08 17:14:58,197 INFO L747 eck$LassoCheckResult]: Loop: 2078#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2085#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2073#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2074#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2110#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2126#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2125#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2124#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2123#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2122#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2121#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2120#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2119#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2118#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2117#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2116#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2112#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2115#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2113#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2111#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2078#L556-2 [2024-11-08 17:14:58,202 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:14:58,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1260525021, now seen corresponding path program 7 times [2024-11-08 17:14:58,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:14:58,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375320] [2024-11-08 17:14:58,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:14:58,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:14:58,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:00,138 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 22 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:00,139 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:15:00,139 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375320] [2024-11-08 17:15:00,139 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [375320] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:15:00,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343634357] [2024-11-08 17:15:00,140 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 17:15:00,140 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:15:00,140 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:15:00,142 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:15:00,145 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2024-11-08 17:15:00,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:00,332 INFO L255 TraceCheckSpWp]: Trace formula consists of 393 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-08 17:15:00,338 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:15:00,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:15:00,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:00,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:15:00,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:00,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:15:00,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:15:00,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:15:00,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:15:00,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:00,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:15:00,864 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 0 proven. 111 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:15:00,864 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:15:00,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:15:01,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:15:01,189 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 11 proven. 100 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:15:01,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343634357] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:15:01,190 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:15:01,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14] total 28 [2024-11-08 17:15:01,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627767786] [2024-11-08 17:15:01,193 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:15:01,194 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:15:01,194 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:01,194 INFO L85 PathProgramCache]: Analyzing trace with hash 814289281, now seen corresponding path program 6 times [2024-11-08 17:15:01,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:01,195 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179342837] [2024-11-08 17:15:01,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:01,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:01,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:01,220 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:15:01,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:01,246 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:15:02,496 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:15:02,497 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-11-08 17:15:02,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=719, Unknown=0, NotChecked=0, Total=812 [2024-11-08 17:15:02,497 INFO L87 Difference]: Start difference. First operand 56 states and 59 transitions. cyclomatic complexity: 6 Second operand has 29 states, 28 states have (on average 2.392857142857143) internal successors, (67), 29 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:04,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:15:04,038 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2024-11-08 17:15:04,038 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 90 transitions. [2024-11-08 17:15:04,039 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-08 17:15:04,039 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 63 states and 66 transitions. [2024-11-08 17:15:04,039 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-08 17:15:04,040 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-08 17:15:04,040 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 66 transitions. [2024-11-08 17:15:04,040 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:15:04,040 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 66 transitions. [2024-11-08 17:15:04,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 66 transitions. [2024-11-08 17:15:04,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 60. [2024-11-08 17:15:04,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 1.05) internal successors, (63), 59 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:04,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 63 transitions. [2024-11-08 17:15:04,044 INFO L240 hiAutomatonCegarLoop]: Abstraction has 60 states and 63 transitions. [2024-11-08 17:15:04,045 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-11-08 17:15:04,046 INFO L425 stractBuchiCegarLoop]: Abstraction has 60 states and 63 transitions. [2024-11-08 17:15:04,046 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-08 17:15:04,046 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 63 transitions. [2024-11-08 17:15:04,047 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2024-11-08 17:15:04,047 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:15:04,047 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:15:04,048 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 9, 9, 7, 2, 1, 1, 1, 1] [2024-11-08 17:15:04,048 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 5, 4, 1] [2024-11-08 17:15:04,049 INFO L745 eck$LassoCheckResult]: Stem: 2522#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2523#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2524#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2509#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2510#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2519#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2551#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2517#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2518#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2552#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2549#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2550#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2520#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2521#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2513#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2514#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2534#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2533#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2532#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2530#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2531#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2548#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2547#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2546#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2545#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2544#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2543#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2542#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2541#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2540#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2539#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2538#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2537#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2529#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2536#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2535#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2527#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2528#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2556#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2515#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2516#L556-2 [2024-11-08 17:15:04,049 INFO L747 eck$LassoCheckResult]: Loop: 2516#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2568#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2567#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2553#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2526#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2525#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2511#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2512#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2566#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2565#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2564#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2563#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2562#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2561#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2560#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2559#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2555#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2558#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2557#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2554#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2516#L556-2 [2024-11-08 17:15:04,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:04,050 INFO L85 PathProgramCache]: Analyzing trace with hash 787880387, now seen corresponding path program 8 times [2024-11-08 17:15:04,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:04,050 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232653905] [2024-11-08 17:15:04,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:04,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:04,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:05,425 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 5 proven. 139 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:05,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:15:05,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232653905] [2024-11-08 17:15:05,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [232653905] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:15:05,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1446841912] [2024-11-08 17:15:05,426 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 17:15:05,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:15:05,426 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:15:05,428 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:15:05,429 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2024-11-08 17:15:05,665 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 17:15:05,666 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:15:05,669 INFO L255 TraceCheckSpWp]: Trace formula consists of 430 conjuncts, 38 conjuncts are in the unsatisfiable core [2024-11-08 17:15:05,674 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:15:05,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:15:05,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:15:05,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:15:05,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:06,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:15:06,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 30 [2024-11-08 17:15:06,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:15:06,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-08 17:15:06,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-08 17:15:06,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-08 17:15:06,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:15:06,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-08 17:15:06,542 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 11 proven. 133 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:06,542 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:15:06,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:06,975 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 11 proven. 133 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:06,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1446841912] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:15:06,976 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:15:06,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 33 [2024-11-08 17:15:06,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396048012] [2024-11-08 17:15:06,976 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:15:06,977 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:15:06,978 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:06,978 INFO L85 PathProgramCache]: Analyzing trace with hash 814289281, now seen corresponding path program 7 times [2024-11-08 17:15:06,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:06,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [876817933] [2024-11-08 17:15:06,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:06,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:06,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:06,997 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:15:07,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:07,018 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:15:08,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:15:08,355 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2024-11-08 17:15:08,356 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=953, Unknown=0, NotChecked=0, Total=1122 [2024-11-08 17:15:08,356 INFO L87 Difference]: Start difference. First operand 60 states and 63 transitions. cyclomatic complexity: 6 Second operand has 34 states, 33 states have (on average 2.6666666666666665) internal successors, (88), 34 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:09,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:15:09,097 INFO L93 Difference]: Finished difference Result 77 states and 80 transitions. [2024-11-08 17:15:09,097 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 80 transitions. [2024-11-08 17:15:09,098 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 24 [2024-11-08 17:15:09,099 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 74 states and 77 transitions. [2024-11-08 17:15:09,099 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2024-11-08 17:15:09,099 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2024-11-08 17:15:09,099 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 77 transitions. [2024-11-08 17:15:09,100 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:15:09,100 INFO L218 hiAutomatonCegarLoop]: Abstraction has 74 states and 77 transitions. [2024-11-08 17:15:09,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 77 transitions. [2024-11-08 17:15:09,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 68. [2024-11-08 17:15:09,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 67 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:09,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 71 transitions. [2024-11-08 17:15:09,109 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 71 transitions. [2024-11-08 17:15:09,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-08 17:15:09,110 INFO L425 stractBuchiCegarLoop]: Abstraction has 68 states and 71 transitions. [2024-11-08 17:15:09,110 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-08 17:15:09,111 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 71 transitions. [2024-11-08 17:15:09,111 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 24 [2024-11-08 17:15:09,111 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:15:09,112 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:15:09,113 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 10, 8, 2, 1, 1, 1, 1] [2024-11-08 17:15:09,113 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [6, 6, 6, 5, 1] [2024-11-08 17:15:09,113 INFO L745 eck$LassoCheckResult]: Stem: 2956#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2957#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 2960#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 2947#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 2948#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2958#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2994#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2993#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2992#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2962#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2951#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2952#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2955#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2959#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2975#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2973#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2971#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2970#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2969#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2967#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2968#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2991#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2990#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2989#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2988#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2987#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2986#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2985#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2984#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2983#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2982#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2981#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2980#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2979#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2978#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2977#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2976#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2966#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2974#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2972#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2964#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2965#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2998#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2953#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2954#L556-2 [2024-11-08 17:15:09,113 INFO L747 eck$LassoCheckResult]: Loop: 2954#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3014#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3013#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2995#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2963#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 2961#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2949#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2950#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3012#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3011#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3010#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3009#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3008#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3007#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3006#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3005#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3004#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3003#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3002#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3001#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 2997#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3000#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 2999#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 2996#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 2954#L556-2 [2024-11-08 17:15:09,114 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:09,114 INFO L85 PathProgramCache]: Analyzing trace with hash 786983337, now seen corresponding path program 9 times [2024-11-08 17:15:09,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:09,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [825749507] [2024-11-08 17:15:09,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:09,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:09,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:11,045 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 4 proven. 176 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:11,046 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:15:11,046 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [825749507] [2024-11-08 17:15:11,046 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [825749507] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:15:11,046 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [705171097] [2024-11-08 17:15:11,046 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 17:15:11,046 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:15:11,046 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:15:11,049 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:15:11,050 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2024-11-08 17:15:11,353 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-08 17:15:11,353 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:15:11,357 INFO L255 TraceCheckSpWp]: Trace formula consists of 393 conjuncts, 53 conjuncts are in the unsatisfiable core [2024-11-08 17:15:11,364 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:15:11,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:15:11,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:11,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:15:11,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:15:12,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 21 [2024-11-08 17:15:12,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:15:12,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 45 [2024-11-08 17:15:12,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:15:12,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:15:12,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2024-11-08 17:15:12,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2024-11-08 17:15:12,840 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 39 proven. 129 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-08 17:15:12,841 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:15:14,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 35 [2024-11-08 17:15:14,507 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 3 proven. 165 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-08 17:15:14,507 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [705171097] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:15:14,508 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:15:14,508 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 21, 21] total 53 [2024-11-08 17:15:14,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720956007] [2024-11-08 17:15:14,508 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:15:14,509 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:15:14,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:14,509 INFO L85 PathProgramCache]: Analyzing trace with hash -1164094873, now seen corresponding path program 8 times [2024-11-08 17:15:14,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:14,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839754211] [2024-11-08 17:15:14,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:14,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:14,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:14,535 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:15:14,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:14,554 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:15:16,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:15:16,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2024-11-08 17:15:16,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=420, Invalid=2442, Unknown=0, NotChecked=0, Total=2862 [2024-11-08 17:15:16,902 INFO L87 Difference]: Start difference. First operand 68 states and 71 transitions. cyclomatic complexity: 6 Second operand has 54 states, 53 states have (on average 2.0754716981132075) internal successors, (110), 54 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:20,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:15:20,294 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2024-11-08 17:15:20,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 139 states and 143 transitions. [2024-11-08 17:15:20,295 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:15:20,296 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 139 states to 127 states and 131 transitions. [2024-11-08 17:15:20,296 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2024-11-08 17:15:20,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2024-11-08 17:15:20,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 131 transitions. [2024-11-08 17:15:20,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:15:20,297 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 131 transitions. [2024-11-08 17:15:20,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 131 transitions. [2024-11-08 17:15:20,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 100. [2024-11-08 17:15:20,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:20,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2024-11-08 17:15:20,303 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 103 transitions. [2024-11-08 17:15:20,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2024-11-08 17:15:20,304 INFO L425 stractBuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2024-11-08 17:15:20,304 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-08 17:15:20,304 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2024-11-08 17:15:20,305 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:15:20,305 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:15:20,305 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:15:20,306 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 14, 12, 2, 1, 1, 1, 1] [2024-11-08 17:15:20,307 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 9, 1] [2024-11-08 17:15:20,307 INFO L745 eck$LassoCheckResult]: Stem: 3570#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3571#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 3575#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 3561#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 3562#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3572#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3624#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3623#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3573#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3574#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3577#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3620#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3621#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3587#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3619#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3589#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3586#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3585#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3584#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3582#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3583#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3622#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3565#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3566#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3569#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3618#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3617#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3616#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3615#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3614#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3613#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3612#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3611#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3610#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3609#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3608#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3607#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3606#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3605#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3604#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3603#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3602#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3601#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3600#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3599#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3598#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3597#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3596#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3595#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3594#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3593#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3592#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3591#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3580#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3590#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3588#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3578#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3579#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3628#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3567#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3568#L556-2 [2024-11-08 17:15:20,307 INFO L747 eck$LassoCheckResult]: Loop: 3568#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3660#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3659#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3625#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3581#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3576#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3563#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3564#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3658#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3657#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3656#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3655#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3654#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3653#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3652#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3651#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3650#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3649#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3648#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3647#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3646#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3645#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3644#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3643#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3642#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3641#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3640#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3639#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3638#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3637#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3636#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3635#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3634#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3633#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3632#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3631#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 3627#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 3630#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 3629#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 3626#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 3568#L556-2 [2024-11-08 17:15:20,307 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:20,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1422865599, now seen corresponding path program 10 times [2024-11-08 17:15:20,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:20,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795403021] [2024-11-08 17:15:20,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:20,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:20,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:22,572 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 4 proven. 336 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-08 17:15:22,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:15:22,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795403021] [2024-11-08 17:15:22,572 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795403021] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:15:22,573 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [527702190] [2024-11-08 17:15:22,573 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-08 17:15:22,573 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:15:22,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:15:22,575 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:15:22,579 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2024-11-08 17:15:22,875 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-08 17:15:22,875 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:15:22,880 INFO L255 TraceCheckSpWp]: Trace formula consists of 615 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-11-08 17:15:22,885 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:15:22,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:15:22,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:22,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:22,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:15:23,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:23,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:15:23,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:15:23,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:15:23,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:15:23,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:15:23,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:23,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:15:23,325 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 0 proven. 319 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-08 17:15:23,325 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:15:23,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:15:23,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:15:23,683 INFO L134 CoverageAnalysis]: Checked inductivity of 364 backedges. 31 proven. 288 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-08 17:15:23,683 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [527702190] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:15:23,683 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:15:23,684 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 16, 16] total 27 [2024-11-08 17:15:23,684 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808123648] [2024-11-08 17:15:23,684 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:15:23,684 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:15:23,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:23,685 INFO L85 PathProgramCache]: Analyzing trace with hash 505968639, now seen corresponding path program 9 times [2024-11-08 17:15:23,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:23,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792936408] [2024-11-08 17:15:23,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:23,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:23,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:23,714 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:15:23,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:23,734 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:15:34,295 WARN L286 SmtUtils]: Spent 10.55s on a formula simplification. DAG size of input: 346 DAG size of output: 258 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:15:34,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:15:34,489 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-11-08 17:15:34,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=675, Unknown=0, NotChecked=0, Total=756 [2024-11-08 17:15:34,490 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 6 Second operand has 28 states, 27 states have (on average 2.5185185185185186) internal successors, (68), 28 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:35,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:15:35,362 INFO L93 Difference]: Finished difference Result 150 states and 154 transitions. [2024-11-08 17:15:35,362 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 150 states and 154 transitions. [2024-11-08 17:15:35,363 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:15:35,364 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 150 states to 107 states and 110 transitions. [2024-11-08 17:15:35,364 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2024-11-08 17:15:35,364 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-08 17:15:35,364 INFO L73 IsDeterministic]: Start isDeterministic. Operand 107 states and 110 transitions. [2024-11-08 17:15:35,365 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:15:35,365 INFO L218 hiAutomatonCegarLoop]: Abstraction has 107 states and 110 transitions. [2024-11-08 17:15:35,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states and 110 transitions. [2024-11-08 17:15:35,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 104. [2024-11-08 17:15:35,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 103 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:35,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 107 transitions. [2024-11-08 17:15:35,369 INFO L240 hiAutomatonCegarLoop]: Abstraction has 104 states and 107 transitions. [2024-11-08 17:15:35,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-11-08 17:15:35,372 INFO L425 stractBuchiCegarLoop]: Abstraction has 104 states and 107 transitions. [2024-11-08 17:15:35,373 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-08 17:15:35,373 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 107 transitions. [2024-11-08 17:15:35,373 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:15:35,373 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:15:35,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:15:35,374 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 15, 15, 13, 2, 1, 1, 1, 1] [2024-11-08 17:15:35,374 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 9, 1] [2024-11-08 17:15:35,375 INFO L745 eck$LassoCheckResult]: Stem: 4242#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4243#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 4244#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 4230#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 4231#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4239#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4246#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4297#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4240#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4241#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4234#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4235#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4238#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4296#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4295#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4294#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4293#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4256#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4292#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4258#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4255#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4254#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4253#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4251#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 4252#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4291#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4290#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4289#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4288#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4287#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4286#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4285#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4284#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4283#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4282#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4281#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4280#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4279#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4278#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4277#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4276#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4275#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4274#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4273#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4272#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4271#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4270#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4269#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4268#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4267#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4266#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4265#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4264#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4263#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4262#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4261#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4260#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4250#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4259#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4257#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4248#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4249#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4301#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4236#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 4237#L556-2 [2024-11-08 17:15:35,375 INFO L747 eck$LassoCheckResult]: Loop: 4237#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4333#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4332#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4298#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4247#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4245#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4232#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4233#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4331#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4330#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4329#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4328#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4327#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4326#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4325#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4324#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4323#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4322#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4321#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4320#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4319#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4318#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4317#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4316#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4315#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4314#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4313#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4312#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4311#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4310#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4309#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4308#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4307#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4306#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4305#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4304#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 4300#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 4303#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 4302#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 4299#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 4237#L556-2 [2024-11-08 17:15:35,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:35,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1487864537, now seen corresponding path program 11 times [2024-11-08 17:15:35,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:35,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648666456] [2024-11-08 17:15:35,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:35,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:35,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:38,206 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 22 proven. 398 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:38,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:15:38,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648666456] [2024-11-08 17:15:38,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648666456] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:15:38,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [588663635] [2024-11-08 17:15:38,206 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 17:15:38,206 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:15:38,207 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:15:38,209 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:15:38,211 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2024-11-08 17:15:38,754 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2024-11-08 17:15:38,754 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:15:38,758 INFO L255 TraceCheckSpWp]: Trace formula consists of 652 conjuncts, 62 conjuncts are in the unsatisfiable core [2024-11-08 17:15:38,763 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:15:38,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:15:38,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:38,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:38,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:39,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:15:39,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:39,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 18 [2024-11-08 17:15:39,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 41 [2024-11-08 17:15:39,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 30 [2024-11-08 17:15:39,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 30 [2024-11-08 17:15:39,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 30 [2024-11-08 17:15:39,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 39 [2024-11-08 17:15:39,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:15:39,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:15:39,985 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 17 proven. 375 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-08 17:15:39,985 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:15:40,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 27 [2024-11-08 17:15:40,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 29 [2024-11-08 17:15:41,085 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 26 proven. 366 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-08 17:15:41,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [588663635] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:15:41,086 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:15:41,086 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 20, 20] total 55 [2024-11-08 17:15:41,086 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32550908] [2024-11-08 17:15:41,086 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:15:41,087 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:15:41,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:41,087 INFO L85 PathProgramCache]: Analyzing trace with hash 505968639, now seen corresponding path program 10 times [2024-11-08 17:15:41,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:41,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508330989] [2024-11-08 17:15:41,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:41,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:41,112 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:15:41,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:15:41,130 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:15:51,724 WARN L286 SmtUtils]: Spent 10.59s on a formula simplification. DAG size of input: 346 DAG size of output: 258 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:15:51,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:15:51,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2024-11-08 17:15:51,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=2850, Unknown=0, NotChecked=0, Total=3080 [2024-11-08 17:15:51,910 INFO L87 Difference]: Start difference. First operand 104 states and 107 transitions. cyclomatic complexity: 6 Second operand has 56 states, 55 states have (on average 2.690909090909091) internal successors, (148), 56 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:55,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:15:55,711 INFO L93 Difference]: Finished difference Result 154 states and 158 transitions. [2024-11-08 17:15:55,711 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 154 states and 158 transitions. [2024-11-08 17:15:55,713 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:15:55,714 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 154 states to 111 states and 114 transitions. [2024-11-08 17:15:55,714 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2024-11-08 17:15:55,714 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-08 17:15:55,715 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111 states and 114 transitions. [2024-11-08 17:15:55,715 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:15:55,715 INFO L218 hiAutomatonCegarLoop]: Abstraction has 111 states and 114 transitions. [2024-11-08 17:15:55,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states and 114 transitions. [2024-11-08 17:15:55,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 108. [2024-11-08 17:15:55,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.0277777777777777) internal successors, (111), 107 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:15:55,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2024-11-08 17:15:55,718 INFO L240 hiAutomatonCegarLoop]: Abstraction has 108 states and 111 transitions. [2024-11-08 17:15:55,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-11-08 17:15:55,725 INFO L425 stractBuchiCegarLoop]: Abstraction has 108 states and 111 transitions. [2024-11-08 17:15:55,725 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-08 17:15:55,726 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 111 transitions. [2024-11-08 17:15:55,726 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:15:55,726 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:15:55,726 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:15:55,727 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [16, 16, 16, 14, 2, 1, 1, 1, 1] [2024-11-08 17:15:55,727 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 9, 1] [2024-11-08 17:15:55,728 INFO L745 eck$LassoCheckResult]: Stem: 5021#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5022#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 5023#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 5009#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 5010#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5018#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5025#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5080#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5019#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5020#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5013#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5014#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5017#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5079#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5078#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5077#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5076#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5075#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5074#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5073#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5072#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5035#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5071#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5037#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5034#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5033#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5032#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5030#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5031#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5070#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5069#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5068#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5067#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5066#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5065#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5064#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5063#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5062#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5061#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5060#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5059#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5058#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5057#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5056#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5055#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5054#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5053#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5052#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5051#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5050#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5049#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5048#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5047#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5046#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5045#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5044#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5043#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5042#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5041#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5040#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5039#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5029#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5038#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5036#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5027#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5028#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5084#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5015#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5016#L556-2 [2024-11-08 17:15:55,728 INFO L747 eck$LassoCheckResult]: Loop: 5016#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5116#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5115#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5081#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5026#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5024#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5011#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5012#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5114#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5113#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5112#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5111#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5110#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5109#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5108#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5107#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5106#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5105#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5104#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5103#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5102#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5101#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5100#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5099#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5098#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5097#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5096#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5095#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5094#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5093#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5092#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5091#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5090#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5089#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5088#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5087#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5083#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5086#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5085#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5082#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5016#L556-2 [2024-11-08 17:15:55,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:15:55,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1385810957, now seen corresponding path program 12 times [2024-11-08 17:15:55,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:15:55,728 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722960228] [2024-11-08 17:15:55,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:15:55,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:15:55,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:15:58,087 INFO L134 CoverageAnalysis]: Checked inductivity of 480 backedges. 4 proven. 472 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-08 17:15:58,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:15:58,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [722960228] [2024-11-08 17:15:58,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [722960228] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:15:58,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [62828820] [2024-11-08 17:15:58,088 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 17:15:58,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:15:58,088 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:15:58,089 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:15:58,091 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2024-11-08 17:15:58,596 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 16 check-sat command(s) [2024-11-08 17:15:58,596 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:15:58,600 INFO L255 TraceCheckSpWp]: Trace formula consists of 689 conjuncts, 94 conjuncts are in the unsatisfiable core [2024-11-08 17:15:58,607 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:15:58,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:15:58,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:15:58,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:58,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:58,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:58,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:15:58,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-08 17:15:58,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2024-11-08 17:15:58,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:58,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2024-11-08 17:15:59,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:15:59,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2024-11-08 17:15:59,891 INFO L134 CoverageAnalysis]: Checked inductivity of 480 backedges. 0 proven. 480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:15:59,891 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:16:00,769 INFO L134 CoverageAnalysis]: Checked inductivity of 480 backedges. 24 proven. 456 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:16:00,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [62828820] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:16:00,769 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:16:00,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 24, 23] total 50 [2024-11-08 17:16:00,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1520247135] [2024-11-08 17:16:00,770 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:16:00,770 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:16:00,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:16:00,770 INFO L85 PathProgramCache]: Analyzing trace with hash 505968639, now seen corresponding path program 11 times [2024-11-08 17:16:00,770 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:16:00,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81747526] [2024-11-08 17:16:00,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:16:00,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:16:00,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:16:00,801 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:16:00,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:16:00,822 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:16:11,560 WARN L286 SmtUtils]: Spent 10.70s on a formula simplification. DAG size of input: 346 DAG size of output: 258 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:16:11,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:16:11,762 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2024-11-08 17:16:11,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=323, Invalid=2227, Unknown=0, NotChecked=0, Total=2550 [2024-11-08 17:16:11,762 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. cyclomatic complexity: 6 Second operand has 51 states, 50 states have (on average 2.88) internal successors, (144), 51 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:16:15,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:16:15,503 INFO L93 Difference]: Finished difference Result 168 states and 172 transitions. [2024-11-08 17:16:15,503 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 168 states and 172 transitions. [2024-11-08 17:16:15,504 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:16:15,504 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 168 states to 115 states and 118 transitions. [2024-11-08 17:16:15,505 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2024-11-08 17:16:15,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-08 17:16:15,505 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 118 transitions. [2024-11-08 17:16:15,505 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:16:15,505 INFO L218 hiAutomatonCegarLoop]: Abstraction has 115 states and 118 transitions. [2024-11-08 17:16:15,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 118 transitions. [2024-11-08 17:16:15,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 112. [2024-11-08 17:16:15,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 112 states have (on average 1.0267857142857142) internal successors, (115), 111 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:16:15,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 115 transitions. [2024-11-08 17:16:15,509 INFO L240 hiAutomatonCegarLoop]: Abstraction has 112 states and 115 transitions. [2024-11-08 17:16:15,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2024-11-08 17:16:15,512 INFO L425 stractBuchiCegarLoop]: Abstraction has 112 states and 115 transitions. [2024-11-08 17:16:15,512 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-08 17:16:15,512 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 112 states and 115 transitions. [2024-11-08 17:16:15,513 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:16:15,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:16:15,513 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:16:15,514 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [17, 17, 17, 15, 2, 1, 1, 1, 1] [2024-11-08 17:16:15,514 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 9, 1] [2024-11-08 17:16:15,515 INFO L745 eck$LassoCheckResult]: Stem: 5853#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5854#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 5855#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 5841#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 5842#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5850#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5857#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5916#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5851#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5852#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5845#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5846#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5849#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5915#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5914#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5913#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5912#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5911#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5910#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5909#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5908#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5907#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5906#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5905#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5904#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5867#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5903#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5869#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5866#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5865#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5864#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5862#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5863#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5902#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5901#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5900#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5899#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5898#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5897#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5896#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5895#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5894#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5893#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5892#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5891#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5890#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5889#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5888#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5887#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5886#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5885#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5884#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5883#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5882#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5881#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5880#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5879#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5878#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5877#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5876#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5875#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5874#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5873#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5872#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5871#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5861#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5870#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5868#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5859#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5860#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5920#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5847#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5848#L556-2 [2024-11-08 17:16:15,515 INFO L747 eck$LassoCheckResult]: Loop: 5848#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5952#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5951#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5917#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5858#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5856#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5843#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5844#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5950#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5949#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5948#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5947#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5946#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5945#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5944#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5943#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5942#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5941#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5940#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5939#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5938#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5937#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5936#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5935#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5934#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5933#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5932#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5931#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5930#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5929#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5928#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5927#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5926#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5925#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5924#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5923#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 5919#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 5922#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 5921#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 5918#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 5848#L556-2 [2024-11-08 17:16:15,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:16:15,516 INFO L85 PathProgramCache]: Analyzing trace with hash 2104801267, now seen corresponding path program 13 times [2024-11-08 17:16:15,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:16:15,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030974006] [2024-11-08 17:16:15,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:16:15,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:16:15,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:16:17,850 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 4 proven. 536 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-08 17:16:17,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:16:17,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030974006] [2024-11-08 17:16:17,851 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2030974006] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:16:17,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1387170831] [2024-11-08 17:16:17,851 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 17:16:17,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:16:17,852 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:16:17,854 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:16:17,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2024-11-08 17:16:18,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:16:18,148 INFO L255 TraceCheckSpWp]: Trace formula consists of 726 conjuncts, 72 conjuncts are in the unsatisfiable core [2024-11-08 17:16:18,153 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:16:18,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:16:18,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:18,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:18,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:18,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:18,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:18,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:16:18,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:16:18,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:16:18,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:18,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:18,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:18,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:18,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:18,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:18,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:16:18,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:16:18,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:16:18,691 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 0 proven. 538 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-08 17:16:18,691 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:16:18,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:16:19,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:16:19,095 INFO L134 CoverageAnalysis]: Checked inductivity of 544 backedges. 16 proven. 522 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-08 17:16:19,096 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1387170831] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:16:19,096 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:16:19,096 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22, 22] total 32 [2024-11-08 17:16:19,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728704848] [2024-11-08 17:16:19,096 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:16:19,097 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:16:19,097 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:16:19,097 INFO L85 PathProgramCache]: Analyzing trace with hash 505968639, now seen corresponding path program 12 times [2024-11-08 17:16:19,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:16:19,097 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58107379] [2024-11-08 17:16:19,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:16:19,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:16:19,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:16:19,121 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:16:19,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:16:19,138 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:16:29,792 WARN L286 SmtUtils]: Spent 10.65s on a formula simplification. DAG size of input: 346 DAG size of output: 258 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:16:30,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:16:30,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2024-11-08 17:16:30,006 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=967, Unknown=0, NotChecked=0, Total=1056 [2024-11-08 17:16:30,006 INFO L87 Difference]: Start difference. First operand 112 states and 115 transitions. cyclomatic complexity: 6 Second operand has 33 states, 32 states have (on average 2.75) internal successors, (88), 33 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:16:31,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:16:32,000 INFO L93 Difference]: Finished difference Result 162 states and 166 transitions. [2024-11-08 17:16:32,000 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 166 transitions. [2024-11-08 17:16:32,000 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:16:32,001 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 119 states and 122 transitions. [2024-11-08 17:16:32,001 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2024-11-08 17:16:32,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-08 17:16:32,001 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 122 transitions. [2024-11-08 17:16:32,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:16:32,001 INFO L218 hiAutomatonCegarLoop]: Abstraction has 119 states and 122 transitions. [2024-11-08 17:16:32,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 122 transitions. [2024-11-08 17:16:32,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 116. [2024-11-08 17:16:32,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.0258620689655173) internal successors, (119), 115 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:16:32,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 119 transitions. [2024-11-08 17:16:32,005 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 119 transitions. [2024-11-08 17:16:32,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-11-08 17:16:32,007 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 119 transitions. [2024-11-08 17:16:32,007 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-08 17:16:32,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 119 transitions. [2024-11-08 17:16:32,009 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:16:32,009 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:16:32,010 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:16:32,011 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [18, 18, 18, 16, 2, 1, 1, 1, 1] [2024-11-08 17:16:32,011 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 9, 1] [2024-11-08 17:16:32,011 INFO L745 eck$LassoCheckResult]: Stem: 6640#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6641#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 6644#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 6631#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 6632#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6642#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6635#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6636#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6639#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6643#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6710#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6709#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6708#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6707#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6706#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6705#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6704#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6703#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6702#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6701#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6700#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6699#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6698#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6697#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6696#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6695#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6694#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6693#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6692#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6655#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6691#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6657#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6654#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6653#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6652#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6650#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6651#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6690#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6689#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6688#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6687#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6686#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6685#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6684#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6683#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6682#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6681#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6680#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6679#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6678#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6677#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6676#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6675#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6674#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6673#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6672#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6671#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6670#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6669#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6668#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6667#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6666#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6665#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6664#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6663#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6662#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6661#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6660#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6659#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6649#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6658#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6656#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6647#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6648#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6715#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6637#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6638#L556-2 [2024-11-08 17:16:32,012 INFO L747 eck$LassoCheckResult]: Loop: 6638#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6746#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6745#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6711#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6646#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6645#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6633#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6634#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6744#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6743#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6742#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6741#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6740#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6739#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6738#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6737#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6736#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6735#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6734#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6733#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6732#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6731#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6730#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6729#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6728#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6727#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6726#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6725#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6724#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6723#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6722#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6721#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6720#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6719#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6718#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6717#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 6713#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 6716#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 6714#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 6712#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 6638#L556-2 [2024-11-08 17:16:32,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:16:32,012 INFO L85 PathProgramCache]: Analyzing trace with hash -1484046119, now seen corresponding path program 14 times [2024-11-08 17:16:32,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:16:32,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185639798] [2024-11-08 17:16:32,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:16:32,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:16:32,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:16:34,936 INFO L134 CoverageAnalysis]: Checked inductivity of 612 backedges. 35 proven. 577 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:16:34,936 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:16:34,936 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185639798] [2024-11-08 17:16:34,936 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [185639798] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:16:34,936 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [256820461] [2024-11-08 17:16:34,937 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 17:16:34,937 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:16:34,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:16:34,940 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:16:34,942 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2024-11-08 17:16:35,248 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 17:16:35,249 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:16:35,252 INFO L255 TraceCheckSpWp]: Trace formula consists of 763 conjuncts, 80 conjuncts are in the unsatisfiable core [2024-11-08 17:16:35,259 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:16:35,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:16:35,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:35,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:35,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:35,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:35,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:35,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:16:35,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:16:35,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:16:35,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:16:35,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:35,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:35,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:35,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:35,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:35,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:35,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:16:36,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:16:36,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:16:36,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:16:36,067 INFO L134 CoverageAnalysis]: Checked inductivity of 612 backedges. 0 proven. 611 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:16:36,067 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:16:36,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:16:36,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:16:36,618 INFO L134 CoverageAnalysis]: Checked inductivity of 612 backedges. 11 proven. 600 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-08 17:16:36,618 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [256820461] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:16:36,618 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:16:36,618 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24, 24] total 43 [2024-11-08 17:16:36,618 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2038798154] [2024-11-08 17:16:36,618 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:16:36,619 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:16:36,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:16:36,619 INFO L85 PathProgramCache]: Analyzing trace with hash 505968639, now seen corresponding path program 13 times [2024-11-08 17:16:36,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:16:36,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118805071] [2024-11-08 17:16:36,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:16:36,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:16:36,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:16:36,640 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:16:36,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:16:36,653 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:16:47,400 WARN L286 SmtUtils]: Spent 10.74s on a formula simplification. DAG size of input: 346 DAG size of output: 258 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:16:47,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:16:47,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2024-11-08 17:16:47,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=1765, Unknown=0, NotChecked=0, Total=1892 [2024-11-08 17:16:47,592 INFO L87 Difference]: Start difference. First operand 116 states and 119 transitions. cyclomatic complexity: 6 Second operand has 44 states, 43 states have (on average 2.953488372093023) internal successors, (127), 44 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:16:53,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:16:53,134 INFO L93 Difference]: Finished difference Result 166 states and 170 transitions. [2024-11-08 17:16:53,134 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 166 states and 170 transitions. [2024-11-08 17:16:53,135 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:16:53,135 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 166 states to 123 states and 126 transitions. [2024-11-08 17:16:53,135 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 52 [2024-11-08 17:16:53,136 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-08 17:16:53,136 INFO L73 IsDeterministic]: Start isDeterministic. Operand 123 states and 126 transitions. [2024-11-08 17:16:53,136 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:16:53,136 INFO L218 hiAutomatonCegarLoop]: Abstraction has 123 states and 126 transitions. [2024-11-08 17:16:53,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states and 126 transitions. [2024-11-08 17:16:53,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 120. [2024-11-08 17:16:53,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 120 states have (on average 1.025) internal successors, (123), 119 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:16:53,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 123 transitions. [2024-11-08 17:16:53,139 INFO L240 hiAutomatonCegarLoop]: Abstraction has 120 states and 123 transitions. [2024-11-08 17:16:53,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2024-11-08 17:16:53,140 INFO L425 stractBuchiCegarLoop]: Abstraction has 120 states and 123 transitions. [2024-11-08 17:16:53,140 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-08 17:16:53,140 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 120 states and 123 transitions. [2024-11-08 17:16:53,140 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2024-11-08 17:16:53,141 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:16:53,141 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:16:53,141 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [19, 19, 19, 17, 2, 1, 1, 1, 1] [2024-11-08 17:16:53,142 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 10, 9, 1] [2024-11-08 17:16:53,142 INFO L745 eck$LassoCheckResult]: Stem: 7526#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7527#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 7528#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 7514#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 7515#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7523#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7530#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7597#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7524#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7525#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7518#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7519#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7522#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7596#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7595#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7594#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7593#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7592#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7591#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7590#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7589#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7588#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7587#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7586#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7585#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7584#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7583#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7582#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7581#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7580#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7579#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7578#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7577#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7540#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7576#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7542#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7539#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7538#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7537#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7535#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 7536#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7575#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7574#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7573#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7572#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7571#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7570#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7569#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7568#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7567#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7566#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7565#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7564#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7563#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7562#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7561#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7560#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7559#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7558#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7557#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7556#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7555#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7554#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7553#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7552#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7551#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7550#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7549#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7548#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7547#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7546#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7545#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7544#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7534#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7543#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7541#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7532#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7533#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7601#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7520#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 7521#L556-2 [2024-11-08 17:16:53,142 INFO L747 eck$LassoCheckResult]: Loop: 7521#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7633#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7632#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7598#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7531#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7529#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7516#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7517#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7631#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7630#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7629#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7628#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7627#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7626#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7625#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7624#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7623#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7622#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7621#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7620#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7619#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7618#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7617#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7616#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7615#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7614#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7613#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7612#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7611#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7610#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7609#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7608#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7607#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7606#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7605#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7604#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 7600#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 7603#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 7602#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 7599#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 7521#L556-2 [2024-11-08 17:16:53,142 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:16:53,142 INFO L85 PathProgramCache]: Analyzing trace with hash 1606870719, now seen corresponding path program 15 times [2024-11-08 17:16:53,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:16:53,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425057104] [2024-11-08 17:16:53,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:16:53,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:16:53,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:16:55,407 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 107 proven. 577 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:16:55,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:16:55,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425057104] [2024-11-08 17:16:55,408 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [425057104] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:16:55,408 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1935747610] [2024-11-08 17:16:55,408 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 17:16:55,408 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:16:55,408 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:16:55,410 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:16:55,411 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2024-11-08 17:16:55,945 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2024-11-08 17:16:55,945 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:16:55,949 INFO L255 TraceCheckSpWp]: Trace formula consists of 615 conjuncts, 83 conjuncts are in the unsatisfiable core [2024-11-08 17:16:55,956 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:16:55,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:16:56,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:16:56,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:16:56,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:16:56,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:16:56,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:16:56,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 21 [2024-11-08 17:16:57,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:16:57,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:16:57,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:16:57,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 41 [2024-11-08 17:16:57,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:16:57,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:16:57,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:16:57,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:16:58,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2024-11-08 17:16:58,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2024-11-08 17:16:58,046 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 136 proven. 488 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-08 17:16:58,046 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:16:59,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 35 [2024-11-08 17:17:00,298 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 16 proven. 608 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-08 17:17:00,298 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1935747610] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:17:00,298 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:17:00,299 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 31, 31] total 76 [2024-11-08 17:17:00,299 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121179956] [2024-11-08 17:17:00,299 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:17:00,299 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:17:00,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:17:00,300 INFO L85 PathProgramCache]: Analyzing trace with hash 505968639, now seen corresponding path program 14 times [2024-11-08 17:17:00,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:17:00,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2115858853] [2024-11-08 17:17:00,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:17:00,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:17:00,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:17:00,321 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:17:00,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:17:00,339 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:17:11,214 WARN L286 SmtUtils]: Spent 10.87s on a formula simplification. DAG size of input: 346 DAG size of output: 258 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:17:11,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:17:11,408 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2024-11-08 17:17:11,409 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=949, Invalid=4903, Unknown=0, NotChecked=0, Total=5852 [2024-11-08 17:17:11,409 INFO L87 Difference]: Start difference. First operand 120 states and 123 transitions. cyclomatic complexity: 6 Second operand has 77 states, 76 states have (on average 2.3421052631578947) internal successors, (178), 77 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:17:15,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:17:15,330 INFO L93 Difference]: Finished difference Result 192 states and 195 transitions. [2024-11-08 17:17:15,331 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 192 states and 195 transitions. [2024-11-08 17:17:15,332 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:17:15,333 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 192 states to 174 states and 177 transitions. [2024-11-08 17:17:15,333 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-08 17:17:15,333 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-08 17:17:15,333 INFO L73 IsDeterministic]: Start isDeterministic. Operand 174 states and 177 transitions. [2024-11-08 17:17:15,334 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:17:15,334 INFO L218 hiAutomatonCegarLoop]: Abstraction has 174 states and 177 transitions. [2024-11-08 17:17:15,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states and 177 transitions. [2024-11-08 17:17:15,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 168. [2024-11-08 17:17:15,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 168 states have (on average 1.0178571428571428) internal successors, (171), 167 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:17:15,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 171 transitions. [2024-11-08 17:17:15,339 INFO L240 hiAutomatonCegarLoop]: Abstraction has 168 states and 171 transitions. [2024-11-08 17:17:15,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2024-11-08 17:17:15,342 INFO L425 stractBuchiCegarLoop]: Abstraction has 168 states and 171 transitions. [2024-11-08 17:17:15,342 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-11-08 17:17:15,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 168 states and 171 transitions. [2024-11-08 17:17:15,343 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:17:15,343 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:17:15,343 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:17:15,344 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [25, 25, 25, 23, 2, 1, 1, 1, 1] [2024-11-08 17:17:15,345 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 15, 1] [2024-11-08 17:17:15,345 INFO L745 eck$LassoCheckResult]: Stem: 8524#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8525#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 8526#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 8512#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 8513#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8521#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8528#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8619#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8522#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8523#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8516#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8517#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8520#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8618#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8617#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8616#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8615#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8614#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8613#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8612#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8611#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8610#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8609#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8608#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8607#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8606#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8605#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8604#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8603#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8602#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8601#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8600#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8599#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8538#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8542#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8540#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8537#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8536#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8535#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8533#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 8534#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8598#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8597#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8596#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8595#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8594#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8593#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8592#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8591#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8590#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8589#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8588#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8587#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8586#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8585#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8584#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8583#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8582#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8581#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8580#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8579#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8578#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8577#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8576#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8575#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8574#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8573#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8572#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8571#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8570#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8569#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8568#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8567#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8566#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8565#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8564#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8563#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8562#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8561#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8560#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8559#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8558#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8557#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8556#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8555#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8554#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8553#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8552#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8551#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8550#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8549#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8548#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8547#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8546#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8545#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8544#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8543#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8532#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8541#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8539#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8530#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8531#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8623#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8518#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 8519#L556-2 [2024-11-08 17:17:15,345 INFO L747 eck$LassoCheckResult]: Loop: 8519#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8679#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8678#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8620#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8529#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8527#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8514#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8515#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8677#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8676#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8675#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8674#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8673#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8672#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8671#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8670#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8669#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8668#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8667#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8666#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8665#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8664#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8663#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8662#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8661#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8660#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8659#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8658#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8657#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8656#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8655#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8654#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8653#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8652#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8651#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8650#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8649#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8648#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8647#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8646#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8645#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8644#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8643#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8642#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8641#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8640#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8639#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8638#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8637#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8636#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8635#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8634#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8633#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8632#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8631#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8630#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8629#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8628#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8627#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8626#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 8622#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 8625#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 8624#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 8621#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 8519#L556-2 [2024-11-08 17:17:15,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:17:15,346 INFO L85 PathProgramCache]: Analyzing trace with hash 554353955, now seen corresponding path program 16 times [2024-11-08 17:17:15,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:17:15,346 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266363809] [2024-11-08 17:17:15,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:17:15,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:17:15,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:17:18,771 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 4 proven. 1156 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 17:17:18,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:17:18,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266363809] [2024-11-08 17:17:18,772 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [266363809] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:17:18,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [852285864] [2024-11-08 17:17:18,772 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-08 17:17:18,772 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:17:18,772 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:17:18,774 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:17:18,775 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2024-11-08 17:17:19,150 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-08 17:17:19,151 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:17:19,156 INFO L255 TraceCheckSpWp]: Trace formula consists of 1022 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-08 17:17:19,166 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:17:19,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:17:19,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:17:19,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:17:19,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:17:19,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:17:19,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:17:19,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:17:19,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:17:19,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:17:19,733 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 0 proven. 1134 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-11-08 17:17:19,733 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:17:19,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:17:20,182 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:17:20,254 INFO L134 CoverageAnalysis]: Checked inductivity of 1200 backedges. 36 proven. 1098 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-11-08 17:17:20,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [852285864] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:17:20,254 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:17:20,254 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 26, 26] total 37 [2024-11-08 17:17:20,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107490258] [2024-11-08 17:17:20,254 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:17:20,255 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:17:20,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:17:20,255 INFO L85 PathProgramCache]: Analyzing trace with hash 1948030563, now seen corresponding path program 15 times [2024-11-08 17:17:20,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:17:20,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988223641] [2024-11-08 17:17:20,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:17:20,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:17:20,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:17:20,286 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:17:20,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:17:20,306 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:18:32,427 WARN L286 SmtUtils]: Spent 1.20m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:18:32,733 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:18:32,733 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2024-11-08 17:18:32,733 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=1306, Unknown=0, NotChecked=0, Total=1406 [2024-11-08 17:18:32,733 INFO L87 Difference]: Start difference. First operand 168 states and 171 transitions. cyclomatic complexity: 6 Second operand has 38 states, 37 states have (on average 2.918918918918919) internal successors, (108), 38 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:35,958 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:18:35,959 INFO L93 Difference]: Finished difference Result 242 states and 246 transitions. [2024-11-08 17:18:35,959 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 242 states and 246 transitions. [2024-11-08 17:18:35,960 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:18:35,961 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 242 states to 175 states and 178 transitions. [2024-11-08 17:18:35,961 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-08 17:18:35,961 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-08 17:18:35,961 INFO L73 IsDeterministic]: Start isDeterministic. Operand 175 states and 178 transitions. [2024-11-08 17:18:35,962 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:18:35,962 INFO L218 hiAutomatonCegarLoop]: Abstraction has 175 states and 178 transitions. [2024-11-08 17:18:35,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states and 178 transitions. [2024-11-08 17:18:35,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 172. [2024-11-08 17:18:35,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 172 states have (on average 1.0174418604651163) internal successors, (175), 171 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:35,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 175 transitions. [2024-11-08 17:18:35,966 INFO L240 hiAutomatonCegarLoop]: Abstraction has 172 states and 175 transitions. [2024-11-08 17:18:35,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2024-11-08 17:18:35,971 INFO L425 stractBuchiCegarLoop]: Abstraction has 172 states and 175 transitions. [2024-11-08 17:18:35,972 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-11-08 17:18:35,972 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 175 transitions. [2024-11-08 17:18:35,972 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:18:35,973 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:18:35,973 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:18:35,974 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [26, 26, 26, 24, 2, 1, 1, 1, 1] [2024-11-08 17:18:35,974 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 15, 1] [2024-11-08 17:18:35,974 INFO L745 eck$LassoCheckResult]: Stem: 9659#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9660#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 9661#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 9647#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 9648#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9656#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9663#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9758#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9657#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9658#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9651#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9652#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9655#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9757#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9756#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9755#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9754#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9753#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9752#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9751#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9750#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9749#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9748#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9747#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9746#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9745#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9744#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9743#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9742#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9741#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9740#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9739#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9738#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9737#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9736#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9735#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9734#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9673#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9733#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9675#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9672#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9671#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9670#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9668#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 9669#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9732#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9731#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9730#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9729#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9728#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9727#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9726#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9725#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9724#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9723#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9722#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9721#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9720#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9719#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9718#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9717#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9716#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9715#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9714#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9713#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9712#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9711#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9710#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9709#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9708#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9707#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9706#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9705#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9704#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9703#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9702#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9701#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9700#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9699#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9698#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9697#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9696#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9695#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9694#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9693#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9692#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9691#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9690#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9689#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9688#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9687#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9686#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9685#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9684#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9683#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9682#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9681#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9680#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9679#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9678#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9677#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9667#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9676#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9674#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9665#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9666#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9762#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9653#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 9654#L556-2 [2024-11-08 17:18:35,974 INFO L747 eck$LassoCheckResult]: Loop: 9654#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9818#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9817#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9759#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9664#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9662#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9649#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9650#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9816#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9815#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9814#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9813#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9812#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9811#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9810#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9809#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9808#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9807#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9806#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9805#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9804#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9803#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9802#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9801#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9800#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9799#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9798#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9797#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9796#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9795#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9794#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9793#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9792#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9791#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9790#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9789#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9788#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9787#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9786#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9785#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9784#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9783#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9782#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9781#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9780#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9779#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9778#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9777#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9776#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9775#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9774#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9773#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9772#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9771#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9770#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9769#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9768#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9767#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9766#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9765#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 9761#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 9764#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 9763#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 9760#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 9654#L556-2 [2024-11-08 17:18:35,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:35,976 INFO L85 PathProgramCache]: Analyzing trace with hash 517223945, now seen corresponding path program 17 times [2024-11-08 17:18:35,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:35,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700875568] [2024-11-08 17:18:35,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:35,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:36,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:18:40,201 INFO L134 CoverageAnalysis]: Checked inductivity of 1300 backedges. 4 proven. 1256 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 17:18:40,201 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:18:40,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700875568] [2024-11-08 17:18:40,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [700875568] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:18:40,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [857927836] [2024-11-08 17:18:40,201 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 17:18:40,201 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:18:40,201 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:18:40,203 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:18:40,204 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2024-11-08 17:18:42,746 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2024-11-08 17:18:42,747 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:18:42,755 INFO L255 TraceCheckSpWp]: Trace formula consists of 1059 conjuncts, 111 conjuncts are in the unsatisfiable core [2024-11-08 17:18:42,764 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:18:42,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:18:42,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:18:42,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 28 [2024-11-08 17:18:43,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24 [2024-11-08 17:18:43,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:18:43,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-08 17:18:43,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-11-08 17:18:43,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:18:43,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:18:43,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:18:43,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:18:43,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:18:43,663 INFO L134 CoverageAnalysis]: Checked inductivity of 1300 backedges. 0 proven. 1294 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-08 17:18:43,663 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:18:43,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:18:44,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:18:44,597 INFO L134 CoverageAnalysis]: Checked inductivity of 1300 backedges. 156 proven. 1099 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-08 17:18:44,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [857927836] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:18:44,597 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:18:44,597 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 31, 29] total 47 [2024-11-08 17:18:44,597 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1899173282] [2024-11-08 17:18:44,597 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:18:44,598 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:18:44,598 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:44,598 INFO L85 PathProgramCache]: Analyzing trace with hash 1948030563, now seen corresponding path program 16 times [2024-11-08 17:18:44,598 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:44,598 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476759468] [2024-11-08 17:18:44,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:44,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:44,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:44,637 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:18:44,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:44,664 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:19:57,598 WARN L286 SmtUtils]: Spent 1.22m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:19:57,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:19:57,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2024-11-08 17:19:57,940 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=2081, Unknown=0, NotChecked=0, Total=2256 [2024-11-08 17:19:57,941 INFO L87 Difference]: Start difference. First operand 172 states and 175 transitions. cyclomatic complexity: 6 Second operand has 48 states, 47 states have (on average 3.0638297872340425) internal successors, (144), 48 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:20:01,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:20:01,584 INFO L93 Difference]: Finished difference Result 246 states and 250 transitions. [2024-11-08 17:20:01,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 250 transitions. [2024-11-08 17:20:01,586 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:20:01,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 179 states and 182 transitions. [2024-11-08 17:20:01,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-08 17:20:01,587 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-08 17:20:01,587 INFO L73 IsDeterministic]: Start isDeterministic. Operand 179 states and 182 transitions. [2024-11-08 17:20:01,587 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:20:01,587 INFO L218 hiAutomatonCegarLoop]: Abstraction has 179 states and 182 transitions. [2024-11-08 17:20:01,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states and 182 transitions. [2024-11-08 17:20:01,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2024-11-08 17:20:01,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 176 states have (on average 1.0170454545454546) internal successors, (179), 175 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:20:01,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 179 transitions. [2024-11-08 17:20:01,591 INFO L240 hiAutomatonCegarLoop]: Abstraction has 176 states and 179 transitions. [2024-11-08 17:20:01,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2024-11-08 17:20:01,592 INFO L425 stractBuchiCegarLoop]: Abstraction has 176 states and 179 transitions. [2024-11-08 17:20:01,593 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-11-08 17:20:01,593 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 179 transitions. [2024-11-08 17:20:01,593 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:20:01,594 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:20:01,594 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:20:01,595 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [27, 27, 27, 25, 2, 1, 1, 1, 1] [2024-11-08 17:20:01,595 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 15, 1] [2024-11-08 17:20:01,595 INFO L745 eck$LassoCheckResult]: Stem: 10840#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10841#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 10842#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 10828#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 10829#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10837#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10844#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10943#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10838#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10839#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10832#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10833#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10836#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10942#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10941#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10940#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10939#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10938#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10937#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10936#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10935#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10934#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10933#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10932#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10931#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10930#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10929#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10928#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10927#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10926#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10925#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10924#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10923#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10922#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10921#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10920#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10919#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10918#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10917#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10916#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10915#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10854#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10914#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10856#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10853#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10852#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10851#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10849#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 10850#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10913#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10912#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10911#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10910#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10909#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10908#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10907#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10906#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10905#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10904#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10903#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10902#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10901#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10900#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10899#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10898#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10897#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10896#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10895#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10894#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10893#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10892#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10891#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10890#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10889#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10888#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10887#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10886#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10885#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10884#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10883#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10882#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10881#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10880#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10879#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10878#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10877#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10876#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10875#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10874#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10873#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10872#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10871#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10870#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10869#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10868#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10867#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10866#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10865#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10864#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10863#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10862#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10861#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10860#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10859#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10858#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10848#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10857#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10855#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10846#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10847#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10947#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10834#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 10835#L556-2 [2024-11-08 17:20:01,596 INFO L747 eck$LassoCheckResult]: Loop: 10835#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11003#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 11002#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10944#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10845#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10843#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10830#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10831#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 11001#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 11000#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10999#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10998#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10997#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10996#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10995#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10994#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10993#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10992#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10991#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10990#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10989#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10988#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10987#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10986#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10985#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10984#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10983#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10982#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10981#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10980#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10979#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10978#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10977#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10976#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10975#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10974#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10973#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10972#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10971#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10970#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10969#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10968#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10967#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10966#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10965#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10964#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10963#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10962#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10961#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10960#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10959#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10958#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10957#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10956#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10955#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10954#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10953#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10952#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10951#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10950#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 10946#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 10949#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 10948#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 10945#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 10835#L556-2 [2024-11-08 17:20:01,596 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:20:01,596 INFO L85 PathProgramCache]: Analyzing trace with hash 1192149999, now seen corresponding path program 18 times [2024-11-08 17:20:01,596 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:20:01,597 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [895380466] [2024-11-08 17:20:01,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:20:01,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:20:01,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:20:08,197 INFO L134 CoverageAnalysis]: Checked inductivity of 1404 backedges. 0 proven. 1404 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:20:08,198 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:20:08,198 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [895380466] [2024-11-08 17:20:08,198 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [895380466] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:20:08,198 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1571366130] [2024-11-08 17:20:08,198 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 17:20:08,198 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:20:08,198 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:20:08,200 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:20:08,201 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2024-11-08 17:20:10,445 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 27 check-sat command(s) [2024-11-08 17:20:10,445 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:20:10,454 INFO L255 TraceCheckSpWp]: Trace formula consists of 1096 conjuncts, 107 conjuncts are in the unsatisfiable core [2024-11-08 17:20:10,464 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:20:10,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:20:10,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:20:10,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:10,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:10,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:10,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:10,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:10,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:10,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:11,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:11,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:20:11,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:20:11,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:20:11,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:20:11,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:11,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:11,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:11,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:20:12,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 29 [2024-11-08 17:20:12,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:20:12,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:20:12,778 INFO L134 CoverageAnalysis]: Checked inductivity of 1404 backedges. 0 proven. 1376 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-08 17:20:12,778 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:20:13,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:20:14,732 INFO L134 CoverageAnalysis]: Checked inductivity of 1404 backedges. 231 proven. 1145 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-08 17:20:14,732 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1571366130] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:20:14,732 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:20:14,732 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 30, 30] total 77 [2024-11-08 17:20:14,732 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797237221] [2024-11-08 17:20:14,733 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:20:14,733 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:20:14,733 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:20:14,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1948030563, now seen corresponding path program 17 times [2024-11-08 17:20:14,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:20:14,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564608060] [2024-11-08 17:20:14,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:20:14,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:20:14,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:20:14,775 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:20:14,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:20:14,803 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:21:27,416 WARN L286 SmtUtils]: Spent 1.21m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:21:27,734 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:21:27,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2024-11-08 17:21:27,736 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=5762, Unknown=0, NotChecked=0, Total=6006 [2024-11-08 17:21:27,736 INFO L87 Difference]: Start difference. First operand 176 states and 179 transitions. cyclomatic complexity: 6 Second operand has 78 states, 77 states have (on average 3.311688311688312) internal successors, (255), 78 states have internal predecessors, (255), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:21:37,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:21:37,816 INFO L93 Difference]: Finished difference Result 265 states and 270 transitions. [2024-11-08 17:21:37,816 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 265 states and 270 transitions. [2024-11-08 17:21:37,818 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:21:37,819 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 265 states to 183 states and 186 transitions. [2024-11-08 17:21:37,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-08 17:21:37,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-08 17:21:37,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 183 states and 186 transitions. [2024-11-08 17:21:37,819 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:21:37,819 INFO L218 hiAutomatonCegarLoop]: Abstraction has 183 states and 186 transitions. [2024-11-08 17:21:37,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states and 186 transitions. [2024-11-08 17:21:37,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2024-11-08 17:21:37,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 180 states have (on average 1.0166666666666666) internal successors, (183), 179 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:21:37,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 183 transitions. [2024-11-08 17:21:37,823 INFO L240 hiAutomatonCegarLoop]: Abstraction has 180 states and 183 transitions. [2024-11-08 17:21:37,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2024-11-08 17:21:37,824 INFO L425 stractBuchiCegarLoop]: Abstraction has 180 states and 183 transitions. [2024-11-08 17:21:37,824 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-11-08 17:21:37,824 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 183 transitions. [2024-11-08 17:21:37,825 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:21:37,825 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:21:37,825 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:21:37,826 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [28, 28, 28, 26, 2, 1, 1, 1, 1] [2024-11-08 17:21:37,826 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 15, 1] [2024-11-08 17:21:37,826 INFO L745 eck$LassoCheckResult]: Stem: 12154#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 12155#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 12156#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 12142#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 12143#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12151#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12158#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12261#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12152#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12153#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12146#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12147#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12150#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12260#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12259#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12258#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12257#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12256#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12255#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12254#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12253#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12252#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12251#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12250#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12249#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12248#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12247#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12246#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12245#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12244#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12243#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12242#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12241#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12240#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12239#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12238#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12237#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12236#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12235#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12234#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12233#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12232#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12231#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12230#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12229#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12168#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12228#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12170#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12167#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12166#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12165#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12163#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 12164#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12227#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12226#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12225#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12224#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12223#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12222#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12221#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12220#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12219#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12218#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12217#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12216#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12215#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12214#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12213#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12212#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12211#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12210#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12209#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12208#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12207#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12206#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12205#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12204#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12203#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12202#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12201#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12200#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12199#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12198#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12197#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12196#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12195#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12194#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12193#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12192#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12191#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12190#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12189#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12188#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12187#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12186#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12185#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12184#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12183#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12182#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12181#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12180#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12179#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12178#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12177#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12176#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12175#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12174#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12173#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12172#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12160#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12171#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12169#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12159#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12161#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12265#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12148#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 12149#L556-2 [2024-11-08 17:21:37,827 INFO L747 eck$LassoCheckResult]: Loop: 12149#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12321#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12320#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12262#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12162#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12157#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12144#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12145#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12319#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12318#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12317#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12316#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12315#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12314#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12313#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12312#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12311#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12310#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12309#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12308#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12307#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12306#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12305#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12304#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12303#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12302#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12301#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12300#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12299#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12298#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12297#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12296#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12295#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12294#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12293#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12292#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12291#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12290#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12289#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12288#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12287#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12286#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12285#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12284#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12283#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12282#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12281#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12280#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12279#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12278#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12277#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12276#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12275#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12274#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12273#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12272#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12271#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12270#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12269#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12268#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 12264#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 12267#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 12266#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 12263#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 12149#L556-2 [2024-11-08 17:21:37,827 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:21:37,828 INFO L85 PathProgramCache]: Analyzing trace with hash -1847333163, now seen corresponding path program 19 times [2024-11-08 17:21:37,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:21:37,828 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015536049] [2024-11-08 17:21:37,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:21:37,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:21:37,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:21:44,508 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 0 proven. 1512 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:21:44,508 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:21:44,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015536049] [2024-11-08 17:21:44,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1015536049] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:21:44,508 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1740030307] [2024-11-08 17:21:44,508 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 17:21:44,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:21:44,509 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:21:44,510 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:21:44,511 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2024-11-08 17:21:44,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:21:44,982 INFO L255 TraceCheckSpWp]: Trace formula consists of 1133 conjuncts, 112 conjuncts are in the unsatisfiable core [2024-11-08 17:21:44,991 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:21:44,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:21:45,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,204 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:21:45,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:21:45,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:21:46,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:21:46,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:46,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:46,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:46,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:46,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:46,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:47,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:47,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:47,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:47,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:47,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:21:47,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:21:47,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:21:47,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:21:47,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 0 proven. 1497 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-08 17:21:47,631 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:21:48,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:21:48,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:21:48,502 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 21 proven. 1476 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-08 17:21:48,502 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1740030307] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:21:48,502 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:21:48,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 32, 32] total 70 [2024-11-08 17:21:48,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105894882] [2024-11-08 17:21:48,502 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:21:48,503 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:21:48,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:21:48,503 INFO L85 PathProgramCache]: Analyzing trace with hash 1948030563, now seen corresponding path program 18 times [2024-11-08 17:21:48,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:21:48,503 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430810401] [2024-11-08 17:21:48,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:21:48,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:21:48,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:21:48,537 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:21:48,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:21:48,565 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:22:56,590 WARN L286 SmtUtils]: Spent 1.13m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:22:56,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:22:56,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2024-11-08 17:22:56,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=188, Invalid=4782, Unknown=0, NotChecked=0, Total=4970 [2024-11-08 17:22:56,852 INFO L87 Difference]: Start difference. First operand 180 states and 183 transitions. cyclomatic complexity: 6 Second operand has 71 states, 70 states have (on average 3.257142857142857) internal successors, (228), 71 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:23:07,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:23:07,891 INFO L93 Difference]: Finished difference Result 269 states and 274 transitions. [2024-11-08 17:23:07,891 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 269 states and 274 transitions. [2024-11-08 17:23:07,892 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:23:07,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 269 states to 187 states and 190 transitions. [2024-11-08 17:23:07,893 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-08 17:23:07,894 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-08 17:23:07,894 INFO L73 IsDeterministic]: Start isDeterministic. Operand 187 states and 190 transitions. [2024-11-08 17:23:07,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:23:07,894 INFO L218 hiAutomatonCegarLoop]: Abstraction has 187 states and 190 transitions. [2024-11-08 17:23:07,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states and 190 transitions. [2024-11-08 17:23:07,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 184. [2024-11-08 17:23:07,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 184 states, 184 states have (on average 1.016304347826087) internal successors, (187), 183 states have internal predecessors, (187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:23:07,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 187 transitions. [2024-11-08 17:23:07,898 INFO L240 hiAutomatonCegarLoop]: Abstraction has 184 states and 187 transitions. [2024-11-08 17:23:07,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2024-11-08 17:23:07,899 INFO L425 stractBuchiCegarLoop]: Abstraction has 184 states and 187 transitions. [2024-11-08 17:23:07,899 INFO L332 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2024-11-08 17:23:07,899 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 184 states and 187 transitions. [2024-11-08 17:23:07,900 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:23:07,900 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:23:07,900 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:23:07,901 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [29, 29, 29, 27, 2, 1, 1, 1, 1] [2024-11-08 17:23:07,901 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 15, 1] [2024-11-08 17:23:07,901 INFO L745 eck$LassoCheckResult]: Stem: 13491#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13492#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 13493#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 13479#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 13480#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13488#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13495#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13602#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13489#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13490#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13483#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13484#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13487#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13601#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13600#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13599#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13598#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13597#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13596#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13595#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13594#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13593#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13592#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13591#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13590#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13589#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13588#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13587#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13586#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13585#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13584#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13583#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13582#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13581#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13580#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13579#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13578#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13577#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13576#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13575#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13574#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13573#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13572#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13571#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13570#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13569#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13568#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13567#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13566#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13505#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13565#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13507#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13504#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13503#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13502#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13500#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 13501#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13564#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13563#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13562#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13561#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13560#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13559#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13558#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13557#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13556#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13555#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13554#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13553#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13552#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13551#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13550#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13549#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13548#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13547#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13546#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13545#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13544#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13543#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13542#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13541#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13540#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13539#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13538#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13537#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13536#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13535#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13534#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13533#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13532#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13531#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13530#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13529#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13528#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13527#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13526#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13525#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13524#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13523#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13522#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13521#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13520#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13519#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13518#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13517#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13516#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13515#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13514#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13513#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13512#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13511#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13510#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13509#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13498#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13508#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13506#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13497#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13499#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13606#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13485#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 13486#L556-2 [2024-11-08 17:23:07,902 INFO L747 eck$LassoCheckResult]: Loop: 13486#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13662#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13661#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13603#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13496#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13494#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13481#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13482#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13660#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13659#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13658#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13657#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13656#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13655#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13654#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13653#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13652#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13651#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13650#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13649#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13648#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13647#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13646#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13645#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13644#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13643#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13642#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13641#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13640#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13639#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13638#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13637#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13636#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13635#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13634#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13633#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13632#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13631#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13630#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13629#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13628#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13627#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13626#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13625#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13624#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13623#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13622#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13621#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13620#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13619#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13618#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13617#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13616#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13615#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13614#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13613#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13612#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13611#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13610#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13609#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 13605#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 13608#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 13607#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 13604#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 13486#L556-2 [2024-11-08 17:23:07,902 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:23:07,903 INFO L85 PathProgramCache]: Analyzing trace with hash -960678213, now seen corresponding path program 20 times [2024-11-08 17:23:07,903 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:23:07,903 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339424977] [2024-11-08 17:23:07,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:23:07,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:23:07,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:23:13,779 INFO L134 CoverageAnalysis]: Checked inductivity of 1624 backedges. 50 proven. 1574 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:23:13,779 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:23:13,779 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339424977] [2024-11-08 17:23:13,779 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339424977] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:23:13,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1500409168] [2024-11-08 17:23:13,780 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 17:23:13,780 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:23:13,780 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:23:13,781 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:23:13,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2024-11-08 17:23:14,275 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 17:23:14,275 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:23:14,280 INFO L255 TraceCheckSpWp]: Trace formula consists of 1170 conjuncts, 120 conjuncts are in the unsatisfiable core [2024-11-08 17:23:14,289 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:23:14,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:23:14,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:14,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:23:15,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:23:15,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:23:15,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:23:15,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:23:15,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:23:15,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:23:15,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:23:15,593 INFO L134 CoverageAnalysis]: Checked inductivity of 1624 backedges. 0 proven. 1618 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-08 17:23:15,593 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:23:15,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:23:16,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:23:16,267 INFO L134 CoverageAnalysis]: Checked inductivity of 1624 backedges. 16 proven. 1602 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-08 17:23:16,267 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1500409168] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:23:16,267 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:23:16,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 34, 34] total 57 [2024-11-08 17:23:16,268 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417131992] [2024-11-08 17:23:16,268 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:23:16,268 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:23:16,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:23:16,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1948030563, now seen corresponding path program 19 times [2024-11-08 17:23:16,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:23:16,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [568336389] [2024-11-08 17:23:16,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:23:16,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:23:16,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:23:16,308 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:23:16,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:23:16,327 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:24:24,838 WARN L286 SmtUtils]: Spent 1.14m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:24:25,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:24:25,114 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2024-11-08 17:24:25,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=161, Invalid=3145, Unknown=0, NotChecked=0, Total=3306 [2024-11-08 17:24:25,115 INFO L87 Difference]: Start difference. First operand 184 states and 187 transitions. cyclomatic complexity: 6 Second operand has 58 states, 57 states have (on average 3.263157894736842) internal successors, (186), 58 states have internal predecessors, (186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:24:37,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:24:37,616 INFO L93 Difference]: Finished difference Result 258 states and 262 transitions. [2024-11-08 17:24:37,616 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 258 states and 262 transitions. [2024-11-08 17:24:37,618 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:24:37,619 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 258 states to 191 states and 194 transitions. [2024-11-08 17:24:37,620 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-08 17:24:37,620 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-08 17:24:37,620 INFO L73 IsDeterministic]: Start isDeterministic. Operand 191 states and 194 transitions. [2024-11-08 17:24:37,620 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:24:37,621 INFO L218 hiAutomatonCegarLoop]: Abstraction has 191 states and 194 transitions. [2024-11-08 17:24:37,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states and 194 transitions. [2024-11-08 17:24:37,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2024-11-08 17:24:37,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 188 states, 188 states have (on average 1.0159574468085106) internal successors, (191), 187 states have internal predecessors, (191), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:24:37,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 191 transitions. [2024-11-08 17:24:37,626 INFO L240 hiAutomatonCegarLoop]: Abstraction has 188 states and 191 transitions. [2024-11-08 17:24:37,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2024-11-08 17:24:37,631 INFO L425 stractBuchiCegarLoop]: Abstraction has 188 states and 191 transitions. [2024-11-08 17:24:37,631 INFO L332 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2024-11-08 17:24:37,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 188 states and 191 transitions. [2024-11-08 17:24:37,633 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:24:37,633 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:24:37,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:24:37,634 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [30, 30, 30, 28, 2, 1, 1, 1, 1] [2024-11-08 17:24:37,634 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [16, 16, 16, 15, 1] [2024-11-08 17:24:37,635 INFO L745 eck$LassoCheckResult]: Stem: 14870#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 14871#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 14872#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 14858#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 14859#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14867#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14874#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14985#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14868#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14869#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14862#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14863#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14866#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14984#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14983#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14982#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14981#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14980#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14979#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14978#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14977#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14976#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14975#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14974#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14973#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14972#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14971#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14970#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14969#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14968#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14967#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14966#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14965#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14964#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14963#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14962#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14961#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14960#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14959#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14958#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14957#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14956#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14955#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14954#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14953#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14952#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14951#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14950#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14949#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14948#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14947#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14946#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14945#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14884#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14944#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14886#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14883#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14882#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14881#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14879#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 14880#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14943#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14942#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14941#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14940#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14939#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14938#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14937#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14936#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14935#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14934#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14933#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14932#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14931#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14930#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14929#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14928#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14927#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14926#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14925#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14924#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14923#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14922#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14921#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14920#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14919#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14918#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14917#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14916#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14915#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14914#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14913#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14912#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14911#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14910#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14909#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14908#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14907#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14906#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14905#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14904#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14903#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14902#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14901#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14900#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14899#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14898#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14897#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14896#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14895#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14894#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14893#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14892#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14891#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14890#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14889#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14888#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14877#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14887#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14885#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14876#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14878#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14989#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14864#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 14865#L556-2 [2024-11-08 17:24:37,636 INFO L747 eck$LassoCheckResult]: Loop: 14865#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15045#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15044#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14986#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14875#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14873#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14860#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14861#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15043#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15042#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15041#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15040#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15039#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15038#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15037#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15036#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15035#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15034#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15033#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15032#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15031#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15030#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15029#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15028#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15027#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15026#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15025#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15024#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15023#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15022#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15021#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15020#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15019#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15018#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15017#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15016#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15015#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15014#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15013#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15012#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15011#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15010#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15009#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15008#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15007#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15006#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15005#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15004#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 15003#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 15002#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 15001#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 15000#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14999#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14998#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14997#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14996#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14995#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14994#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14993#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14992#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 14988#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 14991#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 14990#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 14987#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 14865#L556-2 [2024-11-08 17:24:37,636 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:24:37,636 INFO L85 PathProgramCache]: Analyzing trace with hash -599516255, now seen corresponding path program 21 times [2024-11-08 17:24:37,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:24:37,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484120673] [2024-11-08 17:24:37,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:24:37,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:24:37,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:24:43,523 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 104 proven. 1636 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:24:43,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:24:43,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484120673] [2024-11-08 17:24:43,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [484120673] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:24:43,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1665209506] [2024-11-08 17:24:43,524 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 17:24:43,524 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:24:43,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:24:43,526 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:24:43,527 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2024-11-08 17:24:45,175 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2024-11-08 17:24:45,175 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:24:45,182 INFO L255 TraceCheckSpWp]: Trace formula consists of 911 conjuncts, 133 conjuncts are in the unsatisfiable core [2024-11-08 17:24:45,191 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:24:45,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:24:45,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-08 17:24:45,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:24:45,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:24:45,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:24:45,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2024-11-08 17:24:45,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:24:45,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-08 17:24:46,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-08 17:24:46,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 21 [2024-11-08 17:24:46,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:47,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:47,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:47,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:48,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:48,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:49,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 28 [2024-11-08 17:24:49,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 45 [2024-11-08 17:24:49,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:24:49,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:24:49,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:24:49,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:24:49,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:24:49,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 22 [2024-11-08 17:24:50,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2024-11-08 17:24:50,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 12 [2024-11-08 17:24:50,076 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 369 proven. 1227 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2024-11-08 17:24:50,076 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:24:56,507 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 216 proven. 1380 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2024-11-08 17:24:56,508 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1665209506] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:24:56,508 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:24:56,508 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 47, 47] total 127 [2024-11-08 17:24:56,508 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1433130068] [2024-11-08 17:24:56,508 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:24:56,509 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:24:56,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:24:56,509 INFO L85 PathProgramCache]: Analyzing trace with hash 1948030563, now seen corresponding path program 20 times [2024-11-08 17:24:56,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:24:56,509 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921052444] [2024-11-08 17:24:56,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:24:56,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:24:56,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:24:56,539 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:24:56,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:24:56,566 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:26:07,698 WARN L286 SmtUtils]: Spent 1.19m on a formula simplification. DAG size of input: 532 DAG size of output: 390 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-08 17:26:07,995 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:26:07,995 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2024-11-08 17:26:07,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2845, Invalid=13411, Unknown=0, NotChecked=0, Total=16256 [2024-11-08 17:26:07,998 INFO L87 Difference]: Start difference. First operand 188 states and 191 transitions. cyclomatic complexity: 6 Second operand has 128 states, 127 states have (on average 2.393700787401575) internal successors, (304), 128 states have internal predecessors, (304), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:26:20,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:26:20,424 INFO L93 Difference]: Finished difference Result 359 states and 364 transitions. [2024-11-08 17:26:20,424 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 359 states and 364 transitions. [2024-11-08 17:26:20,426 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2024-11-08 17:26:20,427 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 359 states to 329 states and 334 transitions. [2024-11-08 17:26:20,427 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2024-11-08 17:26:20,428 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2024-11-08 17:26:20,428 INFO L73 IsDeterministic]: Start isDeterministic. Operand 329 states and 334 transitions. [2024-11-08 17:26:20,428 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-08 17:26:20,428 INFO L218 hiAutomatonCegarLoop]: Abstraction has 329 states and 334 transitions. [2024-11-08 17:26:20,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states and 334 transitions. [2024-11-08 17:26:20,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 268. [2024-11-08 17:26:20,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 268 states have (on average 1.0111940298507462) internal successors, (271), 267 states have internal predecessors, (271), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:26:20,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 271 transitions. [2024-11-08 17:26:20,434 INFO L240 hiAutomatonCegarLoop]: Abstraction has 268 states and 271 transitions. [2024-11-08 17:26:20,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 162 states. [2024-11-08 17:26:20,435 INFO L425 stractBuchiCegarLoop]: Abstraction has 268 states and 271 transitions. [2024-11-08 17:26:20,435 INFO L332 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2024-11-08 17:26:20,435 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 268 states and 271 transitions. [2024-11-08 17:26:20,436 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2024-11-08 17:26:20,436 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:26:20,436 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:26:20,438 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [40, 40, 40, 38, 2, 1, 1, 1, 1] [2024-11-08 17:26:20,438 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [26, 26, 26, 25, 1] [2024-11-08 17:26:20,438 INFO L745 eck$LassoCheckResult]: Stem: 16544#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 16545#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~nondet4#1, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short9#1, main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~nondet14#1, main_#t~short15#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~id~0#1.base, main_~id~0#1.offset, main_~maxId~0#1.base, main_~maxId~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~id~0#1.base, main_~id~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~maxId~0#1.base, main_~maxId~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;havoc main_#t~nondet4#1;call write~int#0(main_#t~nondet4#1, main_~id~0#1.base, main_~id~0#1.offset, 4);havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short9#1 := 0 <= main_#t~mem6#1; 16546#L552 assume main_#t~short9#1;call main_#t~mem7#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call main_#t~mem8#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4);main_#t~short9#1 := main_#t~mem7#1 < main_#t~mem8#1; 16532#L552-2 assume main_#t~short9#1;havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~short9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnStack(4);main_~tmp~0#1.base, main_~tmp~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;call main_#t~mem11#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);call write~int#2(1 + main_#t~mem11#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem11#1; 16533#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16541#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16548#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16698#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16542#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16543#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16536#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16537#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16540#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16697#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16696#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16695#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16694#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16693#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16692#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16691#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16690#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16689#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16688#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16687#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16686#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16685#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16684#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16683#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16682#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16681#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16680#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16679#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16678#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16677#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16676#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16675#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16674#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16673#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16672#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16671#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16670#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16669#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16668#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16667#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16666#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16665#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16664#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16663#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16662#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16661#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16660#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16659#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16658#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16557#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16657#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16655#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16556#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16555#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16554#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16552#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 16553#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16656#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16654#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16653#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16652#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16651#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16650#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16649#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16648#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16647#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16646#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16645#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16644#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16643#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16642#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16641#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16640#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16639#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16638#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16637#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16636#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16635#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16634#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16633#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16632#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16631#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16630#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16629#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16628#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16627#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16626#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16625#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16624#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16623#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16622#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16621#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16620#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16619#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16618#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16617#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16616#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16615#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16614#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16613#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16612#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16611#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16610#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16609#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16608#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16607#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16606#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16605#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16604#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16603#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16602#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16601#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16600#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16599#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16598#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16597#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16596#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16595#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16594#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16593#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16592#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16591#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16590#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16589#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16588#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16587#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16586#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16585#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16584#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16583#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16582#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16581#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16580#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16579#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16578#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16577#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16576#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16575#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16574#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16573#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16572#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16571#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16570#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16569#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16568#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16567#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16566#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16565#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16564#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16563#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16562#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16561#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16560#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16550#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16559#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16558#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16549#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16551#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16702#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16538#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 16539#L556-2 [2024-11-08 17:26:20,439 INFO L747 eck$LassoCheckResult]: Loop: 16539#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16547#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16534#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16535#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16699#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16799#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16798#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16797#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16796#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16795#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16794#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16793#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16792#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16791#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16790#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16789#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16788#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16787#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16786#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16785#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16784#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16783#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16782#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16781#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16780#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16779#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16778#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16777#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16776#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16775#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16774#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16773#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16772#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16771#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16770#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16769#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16768#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16767#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16766#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16765#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16764#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16763#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16762#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16761#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16760#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16759#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16758#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16757#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16756#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16755#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16754#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16753#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16752#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16751#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16750#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16749#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16748#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16747#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16746#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16745#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16744#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16743#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16742#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16741#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16740#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16739#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16738#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16737#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16736#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16735#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16734#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16733#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16732#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16731#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16730#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16729#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16728#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16727#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16726#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16725#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16724#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16723#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16722#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16721#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16720#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16719#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16718#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16717#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16716#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16715#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16714#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16713#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16712#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16711#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16710#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16709#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16708#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16707#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16706#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16705#L556 assume main_#t~mem16#1 < main_#t~mem17#1;havoc main_#t~mem16#1;havoc main_#t~mem17#1;call main_#t~mem18#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call write~int#2(1 + main_#t~mem18#1, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);havoc main_#t~mem18#1; 16701#L556-2 call main_#t~mem12#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~id~0#1.base, main_~id~0#1.offset, 4);main_#t~short15#1 := main_#t~mem12#1 != main_#t~mem13#1; 16704#L555-1 assume main_#t~short15#1;havoc main_#t~nondet14#1;main_#t~short15#1 := 0 != main_#t~nondet14#1; 16703#L555-3 assume !!main_#t~short15#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~nondet14#1;havoc main_#t~short15#1;call main_#t~mem16#1 := read~int#2(main_~tmp~0#1.base, main_~tmp~0#1.offset, 4);call main_#t~mem17#1 := read~int#1(main_~maxId~0#1.base, main_~maxId~0#1.offset, 4); 16700#L556 assume !(main_#t~mem16#1 < main_#t~mem17#1);havoc main_#t~mem16#1;havoc main_#t~mem17#1;call write~int#2(0, main_~tmp~0#1.base, main_~tmp~0#1.offset, 4); 16539#L556-2 [2024-11-08 17:26:20,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:26:20,439 INFO L85 PathProgramCache]: Analyzing trace with hash 365960605, now seen corresponding path program 22 times [2024-11-08 17:26:20,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:26:20,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894046200] [2024-11-08 17:26:20,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:26:20,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:26:20,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:26:27,498 INFO L134 CoverageAnalysis]: Checked inductivity of 3120 backedges. 4 proven. 2936 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2024-11-08 17:26:27,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:26:27,499 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894046200] [2024-11-08 17:26:27,499 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894046200] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 17:26:27,499 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [772808938] [2024-11-08 17:26:27,499 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-08 17:26:27,499 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 17:26:27,499 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:26:27,500 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 17:26:27,501 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_13142bdc-1989-496c-a12f-bfb5dccfca64/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2024-11-08 17:26:28,120 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-08 17:26:28,120 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 17:26:28,126 INFO L255 TraceCheckSpWp]: Trace formula consists of 1577 conjuncts, 128 conjuncts are in the unsatisfiable core [2024-11-08 17:26:28,140 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 17:26:28,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2024-11-08 17:26:28,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 19 [2024-11-08 17:26:28,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 28 [2024-11-08 17:26:28,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:26:28,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2024-11-08 17:26:28,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:28,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 20 [2024-11-08 17:26:29,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 29 [2024-11-08 17:26:29,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2024-11-08 17:26:29,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-11-08 17:26:29,097 INFO L134 CoverageAnalysis]: Checked inductivity of 3120 backedges. 0 proven. 2889 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2024-11-08 17:26:29,097 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 17:26:29,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 18 [2024-11-08 17:26:29,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 20 [2024-11-08 17:26:29,900 INFO L134 CoverageAnalysis]: Checked inductivity of 3120 backedges. 61 proven. 2828 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2024-11-08 17:26:29,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [772808938] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 17:26:29,900 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 17:26:29,901 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 36, 36] total 47 [2024-11-08 17:26:29,901 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940660215] [2024-11-08 17:26:29,901 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 17:26:29,901 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:26:29,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:26:29,902 INFO L85 PathProgramCache]: Analyzing trace with hash -611897761, now seen corresponding path program 21 times [2024-11-08 17:26:29,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:26:29,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123804825] [2024-11-08 17:26:29,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:26:29,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:26:29,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:26:29,969 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:26:30,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:26:30,013 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace