./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2d5a83ebadca07865f87524ca234843199e1b35abf1f6d3ef3a25954ede1db9e --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 19:05:56,796 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 19:05:56,883 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 19:05:56,901 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 19:05:56,902 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 19:05:56,927 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 19:05:56,928 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 19:05:56,929 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 19:05:56,929 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 19:05:56,930 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 19:05:56,931 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 19:05:56,931 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 19:05:56,931 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 19:05:56,932 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 19:05:56,933 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 19:05:56,933 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 19:05:56,933 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 19:05:56,934 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 19:05:56,934 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 19:05:56,935 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 19:05:56,935 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 19:05:56,936 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 19:05:56,937 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 19:05:56,937 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 19:05:56,937 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 19:05:56,938 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 19:05:56,938 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 19:05:56,939 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 19:05:56,939 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 19:05:56,940 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 19:05:56,940 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 19:05:56,941 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 19:05:56,941 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 19:05:56,942 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 19:05:56,942 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 19:05:56,943 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 19:05:56,943 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 19:05:56,943 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 19:05:56,944 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 19:05:56,945 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2d5a83ebadca07865f87524ca234843199e1b35abf1f6d3ef3a25954ede1db9e [2024-11-08 19:05:57,308 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 19:05:57,343 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 19:05:57,346 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 19:05:57,348 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 19:05:57,348 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 19:05:57,351 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.BOUNDED-10.pals.c Unable to find full path for "g++" [2024-11-08 19:05:59,499 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 19:05:59,775 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 19:05:59,776 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.BOUNDED-10.pals.c [2024-11-08 19:05:59,799 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/data/76589076e/dcdf7bcfaea0452d96ae3c7e63b45953/FLAG6c629778f [2024-11-08 19:06:00,095 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/data/76589076e/dcdf7bcfaea0452d96ae3c7e63b45953 [2024-11-08 19:06:00,099 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 19:06:00,100 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 19:06:00,102 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 19:06:00,106 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 19:06:00,115 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 19:06:00,116 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,117 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b2e857d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00, skipping insertion in model container [2024-11-08 19:06:00,117 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,167 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 19:06:00,558 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 19:06:00,581 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 19:06:00,669 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 19:06:00,700 INFO L204 MainTranslator]: Completed translation [2024-11-08 19:06:00,701 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00 WrapperNode [2024-11-08 19:06:00,702 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 19:06:00,703 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 19:06:00,703 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 19:06:00,704 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 19:06:00,716 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,734 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,783 INFO L138 Inliner]: procedures = 24, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 368 [2024-11-08 19:06:00,783 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 19:06:00,784 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 19:06:00,784 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 19:06:00,784 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 19:06:00,798 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,798 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,802 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,822 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 19:06:00,826 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,827 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,839 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,846 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,848 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,851 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,857 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 19:06:00,858 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 19:06:00,858 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 19:06:00,858 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 19:06:00,859 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (1/1) ... [2024-11-08 19:06:00,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 19:06:00,887 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 19:06:00,908 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 19:06:00,921 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_d41e6eb3-a2c1-4a14-a103-433b7fc725c2/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 19:06:00,963 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 19:06:00,964 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 19:06:00,964 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 19:06:00,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 19:06:01,134 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 19:06:01,137 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 19:06:01,810 INFO L? ?]: Removed 46 outVars from TransFormulas that were not future-live. [2024-11-08 19:06:01,810 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 19:06:01,829 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 19:06:01,830 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-08 19:06:01,830 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:06:01 BoogieIcfgContainer [2024-11-08 19:06:01,831 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 19:06:01,832 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 19:06:01,832 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 19:06:01,837 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 19:06:01,838 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:06:01,839 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 07:06:00" (1/3) ... [2024-11-08 19:06:01,840 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3fff9746 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 07:06:01, skipping insertion in model container [2024-11-08 19:06:01,841 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:06:01,841 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:06:00" (2/3) ... [2024-11-08 19:06:01,842 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3fff9746 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 07:06:01, skipping insertion in model container [2024-11-08 19:06:01,842 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:06:01,842 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:06:01" (3/3) ... [2024-11-08 19:06:01,844 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.5.1.ufo.BOUNDED-10.pals.c [2024-11-08 19:06:01,918 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 19:06:01,918 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 19:06:01,919 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 19:06:01,919 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 19:06:01,919 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 19:06:01,919 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 19:06:01,919 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 19:06:01,920 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 19:06:01,925 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 103 states, 102 states have (on average 1.7254901960784315) internal successors, (176), 102 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:06:01,955 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2024-11-08 19:06:01,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:06:01,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:06:01,966 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:01,967 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:01,967 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 19:06:01,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 103 states, 102 states have (on average 1.7254901960784315) internal successors, (176), 102 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:06:01,974 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2024-11-08 19:06:01,975 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:06:01,975 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:06:01,977 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:01,977 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:01,987 INFO L745 eck$LassoCheckResult]: Stem: 22#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0; 27#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~ret30#1, main_#t~ret31#1, main_#t~post32#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 99#L248true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 59#L248-1true init_#res#1 := init_~tmp~0#1; 71#init_returnLabel#1true main_#t~ret30#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 30#L22true assume !(0 == assume_abort_if_not_~cond#1); 75#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 61#L446-3true [2024-11-08 19:06:01,989 INFO L747 eck$LassoCheckResult]: Loop: 61#L446-3true assume main_~i2~0#1 < 10; 58#L446-1true assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 53#L76true assume 0 != ~mode1~0 % 256;~r1~0 := (if (1 + ~r1~0) % 256 <= 127 then (1 + ~r1~0) % 256 else (1 + ~r1~0) % 256 - 256);node1_~m1~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 8#L80true assume !(node1_~m1~0#1 != ~nomsg~0); 88#L80-1true ~mode1~0 := 0; 92#L76-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 85#L113true assume !(0 != ~mode2~0 % 256); 42#L130true assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 17#L133-2true ~mode2~0 := 1; 33#L113-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 89#L147true assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 77#L150true assume !(node3_~m3~0#1 != ~nomsg~0); 6#L150-1true ~mode3~0 := 0; 67#L147-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 74#L181true assume !(0 != ~mode4~0 % 256); 57#L198true assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 86#L201-2true ~mode4~0 := 1; 34#L181-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 101#L215true assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 28#L218true assume !(node5_~m5~0#1 != ~nomsg~0); 29#L218-1true ~mode5~0 := 0; 91#L215-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 10#L385true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 90#L385-1true check_#res#1 := check_~tmp~1#1; 13#check_returnLabel#1true main_#t~ret31#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret31#1;havoc main_#t~ret31#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 31#L476true assume !(0 == assert_~arg#1 % 256); 18#L471true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post32#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post32#1;havoc main_#t~post32#1; 61#L446-3true [2024-11-08 19:06:01,996 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:01,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1984313218, now seen corresponding path program 1 times [2024-11-08 19:06:02,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:02,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426036106] [2024-11-08 19:06:02,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:02,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:02,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:06:02,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:06:02,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:06:02,683 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [426036106] [2024-11-08 19:06:02,684 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [426036106] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:06:02,684 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:06:02,685 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:06:02,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186448395] [2024-11-08 19:06:02,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:06:02,695 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 19:06:02,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:02,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1772593666, now seen corresponding path program 1 times [2024-11-08 19:06:02,697 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:02,697 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121738532] [2024-11-08 19:06:02,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:02,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:02,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:06:03,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:06:03,287 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:06:03,288 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121738532] [2024-11-08 19:06:03,288 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2121738532] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:06:03,288 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:06:03,288 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:06:03,289 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [697543888] [2024-11-08 19:06:03,289 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:06:03,290 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:06:03,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:06:03,332 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 19:06:03,333 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 19:06:03,336 INFO L87 Difference]: Start difference. First operand has 103 states, 102 states have (on average 1.7254901960784315) internal successors, (176), 102 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:06:03,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:06:03,503 INFO L93 Difference]: Finished difference Result 105 states and 175 transitions. [2024-11-08 19:06:03,504 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 175 transitions. [2024-11-08 19:06:03,511 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2024-11-08 19:06:03,520 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 97 states and 135 transitions. [2024-11-08 19:06:03,521 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2024-11-08 19:06:03,522 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-11-08 19:06:03,523 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 135 transitions. [2024-11-08 19:06:03,523 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:06:03,524 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 135 transitions. [2024-11-08 19:06:03,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 135 transitions. [2024-11-08 19:06:03,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2024-11-08 19:06:03,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.3917525773195876) internal successors, (135), 96 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:06:03,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 135 transitions. [2024-11-08 19:06:03,556 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 135 transitions. [2024-11-08 19:06:03,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 19:06:03,563 INFO L425 stractBuchiCegarLoop]: Abstraction has 97 states and 135 transitions. [2024-11-08 19:06:03,563 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 19:06:03,563 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 135 transitions. [2024-11-08 19:06:03,565 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2024-11-08 19:06:03,566 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:06:03,566 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:06:03,567 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:03,568 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:03,569 INFO L745 eck$LassoCheckResult]: Stem: 256#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0; 257#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~ret30#1, main_#t~ret31#1, main_#t~post32#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 264#L248 assume 0 == ~r1~0; 224#L249 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) >= 1; 225#L250 assume ~id1~0 >= 0; 303#L251 assume 0 == ~st1~0; 276#L252 assume ~send1~0 == ~id1~0; 277#L253 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 279#L254 assume ~id2~0 >= 0; 242#L255 assume 0 == ~st2~0; 243#L256 assume ~send2~0 == ~id2~0; 278#L257 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 260#L258 assume ~id3~0 >= 0; 261#L259 assume 0 == ~st3~0; 296#L260 assume ~send3~0 == ~id3~0; 297#L261 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 282#L262 assume ~id4~0 >= 0; 283#L263 assume 0 == ~st4~0; 287#L264 assume ~send4~0 == ~id4~0; 288#L265 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 236#L266 assume ~id5~0 >= 0; 237#L267 assume 0 == ~st5~0; 248#L268 assume ~send5~0 == ~id5~0; 249#L269 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 231#L270 assume ~id1~0 != ~id2~0; 232#L271 assume ~id1~0 != ~id3~0; 262#L272 assume ~id1~0 != ~id4~0; 271#L273 assume ~id1~0 != ~id5~0; 286#L274 assume ~id2~0 != ~id3~0; 309#L275 assume ~id2~0 != ~id4~0; 222#L276 assume ~id2~0 != ~id5~0; 223#L277 assume ~id3~0 != ~id4~0; 317#L278 assume ~id3~0 != ~id5~0; 280#L279 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 281#L248-1 init_#res#1 := init_~tmp~0#1; 302#init_returnLabel#1 main_#t~ret30#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 269#L22 assume !(0 == assume_abort_if_not_~cond#1); 270#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 253#L446-3 [2024-11-08 19:06:03,569 INFO L747 eck$LassoCheckResult]: Loop: 253#L446-3 assume main_~i2~0#1 < 10; 301#L446-1 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 298#L76 assume 0 != ~mode1~0 % 256;~r1~0 := (if (1 + ~r1~0) % 256 <= 127 then (1 + ~r1~0) % 256 else (1 + ~r1~0) % 256 - 256);node1_~m1~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 233#L80 assume !(node1_~m1~0#1 != ~nomsg~0); 235#L80-1 ~mode1~0 := 0; 314#L76-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 315#L113 assume !(0 != ~mode2~0 % 256); 284#L130 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 250#L133-2 ~mode2~0 := 1; 251#L113-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 272#L147 assume !(0 != ~mode3~0 % 256); 307#L164 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 247#L167-2 ~mode3~0 := 1; 230#L147-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 308#L181 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 305#L184 assume !(node4_~m4~0#1 != ~nomsg~0); 292#L184-1 ~mode4~0 := 0; 273#L181-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 274#L215 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 265#L218 assume !(node5_~m5~0#1 != ~nomsg~0); 267#L218-1 ~mode5~0 := 0; 268#L215-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 238#L385 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 239#L385-1 check_#res#1 := check_~tmp~1#1; 244#check_returnLabel#1 main_#t~ret31#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret31#1;havoc main_#t~ret31#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 245#L476 assume !(0 == assert_~arg#1 % 256); 252#L471 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post32#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post32#1;havoc main_#t~post32#1; 253#L446-3 [2024-11-08 19:06:03,570 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:03,570 INFO L85 PathProgramCache]: Analyzing trace with hash -1707437673, now seen corresponding path program 1 times [2024-11-08 19:06:03,570 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:03,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125353224] [2024-11-08 19:06:03,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:03,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:03,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:06:03,652 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:06:03,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:06:03,735 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:06:03,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:03,736 INFO L85 PathProgramCache]: Analyzing trace with hash 1223284094, now seen corresponding path program 1 times [2024-11-08 19:06:03,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:03,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369107594] [2024-11-08 19:06:03,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:03,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:03,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:06:03,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:06:03,981 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:06:03,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369107594] [2024-11-08 19:06:03,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369107594] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:06:03,982 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:06:03,982 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:06:03,983 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039637029] [2024-11-08 19:06:03,983 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:06:03,983 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:06:03,983 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:06:03,984 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 19:06:03,985 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 19:06:03,985 INFO L87 Difference]: Start difference. First operand 97 states and 135 transitions. cyclomatic complexity: 39 Second operand has 5 states, 5 states have (on average 5.4) internal successors, (27), 5 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:06:04,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:06:04,129 INFO L93 Difference]: Finished difference Result 100 states and 137 transitions. [2024-11-08 19:06:04,130 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 137 transitions. [2024-11-08 19:06:04,132 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2024-11-08 19:06:04,141 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 97 states and 133 transitions. [2024-11-08 19:06:04,142 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2024-11-08 19:06:04,142 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-11-08 19:06:04,146 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 133 transitions. [2024-11-08 19:06:04,147 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:06:04,147 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 133 transitions. [2024-11-08 19:06:04,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 133 transitions. [2024-11-08 19:06:04,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2024-11-08 19:06:04,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.3711340206185567) internal successors, (133), 96 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:06:04,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 133 transitions. [2024-11-08 19:06:04,159 INFO L240 hiAutomatonCegarLoop]: Abstraction has 97 states and 133 transitions. [2024-11-08 19:06:04,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 19:06:04,161 INFO L425 stractBuchiCegarLoop]: Abstraction has 97 states and 133 transitions. [2024-11-08 19:06:04,161 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 19:06:04,161 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 133 transitions. [2024-11-08 19:06:04,162 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2024-11-08 19:06:04,162 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:06:04,162 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:06:04,164 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:04,164 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:06:04,167 INFO L745 eck$LassoCheckResult]: Stem: 461#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0; 462#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~ret30#1, main_#t~ret31#1, main_#t~post32#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 469#L248 assume 0 == ~r1~0; 429#L249 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) >= 1; 430#L250 assume ~id1~0 >= 0; 508#L251 assume 0 == ~st1~0; 481#L252 assume ~send1~0 == ~id1~0; 482#L253 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 484#L254 assume ~id2~0 >= 0; 447#L255 assume 0 == ~st2~0; 448#L256 assume ~send2~0 == ~id2~0; 483#L257 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 465#L258 assume ~id3~0 >= 0; 466#L259 assume 0 == ~st3~0; 501#L260 assume ~send3~0 == ~id3~0; 502#L261 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 487#L262 assume ~id4~0 >= 0; 488#L263 assume 0 == ~st4~0; 492#L264 assume ~send4~0 == ~id4~0; 493#L265 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 441#L266 assume ~id5~0 >= 0; 442#L267 assume 0 == ~st5~0; 453#L268 assume ~send5~0 == ~id5~0; 454#L269 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 436#L270 assume ~id1~0 != ~id2~0; 437#L271 assume ~id1~0 != ~id3~0; 467#L272 assume ~id1~0 != ~id4~0; 476#L273 assume ~id1~0 != ~id5~0; 491#L274 assume ~id2~0 != ~id3~0; 514#L275 assume ~id2~0 != ~id4~0; 427#L276 assume ~id2~0 != ~id5~0; 428#L277 assume ~id3~0 != ~id4~0; 522#L278 assume ~id3~0 != ~id5~0; 485#L279 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 486#L248-1 init_#res#1 := init_~tmp~0#1; 507#init_returnLabel#1 main_#t~ret30#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 474#L22 assume !(0 == assume_abort_if_not_~cond#1); 475#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 458#L446-3 [2024-11-08 19:06:04,168 INFO L747 eck$LassoCheckResult]: Loop: 458#L446-3 assume main_~i2~0#1 < 10; 506#L446-1 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 503#L76 assume 0 != ~mode1~0 % 256;~r1~0 := (if (1 + ~r1~0) % 256 <= 127 then (1 + ~r1~0) % 256 else (1 + ~r1~0) % 256 - 256);node1_~m1~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0; 438#L80 assume !(node1_~m1~0#1 != ~nomsg~0); 440#L80-1 ~mode1~0 := 0; 519#L76-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 520#L113 assume !(0 != ~mode2~0 % 256); 489#L130 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 455#L133-2 ~mode2~0 := 1; 456#L113-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 477#L147 assume !(0 != ~mode3~0 % 256); 512#L164 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 452#L167-2 ~mode3~0 := 1; 435#L147-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 513#L181 assume !(0 != ~mode4~0 % 256); 505#L198 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 495#L201-2 ~mode4~0 := 1; 478#L181-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 479#L215 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 470#L218 assume !(node5_~m5~0#1 != ~nomsg~0); 472#L218-1 ~mode5~0 := 0; 473#L215-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 443#L385 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1; 444#L386 assume ~r1~0 < 5;check_~tmp~1#1 := 1; 446#L385-1 check_#res#1 := check_~tmp~1#1; 449#check_returnLabel#1 main_#t~ret31#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret31#1;havoc main_#t~ret31#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 450#L476 assume !(0 == assert_~arg#1 % 256); 457#L471 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post32#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post32#1;havoc main_#t~post32#1; 458#L446-3 [2024-11-08 19:06:04,168 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:04,168 INFO L85 PathProgramCache]: Analyzing trace with hash -1707437673, now seen corresponding path program 2 times [2024-11-08 19:06:04,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:04,169 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500647976] [2024-11-08 19:06:04,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:04,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:04,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:06:04,250 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:06:04,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:06:04,314 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:06:04,315 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:04,315 INFO L85 PathProgramCache]: Analyzing trace with hash -1622513139, now seen corresponding path program 1 times [2024-11-08 19:06:04,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:04,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556719060] [2024-11-08 19:06:04,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:04,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:04,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:06:04,340 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:06:04,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:06:04,376 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:06:04,377 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:06:04,377 INFO L85 PathProgramCache]: Analyzing trace with hash 1942052515, now seen corresponding path program 1 times [2024-11-08 19:06:04,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:06:04,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184098237] [2024-11-08 19:06:04,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:06:04,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:06:04,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:06:04,524 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:06:04,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:06:04,526 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184098237] [2024-11-08 19:06:04,526 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1184098237] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:06:04,526 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:06:04,526 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 19:06:04,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438700651] [2024-11-08 19:06:04,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:06:08,349 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 19:06:08,350 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 19:06:08,350 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 19:06:08,350 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 19:06:08,350 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 19:06:08,351 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 19:06:08,351 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 19:06:08,351 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 19:06:08,351 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.5.1.ufo.BOUNDED-10.pals.c_Iteration3_Loop [2024-11-08 19:06:08,351 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 19:06:08,352 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 19:06:08,391 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,410 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,417 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,421 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,423 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,426 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,429 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:08,433 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,363 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,367 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,374 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,383 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,404 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,413 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,418 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,421 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,429 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,433 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,440 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,445 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,449 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,454 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:09,458 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:06:10,795 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 14 [2024-11-08 19:06:24,651 WARN L176 XnfTransformerHelper]: Simplifying disjunction of 294000 conjunctions. This might take some time...