./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cf2e081cc9f75dea6397073b82669a6a6f9f53b1ab4e083e4f8da1bc210df95c --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 19:17:16,963 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 19:17:17,075 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 19:17:17,086 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 19:17:17,086 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 19:17:17,128 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 19:17:17,130 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 19:17:17,131 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 19:17:17,134 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 19:17:17,135 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 19:17:17,136 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 19:17:17,138 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 19:17:17,138 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 19:17:17,139 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 19:17:17,139 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 19:17:17,142 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 19:17:17,143 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 19:17:17,143 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 19:17:17,144 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 19:17:17,144 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 19:17:17,145 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 19:17:17,145 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 19:17:17,150 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 19:17:17,150 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 19:17:17,150 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 19:17:17,151 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 19:17:17,151 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 19:17:17,151 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 19:17:17,152 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 19:17:17,152 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 19:17:17,168 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 19:17:17,172 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 19:17:17,172 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 19:17:17,173 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 19:17:17,173 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 19:17:17,173 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 19:17:17,174 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 19:17:17,174 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 19:17:17,175 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 19:17:17,175 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cf2e081cc9f75dea6397073b82669a6a6f9f53b1ab4e083e4f8da1bc210df95c [2024-11-08 19:17:17,576 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 19:17:17,612 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 19:17:17,616 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 19:17:17,618 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 19:17:17,619 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 19:17:17,621 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.UNBOUNDED.pals.c Unable to find full path for "g++" [2024-11-08 19:17:20,071 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 19:17:20,382 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 19:17:20,383 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.5.1.ufo.UNBOUNDED.pals.c [2024-11-08 19:17:20,407 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/data/6e7ffe45b/d376ee6a3f6e4246a0ea3df347668992/FLAGe4d3b9e0d [2024-11-08 19:17:20,439 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/data/6e7ffe45b/d376ee6a3f6e4246a0ea3df347668992 [2024-11-08 19:17:20,443 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 19:17:20,445 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 19:17:20,449 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 19:17:20,451 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 19:17:20,458 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 19:17:20,459 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:17:20" (1/1) ... [2024-11-08 19:17:20,461 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c6e4ed2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:20, skipping insertion in model container [2024-11-08 19:17:20,463 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:17:20" (1/1) ... [2024-11-08 19:17:20,524 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 19:17:20,920 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 19:17:20,939 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 19:17:21,022 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 19:17:21,049 INFO L204 MainTranslator]: Completed translation [2024-11-08 19:17:21,050 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21 WrapperNode [2024-11-08 19:17:21,050 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 19:17:21,051 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 19:17:21,052 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 19:17:21,052 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 19:17:21,061 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,073 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,133 INFO L138 Inliner]: procedures = 25, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 367 [2024-11-08 19:17:21,134 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 19:17:21,134 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 19:17:21,134 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 19:17:21,134 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 19:17:21,149 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,149 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,154 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,175 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 19:17:21,175 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,176 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,187 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,194 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,198 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,200 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,206 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 19:17:21,207 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 19:17:21,207 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 19:17:21,208 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 19:17:21,209 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (1/1) ... [2024-11-08 19:17:21,221 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 19:17:21,246 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 19:17:21,265 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 19:17:21,277 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb5ba8df-b374-4a57-88ca-774ff1b463aa/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 19:17:21,320 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 19:17:21,321 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 19:17:21,321 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 19:17:21,324 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 19:17:21,473 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 19:17:21,477 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 19:17:22,360 INFO L? ?]: Removed 45 outVars from TransFormulas that were not future-live. [2024-11-08 19:17:22,360 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 19:17:22,391 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 19:17:22,392 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-08 19:17:22,392 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:17:22 BoogieIcfgContainer [2024-11-08 19:17:22,393 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 19:17:22,394 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 19:17:22,395 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 19:17:22,400 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 19:17:22,401 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:17:22,404 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 07:17:20" (1/3) ... [2024-11-08 19:17:22,406 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1e2b7bf7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 07:17:22, skipping insertion in model container [2024-11-08 19:17:22,406 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:17:22,406 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:17:21" (2/3) ... [2024-11-08 19:17:22,406 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1e2b7bf7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 07:17:22, skipping insertion in model container [2024-11-08 19:17:22,407 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:17:22,407 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:17:22" (3/3) ... [2024-11-08 19:17:22,409 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.5.1.ufo.UNBOUNDED.pals.c [2024-11-08 19:17:22,498 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 19:17:22,498 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 19:17:22,499 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 19:17:22,499 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 19:17:22,499 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 19:17:22,499 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 19:17:22,500 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 19:17:22,500 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 19:17:22,506 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 104 states, 103 states have (on average 1.7281553398058251) internal successors, (178), 103 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:17:22,539 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-11-08 19:17:22,540 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:17:22,540 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:17:22,551 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:22,552 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:22,552 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 19:17:22,553 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 104 states, 103 states have (on average 1.7281553398058251) internal successors, (178), 103 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:17:22,561 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-11-08 19:17:22,561 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:17:22,561 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:17:22,566 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:22,567 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:22,578 INFO L745 eck$LassoCheckResult]: Stem: 28#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0; 33#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~ret30#1, main_#t~ret31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 69#L251true assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 27#L251-1true init_#res#1 := init_~tmp~0#1; 78#init_returnLabel#1true main_#t~ret30#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 35#L22true assume !(0 == assume_abort_if_not_~cond#1); 84#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 14#L449-2true [2024-11-08 19:17:22,580 INFO L747 eck$LassoCheckResult]: Loop: 14#L449-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 60#L76true assume !(0 != ~mode1~0 % 256); 89#L99true assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 38#L102-2true ~mode1~0 := 1; 98#L76-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 26#L116true assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 96#L119true assume !(node2_~m2~0#1 != ~nomsg~0); 25#L119-1true ~mode2~0 := 0; 94#L116-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 86#L150true assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 5#L153true assume !(node3_~m3~0#1 != ~nomsg~0); 71#L153-1true ~mode3~0 := 0; 75#L150-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 70#L184true assume !(0 != ~mode4~0 % 256); 57#L201true assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 85#L204-2true ~mode4~0 := 1; 67#L184-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 34#L218true assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 74#L221true assume !(node5_~m5~0#1 != ~nomsg~0); 49#L221-1true ~mode5~0 := 0; 9#L218-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 19#L388true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 88#L388-1true check_#res#1 := check_~tmp~1#1; 17#check_returnLabel#1true main_#t~ret31#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret31#1;havoc main_#t~ret31#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 103#L478true assume !(0 == assert_~arg#1 % 256); 99#L473true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 14#L449-2true [2024-11-08 19:17:22,588 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:22,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1984313218, now seen corresponding path program 1 times [2024-11-08 19:17:22,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:22,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [633818448] [2024-11-08 19:17:22,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:22,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:22,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:17:23,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:17:23,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:17:23,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [633818448] [2024-11-08 19:17:23,257 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [633818448] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:17:23,258 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:17:23,258 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:17:23,261 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1344380224] [2024-11-08 19:17:23,262 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:17:23,268 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 19:17:23,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:23,270 INFO L85 PathProgramCache]: Analyzing trace with hash -1683036681, now seen corresponding path program 1 times [2024-11-08 19:17:23,271 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:23,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780543942] [2024-11-08 19:17:23,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:23,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:23,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:17:23,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:17:23,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:17:23,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780543942] [2024-11-08 19:17:23,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [780543942] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:17:23,773 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:17:23,774 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:17:23,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037770082] [2024-11-08 19:17:23,774 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:17:23,776 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:17:23,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:17:23,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 19:17:23,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 19:17:23,833 INFO L87 Difference]: Start difference. First operand has 104 states, 103 states have (on average 1.7281553398058251) internal successors, (178), 103 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:17:23,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:17:23,982 INFO L93 Difference]: Finished difference Result 102 states and 172 transitions. [2024-11-08 19:17:23,984 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 102 states and 172 transitions. [2024-11-08 19:17:23,989 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-08 19:17:24,000 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 102 states to 98 states and 137 transitions. [2024-11-08 19:17:24,001 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 98 [2024-11-08 19:17:24,002 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 98 [2024-11-08 19:17:24,007 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 137 transitions. [2024-11-08 19:17:24,008 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:17:24,008 INFO L218 hiAutomatonCegarLoop]: Abstraction has 98 states and 137 transitions. [2024-11-08 19:17:24,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 137 transitions. [2024-11-08 19:17:24,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2024-11-08 19:17:24,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.3979591836734695) internal successors, (137), 97 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:17:24,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 137 transitions. [2024-11-08 19:17:24,065 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 137 transitions. [2024-11-08 19:17:24,070 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 19:17:24,075 INFO L425 stractBuchiCegarLoop]: Abstraction has 98 states and 137 transitions. [2024-11-08 19:17:24,076 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 19:17:24,077 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 137 transitions. [2024-11-08 19:17:24,083 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-08 19:17:24,083 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:17:24,084 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:17:24,085 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:24,085 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:24,089 INFO L745 eck$LassoCheckResult]: Stem: 269#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0; 270#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~ret30#1, main_#t~ret31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 276#L251 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 290#L252 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) >= 1; 291#L253 assume ~id1~0 >= 0; 293#L254 assume 0 == ~st1~0; 247#L255 assume ~send1~0 == ~id1~0; 248#L256 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 292#L257 assume ~id2~0 >= 0; 271#L258 assume 0 == ~st2~0; 272#L259 assume ~send2~0 == ~id2~0; 304#L260 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 305#L261 assume ~id3~0 >= 0; 296#L262 assume 0 == ~st3~0; 297#L263 assume ~send3~0 == ~id3~0; 299#L264 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 300#L265 assume ~id4~0 >= 0; 231#L266 assume 0 == ~st4~0; 232#L267 assume ~send4~0 == ~id4~0; 254#L268 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 255#L269 assume ~id5~0 >= 0; 227#L270 assume 0 == ~st5~0; 228#L271 assume ~send5~0 == ~id5~0; 273#L272 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 282#L273 assume ~id1~0 != ~id2~0; 298#L274 assume ~id1~0 != ~id3~0; 314#L275 assume ~id1~0 != ~id4~0; 220#L276 assume ~id1~0 != ~id5~0; 221#L277 assume ~id2~0 != ~id3~0; 317#L278 assume ~id2~0 != ~id4~0; 294#L279 assume ~id2~0 != ~id5~0; 295#L280 assume ~id3~0 != ~id4~0; 235#L281 assume ~id3~0 != ~id5~0; 222#L282 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 223#L251-1 init_#res#1 := init_~tmp~0#1; 268#init_returnLabel#1 main_#t~ret30#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 280#L22 assume !(0 == assume_abort_if_not_~cond#1); 281#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 242#L449-2 [2024-11-08 19:17:24,090 INFO L747 eck$LassoCheckResult]: Loop: 242#L449-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 243#L76 assume !(0 != ~mode1~0 % 256); 308#L99 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 284#L102-2 ~mode1~0 := 1; 285#L76-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 265#L116 assume !(0 != ~mode2~0 % 256); 266#L133 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 238#L136-2 ~mode2~0 := 1; 264#L116-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 315#L150 assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 224#L153 assume !(node3_~m3~0#1 != ~nomsg~0); 226#L153-1 ~mode3~0 := 0; 289#L150-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 310#L184 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 311#L187 assume !(node4_~m4~0#1 != ~nomsg~0); 245#L187-1 ~mode4~0 := 0; 309#L184-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 277#L218 assume !(0 != ~mode5~0 % 256); 278#L235 assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 260#L238-2 ~mode5~0 := 1; 233#L218-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 234#L388 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 240#L388-1 check_#res#1 := check_~tmp~1#1; 249#check_returnLabel#1 main_#t~ret31#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret31#1;havoc main_#t~ret31#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 250#L478 assume !(0 == assert_~arg#1 % 256); 316#L473 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 242#L449-2 [2024-11-08 19:17:24,091 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:24,091 INFO L85 PathProgramCache]: Analyzing trace with hash -1707437673, now seen corresponding path program 1 times [2024-11-08 19:17:24,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:24,092 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619805415] [2024-11-08 19:17:24,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:24,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:24,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:17:24,223 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:17:24,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:17:24,337 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:17:24,339 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:24,339 INFO L85 PathProgramCache]: Analyzing trace with hash -1359162696, now seen corresponding path program 1 times [2024-11-08 19:17:24,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:24,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1206800980] [2024-11-08 19:17:24,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:24,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:24,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:17:24,653 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:17:24,654 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:17:24,654 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1206800980] [2024-11-08 19:17:24,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1206800980] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:17:24,656 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:17:24,656 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:17:24,657 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1682665875] [2024-11-08 19:17:24,657 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:17:24,659 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:17:24,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:17:24,660 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 19:17:24,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 19:17:24,661 INFO L87 Difference]: Start difference. First operand 98 states and 137 transitions. cyclomatic complexity: 40 Second operand has 5 states, 5 states have (on average 5.2) internal successors, (26), 5 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:17:24,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:17:24,717 INFO L93 Difference]: Finished difference Result 101 states and 139 transitions. [2024-11-08 19:17:24,717 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 139 transitions. [2024-11-08 19:17:24,719 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-08 19:17:24,724 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 98 states and 135 transitions. [2024-11-08 19:17:24,724 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 98 [2024-11-08 19:17:24,727 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 98 [2024-11-08 19:17:24,728 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 135 transitions. [2024-11-08 19:17:24,728 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:17:24,728 INFO L218 hiAutomatonCegarLoop]: Abstraction has 98 states and 135 transitions. [2024-11-08 19:17:24,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 135 transitions. [2024-11-08 19:17:24,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2024-11-08 19:17:24,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.3775510204081634) internal successors, (135), 97 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:17:24,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 135 transitions. [2024-11-08 19:17:24,741 INFO L240 hiAutomatonCegarLoop]: Abstraction has 98 states and 135 transitions. [2024-11-08 19:17:24,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 19:17:24,743 INFO L425 stractBuchiCegarLoop]: Abstraction has 98 states and 135 transitions. [2024-11-08 19:17:24,745 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 19:17:24,746 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 135 transitions. [2024-11-08 19:17:24,748 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-08 19:17:24,749 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:17:24,749 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:17:24,751 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:24,755 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:17:24,755 INFO L745 eck$LassoCheckResult]: Stem: 476#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(49, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0; 477#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~ret30#1, main_#t~ret31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 483#L251 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 497#L252 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) >= 1; 498#L253 assume ~id1~0 >= 0; 500#L254 assume 0 == ~st1~0; 454#L255 assume ~send1~0 == ~id1~0; 455#L256 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 499#L257 assume ~id2~0 >= 0; 478#L258 assume 0 == ~st2~0; 479#L259 assume ~send2~0 == ~id2~0; 511#L260 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 512#L261 assume ~id3~0 >= 0; 503#L262 assume 0 == ~st3~0; 504#L263 assume ~send3~0 == ~id3~0; 506#L264 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 507#L265 assume ~id4~0 >= 0; 438#L266 assume 0 == ~st4~0; 439#L267 assume ~send4~0 == ~id4~0; 461#L268 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 462#L269 assume ~id5~0 >= 0; 434#L270 assume 0 == ~st5~0; 435#L271 assume ~send5~0 == ~id5~0; 480#L272 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 489#L273 assume ~id1~0 != ~id2~0; 505#L274 assume ~id1~0 != ~id3~0; 521#L275 assume ~id1~0 != ~id4~0; 427#L276 assume ~id1~0 != ~id5~0; 428#L277 assume ~id2~0 != ~id3~0; 524#L278 assume ~id2~0 != ~id4~0; 501#L279 assume ~id2~0 != ~id5~0; 502#L280 assume ~id3~0 != ~id4~0; 442#L281 assume ~id3~0 != ~id5~0; 429#L282 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 430#L251-1 init_#res#1 := init_~tmp~0#1; 475#init_returnLabel#1 main_#t~ret30#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 487#L22 assume !(0 == assume_abort_if_not_~cond#1); 488#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 449#L449-2 [2024-11-08 19:17:24,755 INFO L747 eck$LassoCheckResult]: Loop: 449#L449-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 450#L76 assume !(0 != ~mode1~0 % 256); 515#L99 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 491#L102-2 ~mode1~0 := 1; 492#L76-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 472#L116 assume !(0 != ~mode2~0 % 256); 473#L133 assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 445#L136-2 ~mode2~0 := 1; 471#L116-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 522#L150 assume !(0 != ~mode3~0 % 256); 458#L167 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 459#L170-2 ~mode3~0 := 1; 496#L150-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 517#L184 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 518#L187 assume !(node4_~m4~0#1 != ~nomsg~0); 452#L187-1 ~mode4~0 := 0; 516#L184-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 484#L218 assume !(0 != ~mode5~0 % 256); 485#L235 assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 467#L238-2 ~mode5~0 := 1; 440#L218-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 441#L388 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1; 446#L389 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 5;check_~tmp~1#1 := 1; 447#L388-1 check_#res#1 := check_~tmp~1#1; 456#check_returnLabel#1 main_#t~ret31#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret31#1;havoc main_#t~ret31#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 457#L478 assume !(0 == assert_~arg#1 % 256); 523#L473 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 449#L449-2 [2024-11-08 19:17:24,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:24,756 INFO L85 PathProgramCache]: Analyzing trace with hash -1707437673, now seen corresponding path program 2 times [2024-11-08 19:17:24,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:24,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725110571] [2024-11-08 19:17:24,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:24,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:24,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:17:24,805 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:17:24,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:17:24,863 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:17:24,867 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:24,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1691054951, now seen corresponding path program 1 times [2024-11-08 19:17:24,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:24,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1365802617] [2024-11-08 19:17:24,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:24,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:24,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:17:24,920 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:17:24,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:17:24,990 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:17:24,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:17:24,996 INFO L85 PathProgramCache]: Analyzing trace with hash -329142973, now seen corresponding path program 1 times [2024-11-08 19:17:24,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:17:24,996 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100106634] [2024-11-08 19:17:24,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:17:24,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:17:25,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:17:25,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:17:25,143 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:17:25,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100106634] [2024-11-08 19:17:25,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [100106634] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:17:25,144 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:17:25,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 19:17:25,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747028275] [2024-11-08 19:17:25,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:17:29,978 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 19:17:29,979 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 19:17:29,980 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 19:17:29,980 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 19:17:29,980 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 19:17:29,980 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 19:17:29,981 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 19:17:29,981 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 19:17:29,981 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.5.1.ufo.UNBOUNDED.pals.c_Iteration3_Loop [2024-11-08 19:17:29,981 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 19:17:29,982 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 19:17:30,046 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,062 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,072 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,075 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,081 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,090 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,093 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,097 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,101 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,105 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,109 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,117 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,120 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,127 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,130 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,134 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,138 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,146 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:30,152 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:31,810 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:31,814 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:31,818 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:17:34,074 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 25