./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a44e961521da9b8f4535724e185f402d94bec27d495ab6df10e2b3c1ffa4513a --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 19:01:08,203 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 19:01:08,289 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 19:01:08,293 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 19:01:08,295 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 19:01:08,328 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 19:01:08,330 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 19:01:08,331 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 19:01:08,332 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 19:01:08,333 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 19:01:08,334 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 19:01:08,335 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 19:01:08,335 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 19:01:08,335 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 19:01:08,338 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 19:01:08,338 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 19:01:08,339 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 19:01:08,339 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 19:01:08,339 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 19:01:08,340 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 19:01:08,340 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 19:01:08,345 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 19:01:08,345 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 19:01:08,345 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 19:01:08,346 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 19:01:08,346 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 19:01:08,346 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 19:01:08,347 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 19:01:08,347 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 19:01:08,347 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 19:01:08,347 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 19:01:08,348 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 19:01:08,348 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 19:01:08,349 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 19:01:08,350 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 19:01:08,350 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 19:01:08,351 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 19:01:08,351 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 19:01:08,351 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 19:01:08,352 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a44e961521da9b8f4535724e185f402d94bec27d495ab6df10e2b3c1ffa4513a [2024-11-08 19:01:08,643 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 19:01:08,667 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 19:01:08,671 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 19:01:08,672 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 19:01:08,673 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 19:01:08,674 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.ufo.BOUNDED-12.pals.c Unable to find full path for "g++" [2024-11-08 19:01:10,710 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 19:01:10,934 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 19:01:10,934 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.ufo.BOUNDED-12.pals.c [2024-11-08 19:01:10,947 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/data/d1c612bef/e18d1b9701eb4ed7a23b8d2eb77f5e2f/FLAGf6e16d43d [2024-11-08 19:01:10,966 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/data/d1c612bef/e18d1b9701eb4ed7a23b8d2eb77f5e2f [2024-11-08 19:01:10,970 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 19:01:10,973 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 19:01:10,975 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 19:01:10,976 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 19:01:10,984 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 19:01:10,985 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:01:10" (1/1) ... [2024-11-08 19:01:10,987 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c38f463 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:10, skipping insertion in model container [2024-11-08 19:01:10,989 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 07:01:10" (1/1) ... [2024-11-08 19:01:11,043 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 19:01:11,336 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 19:01:11,362 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 19:01:11,450 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 19:01:11,472 INFO L204 MainTranslator]: Completed translation [2024-11-08 19:01:11,472 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11 WrapperNode [2024-11-08 19:01:11,473 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 19:01:11,474 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 19:01:11,474 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 19:01:11,474 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 19:01:11,482 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,493 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,534 INFO L138 Inliner]: procedures = 25, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 434 [2024-11-08 19:01:11,535 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 19:01:11,535 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 19:01:11,536 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 19:01:11,536 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 19:01:11,548 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,549 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,553 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,571 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 19:01:11,572 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,572 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,582 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,592 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,597 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,600 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,607 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 19:01:11,611 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 19:01:11,611 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 19:01:11,611 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 19:01:11,612 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (1/1) ... [2024-11-08 19:01:11,619 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 19:01:11,631 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 19:01:11,647 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 19:01:11,654 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4f0e5774-92bc-4b74-8e88-cbc3288548e7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 19:01:11,689 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 19:01:11,689 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 19:01:11,689 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 19:01:11,689 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 19:01:11,837 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 19:01:11,840 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 19:01:12,653 INFO L? ?]: Removed 52 outVars from TransFormulas that were not future-live. [2024-11-08 19:01:12,653 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 19:01:12,689 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 19:01:12,691 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-08 19:01:12,692 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:01:12 BoogieIcfgContainer [2024-11-08 19:01:12,692 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 19:01:12,695 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 19:01:12,699 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 19:01:12,708 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 19:01:12,736 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:01:12,736 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 07:01:10" (1/3) ... [2024-11-08 19:01:12,738 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@658b09ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 07:01:12, skipping insertion in model container [2024-11-08 19:01:12,738 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:01:12,738 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 07:01:11" (2/3) ... [2024-11-08 19:01:12,743 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@658b09ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 07:01:12, skipping insertion in model container [2024-11-08 19:01:12,744 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 19:01:12,744 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 07:01:12" (3/3) ... [2024-11-08 19:01:12,748 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.6.ufo.BOUNDED-12.pals.c [2024-11-08 19:01:12,919 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 19:01:12,920 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 19:01:12,920 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 19:01:12,920 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 19:01:12,920 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 19:01:12,921 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 19:01:12,923 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 19:01:12,923 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 19:01:12,934 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 122 states, 121 states have (on average 1.743801652892562) internal successors, (211), 121 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:12,974 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 71 [2024-11-08 19:01:12,977 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:01:12,977 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:01:12,990 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:12,990 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:12,990 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 19:01:12,992 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 122 states, 121 states have (on average 1.743801652892562) internal successors, (211), 121 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:13,003 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 71 [2024-11-08 19:01:13,003 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:01:13,006 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:01:13,007 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:13,008 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:13,021 INFO L745 eck$LassoCheckResult]: Stem: 30#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 38#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 26#L288true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 58#L288-1true init_#res#1 := init_~tmp~0#1; 84#init_returnLabel#1true main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 40#L22true assume 0 == assume_abort_if_not_~cond#1;assume false; 87#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 92#L529-3true [2024-11-08 19:01:13,022 INFO L747 eck$LassoCheckResult]: Loop: 92#L529-3true assume main_~i2~0#1 < 12; 119#L529-1true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 101#L84true assume 0 != ~mode1~0 % 256;~r1~0 := (if (1 + ~r1~0) % 256 <= 127 then (1 + ~r1~0) % 256 else (1 + ~r1~0) % 256 - 256);node1_~m1~0#1 := ~p6_old~0;~p6_old~0 := ~nomsg~0; 85#L88true assume !(node1_~m1~0#1 != ~nomsg~0); 99#L88-1true ~mode1~0 := 0; 25#L84-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 103#L119true assume !(0 != ~mode2~0 % 256); 15#L136true assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256); 17#L139-2true ~mode2~0 := 1; 43#L119-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 8#L153true assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0; 113#L156true assume !(node3_~m3~0#1 != ~nomsg~0); 90#L156-1true ~mode3~0 := 0; 107#L153-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 105#L187true assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 55#L190true assume !(node4_~m4~0#1 != ~nomsg~0); 88#L190-1true ~mode4~0 := 0; 76#L187-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 79#L221true assume !(0 != ~mode5~0 % 256); 24#L238true assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 51#L241-2true ~mode5~0 := 1; 54#L221-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 18#L255true assume !(0 != ~mode6~0 % 256); 42#L272true assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256); 100#L275-2true ~mode6~0 := 1; 112#L255-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 3#L461true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 46#L461-1true check_#res#1 := check_~tmp~1#1; 19#check_returnLabel#1true main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 75#L562true assume !(0 == assert_~arg#1 % 256); 120#L557true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1; 92#L529-3true [2024-11-08 19:01:13,031 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:13,033 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845626, now seen corresponding path program 1 times [2024-11-08 19:01:13,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:13,043 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456696415] [2024-11-08 19:01:13,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:13,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:13,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:01:13,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:01:13,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:01:13,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456696415] [2024-11-08 19:01:13,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1456696415] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:01:13,347 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:01:13,347 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-08 19:01:13,349 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181673333] [2024-11-08 19:01:13,349 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:01:13,354 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 19:01:13,355 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:13,355 INFO L85 PathProgramCache]: Analyzing trace with hash -1895627366, now seen corresponding path program 1 times [2024-11-08 19:01:13,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:13,356 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748950237] [2024-11-08 19:01:13,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:13,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:13,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:01:13,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:01:13,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:01:13,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748950237] [2024-11-08 19:01:13,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748950237] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:01:13,848 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:01:13,848 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:01:13,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [515741538] [2024-11-08 19:01:13,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:01:13,850 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:01:13,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:01:13,898 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-08 19:01:13,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-08 19:01:13,903 INFO L87 Difference]: Start difference. First operand has 122 states, 121 states have (on average 1.743801652892562) internal successors, (211), 121 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:13,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:01:13,925 INFO L93 Difference]: Finished difference Result 121 states and 208 transitions. [2024-11-08 19:01:13,927 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 208 transitions. [2024-11-08 19:01:13,934 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2024-11-08 19:01:13,940 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 116 states and 202 transitions. [2024-11-08 19:01:13,941 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2024-11-08 19:01:13,942 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2024-11-08 19:01:13,943 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 202 transitions. [2024-11-08 19:01:13,944 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:01:13,944 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 202 transitions. [2024-11-08 19:01:13,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 202 transitions. [2024-11-08 19:01:13,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2024-11-08 19:01:13,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.7413793103448276) internal successors, (202), 115 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:13,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 202 transitions. [2024-11-08 19:01:13,977 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 202 transitions. [2024-11-08 19:01:13,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-08 19:01:13,986 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 202 transitions. [2024-11-08 19:01:13,986 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 19:01:13,986 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 202 transitions. [2024-11-08 19:01:13,988 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2024-11-08 19:01:13,988 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:01:13,988 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:01:13,992 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:13,992 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:13,993 INFO L745 eck$LassoCheckResult]: Stem: 305#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 306#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 302#L288 assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 259#L288-1 init_#res#1 := init_~tmp~0#1; 336#init_returnLabel#1 main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 316#L22 assume !(0 == assume_abort_if_not_~cond#1); 317#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 361#L529-3 [2024-11-08 19:01:13,994 INFO L747 eck$LassoCheckResult]: Loop: 361#L529-3 assume main_~i2~0#1 < 12; 364#L529-1 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 367#L84 assume !(0 != ~mode1~0 % 256); 322#L102 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 289#L105-2 ~mode1~0 := 1; 300#L84-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 301#L119 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 323#L122 assume !(node2_~m2~0#1 != ~nomsg~0); 294#L122-1 ~mode2~0 := 0; 282#L119-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 267#L153 assume !(0 != ~mode3~0 % 256); 268#L170 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 327#L173-2 ~mode3~0 := 1; 363#L153-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 368#L187 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 329#L190 assume !(node4_~m4~0#1 != ~nomsg~0); 331#L190-1 ~mode4~0 := 0; 354#L187-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 355#L221 assume !(0 != ~mode5~0 % 256); 297#L238 assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 298#L241-2 ~mode5~0 := 1; 328#L221-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 283#L255 assume !(0 != ~mode6~0 % 256); 284#L272 assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256); 318#L275-2 ~mode6~0 := 1; 276#L255-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 254#L461 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 255#L461-1 check_#res#1 := check_~tmp~1#1; 286#check_returnLabel#1 main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 287#L562 assume !(0 == assert_~arg#1 % 256); 353#L557 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1; 361#L529-3 [2024-11-08 19:01:13,994 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:13,995 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845688, now seen corresponding path program 1 times [2024-11-08 19:01:13,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:13,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014295577] [2024-11-08 19:01:13,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:13,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:14,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:01:14,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:01:14,148 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:01:14,148 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014295577] [2024-11-08 19:01:14,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2014295577] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:01:14,148 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:01:14,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:01:14,149 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764892288] [2024-11-08 19:01:14,149 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:01:14,149 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 19:01:14,150 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:14,150 INFO L85 PathProgramCache]: Analyzing trace with hash -169582245, now seen corresponding path program 1 times [2024-11-08 19:01:14,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:14,154 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059674966] [2024-11-08 19:01:14,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:14,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:14,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:01:14,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:01:14,441 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:01:14,441 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059674966] [2024-11-08 19:01:14,441 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1059674966] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:01:14,442 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:01:14,442 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:01:14,442 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [312723428] [2024-11-08 19:01:14,442 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:01:14,443 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:01:14,443 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:01:14,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 19:01:14,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 19:01:14,446 INFO L87 Difference]: Start difference. First operand 116 states and 202 transitions. cyclomatic complexity: 87 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:14,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:01:14,590 INFO L93 Difference]: Finished difference Result 119 states and 204 transitions. [2024-11-08 19:01:14,590 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 204 transitions. [2024-11-08 19:01:14,596 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2024-11-08 19:01:14,597 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 116 states and 161 transitions. [2024-11-08 19:01:14,598 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2024-11-08 19:01:14,598 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2024-11-08 19:01:14,598 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 161 transitions. [2024-11-08 19:01:14,599 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:01:14,599 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 161 transitions. [2024-11-08 19:01:14,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 161 transitions. [2024-11-08 19:01:14,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2024-11-08 19:01:14,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.3879310344827587) internal successors, (161), 115 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:14,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 161 transitions. [2024-11-08 19:01:14,611 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 161 transitions. [2024-11-08 19:01:14,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 19:01:14,616 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 161 transitions. [2024-11-08 19:01:14,616 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 19:01:14,617 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 161 transitions. [2024-11-08 19:01:14,618 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2024-11-08 19:01:14,618 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:01:14,618 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:01:14,623 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:14,623 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:14,624 INFO L745 eck$LassoCheckResult]: Stem: 550#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 551#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 547#L288 assume 0 == ~r1~0; 548#L289 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1; 556#L290 assume ~id1~0 >= 0; 592#L291 assume 0 == ~st1~0; 593#L292 assume ~send1~0 == ~id1~0; 604#L293 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 612#L294 assume ~id2~0 >= 0; 507#L295 assume 0 == ~st2~0; 508#L296 assume ~send2~0 == ~id2~0; 555#L297 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 552#L298 assume ~id3~0 >= 0; 553#L299 assume 0 == ~st3~0; 559#L300 assume ~send3~0 == ~id3~0; 585#L301 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 602#L302 assume ~id4~0 >= 0; 603#L303 assume 0 == ~st4~0; 608#L304 assume ~send4~0 == ~id4~0; 577#L305 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 578#L306 assume ~id5~0 >= 0; 591#L307 assume 0 == ~st5~0; 515#L308 assume ~send5~0 == ~id5~0; 516#L309 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 588#L310 assume ~id6~0 >= 0; 568#L311 assume 0 == ~st6~0; 569#L312 assume ~send6~0 == ~id6~0; 540#L313 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 541#L314 assume ~id1~0 != ~id2~0; 565#L315 assume ~id1~0 != ~id3~0; 566#L316 assume ~id1~0 != ~id4~0; 505#L317 assume ~id1~0 != ~id5~0; 506#L318 assume ~id1~0 != ~id6~0; 615#L319 assume ~id2~0 != ~id3~0; 598#L320 assume ~id2~0 != ~id4~0; 579#L321 assume ~id2~0 != ~id5~0; 580#L322 assume ~id2~0 != ~id6~0; 503#L323 assume ~id3~0 != ~id4~0; 504#L324 assume ~id3~0 != ~id5~0; 523#L325 assume ~id3~0 != ~id6~0; 549#L326 assume ~id4~0 != ~id5~0; 535#L327 assume ~id4~0 != ~id6~0; 536#L328 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 581#L288-1 init_#res#1 := init_~tmp~0#1; 582#init_returnLabel#1 main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 561#L22 assume !(0 == assume_abort_if_not_~cond#1); 562#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 607#L529-3 [2024-11-08 19:01:14,624 INFO L747 eck$LassoCheckResult]: Loop: 607#L529-3 assume main_~i2~0#1 < 12; 610#L529-1 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 613#L84 assume !(0 != ~mode1~0 % 256); 567#L102 assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256); 534#L105-2 ~mode1~0 := 1; 545#L84-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 546#L119 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 570#L122 assume !(node2_~m2~0#1 != ~nomsg~0); 539#L122-1 ~mode2~0 := 0; 527#L119-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 512#L153 assume !(0 != ~mode3~0 % 256); 513#L170 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 572#L173-2 ~mode3~0 := 1; 609#L153-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 614#L187 assume !(0 != ~mode4~0 % 256); 611#L204 assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256); 590#L207-2 ~mode4~0 := 1; 600#L187-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 601#L221 assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0; 594#L224 assume !(node5_~m5~0#1 != ~nomsg~0); 518#L224-1 ~mode5~0 := 0; 573#L221-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 528#L255 assume !(0 != ~mode6~0 % 256); 529#L272 assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256); 563#L275-2 ~mode6~0 := 1; 521#L255-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 500#L461 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 501#L461-1 check_#res#1 := check_~tmp~1#1; 531#check_returnLabel#1 main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 532#L562 assume !(0 == assert_~arg#1 % 256); 599#L557 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1; 607#L529-3 [2024-11-08 19:01:14,625 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:14,625 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 1 times [2024-11-08 19:01:14,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:14,626 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209219562] [2024-11-08 19:01:14,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:14,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:14,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:01:14,723 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:01:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:01:14,854 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:01:14,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:14,855 INFO L85 PathProgramCache]: Analyzing trace with hash -1468671781, now seen corresponding path program 1 times [2024-11-08 19:01:14,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:14,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623810751] [2024-11-08 19:01:14,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:14,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:14,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:01:15,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:01:15,134 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:01:15,134 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [623810751] [2024-11-08 19:01:15,135 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [623810751] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:01:15,135 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:01:15,135 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 19:01:15,135 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [692128222] [2024-11-08 19:01:15,135 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:01:15,136 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 19:01:15,136 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 19:01:15,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 19:01:15,140 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 19:01:15,140 INFO L87 Difference]: Start difference. First operand 116 states and 161 transitions. cyclomatic complexity: 46 Second operand has 5 states, 5 states have (on average 6.2) internal successors, (31), 5 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:15,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 19:01:15,180 INFO L93 Difference]: Finished difference Result 119 states and 163 transitions. [2024-11-08 19:01:15,180 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 163 transitions. [2024-11-08 19:01:15,182 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2024-11-08 19:01:15,184 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 116 states and 159 transitions. [2024-11-08 19:01:15,184 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2024-11-08 19:01:15,184 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2024-11-08 19:01:15,185 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 159 transitions. [2024-11-08 19:01:15,185 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 19:01:15,186 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 159 transitions. [2024-11-08 19:01:15,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 159 transitions. [2024-11-08 19:01:15,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2024-11-08 19:01:15,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.3706896551724137) internal successors, (159), 115 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 19:01:15,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 159 transitions. [2024-11-08 19:01:15,195 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 159 transitions. [2024-11-08 19:01:15,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 19:01:15,196 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 159 transitions. [2024-11-08 19:01:15,196 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 19:01:15,196 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 159 transitions. [2024-11-08 19:01:15,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69 [2024-11-08 19:01:15,197 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 19:01:15,198 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 19:01:15,202 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:15,202 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 19:01:15,203 INFO L745 eck$LassoCheckResult]: Stem: 792#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(48, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0; 793#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 789#L288 assume 0 == ~r1~0; 790#L289 assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1; 798#L290 assume ~id1~0 >= 0; 835#L291 assume 0 == ~st1~0; 836#L292 assume ~send1~0 == ~id1~0; 847#L293 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 855#L294 assume ~id2~0 >= 0; 749#L295 assume 0 == ~st2~0; 750#L296 assume ~send2~0 == ~id2~0; 797#L297 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 794#L298 assume ~id3~0 >= 0; 795#L299 assume 0 == ~st3~0; 801#L300 assume ~send3~0 == ~id3~0; 828#L301 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 845#L302 assume ~id4~0 >= 0; 846#L303 assume 0 == ~st4~0; 851#L304 assume ~send4~0 == ~id4~0; 820#L305 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 821#L306 assume ~id5~0 >= 0; 834#L307 assume 0 == ~st5~0; 757#L308 assume ~send5~0 == ~id5~0; 758#L309 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 831#L310 assume ~id6~0 >= 0; 811#L311 assume 0 == ~st6~0; 812#L312 assume ~send6~0 == ~id6~0; 782#L313 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 783#L314 assume ~id1~0 != ~id2~0; 807#L315 assume ~id1~0 != ~id3~0; 808#L316 assume ~id1~0 != ~id4~0; 747#L317 assume ~id1~0 != ~id5~0; 748#L318 assume ~id1~0 != ~id6~0; 858#L319 assume ~id2~0 != ~id3~0; 841#L320 assume ~id2~0 != ~id4~0; 822#L321 assume ~id2~0 != ~id5~0; 823#L322 assume ~id2~0 != ~id6~0; 745#L323 assume ~id3~0 != ~id4~0; 746#L324 assume ~id3~0 != ~id5~0; 765#L325 assume ~id3~0 != ~id6~0; 791#L326 assume ~id4~0 != ~id5~0; 777#L327 assume ~id4~0 != ~id6~0; 778#L328 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 824#L288-1 init_#res#1 := init_~tmp~0#1; 825#init_returnLabel#1 main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 803#L22 assume !(0 == assume_abort_if_not_~cond#1); 804#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 850#L529-3 [2024-11-08 19:01:15,203 INFO L747 eck$LassoCheckResult]: Loop: 850#L529-3 assume main_~i2~0#1 < 12; 853#L529-1 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 856#L84 assume 0 != ~mode1~0 % 256;~r1~0 := (if (1 + ~r1~0) % 256 <= 127 then (1 + ~r1~0) % 256 else (1 + ~r1~0) % 256 - 256);node1_~m1~0#1 := ~p6_old~0;~p6_old~0 := ~nomsg~0; 848#L88 assume !(node1_~m1~0#1 != ~nomsg~0); 800#L88-1 ~mode1~0 := 0; 787#L84-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 788#L119 assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0; 813#L122 assume !(node2_~m2~0#1 != ~nomsg~0); 781#L122-1 ~mode2~0 := 0; 769#L119-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 754#L153 assume !(0 != ~mode3~0 % 256); 755#L170 assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256); 815#L173-2 ~mode3~0 := 1; 852#L153-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 857#L187 assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0; 817#L190 assume !(node4_~m4~0#1 != ~nomsg~0); 819#L190-1 ~mode4~0 := 0; 843#L187-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 844#L221 assume !(0 != ~mode5~0 % 256); 784#L238 assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256); 785#L241-2 ~mode5~0 := 1; 816#L221-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 770#L255 assume !(0 != ~mode6~0 % 256); 771#L272 assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256); 805#L275-2 ~mode6~0 := 1; 763#L255-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 743#L461 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 744#L462 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 810#L461-1 check_#res#1 := check_~tmp~1#1; 773#check_returnLabel#1 main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 774#L562 assume !(0 == assert_~arg#1 % 256); 842#L557 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1; 850#L529-3 [2024-11-08 19:01:15,204 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:15,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 2 times [2024-11-08 19:01:15,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:15,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595579668] [2024-11-08 19:01:15,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:15,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:15,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:01:15,271 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:01:15,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:01:15,347 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:01:15,349 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:15,349 INFO L85 PathProgramCache]: Analyzing trace with hash 1369936500, now seen corresponding path program 1 times [2024-11-08 19:01:15,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:15,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863437352] [2024-11-08 19:01:15,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:15,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:15,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:01:15,386 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 19:01:15,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 19:01:15,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 19:01:15,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 19:01:15,430 INFO L85 PathProgramCache]: Analyzing trace with hash -1568877323, now seen corresponding path program 1 times [2024-11-08 19:01:15,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 19:01:15,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361618878] [2024-11-08 19:01:15,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 19:01:15,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 19:01:15,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 19:01:15,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 19:01:15,552 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 19:01:15,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361618878] [2024-11-08 19:01:15,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1361618878] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 19:01:15,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 19:01:15,554 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 19:01:15,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87932590] [2024-11-08 19:01:15,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 19:01:18,376 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 19:01:18,376 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 19:01:18,377 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 19:01:18,377 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 19:01:18,377 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 19:01:18,377 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 19:01:18,377 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 19:01:18,378 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 19:01:18,378 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.6.ufo.BOUNDED-12.pals.c_Iteration4_Loop [2024-11-08 19:01:18,378 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 19:01:18,378 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 19:01:18,421 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,433 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,439 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,442 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,445 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,447 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,454 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,472 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,482 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,489 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,492 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,496 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:18,501 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,435 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,446 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,449 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,453 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,455 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,462 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,470 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,480 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,483 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,491 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,493 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:19,495 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 19:01:21,141 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 20