./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 50b0a90f24476d3b8404a11c5a11650cef36326e0b80eb9bfd0bc8b7617d7b0d --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 17:18:31,674 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 17:18:31,788 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 17:18:31,797 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 17:18:31,798 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 17:18:31,843 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 17:18:31,844 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 17:18:31,845 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 17:18:31,846 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 17:18:31,846 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 17:18:31,847 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 17:18:31,848 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 17:18:31,848 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 17:18:31,849 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 17:18:31,849 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 17:18:31,850 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 17:18:31,850 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 17:18:31,851 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 17:18:31,851 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 17:18:31,852 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 17:18:31,852 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 17:18:31,853 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 17:18:31,853 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 17:18:31,854 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 17:18:31,854 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 17:18:31,854 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 17:18:31,855 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 17:18:31,855 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 17:18:31,856 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 17:18:31,856 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 17:18:31,857 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 17:18:31,857 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 17:18:31,857 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 17:18:31,858 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 17:18:31,858 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 17:18:31,859 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 17:18:31,859 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 17:18:31,860 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 17:18:31,860 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 17:18:31,861 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 50b0a90f24476d3b8404a11c5a11650cef36326e0b80eb9bfd0bc8b7617d7b0d [2024-11-08 17:18:32,173 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 17:18:32,204 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 17:18:32,207 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 17:18:32,210 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 17:18:32,211 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 17:18:32,213 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.UNBOUNDED.pals.c Unable to find full path for "g++" [2024-11-08 17:18:34,531 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 17:18:34,793 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 17:18:34,794 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.1.ufo.UNBOUNDED.pals.c [2024-11-08 17:18:34,807 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/data/3bf1e4b6d/178c9edadd4742f6b080ca183c97ffd1/FLAG407c288ae [2024-11-08 17:18:34,835 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/data/3bf1e4b6d/178c9edadd4742f6b080ca183c97ffd1 [2024-11-08 17:18:34,840 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 17:18:34,845 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 17:18:34,847 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 17:18:34,847 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 17:18:34,856 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 17:18:34,857 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 05:18:34" (1/1) ... [2024-11-08 17:18:34,858 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ced7a64 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:34, skipping insertion in model container [2024-11-08 17:18:34,859 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 05:18:34" (1/1) ... [2024-11-08 17:18:34,910 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 17:18:35,273 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 17:18:35,291 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 17:18:35,355 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 17:18:35,380 INFO L204 MainTranslator]: Completed translation [2024-11-08 17:18:35,381 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35 WrapperNode [2024-11-08 17:18:35,381 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 17:18:35,383 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 17:18:35,383 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 17:18:35,383 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 17:18:35,392 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,405 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,448 INFO L138 Inliner]: procedures = 24, calls = 16, calls flagged for inlining = 11, calls inlined = 11, statements flattened = 265 [2024-11-08 17:18:35,448 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 17:18:35,449 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 17:18:35,449 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 17:18:35,450 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 17:18:35,466 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,466 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,470 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,488 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 17:18:35,488 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,488 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,496 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,502 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,505 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,507 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,513 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 17:18:35,514 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 17:18:35,514 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 17:18:35,514 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 17:18:35,515 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (1/1) ... [2024-11-08 17:18:35,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:18:35,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:18:35,569 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:18:35,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_021cb29d-5e7b-4427-b8b0-917006e3e0d6/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 17:18:35,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 17:18:35,616 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 17:18:35,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 17:18:35,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 17:18:35,779 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 17:18:35,782 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 17:18:36,363 INFO L? ?]: Removed 35 outVars from TransFormulas that were not future-live. [2024-11-08 17:18:36,363 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 17:18:36,380 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 17:18:36,381 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-08 17:18:36,382 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 05:18:36 BoogieIcfgContainer [2024-11-08 17:18:36,382 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 17:18:36,383 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 17:18:36,384 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 17:18:36,389 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 17:18:36,390 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:18:36,390 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 05:18:34" (1/3) ... [2024-11-08 17:18:36,392 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@71515dcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 05:18:36, skipping insertion in model container [2024-11-08 17:18:36,392 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:18:36,392 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:18:35" (2/3) ... [2024-11-08 17:18:36,393 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@71515dcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 05:18:36, skipping insertion in model container [2024-11-08 17:18:36,393 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:18:36,394 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 05:18:36" (3/3) ... [2024-11-08 17:18:36,395 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.4.1.ufo.UNBOUNDED.pals.c [2024-11-08 17:18:36,465 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 17:18:36,465 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 17:18:36,465 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 17:18:36,465 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 17:18:36,466 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 17:18:36,466 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 17:18:36,466 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 17:18:36,466 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 17:18:36,471 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 71 states, 70 states have (on average 1.7) internal successors, (119), 70 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:36,492 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 38 [2024-11-08 17:18:36,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:18:36,492 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:18:36,499 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:36,500 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:36,500 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 17:18:36,500 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 71 states, 70 states have (on average 1.7) internal successors, (119), 70 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:36,506 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 38 [2024-11-08 17:18:36,506 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:18:36,506 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:18:36,507 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:36,508 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:36,516 INFO L745 eck$LassoCheckResult]: Stem: 30#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 41#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 62#L169true assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 50#L169-1true init_#res#1 := init_~tmp~0#1; 23#init_returnLabel#1true main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 45#L22true assume !(0 == assume_abort_if_not_~cond#1); 27#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 4#L328-2true [2024-11-08 17:18:36,518 INFO L747 eck$LassoCheckResult]: Loop: 4#L328-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 16#L64true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 71#L64-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 18#L95true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 34#L95-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 48#L120true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 31#L120-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 61#L145true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 49#L145-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 7#L270true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 10#L270-1true check_#res#1 := check_~tmp~1#1; 14#check_returnLabel#1true main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 58#L354true assume !(0 == assert_~arg#1 % 256); 15#L349true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 4#L328-2true [2024-11-08 17:18:36,525 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:36,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1932780748, now seen corresponding path program 1 times [2024-11-08 17:18:36,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:36,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501726410] [2024-11-08 17:18:36,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:36,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:36,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:18:37,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:18:37,065 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:18:37,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501726410] [2024-11-08 17:18:37,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501726410] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:18:37,066 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:18:37,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 17:18:37,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430941208] [2024-11-08 17:18:37,070 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:18:37,075 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:18:37,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:37,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1644434140, now seen corresponding path program 1 times [2024-11-08 17:18:37,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:37,077 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516626923] [2024-11-08 17:18:37,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:37,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:37,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:18:37,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:18:37,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:18:37,451 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516626923] [2024-11-08 17:18:37,452 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [516626923] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:18:37,452 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:18:37,452 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 17:18:37,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714041498] [2024-11-08 17:18:37,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:18:37,454 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 17:18:37,455 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:18:37,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 17:18:37,500 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 17:18:37,503 INFO L87 Difference]: Start difference. First operand has 71 states, 70 states have (on average 1.7) internal successors, (119), 70 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:37,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:18:37,625 INFO L93 Difference]: Finished difference Result 69 states and 113 transitions. [2024-11-08 17:18:37,627 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 113 transitions. [2024-11-08 17:18:37,631 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:18:37,637 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 65 states and 87 transitions. [2024-11-08 17:18:37,638 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2024-11-08 17:18:37,639 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2024-11-08 17:18:37,640 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 87 transitions. [2024-11-08 17:18:37,642 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:18:37,642 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 87 transitions. [2024-11-08 17:18:37,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 87 transitions. [2024-11-08 17:18:37,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2024-11-08 17:18:37,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.3384615384615384) internal successors, (87), 64 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:37,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 87 transitions. [2024-11-08 17:18:37,682 INFO L240 hiAutomatonCegarLoop]: Abstraction has 65 states and 87 transitions. [2024-11-08 17:18:37,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 17:18:37,687 INFO L425 stractBuchiCegarLoop]: Abstraction has 65 states and 87 transitions. [2024-11-08 17:18:37,688 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 17:18:37,688 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 87 transitions. [2024-11-08 17:18:37,690 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:18:37,690 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:18:37,690 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:18:37,691 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:37,692 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:37,692 INFO L745 eck$LassoCheckResult]: Stem: 201#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 202#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 208#L169 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 217#L170 assume ~id1~0 >= 0; 212#L171 assume 0 == ~st1~0; 209#L172 assume ~send1~0 == ~id1~0; 210#L173 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 216#L174 assume ~id2~0 >= 0; 158#L175 assume 0 == ~st2~0; 159#L176 assume ~send2~0 == ~id2~0; 213#L177 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 195#L178 assume ~id3~0 >= 0; 196#L179 assume 0 == ~st3~0; 154#L180 assume ~send3~0 == ~id3~0; 155#L181 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 193#L182 assume ~id4~0 >= 0; 194#L183 assume 0 == ~st4~0; 174#L184 assume ~send4~0 == ~id4~0; 175#L185 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 203#L186 assume ~id1~0 != ~id2~0; 214#L187 assume ~id1~0 != ~id3~0; 176#L188 assume ~id1~0 != ~id4~0; 177#L189 assume ~id2~0 != ~id3~0; 180#L190 assume ~id2~0 != ~id4~0; 166#L191 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 167#L169-1 init_#res#1 := init_~tmp~0#1; 188#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 189#L22 assume !(0 == assume_abort_if_not_~cond#1); 197#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 156#L328-2 [2024-11-08 17:18:37,693 INFO L747 eck$LassoCheckResult]: Loop: 156#L328-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 157#L64 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 182#L64-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 185#L95 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 173#L95-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 204#L120 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 199#L120-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 200#L145 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 207#L145-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 163#L270 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 165#L270-1 check_#res#1 := check_~tmp~1#1; 171#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 178#L354 assume !(0 == assert_~arg#1 % 256); 179#L349 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 156#L328-2 [2024-11-08 17:18:37,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:37,694 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 1 times [2024-11-08 17:18:37,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:37,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353685179] [2024-11-08 17:18:37,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:37,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:37,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:37,738 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:18:37,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:37,813 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:18:37,814 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:37,814 INFO L85 PathProgramCache]: Analyzing trace with hash -1644434140, now seen corresponding path program 2 times [2024-11-08 17:18:37,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:37,820 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382476598] [2024-11-08 17:18:37,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:37,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:37,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:18:38,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:18:38,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:18:38,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382476598] [2024-11-08 17:18:38,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [382476598] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:18:38,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:18:38,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 17:18:38,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358293364] [2024-11-08 17:18:38,183 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:18:38,183 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 17:18:38,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:18:38,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 17:18:38,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 17:18:38,186 INFO L87 Difference]: Start difference. First operand 65 states and 87 transitions. cyclomatic complexity: 23 Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:38,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:18:38,251 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2024-11-08 17:18:38,251 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 68 states and 89 transitions. [2024-11-08 17:18:38,253 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:18:38,258 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 68 states to 65 states and 84 transitions. [2024-11-08 17:18:38,259 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2024-11-08 17:18:38,259 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2024-11-08 17:18:38,259 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 84 transitions. [2024-11-08 17:18:38,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:18:38,260 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 84 transitions. [2024-11-08 17:18:38,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 84 transitions. [2024-11-08 17:18:38,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2024-11-08 17:18:38,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.2923076923076924) internal successors, (84), 64 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:38,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 84 transitions. [2024-11-08 17:18:38,272 INFO L240 hiAutomatonCegarLoop]: Abstraction has 65 states and 84 transitions. [2024-11-08 17:18:38,273 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 17:18:38,274 INFO L425 stractBuchiCegarLoop]: Abstraction has 65 states and 84 transitions. [2024-11-08 17:18:38,274 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 17:18:38,274 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 84 transitions. [2024-11-08 17:18:38,279 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:18:38,279 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:18:38,280 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:18:38,281 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:38,281 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:38,281 INFO L745 eck$LassoCheckResult]: Stem: 342#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 343#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 349#L169 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 358#L170 assume ~id1~0 >= 0; 353#L171 assume 0 == ~st1~0; 350#L172 assume ~send1~0 == ~id1~0; 351#L173 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 357#L174 assume ~id2~0 >= 0; 299#L175 assume 0 == ~st2~0; 300#L176 assume ~send2~0 == ~id2~0; 354#L177 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 336#L178 assume ~id3~0 >= 0; 337#L179 assume 0 == ~st3~0; 295#L180 assume ~send3~0 == ~id3~0; 296#L181 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 334#L182 assume ~id4~0 >= 0; 335#L183 assume 0 == ~st4~0; 315#L184 assume ~send4~0 == ~id4~0; 316#L185 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 344#L186 assume ~id1~0 != ~id2~0; 355#L187 assume ~id1~0 != ~id3~0; 317#L188 assume ~id1~0 != ~id4~0; 318#L189 assume ~id2~0 != ~id3~0; 323#L190 assume ~id2~0 != ~id4~0; 306#L191 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 307#L169-1 init_#res#1 := init_~tmp~0#1; 329#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 330#L22 assume !(0 == assume_abort_if_not_~cond#1); 338#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 297#L328-2 [2024-11-08 17:18:38,282 INFO L747 eck$LassoCheckResult]: Loop: 297#L328-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 298#L64 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 322#L64-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 324#L95 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 314#L95-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 345#L120 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 340#L120-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 341#L145 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 348#L145-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 304#L270 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 305#L271 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 4; 327#$Ultimate##136 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 4;check_~tmp~1#1 := 1; 311#L270-1 check_#res#1 := check_~tmp~1#1; 312#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 319#L354 assume !(0 == assert_~arg#1 % 256); 320#L349 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 297#L328-2 [2024-11-08 17:18:38,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:38,286 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 2 times [2024-11-08 17:18:38,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:38,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [740227473] [2024-11-08 17:18:38,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:38,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:38,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,330 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:18:38,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,362 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:18:38,363 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:38,365 INFO L85 PathProgramCache]: Analyzing trace with hash -1169126988, now seen corresponding path program 1 times [2024-11-08 17:18:38,365 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:38,365 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1089851261] [2024-11-08 17:18:38,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:38,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:38,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:18:38,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:18:38,421 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:18:38,422 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1089851261] [2024-11-08 17:18:38,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1089851261] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:18:38,423 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:18:38,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 17:18:38,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472174268] [2024-11-08 17:18:38,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:18:38,424 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 17:18:38,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:18:38,425 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 17:18:38,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 17:18:38,426 INFO L87 Difference]: Start difference. First operand 65 states and 84 transitions. cyclomatic complexity: 20 Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:38,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:18:38,475 INFO L93 Difference]: Finished difference Result 95 states and 128 transitions. [2024-11-08 17:18:38,475 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 128 transitions. [2024-11-08 17:18:38,477 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 66 [2024-11-08 17:18:38,482 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 95 states and 128 transitions. [2024-11-08 17:18:38,483 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2024-11-08 17:18:38,483 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2024-11-08 17:18:38,483 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 128 transitions. [2024-11-08 17:18:38,484 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:18:38,484 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 128 transitions. [2024-11-08 17:18:38,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 128 transitions. [2024-11-08 17:18:38,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 93. [2024-11-08 17:18:38,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 92 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:18:38,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 125 transitions. [2024-11-08 17:18:38,497 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 125 transitions. [2024-11-08 17:18:38,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 17:18:38,502 INFO L425 stractBuchiCegarLoop]: Abstraction has 93 states and 125 transitions. [2024-11-08 17:18:38,502 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 17:18:38,502 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 125 transitions. [2024-11-08 17:18:38,504 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:18:38,504 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:18:38,504 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:18:38,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:38,505 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:18:38,505 INFO L745 eck$LassoCheckResult]: Stem: 511#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 512#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 518#L169 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 527#L170 assume ~id1~0 >= 0; 522#L171 assume 0 == ~st1~0; 519#L172 assume ~send1~0 == ~id1~0; 520#L173 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 526#L174 assume ~id2~0 >= 0; 465#L175 assume 0 == ~st2~0; 466#L176 assume ~send2~0 == ~id2~0; 523#L177 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 505#L178 assume ~id3~0 >= 0; 506#L179 assume 0 == ~st3~0; 461#L180 assume ~send3~0 == ~id3~0; 462#L181 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 501#L182 assume ~id4~0 >= 0; 502#L183 assume 0 == ~st4~0; 481#L184 assume ~send4~0 == ~id4~0; 482#L185 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 508#L186 assume ~id1~0 != ~id2~0; 524#L187 assume ~id1~0 != ~id3~0; 483#L188 assume ~id1~0 != ~id4~0; 484#L189 assume ~id2~0 != ~id3~0; 487#L190 assume ~id2~0 != ~id4~0; 472#L191 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 473#L169-1 init_#res#1 := init_~tmp~0#1; 496#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 497#L22 assume !(0 == assume_abort_if_not_~cond#1); 503#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 504#L328-2 [2024-11-08 17:18:38,506 INFO L747 eck$LassoCheckResult]: Loop: 504#L328-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 549#L64 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 494#L64-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 545#L95 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 543#L95-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 538#L120 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 535#L120-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 533#L145 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 531#L145-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 530#L270 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 529#L271 assume !((if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 4); 492#L274 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0; 493#$Ultimate##136 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 4;check_~tmp~1#1 := 1; 553#L270-1 check_#res#1 := check_~tmp~1#1; 552#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 551#L354 assume !(0 == assert_~arg#1 % 256); 550#L349 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 504#L328-2 [2024-11-08 17:18:38,506 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:38,506 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 3 times [2024-11-08 17:18:38,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:38,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229250663] [2024-11-08 17:18:38,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:38,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:38,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,575 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:18:38,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,618 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:18:38,620 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:38,620 INFO L85 PathProgramCache]: Analyzing trace with hash -236628298, now seen corresponding path program 1 times [2024-11-08 17:18:38,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:38,621 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771460712] [2024-11-08 17:18:38,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:38,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:38,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,677 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:18:38,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,734 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:18:38,739 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:18:38,739 INFO L85 PathProgramCache]: Analyzing trace with hash -199575792, now seen corresponding path program 1 times [2024-11-08 17:18:38,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:18:38,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [893468860] [2024-11-08 17:18:38,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:18:38,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:18:38,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,815 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:18:38,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:18:38,880 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:18:43,746 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 17:18:43,747 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 17:18:43,747 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 17:18:43,747 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 17:18:43,747 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 17:18:43,748 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:18:43,748 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 17:18:43,748 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 17:18:43,748 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.4.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2024-11-08 17:18:43,748 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 17:18:43,749 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 17:18:43,819 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:43,835 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:43,843 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,008 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,017 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,020 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,024 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,026 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,029 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,032 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,034 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,037 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,040 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,048 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,052 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:46,060 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:18:47,821 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 26