./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9a8265a1502e23b0364b9cd16198377a0ca498fc346156a58eeb954c0e23f901 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 18:34:26,055 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 18:34:26,193 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 18:34:26,203 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 18:34:26,205 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 18:34:26,255 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 18:34:26,256 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 18:34:26,257 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 18:34:26,258 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 18:34:26,259 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 18:34:26,260 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 18:34:26,261 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 18:34:26,261 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 18:34:26,261 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 18:34:26,264 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 18:34:26,264 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 18:34:26,265 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 18:34:26,265 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 18:34:26,265 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 18:34:26,266 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 18:34:26,266 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 18:34:26,270 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 18:34:26,270 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 18:34:26,271 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 18:34:26,271 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 18:34:26,271 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 18:34:26,272 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 18:34:26,272 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 18:34:26,272 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 18:34:26,273 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 18:34:26,273 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 18:34:26,276 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 18:34:26,276 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 18:34:26,277 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 18:34:26,277 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 18:34:26,278 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 18:34:26,278 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 18:34:26,278 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 18:34:26,279 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 18:34:26,280 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9a8265a1502e23b0364b9cd16198377a0ca498fc346156a58eeb954c0e23f901 [2024-11-08 18:34:26,649 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 18:34:26,706 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 18:34:26,717 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 18:34:26,718 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 18:34:26,722 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 18:34:26,724 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c Unable to find full path for "g++" [2024-11-08 18:34:28,824 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 18:34:29,142 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 18:34:29,143 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.BOUNDED-8.pals.c [2024-11-08 18:34:29,159 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/data/7cdb4c20e/5e0636e653e343e792cb7f903dd3c1e6/FLAGfa8960983 [2024-11-08 18:34:29,178 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/data/7cdb4c20e/5e0636e653e343e792cb7f903dd3c1e6 [2024-11-08 18:34:29,181 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 18:34:29,182 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 18:34:29,184 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 18:34:29,184 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 18:34:29,191 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 18:34:29,192 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,194 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5be9ddc8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29, skipping insertion in model container [2024-11-08 18:34:29,194 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,231 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 18:34:29,604 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 18:34:29,625 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 18:34:29,724 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 18:34:29,758 INFO L204 MainTranslator]: Completed translation [2024-11-08 18:34:29,759 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29 WrapperNode [2024-11-08 18:34:29,759 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 18:34:29,761 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 18:34:29,761 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 18:34:29,762 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 18:34:29,772 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,782 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,829 INFO L138 Inliner]: procedures = 22, calls = 15, calls flagged for inlining = 10, calls inlined = 10, statements flattened = 263 [2024-11-08 18:34:29,829 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 18:34:29,832 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 18:34:29,836 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 18:34:29,836 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 18:34:29,853 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,854 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,862 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,883 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 18:34:29,883 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,884 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,897 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,909 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,914 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,917 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,924 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 18:34:29,925 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 18:34:29,925 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 18:34:29,925 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 18:34:29,931 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (1/1) ... [2024-11-08 18:34:29,940 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:34:29,959 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:34:29,977 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:34:29,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_aea1f212-54d5-4189-a16d-0181217c0be4/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 18:34:30,029 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 18:34:30,029 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 18:34:30,030 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 18:34:30,030 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 18:34:30,174 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 18:34:30,177 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 18:34:30,698 INFO L? ?]: Removed 34 outVars from TransFormulas that were not future-live. [2024-11-08 18:34:30,698 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 18:34:30,717 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 18:34:30,718 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-08 18:34:30,718 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:34:30 BoogieIcfgContainer [2024-11-08 18:34:30,718 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 18:34:30,720 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 18:34:30,720 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 18:34:30,725 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 18:34:30,726 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:34:30,726 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 06:34:29" (1/3) ... [2024-11-08 18:34:30,727 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7badc33b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 06:34:30, skipping insertion in model container [2024-11-08 18:34:30,727 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:34:30,727 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:34:29" (2/3) ... [2024-11-08 18:34:30,728 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7badc33b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 06:34:30, skipping insertion in model container [2024-11-08 18:34:30,728 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:34:30,728 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:34:30" (3/3) ... [2024-11-08 18:34:30,730 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.4.ufo.BOUNDED-8.pals.c [2024-11-08 18:34:30,796 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 18:34:30,797 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 18:34:30,797 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 18:34:30,797 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 18:34:30,797 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 18:34:30,797 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 18:34:30,797 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 18:34:30,798 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 18:34:30,803 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 70 states, 69 states have (on average 1.6956521739130435) internal successors, (117), 69 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:30,829 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 37 [2024-11-08 18:34:30,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:34:30,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:34:30,836 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:30,837 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:30,837 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 18:34:30,838 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 70 states, 69 states have (on average 1.6956521739130435) internal successors, (117), 69 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:30,847 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 37 [2024-11-08 18:34:30,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:34:30,848 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:34:30,849 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:30,849 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:30,857 INFO L745 eck$LassoCheckResult]: Stem: 30#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 37#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 14#L161true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 8#L161-1true init_#res#1 := init_~tmp~0#1; 20#init_returnLabel#1true main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 10#L310true assume !(0 == main_~i2~0#1); 4#L310-2true ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 33#L320-3true [2024-11-08 18:34:30,858 INFO L747 eck$LassoCheckResult]: Loop: 33#L320-3true assume main_~i2~0#1 < 8; 24#L320-1true assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 5#L61true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 44#L61-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 54#L87true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 7#L87-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 49#L112true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 60#L112-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 67#L137true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 45#L137-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 61#L262true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 25#L262-1true check_#res#1 := check_~tmp~1#1; 16#check_returnLabel#1true main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 43#L347true assume !(0 == assert_~arg#1 % 256); 35#L342true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 33#L320-3true [2024-11-08 18:34:30,865 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:30,865 INFO L85 PathProgramCache]: Analyzing trace with hash 1932780748, now seen corresponding path program 1 times [2024-11-08 18:34:30,875 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:30,875 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184238846] [2024-11-08 18:34:30,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:30,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:31,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:34:31,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:34:31,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:34:31,229 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184238846] [2024-11-08 18:34:31,229 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [184238846] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:34:31,230 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:34:31,230 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 18:34:31,231 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1321905553] [2024-11-08 18:34:31,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:34:31,240 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:34:31,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:31,243 INFO L85 PathProgramCache]: Analyzing trace with hash -396248587, now seen corresponding path program 1 times [2024-11-08 18:34:31,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:31,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30194607] [2024-11-08 18:34:31,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:31,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:31,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:34:31,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:34:31,729 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:34:31,729 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30194607] [2024-11-08 18:34:31,729 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30194607] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:34:31,729 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:34:31,730 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 18:34:31,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [103003332] [2024-11-08 18:34:31,730 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:34:31,733 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 18:34:31,735 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:34:31,791 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 18:34:31,791 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 18:34:31,794 INFO L87 Difference]: Start difference. First operand has 70 states, 69 states have (on average 1.6956521739130435) internal successors, (117), 69 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:31,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:34:31,945 INFO L93 Difference]: Finished difference Result 108 states and 173 transitions. [2024-11-08 18:34:31,947 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 108 states and 173 transitions. [2024-11-08 18:34:31,951 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 35 [2024-11-08 18:34:31,963 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 108 states to 99 states and 141 transitions. [2024-11-08 18:34:31,965 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2024-11-08 18:34:31,968 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2024-11-08 18:34:31,969 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 141 transitions. [2024-11-08 18:34:31,970 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:34:31,970 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 141 transitions. [2024-11-08 18:34:31,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 141 transitions. [2024-11-08 18:34:32,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 64. [2024-11-08 18:34:32,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.328125) internal successors, (85), 63 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:32,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 85 transitions. [2024-11-08 18:34:32,014 INFO L240 hiAutomatonCegarLoop]: Abstraction has 64 states and 85 transitions. [2024-11-08 18:34:32,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 18:34:32,021 INFO L425 stractBuchiCegarLoop]: Abstraction has 64 states and 85 transitions. [2024-11-08 18:34:32,021 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 18:34:32,022 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 85 transitions. [2024-11-08 18:34:32,023 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 35 [2024-11-08 18:34:32,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:34:32,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:34:32,028 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:32,028 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:32,029 INFO L745 eck$LassoCheckResult]: Stem: 234#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 235#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 215#L161 assume 0 == ~r1~0; 216#L162 assume ~id1~0 >= 0; 237#L163 assume 0 == ~st1~0; 221#L164 assume ~send1~0 == ~id1~0; 210#L165 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 211#L166 assume ~id2~0 >= 0; 222#L167 assume 0 == ~st2~0; 203#L168 assume ~send2~0 == ~id2~0; 204#L169 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 255#L170 assume ~id3~0 >= 0; 242#L171 assume 0 == ~st3~0; 240#L172 assume ~send3~0 == ~id3~0; 241#L173 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 251#L174 assume ~id4~0 >= 0; 196#L175 assume 0 == ~st4~0; 197#L176 assume ~send4~0 == ~id4~0; 243#L177 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 232#L178 assume ~id1~0 != ~id2~0; 233#L179 assume ~id1~0 != ~id3~0; 192#L180 assume ~id1~0 != ~id4~0; 193#L181 assume ~id2~0 != ~id3~0; 227#L182 assume ~id2~0 != ~id4~0; 228#L183 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 205#L161-1 init_#res#1 := init_~tmp~0#1; 206#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 207#L310 assume !(0 == main_~i2~0#1); 194#L310-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 195#L320-3 [2024-11-08 18:34:32,029 INFO L747 eck$LassoCheckResult]: Loop: 195#L320-3 assume main_~i2~0#1 < 8; 226#L320-1 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 198#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 200#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 246#L87 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 201#L87-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 202#L112 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 249#L112-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 253#L137 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 244#L137-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 247#L262 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 213#L262-1 check_#res#1 := check_~tmp~1#1; 219#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 220#L347 assume !(0 == assert_~arg#1 % 256); 238#L342 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 195#L320-3 [2024-11-08 18:34:32,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,030 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 1 times [2024-11-08 18:34:32,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35325597] [2024-11-08 18:34:32,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,093 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:34:32,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,178 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:34:32,180 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,180 INFO L85 PathProgramCache]: Analyzing trace with hash -396248587, now seen corresponding path program 2 times [2024-11-08 18:34:32,181 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,181 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586544707] [2024-11-08 18:34:32,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:34:32,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:34:32,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:34:32,452 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586544707] [2024-11-08 18:34:32,452 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [586544707] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:34:32,452 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:34:32,452 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 18:34:32,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273632124] [2024-11-08 18:34:32,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:34:32,453 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 18:34:32,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:34:32,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 18:34:32,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 18:34:32,454 INFO L87 Difference]: Start difference. First operand 64 states and 85 transitions. cyclomatic complexity: 22 Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:32,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:34:32,505 INFO L93 Difference]: Finished difference Result 67 states and 87 transitions. [2024-11-08 18:34:32,505 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 87 transitions. [2024-11-08 18:34:32,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 35 [2024-11-08 18:34:32,511 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 64 states and 82 transitions. [2024-11-08 18:34:32,512 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 64 [2024-11-08 18:34:32,512 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 64 [2024-11-08 18:34:32,512 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 82 transitions. [2024-11-08 18:34:32,513 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:34:32,513 INFO L218 hiAutomatonCegarLoop]: Abstraction has 64 states and 82 transitions. [2024-11-08 18:34:32,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 82 transitions. [2024-11-08 18:34:32,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 64. [2024-11-08 18:34:32,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.28125) internal successors, (82), 63 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:32,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 82 transitions. [2024-11-08 18:34:32,523 INFO L240 hiAutomatonCegarLoop]: Abstraction has 64 states and 82 transitions. [2024-11-08 18:34:32,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 18:34:32,528 INFO L425 stractBuchiCegarLoop]: Abstraction has 64 states and 82 transitions. [2024-11-08 18:34:32,528 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 18:34:32,528 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 82 transitions. [2024-11-08 18:34:32,529 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 35 [2024-11-08 18:34:32,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:34:32,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:34:32,535 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:32,535 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:32,535 INFO L745 eck$LassoCheckResult]: Stem: 373#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 374#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 353#L161 assume 0 == ~r1~0; 354#L162 assume ~id1~0 >= 0; 376#L163 assume 0 == ~st1~0; 359#L164 assume ~send1~0 == ~id1~0; 349#L165 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 350#L166 assume ~id2~0 >= 0; 360#L167 assume 0 == ~st2~0; 342#L168 assume ~send2~0 == ~id2~0; 343#L169 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 394#L170 assume ~id3~0 >= 0; 381#L171 assume 0 == ~st3~0; 379#L172 assume ~send3~0 == ~id3~0; 380#L173 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 390#L174 assume ~id4~0 >= 0; 335#L175 assume 0 == ~st4~0; 336#L176 assume ~send4~0 == ~id4~0; 382#L177 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 371#L178 assume ~id1~0 != ~id2~0; 372#L179 assume ~id1~0 != ~id3~0; 331#L180 assume ~id1~0 != ~id4~0; 332#L181 assume ~id2~0 != ~id3~0; 366#L182 assume ~id2~0 != ~id4~0; 367#L183 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 344#L161-1 init_#res#1 := init_~tmp~0#1; 345#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 346#L310 assume !(0 == main_~i2~0#1); 333#L310-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 334#L320-3 [2024-11-08 18:34:32,536 INFO L747 eck$LassoCheckResult]: Loop: 334#L320-3 assume main_~i2~0#1 < 8; 364#L320-1 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 337#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 339#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 385#L87 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 340#L87-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 341#L112 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 388#L112-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 392#L137 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 383#L137-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 386#L262 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 393#L263 assume ~r1~0 >= 4; 352#$Ultimate##134 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 365#L262-1 check_#res#1 := check_~tmp~1#1; 357#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 358#L347 assume !(0 == assert_~arg#1 % 256); 377#L342 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 334#L320-3 [2024-11-08 18:34:32,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,536 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 2 times [2024-11-08 18:34:32,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919485379] [2024-11-08 18:34:32,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,586 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:34:32,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,625 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:34:32,626 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,626 INFO L85 PathProgramCache]: Analyzing trace with hash 41313669, now seen corresponding path program 1 times [2024-11-08 18:34:32,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,627 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875723857] [2024-11-08 18:34:32,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:34:32,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:34:32,695 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:34:32,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875723857] [2024-11-08 18:34:32,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1875723857] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:34:32,696 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:34:32,696 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 18:34:32,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471714133] [2024-11-08 18:34:32,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:34:32,697 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 18:34:32,698 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:34:32,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 18:34:32,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 18:34:32,699 INFO L87 Difference]: Start difference. First operand 64 states and 82 transitions. cyclomatic complexity: 19 Second operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:32,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:34:32,732 INFO L93 Difference]: Finished difference Result 93 states and 124 transitions. [2024-11-08 18:34:32,732 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 93 states and 124 transitions. [2024-11-08 18:34:32,733 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 18:34:32,734 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 93 states to 93 states and 124 transitions. [2024-11-08 18:34:32,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 93 [2024-11-08 18:34:32,735 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 93 [2024-11-08 18:34:32,735 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 124 transitions. [2024-11-08 18:34:32,736 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:34:32,736 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 124 transitions. [2024-11-08 18:34:32,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 124 transitions. [2024-11-08 18:34:32,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2024-11-08 18:34:32,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.3333333333333333) internal successors, (124), 92 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:34:32,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 124 transitions. [2024-11-08 18:34:32,742 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 124 transitions. [2024-11-08 18:34:32,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 18:34:32,744 INFO L425 stractBuchiCegarLoop]: Abstraction has 93 states and 124 transitions. [2024-11-08 18:34:32,744 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 18:34:32,744 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 124 transitions. [2024-11-08 18:34:32,745 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 18:34:32,746 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:34:32,746 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:34:32,747 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:32,747 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:34:32,748 INFO L745 eck$LassoCheckResult]: Stem: 536#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 537#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_#t~post23#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 516#L161 assume 0 == ~r1~0; 517#L162 assume ~id1~0 >= 0; 539#L163 assume 0 == ~st1~0; 522#L164 assume ~send1~0 == ~id1~0; 512#L165 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 513#L166 assume ~id2~0 >= 0; 523#L167 assume 0 == ~st2~0; 505#L168 assume ~send2~0 == ~id2~0; 506#L169 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 561#L170 assume ~id3~0 >= 0; 545#L171 assume 0 == ~st3~0; 543#L172 assume ~send3~0 == ~id3~0; 544#L173 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 556#L174 assume ~id4~0 >= 0; 498#L175 assume 0 == ~st4~0; 499#L176 assume ~send4~0 == ~id4~0; 546#L177 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 534#L178 assume ~id1~0 != ~id2~0; 535#L179 assume ~id1~0 != ~id3~0; 494#L180 assume ~id1~0 != ~id4~0; 495#L181 assume ~id2~0 != ~id3~0; 529#L182 assume ~id2~0 != ~id4~0; 530#L183 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 507#L161-1 init_#res#1 := init_~tmp~0#1; 508#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1; 509#L310 assume !(0 == main_~i2~0#1); 496#L310-2 ~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 497#L320-3 [2024-11-08 18:34:32,748 INFO L747 eck$LassoCheckResult]: Loop: 497#L320-3 assume main_~i2~0#1 < 8; 582#L320-1 assume !!(main_~i2~0#1 < 8);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 581#L61 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 553#L61-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 576#L87 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 575#L87-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 572#L112 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 571#L112-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 567#L137 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 565#L137-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 564#L262 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 563#L263 assume !(~r1~0 >= 4); 514#L266 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0; 515#$Ultimate##134 assume ~r1~0 < 4;check_~tmp~1#1 := 1; 586#L262-1 check_#res#1 := check_~tmp~1#1; 585#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 584#L347 assume !(0 == assert_~arg#1 % 256); 583#L342 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post23#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post23#1;havoc main_#t~post23#1; 497#L320-3 [2024-11-08 18:34:32,749 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,749 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 3 times [2024-11-08 18:34:32,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404613738] [2024-11-08 18:34:32,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,774 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:34:32,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,799 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:34:32,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,800 INFO L85 PathProgramCache]: Analyzing trace with hash -1367673601, now seen corresponding path program 1 times [2024-11-08 18:34:32,800 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480901857] [2024-11-08 18:34:32,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:34:32,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,867 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:34:32,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:34:32,868 INFO L85 PathProgramCache]: Analyzing trace with hash -219045915, now seen corresponding path program 1 times [2024-11-08 18:34:32,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:34:32,869 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666403138] [2024-11-08 18:34:32,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:34:32,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:34:32,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,911 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:34:32,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:34:32,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:34:37,981 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:34:37,982 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:34:37,983 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:34:37,983 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:34:37,983 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 18:34:37,983 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:34:37,983 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:34:37,984 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:34:37,984 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.4.ufo.BOUNDED-8.pals.c_Iteration4_Loop [2024-11-08 18:34:37,984 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:34:37,984 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:34:38,069 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,083 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,091 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,096 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,099 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,102 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,106 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,109 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,112 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,118 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,121 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,124 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,127 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,136 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,144 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,150 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:38,159 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:40,249 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:34:41,982 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 25