./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 52f795f47ad9dd0b1b0499f649b5f623fed211e53433ed6d87534c63dbfae98b --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 17:42:50,360 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 17:42:50,420 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 17:42:50,425 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 17:42:50,426 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 17:42:50,453 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 17:42:50,453 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 17:42:50,454 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 17:42:50,454 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 17:42:50,455 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 17:42:50,456 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 17:42:50,456 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 17:42:50,456 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 17:42:50,457 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 17:42:50,457 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 17:42:50,458 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 17:42:50,458 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 17:42:50,459 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 17:42:50,459 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 17:42:50,459 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 17:42:50,460 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 17:42:50,464 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 17:42:50,464 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 17:42:50,464 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 17:42:50,465 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 17:42:50,465 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 17:42:50,465 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 17:42:50,466 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 17:42:50,466 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 17:42:50,466 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 17:42:50,467 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 17:42:50,467 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 17:42:50,471 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 17:42:50,472 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 17:42:50,472 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 17:42:50,472 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 17:42:50,473 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 17:42:50,473 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 17:42:50,474 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 17:42:50,474 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 52f795f47ad9dd0b1b0499f649b5f623fed211e53433ed6d87534c63dbfae98b [2024-11-08 17:42:50,756 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 17:42:50,786 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 17:42:50,789 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 17:42:50,792 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 17:42:50,792 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 17:42:50,794 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.UNBOUNDED.pals.c Unable to find full path for "g++" [2024-11-08 17:42:52,879 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 17:42:53,104 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 17:42:53,105 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/sv-benchmarks/c/seq-mthreaded/pals_lcr.4.ufo.UNBOUNDED.pals.c [2024-11-08 17:42:53,115 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/data/4756ac00b/5451458e5f9043169f1f9f82dc6b37cf/FLAG293cd3b0e [2024-11-08 17:42:53,465 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/data/4756ac00b/5451458e5f9043169f1f9f82dc6b37cf [2024-11-08 17:42:53,468 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 17:42:53,470 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 17:42:53,471 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 17:42:53,471 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 17:42:53,477 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 17:42:53,478 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,479 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@36835fb9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53, skipping insertion in model container [2024-11-08 17:42:53,480 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,513 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 17:42:53,782 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 17:42:53,796 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 17:42:53,843 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 17:42:53,863 INFO L204 MainTranslator]: Completed translation [2024-11-08 17:42:53,864 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53 WrapperNode [2024-11-08 17:42:53,864 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 17:42:53,865 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 17:42:53,865 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 17:42:53,866 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 17:42:53,873 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,882 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,912 INFO L138 Inliner]: procedures = 24, calls = 16, calls flagged for inlining = 11, calls inlined = 11, statements flattened = 264 [2024-11-08 17:42:53,916 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 17:42:53,917 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 17:42:53,917 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 17:42:53,918 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 17:42:53,930 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,930 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,938 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,956 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 17:42:53,956 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,957 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,968 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,980 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,982 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,983 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:53,990 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 17:42:53,992 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 17:42:53,992 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 17:42:53,992 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 17:42:53,993 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (1/1) ... [2024-11-08 17:42:54,001 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:42:54,016 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 17:42:54,030 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 17:42:54,033 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_877495d4-8852-4edb-8b66-90eb48b50313/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 17:42:54,060 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 17:42:54,060 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 17:42:54,061 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 17:42:54,061 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 17:42:54,140 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 17:42:54,142 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 17:42:54,639 INFO L? ?]: Removed 35 outVars from TransFormulas that were not future-live. [2024-11-08 17:42:54,639 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 17:42:54,657 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 17:42:54,657 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-08 17:42:54,658 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 05:42:54 BoogieIcfgContainer [2024-11-08 17:42:54,658 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 17:42:54,659 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 17:42:54,659 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 17:42:54,662 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 17:42:54,663 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:42:54,663 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 05:42:53" (1/3) ... [2024-11-08 17:42:54,664 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3d93db71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 05:42:54, skipping insertion in model container [2024-11-08 17:42:54,664 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:42:54,665 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 05:42:53" (2/3) ... [2024-11-08 17:42:54,665 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3d93db71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 05:42:54, skipping insertion in model container [2024-11-08 17:42:54,665 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 17:42:54,665 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 05:42:54" (3/3) ... [2024-11-08 17:42:54,667 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.4.ufo.UNBOUNDED.pals.c [2024-11-08 17:42:54,724 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 17:42:54,724 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 17:42:54,724 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 17:42:54,725 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 17:42:54,725 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 17:42:54,725 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 17:42:54,725 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 17:42:54,725 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 17:42:54,731 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 71 states, 70 states have (on average 1.7) internal successors, (119), 70 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:54,756 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 38 [2024-11-08 17:42:54,756 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:42:54,756 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:42:54,764 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:54,765 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:54,765 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 17:42:54,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 71 states, 70 states have (on average 1.7) internal successors, (119), 70 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:54,770 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 38 [2024-11-08 17:42:54,770 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:42:54,771 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:42:54,772 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:54,773 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:54,784 INFO L745 eck$LassoCheckResult]: Stem: 31#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 41#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 16#L167true assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0; 49#L167-1true init_#res#1 := init_~tmp~0#1; 23#init_returnLabel#1true main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 44#L22true assume !(0 == assume_abort_if_not_~cond#1); 29#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 11#L326-2true [2024-11-08 17:42:54,785 INFO L747 eck$LassoCheckResult]: Loop: 11#L326-2true assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 17#L64true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 71#L64-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 37#L93true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 32#L93-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 24#L118true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 57#L118-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 35#L143true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 10#L143-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 21#L268true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 4#L268-1true check_#res#1 := check_~tmp~1#1; 14#check_returnLabel#1true main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 38#L352true assume !(0 == assert_~arg#1 % 256); 48#L347true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 11#L326-2true [2024-11-08 17:42:54,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:54,798 INFO L85 PathProgramCache]: Analyzing trace with hash 1932780748, now seen corresponding path program 1 times [2024-11-08 17:42:54,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:54,810 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019326145] [2024-11-08 17:42:54,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:54,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:54,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:42:55,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:42:55,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:42:55,184 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019326145] [2024-11-08 17:42:55,185 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019326145] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:42:55,185 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:42:55,186 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 17:42:55,189 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837071728] [2024-11-08 17:42:55,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:42:55,195 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 17:42:55,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:55,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1644434140, now seen corresponding path program 1 times [2024-11-08 17:42:55,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:55,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588019688] [2024-11-08 17:42:55,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:55,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:55,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:42:55,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:42:55,596 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:42:55,597 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588019688] [2024-11-08 17:42:55,597 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [588019688] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:42:55,597 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:42:55,597 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 17:42:55,598 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1575829049] [2024-11-08 17:42:55,598 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:42:55,599 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 17:42:55,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:42:55,627 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 17:42:55,628 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 17:42:55,630 INFO L87 Difference]: Start difference. First operand has 71 states, 70 states have (on average 1.7) internal successors, (119), 70 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:55,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:42:55,717 INFO L93 Difference]: Finished difference Result 69 states and 113 transitions. [2024-11-08 17:42:55,719 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 113 transitions. [2024-11-08 17:42:55,722 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:42:55,727 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 65 states and 87 transitions. [2024-11-08 17:42:55,728 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2024-11-08 17:42:55,728 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2024-11-08 17:42:55,729 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 87 transitions. [2024-11-08 17:42:55,730 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:42:55,730 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 87 transitions. [2024-11-08 17:42:55,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 87 transitions. [2024-11-08 17:42:55,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2024-11-08 17:42:55,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.3384615384615384) internal successors, (87), 64 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:55,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 87 transitions. [2024-11-08 17:42:55,757 INFO L240 hiAutomatonCegarLoop]: Abstraction has 65 states and 87 transitions. [2024-11-08 17:42:55,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 17:42:55,764 INFO L425 stractBuchiCegarLoop]: Abstraction has 65 states and 87 transitions. [2024-11-08 17:42:55,765 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 17:42:55,765 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 87 transitions. [2024-11-08 17:42:55,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:42:55,767 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:42:55,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:42:55,769 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:55,769 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:55,769 INFO L745 eck$LassoCheckResult]: Stem: 200#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 201#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 183#L167 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 162#L168 assume ~id1~0 >= 0; 163#L169 assume 0 == ~st1~0; 217#L170 assume ~send1~0 == ~id1~0; 210#L171 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 208#L172 assume ~id2~0 >= 0; 209#L173 assume 0 == ~st2~0; 216#L174 assume ~send2~0 == ~id2~0; 160#L175 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 161#L176 assume ~id3~0 >= 0; 213#L177 assume 0 == ~st3~0; 196#L178 assume ~send3~0 == ~id3~0; 197#L179 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 156#L180 assume ~id4~0 >= 0; 157#L181 assume 0 == ~st4~0; 194#L182 assume ~send4~0 == ~id4~0; 195#L183 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 173#L184 assume ~id1~0 != ~id2~0; 174#L185 assume ~id1~0 != ~id3~0; 202#L186 assume ~id1~0 != ~id4~0; 214#L187 assume ~id2~0 != ~id3~0; 175#L188 assume ~id2~0 != ~id4~0; 176#L189 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 184#L167-1 init_#res#1 := init_~tmp~0#1; 188#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 189#L22 assume !(0 == assume_abort_if_not_~cond#1); 198#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 171#L326-2 [2024-11-08 17:42:55,770 INFO L747 eck$LassoCheckResult]: Loop: 171#L326-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 172#L64 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 186#L64-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 204#L93 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 159#L93-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 190#L118 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 191#L118-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 203#L143 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 169#L143-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 170#L268 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1);check_~tmp~1#1 := 0; 154#L268-1 check_#res#1 := check_~tmp~1#1; 155#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 177#L352 assume !(0 == assert_~arg#1 % 256); 206#L347 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 171#L326-2 [2024-11-08 17:42:55,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:55,770 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 1 times [2024-11-08 17:42:55,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:55,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610790977] [2024-11-08 17:42:55,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:55,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:55,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:55,846 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:42:55,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:55,927 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:42:55,928 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:55,929 INFO L85 PathProgramCache]: Analyzing trace with hash -1644434140, now seen corresponding path program 2 times [2024-11-08 17:42:55,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:55,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927210580] [2024-11-08 17:42:55,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:55,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:55,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:42:56,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:42:56,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:42:56,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927210580] [2024-11-08 17:42:56,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [927210580] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:42:56,180 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:42:56,180 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 17:42:56,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321560264] [2024-11-08 17:42:56,181 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:42:56,181 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 17:42:56,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:42:56,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 17:42:56,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 17:42:56,182 INFO L87 Difference]: Start difference. First operand 65 states and 87 transitions. cyclomatic complexity: 23 Second operand has 5 states, 5 states have (on average 2.8) internal successors, (14), 5 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:56,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:42:56,229 INFO L93 Difference]: Finished difference Result 68 states and 89 transitions. [2024-11-08 17:42:56,229 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 68 states and 89 transitions. [2024-11-08 17:42:56,233 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:42:56,234 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 68 states to 65 states and 84 transitions. [2024-11-08 17:42:56,235 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2024-11-08 17:42:56,235 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2024-11-08 17:42:56,235 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 84 transitions. [2024-11-08 17:42:56,236 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:42:56,236 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 84 transitions. [2024-11-08 17:42:56,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 84 transitions. [2024-11-08 17:42:56,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2024-11-08 17:42:56,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.2923076923076924) internal successors, (84), 64 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:56,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 84 transitions. [2024-11-08 17:42:56,242 INFO L240 hiAutomatonCegarLoop]: Abstraction has 65 states and 84 transitions. [2024-11-08 17:42:56,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 17:42:56,244 INFO L425 stractBuchiCegarLoop]: Abstraction has 65 states and 84 transitions. [2024-11-08 17:42:56,244 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 17:42:56,244 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 84 transitions. [2024-11-08 17:42:56,245 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 36 [2024-11-08 17:42:56,245 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:42:56,245 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:42:56,246 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:56,247 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:56,247 INFO L745 eck$LassoCheckResult]: Stem: 341#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 342#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 326#L167 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 303#L168 assume ~id1~0 >= 0; 304#L169 assume 0 == ~st1~0; 358#L170 assume ~send1~0 == ~id1~0; 351#L171 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 349#L172 assume ~id2~0 >= 0; 350#L173 assume 0 == ~st2~0; 357#L174 assume ~send2~0 == ~id2~0; 301#L175 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 302#L176 assume ~id3~0 >= 0; 354#L177 assume 0 == ~st3~0; 337#L178 assume ~send3~0 == ~id3~0; 338#L179 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 297#L180 assume ~id4~0 >= 0; 298#L181 assume 0 == ~st4~0; 335#L182 assume ~send4~0 == ~id4~0; 336#L183 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 314#L184 assume ~id1~0 != ~id2~0; 315#L185 assume ~id1~0 != ~id3~0; 343#L186 assume ~id1~0 != ~id4~0; 355#L187 assume ~id2~0 != ~id3~0; 316#L188 assume ~id2~0 != ~id4~0; 317#L189 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 327#L167-1 init_#res#1 := init_~tmp~0#1; 329#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 330#L22 assume !(0 == assume_abort_if_not_~cond#1); 339#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 312#L326-2 [2024-11-08 17:42:56,247 INFO L747 eck$LassoCheckResult]: Loop: 312#L326-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 313#L64 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 322#L64-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 345#L93 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 300#L93-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 331#L118 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 332#L118-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 344#L143 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 310#L143-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 311#L268 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 328#L269 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 4; 353#$Ultimate##136 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 4;check_~tmp~1#1 := 1; 295#L268-1 check_#res#1 := check_~tmp~1#1; 296#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 318#L352 assume !(0 == assert_~arg#1 % 256); 347#L347 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 312#L326-2 [2024-11-08 17:42:56,248 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:56,248 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 2 times [2024-11-08 17:42:56,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:56,248 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085773612] [2024-11-08 17:42:56,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:56,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:56,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,272 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:42:56,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,298 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:42:56,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:56,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1169126988, now seen corresponding path program 1 times [2024-11-08 17:42:56,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:56,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660429557] [2024-11-08 17:42:56,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:56,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:56,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 17:42:56,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 17:42:56,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 17:42:56,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660429557] [2024-11-08 17:42:56,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [660429557] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 17:42:56,336 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 17:42:56,336 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 17:42:56,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785688381] [2024-11-08 17:42:56,336 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 17:42:56,337 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 17:42:56,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 17:42:56,337 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 17:42:56,337 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 17:42:56,338 INFO L87 Difference]: Start difference. First operand 65 states and 84 transitions. cyclomatic complexity: 20 Second operand has 3 states, 3 states have (on average 5.333333333333333) internal successors, (16), 3 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:56,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 17:42:56,374 INFO L93 Difference]: Finished difference Result 95 states and 128 transitions. [2024-11-08 17:42:56,374 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 128 transitions. [2024-11-08 17:42:56,376 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 66 [2024-11-08 17:42:56,377 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 95 states and 128 transitions. [2024-11-08 17:42:56,377 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 95 [2024-11-08 17:42:56,377 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 95 [2024-11-08 17:42:56,378 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 128 transitions. [2024-11-08 17:42:56,378 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 17:42:56,378 INFO L218 hiAutomatonCegarLoop]: Abstraction has 95 states and 128 transitions. [2024-11-08 17:42:56,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 128 transitions. [2024-11-08 17:42:56,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 93. [2024-11-08 17:42:56,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.3440860215053763) internal successors, (125), 92 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 17:42:56,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 125 transitions. [2024-11-08 17:42:56,384 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 125 transitions. [2024-11-08 17:42:56,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 17:42:56,385 INFO L425 stractBuchiCegarLoop]: Abstraction has 93 states and 125 transitions. [2024-11-08 17:42:56,385 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 17:42:56,386 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 125 transitions. [2024-11-08 17:42:56,386 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2024-11-08 17:42:56,387 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 17:42:56,387 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 17:42:56,388 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:56,388 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 17:42:56,388 INFO L745 eck$LassoCheckResult]: Stem: 510#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(32, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0; 511#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~ret21#1, main_#t~ret22#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 493#L167 assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296); 469#L168 assume ~id1~0 >= 0; 470#L169 assume 0 == ~st1~0; 527#L170 assume ~send1~0 == ~id1~0; 519#L171 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 517#L172 assume ~id2~0 >= 0; 518#L173 assume 0 == ~st2~0; 526#L174 assume ~send2~0 == ~id2~0; 467#L175 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 468#L176 assume ~id3~0 >= 0; 522#L177 assume 0 == ~st3~0; 506#L178 assume ~send3~0 == ~id3~0; 507#L179 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 463#L180 assume ~id4~0 >= 0; 464#L181 assume 0 == ~st4~0; 502#L182 assume ~send4~0 == ~id4~0; 503#L183 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 480#L184 assume ~id1~0 != ~id2~0; 481#L185 assume ~id1~0 != ~id3~0; 508#L186 assume ~id1~0 != ~id4~0; 523#L187 assume ~id2~0 != ~id3~0; 482#L188 assume ~id2~0 != ~id4~0; 483#L189 assume ~id3~0 != ~id4~0;init_~tmp~0#1 := 1; 487#L167-1 init_#res#1 := init_~tmp~0#1; 496#init_returnLabel#1 main_#t~ret21#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret21#1;havoc main_#t~ret21#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 497#L22 assume !(0 == assume_abort_if_not_~cond#1); 504#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 505#L326-2 [2024-11-08 17:42:56,388 INFO L747 eck$LassoCheckResult]: Loop: 505#L326-2 assume !false;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 549#L64 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 495#L64-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 545#L93 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 543#L93-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 538#L118 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 537#L118-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 533#L143 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 531#L143-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 530#L268 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 <= 1; 529#L269 assume !((if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 4); 520#L272 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0; 521#$Ultimate##136 assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 4;check_~tmp~1#1 := 1; 553#L268-1 check_#res#1 := check_~tmp~1#1; 552#check_returnLabel#1 main_#t~ret22#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret22#1;havoc main_#t~ret22#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 551#L352 assume !(0 == assert_~arg#1 % 256); 550#L347 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true; 505#L326-2 [2024-11-08 17:42:56,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:56,389 INFO L85 PathProgramCache]: Analyzing trace with hash -24004505, now seen corresponding path program 3 times [2024-11-08 17:42:56,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:56,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517755547] [2024-11-08 17:42:56,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:56,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:56,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,411 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:42:56,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,433 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:42:56,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:56,434 INFO L85 PathProgramCache]: Analyzing trace with hash -236628298, now seen corresponding path program 1 times [2024-11-08 17:42:56,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:56,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867372698] [2024-11-08 17:42:56,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:56,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:56,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,462 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:42:56,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,489 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:42:56,490 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 17:42:56,490 INFO L85 PathProgramCache]: Analyzing trace with hash -199575792, now seen corresponding path program 1 times [2024-11-08 17:42:56,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 17:42:56,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985803705] [2024-11-08 17:42:56,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 17:42:56,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 17:42:56,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,544 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 17:42:56,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 17:42:56,585 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 17:43:00,304 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 17:43:00,304 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 17:43:00,305 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 17:43:00,305 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 17:43:00,305 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 17:43:00,305 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 17:43:00,305 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 17:43:00,305 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 17:43:00,306 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.4.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2024-11-08 17:43:00,306 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 17:43:00,306 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 17:43:00,345 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,360 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,366 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,369 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,372 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,375 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,377 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,379 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,384 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,386 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,391 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,397 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,402 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:00,408 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:02,211 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 17:43:03,835 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 25