./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f7497e4203b86f15acb74ef94ae3bce6255aa8233294110bb99f24cde0725dc7 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 18:56:46,391 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 18:56:46,494 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 18:56:46,505 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 18:56:46,506 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 18:56:46,550 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 18:56:46,551 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 18:56:46,552 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 18:56:46,553 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 18:56:46,554 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 18:56:46,555 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 18:56:46,556 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 18:56:46,556 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 18:56:46,559 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 18:56:46,559 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 18:56:46,560 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 18:56:46,560 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 18:56:46,561 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 18:56:46,561 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 18:56:46,561 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 18:56:46,566 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 18:56:46,567 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 18:56:46,567 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 18:56:46,567 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 18:56:46,567 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 18:56:46,568 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 18:56:46,568 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 18:56:46,568 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 18:56:46,569 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 18:56:46,569 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 18:56:46,569 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 18:56:46,569 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 18:56:46,572 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 18:56:46,572 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 18:56:46,572 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 18:56:46,573 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 18:56:46,573 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 18:56:46,573 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 18:56:46,574 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 18:56:46,574 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f7497e4203b86f15acb74ef94ae3bce6255aa8233294110bb99f24cde0725dc7 [2024-11-08 18:56:46,871 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 18:56:46,903 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 18:56:46,906 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 18:56:46,908 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 18:56:46,908 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 18:56:46,909 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c Unable to find full path for "g++" [2024-11-08 18:56:49,053 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 18:56:49,267 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 18:56:49,268 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c [2024-11-08 18:56:49,287 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/data/b6a7fe2be/3a67dbb7586748eda75a4088482cacc6/FLAGeda1e8f0b [2024-11-08 18:56:49,305 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/data/b6a7fe2be/3a67dbb7586748eda75a4088482cacc6 [2024-11-08 18:56:49,309 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 18:56:49,312 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 18:56:49,313 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 18:56:49,315 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 18:56:49,323 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 18:56:49,324 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,325 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1656999f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49, skipping insertion in model container [2024-11-08 18:56:49,329 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,366 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 18:56:49,666 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 18:56:49,684 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 18:56:49,749 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 18:56:49,783 INFO L204 MainTranslator]: Completed translation [2024-11-08 18:56:49,784 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49 WrapperNode [2024-11-08 18:56:49,784 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 18:56:49,785 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 18:56:49,786 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 18:56:49,787 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 18:56:49,795 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,805 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,841 INFO L138 Inliner]: procedures = 24, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 320 [2024-11-08 18:56:49,841 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 18:56:49,842 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 18:56:49,842 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 18:56:49,842 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 18:56:49,856 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,860 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,867 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,898 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 18:56:49,902 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,902 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,920 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,930 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,935 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,937 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,945 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 18:56:49,946 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 18:56:49,946 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 18:56:49,946 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 18:56:49,948 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (1/1) ... [2024-11-08 18:56:49,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:56:49,971 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 18:56:49,990 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 18:56:49,995 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c85968d2-e88a-47f2-9130-a59e4bc6ae74/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 18:56:50,036 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 18:56:50,036 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 18:56:50,037 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 18:56:50,037 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 18:56:50,193 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 18:56:50,195 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 18:56:50,839 INFO L? ?]: Removed 41 outVars from TransFormulas that were not future-live. [2024-11-08 18:56:50,839 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 18:56:50,860 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 18:56:50,861 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-08 18:56:50,861 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:56:50 BoogieIcfgContainer [2024-11-08 18:56:50,861 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 18:56:50,863 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 18:56:50,863 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 18:56:50,868 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 18:56:50,869 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:56:50,869 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 06:56:49" (1/3) ... [2024-11-08 18:56:50,870 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@191b9d0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 06:56:50, skipping insertion in model container [2024-11-08 18:56:50,871 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:56:50,871 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:56:49" (2/3) ... [2024-11-08 18:56:50,871 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@191b9d0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 06:56:50, skipping insertion in model container [2024-11-08 18:56:50,872 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 18:56:50,872 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:56:50" (3/3) ... [2024-11-08 18:56:50,875 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.5.ufo.BOUNDED-10.pals.c [2024-11-08 18:56:50,949 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 18:56:50,949 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 18:56:50,950 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 18:56:50,950 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 18:56:50,950 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 18:56:50,950 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 18:56:50,950 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 18:56:50,951 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 18:56:50,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 84 states, 83 states have (on average 1.7228915662650603) internal successors, (143), 83 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:50,984 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 43 [2024-11-08 18:56:50,984 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:56:50,984 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:56:50,994 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:50,994 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:50,995 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 18:56:50,995 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 84 states, 83 states have (on average 1.7228915662650603) internal successors, (143), 83 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:51,007 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 43 [2024-11-08 18:56:51,010 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:56:51,010 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:56:51,012 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:51,012 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:51,029 INFO L745 eck$LassoCheckResult]: Stem: 34#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 46#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 79#L196true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 82#L196-1true init_#res#1 := init_~tmp~0#1; 29#init_returnLabel#1true main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 51#L22true assume !(0 == assume_abort_if_not_~cond#1); 33#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 41#L393-3true [2024-11-08 18:56:51,030 INFO L747 eck$LassoCheckResult]: Loop: 41#L393-3true assume main_~i2~0#1 < 10; 72#L393-1true assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 7#L71true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 71#L71-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 10#L97true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 65#L97-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 55#L122true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 45#L122-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 56#L147true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 22#L147-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 47#L172true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 62#L172-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 37#L329true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 59#L329-1true check_#res#1 := check_~tmp~1#1; 20#check_returnLabel#1true main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 23#L423true assume !(0 == assert_~arg#1 % 256); 17#L418true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 41#L393-3true [2024-11-08 18:56:51,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:51,046 INFO L85 PathProgramCache]: Analyzing trace with hash 1978587388, now seen corresponding path program 1 times [2024-11-08 18:56:51,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:51,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192059200] [2024-11-08 18:56:51,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:51,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:51,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:56:51,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:56:51,606 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:56:51,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [192059200] [2024-11-08 18:56:51,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [192059200] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:56:51,608 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:56:51,609 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 18:56:51,611 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547822130] [2024-11-08 18:56:51,612 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:56:51,617 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 18:56:51,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:51,619 INFO L85 PathProgramCache]: Analyzing trace with hash 1343589980, now seen corresponding path program 1 times [2024-11-08 18:56:51,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:51,620 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593163137] [2024-11-08 18:56:51,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:51,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:51,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:56:52,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:56:52,164 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:56:52,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593163137] [2024-11-08 18:56:52,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593163137] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:56:52,165 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:56:52,165 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 18:56:52,165 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [941754825] [2024-11-08 18:56:52,165 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:56:52,169 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 18:56:52,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:56:52,214 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 18:56:52,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 18:56:52,218 INFO L87 Difference]: Start difference. First operand has 84 states, 83 states have (on average 1.7228915662650603) internal successors, (143), 83 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:52,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:56:52,359 INFO L93 Difference]: Finished difference Result 86 states and 142 transitions. [2024-11-08 18:56:52,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 142 transitions. [2024-11-08 18:56:52,364 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2024-11-08 18:56:52,370 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 78 states and 103 transitions. [2024-11-08 18:56:52,371 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 78 [2024-11-08 18:56:52,372 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 78 [2024-11-08 18:56:52,372 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78 states and 103 transitions. [2024-11-08 18:56:52,373 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:56:52,373 INFO L218 hiAutomatonCegarLoop]: Abstraction has 78 states and 103 transitions. [2024-11-08 18:56:52,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states and 103 transitions. [2024-11-08 18:56:52,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2024-11-08 18:56:52,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.3205128205128205) internal successors, (103), 77 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:52,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 103 transitions. [2024-11-08 18:56:52,402 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 103 transitions. [2024-11-08 18:56:52,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 18:56:52,407 INFO L425 stractBuchiCegarLoop]: Abstraction has 78 states and 103 transitions. [2024-11-08 18:56:52,407 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 18:56:52,407 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 103 transitions. [2024-11-08 18:56:52,409 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2024-11-08 18:56:52,409 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:56:52,409 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:56:52,410 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:52,411 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:52,411 INFO L745 eck$LassoCheckResult]: Stem: 237#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 238#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 248#L196 assume 0 == ~r1~0; 203#L197 assume ~id1~0 >= 0; 190#L198 assume 0 == ~st1~0; 191#L199 assume ~send1~0 == ~id1~0; 242#L200 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 243#L201 assume ~id2~0 >= 0; 225#L202 assume 0 == ~st2~0; 226#L203 assume ~send2~0 == ~id2~0; 233#L204 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 206#L205 assume ~id3~0 >= 0; 207#L206 assume 0 == ~st3~0; 192#L207 assume ~send3~0 == ~id3~0; 193#L208 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 246#L209 assume ~id4~0 >= 0; 208#L210 assume 0 == ~st4~0; 209#L211 assume ~send4~0 == ~id4~0; 199#L212 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 200#L213 assume ~id5~0 >= 0; 258#L214 assume 0 == ~st5~0; 259#L215 assume ~send5~0 == ~id5~0; 244#L216 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 229#L217 assume ~id1~0 != ~id2~0; 230#L218 assume ~id1~0 != ~id3~0; 250#L219 assume ~id1~0 != ~id4~0; 261#L220 assume ~id1~0 != ~id5~0; 220#L221 assume ~id2~0 != ~id3~0; 218#L222 assume ~id2~0 != ~id4~0; 219#L223 assume ~id2~0 != ~id5~0; 212#L224 assume ~id3~0 != ~id4~0; 213#L225 assume ~id3~0 != ~id5~0; 210#L226 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 211#L196-1 init_#res#1 := init_~tmp~0#1; 231#init_returnLabel#1 main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 232#L22 assume !(0 == assume_abort_if_not_~cond#1); 235#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 215#L393-3 [2024-11-08 18:56:52,411 INFO L747 eck$LassoCheckResult]: Loop: 215#L393-3 assume main_~i2~0#1 < 10; 245#L393-1 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 194#L71 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 196#L71-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 201#L97 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 198#L97-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 252#L122 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 228#L122-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 247#L147 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 205#L147-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 223#L172 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 249#L172-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 239#L329 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0; 241#L329-1 check_#res#1 := check_~tmp~1#1; 221#check_returnLabel#1 main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 222#L423 assume !(0 == assert_~arg#1 % 256); 214#L418 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 215#L393-3 [2024-11-08 18:56:52,412 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:52,412 INFO L85 PathProgramCache]: Analyzing trace with hash -1992034189, now seen corresponding path program 1 times [2024-11-08 18:56:52,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:52,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723295753] [2024-11-08 18:56:52,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:52,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:52,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:52,458 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:56:52,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:52,544 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:56:52,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:52,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1343589980, now seen corresponding path program 2 times [2024-11-08 18:56:52,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:52,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406705112] [2024-11-08 18:56:52,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:52,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:52,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:56:52,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:56:52,884 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:56:52,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406705112] [2024-11-08 18:56:52,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406705112] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:56:52,886 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:56:52,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 18:56:52,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122122409] [2024-11-08 18:56:52,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:56:52,888 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 18:56:52,888 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:56:52,888 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 18:56:52,889 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 18:56:52,889 INFO L87 Difference]: Start difference. First operand 78 states and 103 transitions. cyclomatic complexity: 26 Second operand has 5 states, 5 states have (on average 3.4) internal successors, (17), 5 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:52,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:56:52,945 INFO L93 Difference]: Finished difference Result 81 states and 105 transitions. [2024-11-08 18:56:52,945 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 105 transitions. [2024-11-08 18:56:52,947 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2024-11-08 18:56:52,948 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 78 states and 100 transitions. [2024-11-08 18:56:52,953 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 78 [2024-11-08 18:56:52,953 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 78 [2024-11-08 18:56:52,954 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78 states and 100 transitions. [2024-11-08 18:56:52,954 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:56:52,954 INFO L218 hiAutomatonCegarLoop]: Abstraction has 78 states and 100 transitions. [2024-11-08 18:56:52,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states and 100 transitions. [2024-11-08 18:56:52,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2024-11-08 18:56:52,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.2820512820512822) internal successors, (100), 77 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:52,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 100 transitions. [2024-11-08 18:56:52,961 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78 states and 100 transitions. [2024-11-08 18:56:52,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 18:56:52,964 INFO L425 stractBuchiCegarLoop]: Abstraction has 78 states and 100 transitions. [2024-11-08 18:56:52,964 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 18:56:52,964 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 100 transitions. [2024-11-08 18:56:52,965 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2024-11-08 18:56:52,966 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:56:52,967 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:56:52,972 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:52,972 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:52,973 INFO L745 eck$LassoCheckResult]: Stem: 403#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 404#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 414#L196 assume 0 == ~r1~0; 370#L197 assume ~id1~0 >= 0; 357#L198 assume 0 == ~st1~0; 358#L199 assume ~send1~0 == ~id1~0; 408#L200 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 409#L201 assume ~id2~0 >= 0; 391#L202 assume 0 == ~st2~0; 392#L203 assume ~send2~0 == ~id2~0; 400#L204 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 371#L205 assume ~id3~0 >= 0; 372#L206 assume 0 == ~st3~0; 359#L207 assume ~send3~0 == ~id3~0; 360#L208 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 412#L209 assume ~id4~0 >= 0; 375#L210 assume 0 == ~st4~0; 376#L211 assume ~send4~0 == ~id4~0; 361#L212 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 362#L213 assume ~id5~0 >= 0; 425#L214 assume 0 == ~st5~0; 426#L215 assume ~send5~0 == ~id5~0; 410#L216 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 395#L217 assume ~id1~0 != ~id2~0; 396#L218 assume ~id1~0 != ~id3~0; 415#L219 assume ~id1~0 != ~id4~0; 428#L220 assume ~id1~0 != ~id5~0; 387#L221 assume ~id2~0 != ~id3~0; 385#L222 assume ~id2~0 != ~id4~0; 386#L223 assume ~id2~0 != ~id5~0; 379#L224 assume ~id3~0 != ~id4~0; 380#L225 assume ~id3~0 != ~id5~0; 377#L226 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 378#L196-1 init_#res#1 := init_~tmp~0#1; 398#init_returnLabel#1 main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 399#L22 assume !(0 == assume_abort_if_not_~cond#1); 402#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 382#L393-3 [2024-11-08 18:56:52,973 INFO L747 eck$LassoCheckResult]: Loop: 382#L393-3 assume main_~i2~0#1 < 10; 411#L393-1 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 363#L71 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 365#L71-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 368#L97 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 367#L97-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 418#L122 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 397#L122-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 413#L147 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 374#L147-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 390#L172 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 416#L172-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 406#L329 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1; 407#L330 assume ~r1~0 >= 5; 419#$Ultimate##169 assume ~r1~0 < 5;check_~tmp~1#1 := 1; 421#L329-1 check_#res#1 := check_~tmp~1#1; 388#check_returnLabel#1 main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 389#L423 assume !(0 == assert_~arg#1 % 256); 381#L418 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 382#L393-3 [2024-11-08 18:56:52,974 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:52,974 INFO L85 PathProgramCache]: Analyzing trace with hash -1992034189, now seen corresponding path program 2 times [2024-11-08 18:56:52,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:52,974 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410662678] [2024-11-08 18:56:52,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:52,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:53,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:56:53,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,082 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:56:53,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:53,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1283900780, now seen corresponding path program 1 times [2024-11-08 18:56:53,086 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:53,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1358248949] [2024-11-08 18:56:53,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:53,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:53,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 18:56:53,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 18:56:53,138 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 18:56:53,138 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1358248949] [2024-11-08 18:56:53,138 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1358248949] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 18:56:53,139 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 18:56:53,139 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 18:56:53,139 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056230856] [2024-11-08 18:56:53,139 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 18:56:53,140 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 18:56:53,140 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 18:56:53,141 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 18:56:53,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 18:56:53,141 INFO L87 Difference]: Start difference. First operand 78 states and 100 transitions. cyclomatic complexity: 23 Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:53,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 18:56:53,185 INFO L93 Difference]: Finished difference Result 113 states and 152 transitions. [2024-11-08 18:56:53,185 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 152 transitions. [2024-11-08 18:56:53,186 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 76 [2024-11-08 18:56:53,189 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 113 states and 152 transitions. [2024-11-08 18:56:53,191 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 113 [2024-11-08 18:56:53,191 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 113 [2024-11-08 18:56:53,191 INFO L73 IsDeterministic]: Start isDeterministic. Operand 113 states and 152 transitions. [2024-11-08 18:56:53,193 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 18:56:53,193 INFO L218 hiAutomatonCegarLoop]: Abstraction has 113 states and 152 transitions. [2024-11-08 18:56:53,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states and 152 transitions. [2024-11-08 18:56:53,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2024-11-08 18:56:53,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 113 states have (on average 1.345132743362832) internal successors, (152), 112 states have internal predecessors, (152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 18:56:53,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 152 transitions. [2024-11-08 18:56:53,209 INFO L240 hiAutomatonCegarLoop]: Abstraction has 113 states and 152 transitions. [2024-11-08 18:56:53,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 18:56:53,210 INFO L425 stractBuchiCegarLoop]: Abstraction has 113 states and 152 transitions. [2024-11-08 18:56:53,210 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 18:56:53,210 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 113 states and 152 transitions. [2024-11-08 18:56:53,211 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 76 [2024-11-08 18:56:53,211 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 18:56:53,212 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 18:56:53,213 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:53,215 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 18:56:53,215 INFO L745 eck$LassoCheckResult]: Stem: 603#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0; 604#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 613#L196 assume 0 == ~r1~0; 567#L197 assume ~id1~0 >= 0; 554#L198 assume 0 == ~st1~0; 555#L199 assume ~send1~0 == ~id1~0; 607#L200 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 608#L201 assume ~id2~0 >= 0; 590#L202 assume 0 == ~st2~0; 591#L203 assume ~send2~0 == ~id2~0; 598#L204 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 570#L205 assume ~id3~0 >= 0; 571#L206 assume 0 == ~st3~0; 556#L207 assume ~send3~0 == ~id3~0; 557#L208 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 611#L209 assume ~id4~0 >= 0; 572#L210 assume 0 == ~st4~0; 573#L211 assume ~send4~0 == ~id4~0; 563#L212 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 564#L213 assume ~id5~0 >= 0; 625#L214 assume 0 == ~st5~0; 626#L215 assume ~send5~0 == ~id5~0; 609#L216 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 594#L217 assume ~id1~0 != ~id2~0; 595#L218 assume ~id1~0 != ~id3~0; 615#L219 assume ~id1~0 != ~id4~0; 631#L220 assume ~id1~0 != ~id5~0; 587#L221 assume ~id2~0 != ~id3~0; 583#L222 assume ~id2~0 != ~id4~0; 584#L223 assume ~id2~0 != ~id5~0; 576#L224 assume ~id3~0 != ~id4~0; 577#L225 assume ~id3~0 != ~id5~0; 574#L226 assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1; 575#L196-1 init_#res#1 := init_~tmp~0#1; 596#init_returnLabel#1 main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 597#L22 assume !(0 == assume_abort_if_not_~cond#1); 601#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 579#L393-3 [2024-11-08 18:56:53,215 INFO L747 eck$LassoCheckResult]: Loop: 579#L393-3 assume main_~i2~0#1 < 10; 610#L393-1 assume !!(main_~i2~0#1 < 10);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 627#L71 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 600#L71-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 651#L97 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 650#L97-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 646#L122 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 642#L122-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 641#L147 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 640#L147-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 636#L172 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 634#L172-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 633#L329 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1; 632#L330 assume !(~r1~0 >= 5); 629#L333 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0; 630#$Ultimate##169 assume ~r1~0 < 5;check_~tmp~1#1 := 1; 622#L329-1 check_#res#1 := check_~tmp~1#1; 585#check_returnLabel#1 main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 586#L423 assume !(0 == assert_~arg#1 % 256); 578#L418 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1; 579#L393-3 [2024-11-08 18:56:53,216 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:53,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1992034189, now seen corresponding path program 3 times [2024-11-08 18:56:53,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:53,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922047530] [2024-11-08 18:56:53,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:53,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:53,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:56:53,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,322 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:56:53,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:53,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1502178750, now seen corresponding path program 1 times [2024-11-08 18:56:53,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:53,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70912678] [2024-11-08 18:56:53,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:53,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:53,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,373 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:56:53,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:56:53,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 18:56:53,434 INFO L85 PathProgramCache]: Analyzing trace with hash -1171530316, now seen corresponding path program 1 times [2024-11-08 18:56:53,434 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 18:56:53,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966478572] [2024-11-08 18:56:53,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 18:56:53,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 18:56:53,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,518 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 18:56:53,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 18:56:53,600 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 18:56:58,893 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 18:56:58,893 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 18:56:58,894 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 18:56:58,894 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 18:56:58,894 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 18:56:58,894 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 18:56:58,894 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 18:56:58,894 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 18:56:58,895 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.5.ufo.BOUNDED-10.pals.c_Iteration4_Loop [2024-11-08 18:56:58,895 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 18:56:58,895 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 18:56:58,968 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:58,978 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:58,985 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:58,992 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:58,995 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:58,998 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:59,001 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:56:59,004 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,135 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,140 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,143 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,146 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,148 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,155 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,162 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,169 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,176 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,179 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,182 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:02,186 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 18:57:04,569 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 33