./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 16:04:16,910 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 16:04:17,006 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-08 16:04:17,011 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 16:04:17,011 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 16:04:17,032 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 16:04:17,033 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 16:04:17,033 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 16:04:17,034 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 16:04:17,034 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 16:04:17,035 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 16:04:17,036 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 16:04:17,036 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 16:04:17,038 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-08 16:04:17,039 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-08 16:04:17,039 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-08 16:04:17,040 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-08 16:04:17,040 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-08 16:04:17,040 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-08 16:04:17,041 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 16:04:17,041 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-08 16:04:17,045 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-08 16:04:17,046 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 16:04:17,046 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-08 16:04:17,046 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 16:04:17,047 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-08 16:04:17,047 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-08 16:04:17,047 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-08 16:04:17,047 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 16:04:17,048 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-08 16:04:17,048 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-08 16:04:17,048 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 16:04:17,049 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-08 16:04:17,049 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 16:04:17,053 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 16:04:17,053 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 16:04:17,054 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 16:04:17,054 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 16:04:17,055 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-08 16:04:17,056 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 65159196aa732cf84d788dcb31500c216d665703806e14a7c6f7047ab62d591b [2024-11-08 16:04:17,292 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 16:04:17,314 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 16:04:17,318 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 16:04:17,320 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 16:04:17,320 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 16:04:17,322 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c Unable to find full path for "g++" [2024-11-08 16:04:19,355 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 16:04:19,737 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 16:04:19,737 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/sv-benchmarks/c/seq-mthreaded/pals_lcr.6.ufo.BOUNDED-12.pals.c [2024-11-08 16:04:19,759 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/data/85f43b534/3d835a92430242bdb5862dd7df6b7838/FLAGd8062f1c8 [2024-11-08 16:04:19,775 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/data/85f43b534/3d835a92430242bdb5862dd7df6b7838 [2024-11-08 16:04:19,778 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 16:04:19,781 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 16:04:19,782 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 16:04:19,783 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 16:04:19,788 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 16:04:19,789 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:04:19" (1/1) ... [2024-11-08 16:04:19,790 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@55706857 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:19, skipping insertion in model container [2024-11-08 16:04:19,790 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:04:19" (1/1) ... [2024-11-08 16:04:19,833 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 16:04:20,133 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 16:04:20,155 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 16:04:20,254 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 16:04:20,286 INFO L204 MainTranslator]: Completed translation [2024-11-08 16:04:20,287 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20 WrapperNode [2024-11-08 16:04:20,287 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 16:04:20,288 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 16:04:20,288 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 16:04:20,288 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 16:04:20,298 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,314 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,364 INFO L138 Inliner]: procedures = 25, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 377 [2024-11-08 16:04:20,365 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 16:04:20,366 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 16:04:20,366 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 16:04:20,372 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 16:04:20,388 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,388 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,393 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,414 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-08 16:04:20,414 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,415 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,425 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,431 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,433 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,438 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,441 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 16:04:20,442 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 16:04:20,443 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 16:04:20,443 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 16:04:20,444 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (1/1) ... [2024-11-08 16:04:20,455 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 16:04:20,466 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:04:20,482 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-08 16:04:20,489 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88893920-f2a6-4548-95af-960a73c07382/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-08 16:04:20,522 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 16:04:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 16:04:20,523 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 16:04:20,523 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 16:04:20,657 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 16:04:20,660 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 16:04:21,274 INFO L? ?]: Removed 46 outVars from TransFormulas that were not future-live. [2024-11-08 16:04:21,275 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 16:04:21,318 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 16:04:21,327 INFO L316 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-08 16:04:21,328 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:04:21 BoogieIcfgContainer [2024-11-08 16:04:21,328 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 16:04:21,329 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-08 16:04:21,329 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-08 16:04:21,342 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-08 16:04:21,342 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 16:04:21,347 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.11 04:04:19" (1/3) ... [2024-11-08 16:04:21,349 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@b9892d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 04:04:21, skipping insertion in model container [2024-11-08 16:04:21,349 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 16:04:21,349 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:04:20" (2/3) ... [2024-11-08 16:04:21,349 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@b9892d1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.11 04:04:21, skipping insertion in model container [2024-11-08 16:04:21,349 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-08 16:04:21,350 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:04:21" (3/3) ... [2024-11-08 16:04:21,351 INFO L332 chiAutomizerObserver]: Analyzing ICFG pals_lcr.6.ufo.BOUNDED-12.pals.c [2024-11-08 16:04:21,527 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-08 16:04:21,528 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-08 16:04:21,528 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-08 16:04:21,528 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-08 16:04:21,528 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-08 16:04:21,528 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-08 16:04:21,528 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-08 16:04:21,529 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-08 16:04:21,533 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 99 states, 98 states have (on average 1.7448979591836735) internal successors, (171), 98 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:21,560 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-11-08 16:04:21,560 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 16:04:21,560 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 16:04:21,568 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:21,568 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:21,568 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-08 16:04:21,569 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 99 states, 98 states have (on average 1.7448979591836735) internal successors, (171), 98 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:21,575 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-11-08 16:04:21,575 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 16:04:21,575 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 16:04:21,576 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:21,577 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:21,585 INFO L745 eck$LassoCheckResult]: Stem: 32#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 36#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 66#L228true assume !(0 == ~r1~0);init_~tmp~0#1 := 0; 44#L228-1true init_#res#1 := init_~tmp~0#1; 68#init_returnLabel#1true main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 39#L22true assume !(0 == assume_abort_if_not_~cond#1); 71#L21true havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 38#L467-3true [2024-11-08 16:04:21,586 INFO L747 eck$LassoCheckResult]: Loop: 38#L467-3true assume main_~i2~0#1 < 12; 19#L467-1true assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 20#L78true assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 40#L78-2true havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 17#L104true assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 96#L104-2true havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 82#L129true assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 10#L129-2true havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 70#L154true assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 97#L154-2true havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 86#L179true assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 22#L179-2true havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 79#L204true assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 72#L204-2true havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 88#L397true assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 76#L397-1true check_#res#1 := check_~tmp~1#1; 15#check_returnLabel#1true main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 84#L500true assume !(0 == assert_~arg#1 % 256); 23#L495true havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 38#L467-3true [2024-11-08 16:04:21,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:21,594 INFO L85 PathProgramCache]: Analyzing trace with hash 2030119858, now seen corresponding path program 1 times [2024-11-08 16:04:21,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:21,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444536967] [2024-11-08 16:04:21,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:21,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:21,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:04:22,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 16:04:22,179 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:04:22,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444536967] [2024-11-08 16:04:22,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [444536967] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:04:22,181 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:04:22,181 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:04:22,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158156688] [2024-11-08 16:04:22,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:04:22,189 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-08 16:04:22,190 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:22,190 INFO L85 PathProgramCache]: Analyzing trace with hash 868628873, now seen corresponding path program 1 times [2024-11-08 16:04:22,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:22,191 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599623326] [2024-11-08 16:04:22,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:22,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:22,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:04:22,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 16:04:22,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:04:22,749 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599623326] [2024-11-08 16:04:22,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599623326] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:04:22,749 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:04:22,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:04:22,750 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [758078093] [2024-11-08 16:04:22,750 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:04:22,751 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 16:04:22,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:04:22,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:04:22,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:04:22,799 INFO L87 Difference]: Start difference. First operand has 99 states, 98 states have (on average 1.7448979591836735) internal successors, (171), 98 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:22,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:04:22,973 INFO L93 Difference]: Finished difference Result 101 states and 170 transitions. [2024-11-08 16:04:22,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 170 transitions. [2024-11-08 16:04:22,985 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2024-11-08 16:04:22,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 93 states and 122 transitions. [2024-11-08 16:04:22,995 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 93 [2024-11-08 16:04:22,996 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 93 [2024-11-08 16:04:22,998 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 122 transitions. [2024-11-08 16:04:23,000 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 16:04:23,000 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 122 transitions. [2024-11-08 16:04:23,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 122 transitions. [2024-11-08 16:04:23,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2024-11-08 16:04:23,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.3118279569892473) internal successors, (122), 92 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:23,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 122 transitions. [2024-11-08 16:04:23,048 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 122 transitions. [2024-11-08 16:04:23,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:04:23,055 INFO L425 stractBuchiCegarLoop]: Abstraction has 93 states and 122 transitions. [2024-11-08 16:04:23,056 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-08 16:04:23,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 122 transitions. [2024-11-08 16:04:23,058 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2024-11-08 16:04:23,062 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 16:04:23,062 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 16:04:23,064 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:23,064 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:23,065 INFO L745 eck$LassoCheckResult]: Stem: 287#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 288#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 259#L228 assume 0 == ~r1~0; 260#L229 assume ~id1~0 >= 0; 230#L230 assume 0 == ~st1~0; 231#L231 assume ~send1~0 == ~id1~0; 244#L232 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 305#L233 assume ~id2~0 >= 0; 220#L234 assume 0 == ~st2~0; 221#L235 assume ~send2~0 == ~id2~0; 296#L236 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 291#L237 assume ~id3~0 >= 0; 277#L238 assume 0 == ~st3~0; 278#L239 assume ~send3~0 == ~id3~0; 275#L240 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 276#L241 assume ~id4~0 >= 0; 280#L242 assume 0 == ~st4~0; 238#L243 assume ~send4~0 == ~id4~0; 232#L244 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 233#L245 assume ~id5~0 >= 0; 279#L246 assume 0 == ~st5~0; 293#L247 assume ~send5~0 == ~id5~0; 294#L248 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 222#L249 assume ~id6~0 >= 0; 223#L250 assume 0 == ~st6~0; 245#L251 assume ~send6~0 == ~id6~0; 246#L252 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 250#L253 assume ~id1~0 != ~id2~0; 251#L254 assume ~id1~0 != ~id3~0; 252#L255 assume ~id1~0 != ~id4~0; 253#L256 assume ~id1~0 != ~id5~0; 300#L257 assume ~id1~0 != ~id6~0; 289#L258 assume ~id2~0 != ~id3~0; 214#L259 assume ~id2~0 != ~id4~0; 215#L260 assume ~id2~0 != ~id5~0; 306#L261 assume ~id2~0 != ~id6~0; 302#L262 assume ~id3~0 != ~id4~0; 303#L263 assume ~id3~0 != ~id5~0; 304#L264 assume ~id3~0 != ~id6~0; 218#L265 assume ~id4~0 != ~id5~0; 219#L266 assume ~id4~0 != ~id6~0; 239#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 274#L228-1 init_#res#1 := init_~tmp~0#1; 271#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 272#L22 assume !(0 == assume_abort_if_not_~cond#1); 284#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 270#L467-3 [2024-11-08 16:04:23,065 INFO L747 eck$LassoCheckResult]: Loop: 270#L467-3 assume main_~i2~0#1 < 12; 263#L467-1 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 264#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 237#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 256#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 258#L104-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 297#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 240#L129-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 241#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 249#L154-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 301#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 267#L179-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 268#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 285#L204-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 286#L397 assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0; 235#L397-1 check_#res#1 := check_~tmp~1#1; 254#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 255#L500 assume !(0 == assert_~arg#1 % 256); 269#L495 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 270#L467-3 [2024-11-08 16:04:23,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:23,066 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 1 times [2024-11-08 16:04:23,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:23,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391574425] [2024-11-08 16:04:23,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:23,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:23,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,146 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 16:04:23,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,232 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 16:04:23,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:23,233 INFO L85 PathProgramCache]: Analyzing trace with hash 868628873, now seen corresponding path program 2 times [2024-11-08 16:04:23,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:23,234 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393315468] [2024-11-08 16:04:23,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:23,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:23,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:04:23,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 16:04:23,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:04:23,541 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393315468] [2024-11-08 16:04:23,541 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1393315468] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:04:23,542 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:04:23,542 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:04:23,543 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854084370] [2024-11-08 16:04:23,543 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:04:23,543 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 16:04:23,544 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:04:23,544 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:04:23,545 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:04:23,545 INFO L87 Difference]: Start difference. First operand 93 states and 122 transitions. cyclomatic complexity: 30 Second operand has 5 states, 5 states have (on average 3.8) internal successors, (19), 5 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:23,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:04:23,583 INFO L93 Difference]: Finished difference Result 96 states and 124 transitions. [2024-11-08 16:04:23,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 96 states and 124 transitions. [2024-11-08 16:04:23,589 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2024-11-08 16:04:23,591 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 96 states to 93 states and 119 transitions. [2024-11-08 16:04:23,591 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 93 [2024-11-08 16:04:23,592 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 93 [2024-11-08 16:04:23,592 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 119 transitions. [2024-11-08 16:04:23,593 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 16:04:23,593 INFO L218 hiAutomatonCegarLoop]: Abstraction has 93 states and 119 transitions. [2024-11-08 16:04:23,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 119 transitions. [2024-11-08 16:04:23,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2024-11-08 16:04:23,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.2795698924731183) internal successors, (119), 92 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:23,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 119 transitions. [2024-11-08 16:04:23,599 INFO L240 hiAutomatonCegarLoop]: Abstraction has 93 states and 119 transitions. [2024-11-08 16:04:23,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:04:23,601 INFO L425 stractBuchiCegarLoop]: Abstraction has 93 states and 119 transitions. [2024-11-08 16:04:23,601 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-08 16:04:23,601 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 119 transitions. [2024-11-08 16:04:23,602 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2024-11-08 16:04:23,603 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 16:04:23,603 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 16:04:23,607 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:23,607 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:23,607 INFO L745 eck$LassoCheckResult]: Stem: 484#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 485#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 456#L228 assume 0 == ~r1~0; 457#L229 assume ~id1~0 >= 0; 427#L230 assume 0 == ~st1~0; 428#L231 assume ~send1~0 == ~id1~0; 441#L232 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 502#L233 assume ~id2~0 >= 0; 417#L234 assume 0 == ~st2~0; 418#L235 assume ~send2~0 == ~id2~0; 493#L236 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 488#L237 assume ~id3~0 >= 0; 474#L238 assume 0 == ~st3~0; 475#L239 assume ~send3~0 == ~id3~0; 472#L240 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 473#L241 assume ~id4~0 >= 0; 480#L242 assume 0 == ~st4~0; 434#L243 assume ~send4~0 == ~id4~0; 431#L244 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 432#L245 assume ~id5~0 >= 0; 476#L246 assume 0 == ~st5~0; 490#L247 assume ~send5~0 == ~id5~0; 491#L248 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 422#L249 assume ~id6~0 >= 0; 423#L250 assume 0 == ~st6~0; 442#L251 assume ~send6~0 == ~id6~0; 443#L252 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 449#L253 assume ~id1~0 != ~id2~0; 450#L254 assume ~id1~0 != ~id3~0; 451#L255 assume ~id1~0 != ~id4~0; 452#L256 assume ~id1~0 != ~id5~0; 497#L257 assume ~id1~0 != ~id6~0; 486#L258 assume ~id2~0 != ~id3~0; 411#L259 assume ~id2~0 != ~id4~0; 412#L260 assume ~id2~0 != ~id5~0; 503#L261 assume ~id2~0 != ~id6~0; 499#L262 assume ~id3~0 != ~id4~0; 500#L263 assume ~id3~0 != ~id5~0; 501#L264 assume ~id3~0 != ~id6~0; 415#L265 assume ~id4~0 != ~id5~0; 416#L266 assume ~id4~0 != ~id6~0; 435#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 471#L228-1 init_#res#1 := init_~tmp~0#1; 468#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 469#L22 assume !(0 == assume_abort_if_not_~cond#1); 481#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 467#L467-3 [2024-11-08 16:04:23,608 INFO L747 eck$LassoCheckResult]: Loop: 467#L467-3 assume main_~i2~0#1 < 12; 462#L467-1 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 463#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 433#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 453#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 455#L104-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 494#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 437#L129-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 438#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 446#L154-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 498#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 460#L179-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 461#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 482#L204-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 483#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 496#L398 assume ~r1~0 >= 6; 430#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 439#L397-1 check_#res#1 := check_~tmp~1#1; 447#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 448#L500 assume !(0 == assert_~arg#1 % 256); 466#L495 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 467#L467-3 [2024-11-08 16:04:23,609 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:23,610 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 2 times [2024-11-08 16:04:23,610 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:23,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2145730834] [2024-11-08 16:04:23,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:23,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:23,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,682 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 16:04:23,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,731 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 16:04:23,732 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:23,732 INFO L85 PathProgramCache]: Analyzing trace with hash 112812889, now seen corresponding path program 1 times [2024-11-08 16:04:23,732 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:23,733 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324609486] [2024-11-08 16:04:23,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:23,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:23,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:04:23,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-08 16:04:23,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:04:23,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324609486] [2024-11-08 16:04:23,795 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324609486] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:04:23,795 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:04:23,796 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:04:23,796 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1915313226] [2024-11-08 16:04:23,796 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:04:23,797 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-08 16:04:23,797 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:04:23,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:04:23,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:04:23,798 INFO L87 Difference]: Start difference. First operand 93 states and 119 transitions. cyclomatic complexity: 27 Second operand has 3 states, 3 states have (on average 7.0) internal successors, (21), 3 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:23,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:04:23,836 INFO L93 Difference]: Finished difference Result 134 states and 181 transitions. [2024-11-08 16:04:23,836 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 134 states and 181 transitions. [2024-11-08 16:04:23,838 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 88 [2024-11-08 16:04:23,839 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 134 states to 134 states and 181 transitions. [2024-11-08 16:04:23,840 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 134 [2024-11-08 16:04:23,840 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 134 [2024-11-08 16:04:23,840 INFO L73 IsDeterministic]: Start isDeterministic. Operand 134 states and 181 transitions. [2024-11-08 16:04:23,841 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-08 16:04:23,842 INFO L218 hiAutomatonCegarLoop]: Abstraction has 134 states and 181 transitions. [2024-11-08 16:04:23,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states and 181 transitions. [2024-11-08 16:04:23,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2024-11-08 16:04:23,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 134 states, 134 states have (on average 1.3507462686567164) internal successors, (181), 133 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-08 16:04:23,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 181 transitions. [2024-11-08 16:04:23,850 INFO L240 hiAutomatonCegarLoop]: Abstraction has 134 states and 181 transitions. [2024-11-08 16:04:23,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:04:23,852 INFO L425 stractBuchiCegarLoop]: Abstraction has 134 states and 181 transitions. [2024-11-08 16:04:23,852 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-08 16:04:23,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 134 states and 181 transitions. [2024-11-08 16:04:23,854 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 88 [2024-11-08 16:04:23,854 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-08 16:04:23,854 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-08 16:04:23,856 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:23,856 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:04:23,856 INFO L745 eck$LassoCheckResult]: Stem: 719#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0; 720#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~ret29#1, main_#t~ret30#1, main_#t~post31#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1; 689#L228 assume 0 == ~r1~0; 690#L229 assume ~id1~0 >= 0; 660#L230 assume 0 == ~st1~0; 661#L231 assume ~send1~0 == ~id1~0; 672#L232 assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296); 738#L233 assume ~id2~0 >= 0; 650#L234 assume 0 == ~st2~0; 651#L235 assume ~send2~0 == ~id2~0; 729#L236 assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296); 723#L237 assume ~id3~0 >= 0; 708#L238 assume 0 == ~st3~0; 709#L239 assume ~send3~0 == ~id3~0; 706#L240 assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296); 707#L241 assume ~id4~0 >= 0; 711#L242 assume 0 == ~st4~0; 667#L243 assume ~send4~0 == ~id4~0; 662#L244 assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296); 663#L245 assume ~id5~0 >= 0; 710#L246 assume 0 == ~st5~0; 726#L247 assume ~send5~0 == ~id5~0; 727#L248 assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296); 652#L249 assume ~id6~0 >= 0; 653#L250 assume 0 == ~st6~0; 675#L251 assume ~send6~0 == ~id6~0; 676#L252 assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296); 680#L253 assume ~id1~0 != ~id2~0; 681#L254 assume ~id1~0 != ~id3~0; 682#L255 assume ~id1~0 != ~id4~0; 683#L256 assume ~id1~0 != ~id5~0; 733#L257 assume ~id1~0 != ~id6~0; 721#L258 assume ~id2~0 != ~id3~0; 644#L259 assume ~id2~0 != ~id4~0; 645#L260 assume ~id2~0 != ~id5~0; 739#L261 assume ~id2~0 != ~id6~0; 735#L262 assume ~id3~0 != ~id4~0; 736#L263 assume ~id3~0 != ~id5~0; 737#L264 assume ~id3~0 != ~id6~0; 648#L265 assume ~id4~0 != ~id5~0; 649#L266 assume ~id4~0 != ~id6~0; 668#L267 assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1; 705#L228-1 init_#res#1 := init_~tmp~0#1; 702#init_returnLabel#1 main_#t~ret29#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret29#1;havoc main_#t~ret29#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 703#L22 assume !(0 == assume_abort_if_not_~cond#1); 715#L21 havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0; 716#L467-3 [2024-11-08 16:04:23,857 INFO L747 eck$LassoCheckResult]: Loop: 716#L467-3 assume main_~i2~0#1 < 12; 773#L467-1 assume !!(main_~i2~0#1 < 12);assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0; 772#L78 assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1; 666#L78-2 havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0; 768#L104 assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1; 766#L104-2 havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0; 761#L129 assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1; 758#L129-2 havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0; 756#L154 assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1; 754#L154-2 havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0; 750#L179 assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1; 746#L179-2 havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0; 744#L204 assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1; 742#L204-2 havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1; 741#L397 assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1; 740#L398 assume !(~r1~0 >= 6); 664#L401 assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0; 665#$Ultimate##208 assume ~r1~0 < 6;check_~tmp~1#1 := 1; 777#L397-1 check_#res#1 := check_~tmp~1#1; 776#check_returnLabel#1 main_#t~ret30#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret30#1;havoc main_#t~ret30#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1; 775#L500 assume !(0 == assert_~arg#1 % 256); 774#L495 havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post31#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post31#1;havoc main_#t~post31#1; 716#L467-3 [2024-11-08 16:04:23,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:23,858 INFO L85 PathProgramCache]: Analyzing trace with hash -1716035805, now seen corresponding path program 3 times [2024-11-08 16:04:23,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:23,859 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119969561] [2024-11-08 16:04:23,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:23,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:23,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,899 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 16:04:23,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,937 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 16:04:23,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:23,938 INFO L85 PathProgramCache]: Analyzing trace with hash 848802373, now seen corresponding path program 1 times [2024-11-08 16:04:23,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:23,939 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932994034] [2024-11-08 16:04:23,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:23,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:23,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:23,994 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 16:04:24,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:24,046 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 16:04:24,047 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:04:24,047 INFO L85 PathProgramCache]: Analyzing trace with hash -612095001, now seen corresponding path program 1 times [2024-11-08 16:04:24,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:04:24,048 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745278460] [2024-11-08 16:04:24,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:04:24,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:04:24,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:24,124 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 16:04:24,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:04:24,269 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 16:04:29,714 INFO L204 LassoAnalysis]: Preferences: [2024-11-08 16:04:29,715 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-08 16:04:29,715 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-08 16:04:29,715 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-08 16:04:29,715 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-08 16:04:29,715 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-08 16:04:29,715 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-08 16:04:29,716 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-08 16:04:29,716 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.6.ufo.BOUNDED-12.pals.c_Iteration4_Loop [2024-11-08 16:04:29,716 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-08 16:04:29,716 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-08 16:04:29,756 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,770 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,777 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,779 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,799 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,809 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,813 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,815 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,818 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,825 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,828 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:29,831 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,369 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,373 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,382 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,388 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,398 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,404 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,407 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,409 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,412 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:32,416 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-08 16:04:35,401 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 36