./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c --full-output --architecture 64bit


--------------------------------------------------------------------------------


Checking for ERROR reachability
Using default analysis
Version a0165632
Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-a016563
[2024-11-08 18:17:13,758 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-11-08 18:17:13,855 INFO  L114        SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf
[2024-11-08 18:17:13,861 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-11-08 18:17:13,862 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-08 18:17:13,914 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-08 18:17:13,914 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-08 18:17:13,915 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-08 18:17:13,915 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-08 18:17:13,915 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-11-08 18:17:13,916 INFO  L151        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2024-11-08 18:17:13,916 INFO  L153        SettingsManager]:  * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2024-11-08 18:17:13,918 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-08 18:17:13,922 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-11-08 18:17:13,922 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-11-08 18:17:13,923 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-08 18:17:13,923 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2024-11-08 18:17:13,923 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2024-11-08 18:17:13,923 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-11-08 18:17:13,924 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2024-11-08 18:17:13,924 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2024-11-08 18:17:13,927 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2024-11-08 18:17:13,927 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-11-08 18:17:13,927 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-11-08 18:17:13,927 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-11-08 18:17:13,928 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-08 18:17:13,928 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-11-08 18:17:13,928 INFO  L153        SettingsManager]:  * Only consider context switches at boundaries of atomic blocks=true
[2024-11-08 18:17:13,928 INFO  L153        SettingsManager]:  * SMT solver=External_DefaultMode
[2024-11-08 18:17:13,928 INFO  L153        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 18:17:13,929 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-08 18:17:13,929 INFO  L153        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2024-11-08 18:17:13,929 INFO  L153        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopHeads
[2024-11-08 18:17:13,929 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2024-11-08 18:17:13,930 INFO  L153        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2024-11-08 18:17:13,938 INFO  L153        SettingsManager]:  * Apply one-shot large block encoding in concurrent analysis=false
[2024-11-08 18:17:13,939 INFO  L153        SettingsManager]:  * Automaton type used in concurrency analysis=PETRI_NET
[2024-11-08 18:17:13,939 INFO  L153        SettingsManager]:  * Order on configurations for Petri net unfoldings=DBO
[2024-11-08 18:17:13,939 INFO  L153        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2024-11-08 18:17:13,939 INFO  L153        SettingsManager]:  * Looper check in Petri net analysis=SEMANTIC
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f
[2024-11-08 18:17:14,263 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-08 18:17:14,287 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-08 18:17:14,290 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-08 18:17:14,292 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-11-08 18:17:14,292 INFO  L274        PluginConnector]: CDTParser initialized
[2024-11-08 18:17:14,294 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c
Unable to find full path for "g++"
[2024-11-08 18:17:16,168 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-11-08 18:17:16,426 INFO  L384              CDTParser]: Found 1 translation units.
[2024-11-08 18:17:16,426 INFO  L180              CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c
[2024-11-08 18:17:16,467 INFO  L427              CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data/43bb11feb/11167f42d1d24bb8a992b6d938994fc2/FLAGcb72d922d
[2024-11-08 18:17:16,504 INFO  L435              CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data/43bb11feb/11167f42d1d24bb8a992b6d938994fc2
[2024-11-08 18:17:16,507 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-08 18:17:16,509 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-08 18:17:16,512 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-08 18:17:16,513 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-08 18:17:16,518 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-08 18:17:16,519 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:17:16" (1/1) ...
[2024-11-08 18:17:16,522 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3396975d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:16, skipping insertion in model container
[2024-11-08 18:17:16,522 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:17:16" (1/1) ...
[2024-11-08 18:17:16,600 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-11-08 18:17:16,840 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347]
[2024-11-08 18:17:17,077 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 18:17:17,093 INFO  L200         MainTranslator]: Completed pre-run
[2024-11-08 18:17:17,112 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347]
[2024-11-08 18:17:17,272 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 18:17:17,297 INFO  L204         MainTranslator]: Completed translation
[2024-11-08 18:17:17,298 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17 WrapperNode
[2024-11-08 18:17:17,298 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-08 18:17:17,299 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-08 18:17:17,299 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-08 18:17:17,300 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-08 18:17:17,307 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,349 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,514 INFO  L138                Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1384
[2024-11-08 18:17:17,514 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-08 18:17:17,515 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-08 18:17:17,516 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-08 18:17:17,516 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-11-08 18:17:17,527 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,528 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,553 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,603 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-08 18:17:17,604 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,604 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,639 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,727 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,751 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,758 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,828 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-08 18:17:17,829 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-08 18:17:17,830 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2024-11-08 18:17:17,830 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2024-11-08 18:17:17,831 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (1/1) ...
[2024-11-08 18:17:17,836 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 18:17:17,846 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:17:17,859 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null)
[2024-11-08 18:17:17,862 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process
[2024-11-08 18:17:17,895 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-08 18:17:17,896 INFO  L130     BoogieDeclarations]: Found specification of procedure assume_abort_if_not
[2024-11-08 18:17:17,896 INFO  L138     BoogieDeclarations]: Found implementation of procedure assume_abort_if_not
[2024-11-08 18:17:17,896 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-11-08 18:17:17,896 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-08 18:17:17,897 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-08 18:17:18,157 INFO  L238             CfgBuilder]: Building ICFG
[2024-11-08 18:17:18,160 INFO  L264             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-08 18:17:20,096 INFO  L?                        ?]: Removed 754 outVars from TransFormulas that were not future-live.
[2024-11-08 18:17:20,096 INFO  L287             CfgBuilder]: Performing block encoding
[2024-11-08 18:17:20,130 INFO  L311             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-08 18:17:20,130 INFO  L316             CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-08 18:17:20,130 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:17:20 BoogieIcfgContainer
[2024-11-08 18:17:20,130 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-08 18:17:20,133 INFO  L112        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2024-11-08 18:17:20,133 INFO  L270        PluginConnector]: Initializing TraceAbstraction...
[2024-11-08 18:17:20,139 INFO  L274        PluginConnector]: TraceAbstraction initialized
[2024-11-08 18:17:20,139 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 06:17:16" (1/3) ...
[2024-11-08 18:17:20,140 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47ccaf8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 06:17:20, skipping insertion in model container
[2024-11-08 18:17:20,141 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:17:17" (2/3) ...
[2024-11-08 18:17:20,141 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@47ccaf8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 06:17:20, skipping insertion in model container
[2024-11-08 18:17:20,143 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:17:20" (3/3) ...
[2024-11-08 18:17:20,144 INFO  L112   eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c
[2024-11-08 18:17:20,164 INFO  L214   ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2024-11-08 18:17:20,164 INFO  L154   ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations.
[2024-11-08 18:17:20,273 INFO  L332      AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2024-11-08 18:17:20,280 INFO  L333      AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3f4a986a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms]
[2024-11-08 18:17:20,281 INFO  L334      AbstractCegarLoop]: Starting to check reachability of 1 error locations.
[2024-11-08 18:17:20,286 INFO  L276                IsEmpty]: Start isEmpty. Operand  has 393 states, 387 states have (on average 1.4935400516795865) internal successors, (578), 388 states have internal predecessors, (578), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:20,305 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 118
[2024-11-08 18:17:20,306 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:20,307 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:20,308 INFO  L396      AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:20,315 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:20,315 INFO  L85        PathProgramCache]: Analyzing trace with hash 1737159139, now seen corresponding path program 1 times
[2024-11-08 18:17:20,325 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:20,326 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833503247]
[2024-11-08 18:17:20,326 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:20,327 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:20,773 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:21,802 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:21,804 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:21,808 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:21,810 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:21,816 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:21,817 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:21,822 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:21,822 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:21,823 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833503247]
[2024-11-08 18:17:21,824 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1833503247] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:21,824 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:21,824 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:21,826 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1225534850]
[2024-11-08 18:17:21,827 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:21,832 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:21,832 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:21,872 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:21,873 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:21,876 INFO  L87              Difference]: Start difference. First operand  has 393 states, 387 states have (on average 1.4935400516795865) internal successors, (578), 388 states have internal predecessors, (578), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:21,981 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:21,981 INFO  L93              Difference]: Finished difference Result 714 states and 1067 transitions.
[2024-11-08 18:17:21,983 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:21,984 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117
[2024-11-08 18:17:21,985 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:21,996 INFO  L225             Difference]: With dead ends: 714
[2024-11-08 18:17:21,997 INFO  L226             Difference]: Without dead ends: 391
[2024-11-08 18:17:22,000 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:22,004 INFO  L432           NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:22,005 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:22,023 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 391 states.
[2024-11-08 18:17:22,057 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391.
[2024-11-08 18:17:22,059 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:22,061 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions.
[2024-11-08 18:17:22,063 INFO  L78                 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117
[2024-11-08 18:17:22,064 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:22,064 INFO  L471      AbstractCegarLoop]: Abstraction has 391 states and 579 transitions.
[2024-11-08 18:17:22,065 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:22,065 INFO  L276                IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions.
[2024-11-08 18:17:22,069 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 119
[2024-11-08 18:17:22,069 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:22,069 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:22,069 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0
[2024-11-08 18:17:22,070 INFO  L396      AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:22,070 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:22,070 INFO  L85        PathProgramCache]: Analyzing trace with hash -1980945765, now seen corresponding path program 1 times
[2024-11-08 18:17:22,070 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:22,071 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974062271]
[2024-11-08 18:17:22,071 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:22,071 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:22,184 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:22,590 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:22,592 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:22,596 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:22,600 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:22,604 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:22,608 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:22,616 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:22,617 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:22,618 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974062271]
[2024-11-08 18:17:22,618 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [974062271] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:22,618 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:22,620 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:22,620 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1813443071]
[2024-11-08 18:17:22,621 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:22,622 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:22,623 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:22,624 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:22,625 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:22,626 INFO  L87              Difference]: Start difference. First operand 391 states and 579 transitions. Second operand  has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:23,153 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:23,154 INFO  L93              Difference]: Finished difference Result 971 states and 1441 transitions.
[2024-11-08 18:17:23,154 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:17:23,155 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118
[2024-11-08 18:17:23,155 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:23,157 INFO  L225             Difference]: With dead ends: 971
[2024-11-08 18:17:23,158 INFO  L226             Difference]: Without dead ends: 391
[2024-11-08 18:17:23,159 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56
[2024-11-08 18:17:23,161 INFO  L432           NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:23,161 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 18:17:23,162 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 391 states.
[2024-11-08 18:17:23,181 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391.
[2024-11-08 18:17:23,182 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:23,184 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions.
[2024-11-08 18:17:23,184 INFO  L78                 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118
[2024-11-08 18:17:23,185 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:23,185 INFO  L471      AbstractCegarLoop]: Abstraction has 391 states and 578 transitions.
[2024-11-08 18:17:23,185 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:23,185 INFO  L276                IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions.
[2024-11-08 18:17:23,188 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 120
[2024-11-08 18:17:23,188 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:23,189 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:23,189 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1
[2024-11-08 18:17:23,189 INFO  L396      AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:23,190 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:23,190 INFO  L85        PathProgramCache]: Analyzing trace with hash 70360093, now seen corresponding path program 1 times
[2024-11-08 18:17:23,190 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:23,191 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170875691]
[2024-11-08 18:17:23,191 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:23,191 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:23,309 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:23,682 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:23,683 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:23,685 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:23,687 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:23,691 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:23,692 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:23,693 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:23,694 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:23,694 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170875691]
[2024-11-08 18:17:23,694 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [170875691] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:23,697 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:23,697 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:23,698 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934066235]
[2024-11-08 18:17:23,698 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:23,698 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:23,700 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:23,700 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:23,701 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:23,701 INFO  L87              Difference]: Start difference. First operand 391 states and 578 transitions. Second operand  has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:23,745 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:23,748 INFO  L93              Difference]: Finished difference Result 714 states and 1055 transitions.
[2024-11-08 18:17:23,749 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:23,749 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119
[2024-11-08 18:17:23,750 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:23,751 INFO  L225             Difference]: With dead ends: 714
[2024-11-08 18:17:23,752 INFO  L226             Difference]: Without dead ends: 393
[2024-11-08 18:17:23,753 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:23,755 INFO  L432           NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:23,759 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:23,760 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 18:17:23,782 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 18:17:23,783 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:23,786 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions.
[2024-11-08 18:17:23,787 INFO  L78                 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119
[2024-11-08 18:17:23,789 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:23,790 INFO  L471      AbstractCegarLoop]: Abstraction has 393 states and 580 transitions.
[2024-11-08 18:17:23,790 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:23,790 INFO  L276                IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions.
[2024-11-08 18:17:23,792 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 121
[2024-11-08 18:17:23,792 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:23,792 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:23,792 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2
[2024-11-08 18:17:23,792 INFO  L396      AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:23,793 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:23,793 INFO  L85        PathProgramCache]: Analyzing trace with hash 1083197562, now seen corresponding path program 1 times
[2024-11-08 18:17:23,793 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:23,797 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572148632]
[2024-11-08 18:17:23,798 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:23,798 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:23,943 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:24,510 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:24,512 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:24,517 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:24,519 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:24,523 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:24,526 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:24,533 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:24,533 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:24,534 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1572148632]
[2024-11-08 18:17:24,534 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1572148632] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:24,534 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:24,534 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:24,534 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12058006]
[2024-11-08 18:17:24,535 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:24,536 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:24,536 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:24,537 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:24,537 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:24,538 INFO  L87              Difference]: Start difference. First operand 393 states and 580 transitions. Second operand  has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:24,678 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:24,678 INFO  L93              Difference]: Finished difference Result 716 states and 1056 transitions.
[2024-11-08 18:17:24,679 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:24,679 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120
[2024-11-08 18:17:24,679 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:24,681 INFO  L225             Difference]: With dead ends: 716
[2024-11-08 18:17:24,681 INFO  L226             Difference]: Without dead ends: 393
[2024-11-08 18:17:24,682 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:24,683 INFO  L432           NwaCegarLoop]: 534 mSDtfsCounter, 480 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 480 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:24,683 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [480 Valid, 1070 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:24,685 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 18:17:24,693 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 18:17:24,694 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:24,695 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions.
[2024-11-08 18:17:24,696 INFO  L78                 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120
[2024-11-08 18:17:24,696 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:24,696 INFO  L471      AbstractCegarLoop]: Abstraction has 393 states and 579 transitions.
[2024-11-08 18:17:24,696 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:24,697 INFO  L276                IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions.
[2024-11-08 18:17:24,698 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 122
[2024-11-08 18:17:24,698 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:24,698 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:24,699 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3
[2024-11-08 18:17:24,699 INFO  L396      AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:24,699 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:24,699 INFO  L85        PathProgramCache]: Analyzing trace with hash -1702668455, now seen corresponding path program 1 times
[2024-11-08 18:17:24,700 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:24,700 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20339420]
[2024-11-08 18:17:24,700 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:24,700 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:24,792 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,071 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:25,072 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,074 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:25,076 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,078 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:25,079 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,081 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:25,082 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:25,083 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20339420]
[2024-11-08 18:17:25,084 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [20339420] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:25,084 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:25,084 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:25,084 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1093473279]
[2024-11-08 18:17:25,084 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:25,085 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:25,085 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:25,085 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:25,086 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:25,086 INFO  L87              Difference]: Start difference. First operand 393 states and 579 transitions. Second operand  has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:25,229 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:25,230 INFO  L93              Difference]: Finished difference Result 720 states and 1059 transitions.
[2024-11-08 18:17:25,230 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:17:25,230 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121
[2024-11-08 18:17:25,231 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:25,232 INFO  L225             Difference]: With dead ends: 720
[2024-11-08 18:17:25,232 INFO  L226             Difference]: Without dead ends: 393
[2024-11-08 18:17:25,233 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:17:25,234 INFO  L432           NwaCegarLoop]: 567 mSDtfsCounter, 487 mSDsluCounter, 1105 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 487 SdHoareTripleChecker+Valid, 1672 SdHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:25,234 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [487 Valid, 1672 Invalid, 57 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:25,235 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 18:17:25,242 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 18:17:25,243 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:25,244 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions.
[2024-11-08 18:17:25,244 INFO  L78                 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 121
[2024-11-08 18:17:25,245 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:25,245 INFO  L471      AbstractCegarLoop]: Abstraction has 393 states and 578 transitions.
[2024-11-08 18:17:25,245 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:25,246 INFO  L276                IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions.
[2024-11-08 18:17:25,247 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 123
[2024-11-08 18:17:25,247 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:25,247 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:25,247 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4
[2024-11-08 18:17:25,248 INFO  L396      AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:25,248 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:25,248 INFO  L85        PathProgramCache]: Analyzing trace with hash 591968460, now seen corresponding path program 1 times
[2024-11-08 18:17:25,248 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:25,248 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1069589969]
[2024-11-08 18:17:25,249 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:25,249 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:25,339 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,629 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:25,631 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,637 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:25,638 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,640 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:25,642 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:25,644 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:25,644 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:25,645 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1069589969]
[2024-11-08 18:17:25,645 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1069589969] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:25,646 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:25,646 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:25,646 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804550549]
[2024-11-08 18:17:25,646 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:25,647 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:25,647 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:25,647 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:25,647 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:25,648 INFO  L87              Difference]: Start difference. First operand 393 states and 578 transitions. Second operand  has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:25,784 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:25,785 INFO  L93              Difference]: Finished difference Result 716 states and 1052 transitions.
[2024-11-08 18:17:25,785 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:25,785 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122
[2024-11-08 18:17:25,786 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:25,787 INFO  L225             Difference]: With dead ends: 716
[2024-11-08 18:17:25,787 INFO  L226             Difference]: Without dead ends: 393
[2024-11-08 18:17:25,788 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:25,790 INFO  L432           NwaCegarLoop]: 534 mSDtfsCounter, 562 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 565 SdHoareTripleChecker+Valid, 1077 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:25,791 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [565 Valid, 1077 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:25,792 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 18:17:25,800 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 18:17:25,801 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:25,802 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions.
[2024-11-08 18:17:25,802 INFO  L78                 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122
[2024-11-08 18:17:25,803 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:25,803 INFO  L471      AbstractCegarLoop]: Abstraction has 393 states and 577 transitions.
[2024-11-08 18:17:25,803 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:25,803 INFO  L276                IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions.
[2024-11-08 18:17:25,804 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 124
[2024-11-08 18:17:25,804 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:25,804 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:25,805 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5
[2024-11-08 18:17:25,805 INFO  L396      AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:25,805 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:25,805 INFO  L85        PathProgramCache]: Analyzing trace with hash 1872622752, now seen corresponding path program 1 times
[2024-11-08 18:17:25,805 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:25,806 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454409614]
[2024-11-08 18:17:25,806 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:25,806 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:25,894 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:26,291 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:26,292 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:26,295 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:26,296 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:26,299 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:26,300 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:26,303 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:26,303 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:26,304 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1454409614]
[2024-11-08 18:17:26,304 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1454409614] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:26,304 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:26,304 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:26,304 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255310991]
[2024-11-08 18:17:26,305 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:26,305 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:26,305 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:26,306 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:26,306 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:26,306 INFO  L87              Difference]: Start difference. First operand 393 states and 577 transitions. Second operand  has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:26,437 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:26,437 INFO  L93              Difference]: Finished difference Result 716 states and 1050 transitions.
[2024-11-08 18:17:26,438 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:26,438 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123
[2024-11-08 18:17:26,439 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:26,440 INFO  L225             Difference]: With dead ends: 716
[2024-11-08 18:17:26,440 INFO  L226             Difference]: Without dead ends: 393
[2024-11-08 18:17:26,441 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:26,445 INFO  L432           NwaCegarLoop]: 534 mSDtfsCounter, 1025 mSDsluCounter, 536 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1028 SdHoareTripleChecker+Valid, 1070 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:26,445 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1028 Valid, 1070 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:26,446 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 18:17:26,455 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 18:17:26,456 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:26,457 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions.
[2024-11-08 18:17:26,458 INFO  L78                 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123
[2024-11-08 18:17:26,458 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:26,458 INFO  L471      AbstractCegarLoop]: Abstraction has 393 states and 576 transitions.
[2024-11-08 18:17:26,459 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:26,459 INFO  L276                IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions.
[2024-11-08 18:17:26,460 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 125
[2024-11-08 18:17:26,460 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:26,461 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:26,461 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6
[2024-11-08 18:17:26,461 INFO  L396      AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:26,461 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:26,462 INFO  L85        PathProgramCache]: Analyzing trace with hash 1045351596, now seen corresponding path program 1 times
[2024-11-08 18:17:26,462 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:26,462 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [554212113]
[2024-11-08 18:17:26,462 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:26,462 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:26,572 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,009 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:27,010 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,013 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:27,014 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,017 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:27,018 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,021 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:27,021 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:27,021 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [554212113]
[2024-11-08 18:17:27,021 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [554212113] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:27,022 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:27,022 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:27,022 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355607830]
[2024-11-08 18:17:27,022 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:27,022 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:27,023 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:27,023 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:27,023 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:27,024 INFO  L87              Difference]: Start difference. First operand 393 states and 576 transitions. Second operand  has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:27,102 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:27,103 INFO  L93              Difference]: Finished difference Result 715 states and 1047 transitions.
[2024-11-08 18:17:27,103 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:27,104 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124
[2024-11-08 18:17:27,104 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:27,106 INFO  L225             Difference]: With dead ends: 715
[2024-11-08 18:17:27,106 INFO  L226             Difference]: Without dead ends: 392
[2024-11-08 18:17:27,106 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:27,107 INFO  L432           NwaCegarLoop]: 550 mSDtfsCounter, 479 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:27,108 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1102 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:27,109 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 392 states.
[2024-11-08 18:17:27,116 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392.
[2024-11-08 18:17:27,117 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 392 states, 387 states have (on average 1.4651162790697674) internal successors, (567), 387 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:27,118 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 573 transitions.
[2024-11-08 18:17:27,119 INFO  L78                 Accepts]: Start accepts. Automaton has 392 states and 573 transitions. Word has length 124
[2024-11-08 18:17:27,119 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:27,119 INFO  L471      AbstractCegarLoop]: Abstraction has 392 states and 573 transitions.
[2024-11-08 18:17:27,119 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:27,120 INFO  L276                IsEmpty]: Start isEmpty. Operand 392 states and 573 transitions.
[2024-11-08 18:17:27,121 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 126
[2024-11-08 18:17:27,121 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:27,121 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:27,122 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7
[2024-11-08 18:17:27,122 INFO  L396      AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:27,122 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:27,122 INFO  L85        PathProgramCache]: Analyzing trace with hash 1478510816, now seen corresponding path program 1 times
[2024-11-08 18:17:27,123 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:27,123 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1312241466]
[2024-11-08 18:17:27,123 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:27,123 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:27,222 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,520 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:27,521 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,524 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:27,525 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,527 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:27,528 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:27,531 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:27,531 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:27,531 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1312241466]
[2024-11-08 18:17:27,532 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1312241466] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:27,532 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:27,532 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:27,532 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926404955]
[2024-11-08 18:17:27,532 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:27,533 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:27,533 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:27,534 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:27,534 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:27,534 INFO  L87              Difference]: Start difference. First operand 392 states and 573 transitions. Second operand  has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:27,610 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:27,610 INFO  L93              Difference]: Finished difference Result 716 states and 1044 transitions.
[2024-11-08 18:17:27,610 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:17:27,611 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 125
[2024-11-08 18:17:27,611 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:27,612 INFO  L225             Difference]: With dead ends: 716
[2024-11-08 18:17:27,613 INFO  L226             Difference]: Without dead ends: 392
[2024-11-08 18:17:27,613 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:17:27,614 INFO  L432           NwaCegarLoop]: 562 mSDtfsCounter, 483 mSDsluCounter, 1116 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 1678 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:27,614 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 1678 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:27,615 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 392 states.
[2024-11-08 18:17:27,622 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392.
[2024-11-08 18:17:27,623 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 392 states, 387 states have (on average 1.4625322997416021) internal successors, (566), 387 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:27,624 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 572 transitions.
[2024-11-08 18:17:27,625 INFO  L78                 Accepts]: Start accepts. Automaton has 392 states and 572 transitions. Word has length 125
[2024-11-08 18:17:27,625 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:27,625 INFO  L471      AbstractCegarLoop]: Abstraction has 392 states and 572 transitions.
[2024-11-08 18:17:27,626 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:27,626 INFO  L276                IsEmpty]: Start isEmpty. Operand 392 states and 572 transitions.
[2024-11-08 18:17:27,627 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 127
[2024-11-08 18:17:27,627 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:27,627 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:27,627 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8
[2024-11-08 18:17:27,628 INFO  L396      AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:27,628 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:27,628 INFO  L85        PathProgramCache]: Analyzing trace with hash -660751547, now seen corresponding path program 1 times
[2024-11-08 18:17:27,628 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:27,629 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988625846]
[2024-11-08 18:17:27,629 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:27,629 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:27,747 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,151 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:28,152 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,158 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 18:17:28,159 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,161 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 18:17:28,162 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,165 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:28,165 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:28,165 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988625846]
[2024-11-08 18:17:28,165 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988625846] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:28,165 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:28,166 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:28,166 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833428977]
[2024-11-08 18:17:28,166 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:28,166 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:28,167 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:28,167 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:28,168 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:28,168 INFO  L87              Difference]: Start difference. First operand 392 states and 572 transitions. Second operand  has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 18:17:28,250 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:28,250 INFO  L93              Difference]: Finished difference Result 714 states and 1040 transitions.
[2024-11-08 18:17:28,251 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:28,251 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 126
[2024-11-08 18:17:28,251 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:28,254 INFO  L225             Difference]: With dead ends: 714
[2024-11-08 18:17:28,254 INFO  L226             Difference]: Without dead ends: 392
[2024-11-08 18:17:28,254 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:28,255 INFO  L432           NwaCegarLoop]: 552 mSDtfsCounter, 517 mSDsluCounter, 554 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 519 SdHoareTripleChecker+Valid, 1106 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:28,256 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [519 Valid, 1106 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:28,257 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 392 states.
[2024-11-08 18:17:28,265 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392.
[2024-11-08 18:17:28,266 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 392 states, 387 states have (on average 1.4599483204134367) internal successors, (565), 387 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:28,270 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 571 transitions.
[2024-11-08 18:17:28,270 INFO  L78                 Accepts]: Start accepts. Automaton has 392 states and 571 transitions. Word has length 126
[2024-11-08 18:17:28,270 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:28,270 INFO  L471      AbstractCegarLoop]: Abstraction has 392 states and 571 transitions.
[2024-11-08 18:17:28,270 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 18:17:28,271 INFO  L276                IsEmpty]: Start isEmpty. Operand 392 states and 571 transitions.
[2024-11-08 18:17:28,272 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 128
[2024-11-08 18:17:28,272 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:28,272 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:28,272 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9
[2024-11-08 18:17:28,274 INFO  L396      AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:28,275 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:28,275 INFO  L85        PathProgramCache]: Analyzing trace with hash 449823377, now seen corresponding path program 1 times
[2024-11-08 18:17:28,276 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:28,276 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660337541]
[2024-11-08 18:17:28,276 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:28,276 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:28,502 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,949 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:28,951 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,956 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 18:17:28,958 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,963 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 18:17:28,965 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:28,972 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:28,972 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:28,972 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660337541]
[2024-11-08 18:17:28,973 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1660337541] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:28,973 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:28,973 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:28,973 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836104999]
[2024-11-08 18:17:28,973 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:28,974 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:28,974 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:28,975 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:28,976 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:28,976 INFO  L87              Difference]: Start difference. First operand 392 states and 571 transitions. Second operand  has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:29,123 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:29,123 INFO  L93              Difference]: Finished difference Result 714 states and 1038 transitions.
[2024-11-08 18:17:29,125 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:29,125 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 127
[2024-11-08 18:17:29,125 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:29,127 INFO  L225             Difference]: With dead ends: 714
[2024-11-08 18:17:29,127 INFO  L226             Difference]: Without dead ends: 392
[2024-11-08 18:17:29,127 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:29,128 INFO  L432           NwaCegarLoop]: 529 mSDtfsCounter, 473 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:29,128 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1060 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:29,129 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 392 states.
[2024-11-08 18:17:29,137 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392.
[2024-11-08 18:17:29,138 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 392 states, 387 states have (on average 1.4573643410852712) internal successors, (564), 387 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:29,141 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 570 transitions.
[2024-11-08 18:17:29,141 INFO  L78                 Accepts]: Start accepts. Automaton has 392 states and 570 transitions. Word has length 127
[2024-11-08 18:17:29,141 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:29,141 INFO  L471      AbstractCegarLoop]: Abstraction has 392 states and 570 transitions.
[2024-11-08 18:17:29,142 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:29,142 INFO  L276                IsEmpty]: Start isEmpty. Operand 392 states and 570 transitions.
[2024-11-08 18:17:29,144 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 129
[2024-11-08 18:17:29,144 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:29,144 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:29,145 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10
[2024-11-08 18:17:29,145 INFO  L396      AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:29,145 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:29,145 INFO  L85        PathProgramCache]: Analyzing trace with hash 32023767, now seen corresponding path program 1 times
[2024-11-08 18:17:29,145 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:29,146 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417484984]
[2024-11-08 18:17:29,146 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:29,146 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:29,365 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:29,875 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:29,877 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:29,880 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 18:17:29,882 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:29,885 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 18:17:29,887 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:29,891 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:29,892 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:29,892 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417484984]
[2024-11-08 18:17:29,892 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1417484984] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:29,892 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:29,892 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:29,892 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1642017294]
[2024-11-08 18:17:29,893 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:29,893 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:29,893 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:29,894 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:29,894 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:29,894 INFO  L87              Difference]: Start difference. First operand 392 states and 570 transitions. Second operand  has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:30,042 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:30,042 INFO  L93              Difference]: Finished difference Result 714 states and 1036 transitions.
[2024-11-08 18:17:30,043 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:30,043 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128
[2024-11-08 18:17:30,043 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:30,045 INFO  L225             Difference]: With dead ends: 714
[2024-11-08 18:17:30,045 INFO  L226             Difference]: Without dead ends: 392
[2024-11-08 18:17:30,045 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:30,046 INFO  L432           NwaCegarLoop]: 529 mSDtfsCounter, 934 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 934 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:30,046 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [934 Valid, 1060 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:30,047 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 392 states.
[2024-11-08 18:17:30,055 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392.
[2024-11-08 18:17:30,056 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 392 states, 387 states have (on average 1.454780361757106) internal successors, (563), 387 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:30,057 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 569 transitions.
[2024-11-08 18:17:30,058 INFO  L78                 Accepts]: Start accepts. Automaton has 392 states and 569 transitions. Word has length 128
[2024-11-08 18:17:30,058 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:30,058 INFO  L471      AbstractCegarLoop]: Abstraction has 392 states and 569 transitions.
[2024-11-08 18:17:30,058 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:30,059 INFO  L276                IsEmpty]: Start isEmpty. Operand 392 states and 569 transitions.
[2024-11-08 18:17:30,060 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 130
[2024-11-08 18:17:30,060 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:30,060 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:30,060 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11
[2024-11-08 18:17:30,061 INFO  L396      AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:30,061 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:30,061 INFO  L85        PathProgramCache]: Analyzing trace with hash 818615250, now seen corresponding path program 1 times
[2024-11-08 18:17:30,061 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:30,061 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790092930]
[2024-11-08 18:17:30,062 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:30,062 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:30,220 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:30,651 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:30,652 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:30,655 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 18:17:30,657 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:30,660 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 18:17:30,662 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:30,666 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:30,666 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:30,667 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1790092930]
[2024-11-08 18:17:30,667 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1790092930] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:30,667 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:30,667 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:30,667 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835154253]
[2024-11-08 18:17:30,667 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:30,668 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:30,668 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:30,668 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:30,669 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:30,669 INFO  L87              Difference]: Start difference. First operand 392 states and 569 transitions. Second operand  has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:30,820 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:30,820 INFO  L93              Difference]: Finished difference Result 714 states and 1034 transitions.
[2024-11-08 18:17:30,820 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:30,821 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129
[2024-11-08 18:17:30,821 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:30,822 INFO  L225             Difference]: With dead ends: 714
[2024-11-08 18:17:30,823 INFO  L226             Difference]: Without dead ends: 392
[2024-11-08 18:17:30,823 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:30,824 INFO  L432           NwaCegarLoop]: 529 mSDtfsCounter, 468 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:30,824 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1067 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:30,825 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 392 states.
[2024-11-08 18:17:30,833 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 392.
[2024-11-08 18:17:30,834 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 392 states, 387 states have (on average 1.4521963824289406) internal successors, (562), 387 states have internal predecessors, (562), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:30,836 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 568 transitions.
[2024-11-08 18:17:30,836 INFO  L78                 Accepts]: Start accepts. Automaton has 392 states and 568 transitions. Word has length 129
[2024-11-08 18:17:30,837 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:30,837 INFO  L471      AbstractCegarLoop]: Abstraction has 392 states and 568 transitions.
[2024-11-08 18:17:30,837 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:30,837 INFO  L276                IsEmpty]: Start isEmpty. Operand 392 states and 568 transitions.
[2024-11-08 18:17:30,838 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 131
[2024-11-08 18:17:30,838 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:30,839 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:30,839 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12
[2024-11-08 18:17:30,839 INFO  L396      AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:30,839 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:30,839 INFO  L85        PathProgramCache]: Analyzing trace with hash 1634939734, now seen corresponding path program 1 times
[2024-11-08 18:17:30,840 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:30,840 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21579697]
[2024-11-08 18:17:30,840 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:30,840 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:31,016 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:31,683 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:31,684 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:31,686 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 18:17:31,686 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:31,688 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 18:17:31,689 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:31,690 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:31,690 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:31,690 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21579697]
[2024-11-08 18:17:31,691 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21579697] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:31,691 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:31,691 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:31,691 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601259073]
[2024-11-08 18:17:31,691 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:31,692 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:31,692 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:31,692 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:31,693 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:31,693 INFO  L87              Difference]: Start difference. First operand 392 states and 568 transitions. Second operand  has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:31,968 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:31,968 INFO  L93              Difference]: Finished difference Result 720 states and 1040 transitions.
[2024-11-08 18:17:31,969 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:17:31,969 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130
[2024-11-08 18:17:31,969 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:31,971 INFO  L225             Difference]: With dead ends: 720
[2024-11-08 18:17:31,971 INFO  L226             Difference]: Without dead ends: 396
[2024-11-08 18:17:31,972 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:31,973 INFO  L432           NwaCegarLoop]: 558 mSDtfsCounter, 2 mSDsluCounter, 1521 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2079 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:31,973 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2079 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 18:17:31,975 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 396 states.
[2024-11-08 18:17:31,985 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 394.
[2024-11-08 18:17:31,986 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 394 states, 389 states have (on average 1.4498714652956297) internal successors, (564), 389 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:31,987 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 570 transitions.
[2024-11-08 18:17:31,988 INFO  L78                 Accepts]: Start accepts. Automaton has 394 states and 570 transitions. Word has length 130
[2024-11-08 18:17:31,988 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:31,988 INFO  L471      AbstractCegarLoop]: Abstraction has 394 states and 570 transitions.
[2024-11-08 18:17:31,988 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:31,988 INFO  L276                IsEmpty]: Start isEmpty. Operand 394 states and 570 transitions.
[2024-11-08 18:17:31,990 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 132
[2024-11-08 18:17:31,990 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:31,990 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:31,990 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13
[2024-11-08 18:17:31,991 INFO  L396      AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:31,991 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:31,991 INFO  L85        PathProgramCache]: Analyzing trace with hash -286516045, now seen corresponding path program 1 times
[2024-11-08 18:17:31,991 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:31,991 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787627138]
[2024-11-08 18:17:31,992 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:31,992 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:32,198 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:32,428 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:32,429 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:32,432 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 18:17:32,433 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:32,434 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 18:17:32,435 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:32,438 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:32,438 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:32,438 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787627138]
[2024-11-08 18:17:32,438 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787627138] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:32,438 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:32,439 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:32,439 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1888935372]
[2024-11-08 18:17:32,439 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:32,439 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:32,439 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:32,440 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:32,440 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:32,440 INFO  L87              Difference]: Start difference. First operand 394 states and 570 transitions. Second operand  has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 18:17:32,523 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:32,523 INFO  L93              Difference]: Finished difference Result 718 states and 1036 transitions.
[2024-11-08 18:17:32,524 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:32,524 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 131
[2024-11-08 18:17:32,524 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:32,526 INFO  L225             Difference]: With dead ends: 718
[2024-11-08 18:17:32,526 INFO  L226             Difference]: Without dead ends: 394
[2024-11-08 18:17:32,530 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:32,530 INFO  L432           NwaCegarLoop]: 549 mSDtfsCounter, 512 mSDsluCounter, 551 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1100 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:32,531 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1100 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:32,532 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 394 states.
[2024-11-08 18:17:32,541 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394.
[2024-11-08 18:17:32,542 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 394 states, 389 states have (on average 1.4473007712082262) internal successors, (563), 389 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:32,544 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 569 transitions.
[2024-11-08 18:17:32,544 INFO  L78                 Accepts]: Start accepts. Automaton has 394 states and 569 transitions. Word has length 131
[2024-11-08 18:17:32,544 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:32,545 INFO  L471      AbstractCegarLoop]: Abstraction has 394 states and 569 transitions.
[2024-11-08 18:17:32,545 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 18:17:32,545 INFO  L276                IsEmpty]: Start isEmpty. Operand 394 states and 569 transitions.
[2024-11-08 18:17:32,546 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 133
[2024-11-08 18:17:32,546 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:32,547 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:32,547 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14
[2024-11-08 18:17:32,547 INFO  L396      AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:32,547 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:32,548 INFO  L85        PathProgramCache]: Analyzing trace with hash 1359136490, now seen corresponding path program 1 times
[2024-11-08 18:17:32,548 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:32,548 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69845799]
[2024-11-08 18:17:32,548 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:32,548 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:32,767 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:33,067 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:33,068 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:33,073 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:33,074 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:33,077 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:33,079 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:33,082 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:33,083 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:33,083 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69845799]
[2024-11-08 18:17:33,085 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [69845799] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:33,085 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:33,085 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:33,085 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911522877]
[2024-11-08 18:17:33,085 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:33,086 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:33,086 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:33,086 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:33,086 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:33,087 INFO  L87              Difference]: Start difference. First operand 394 states and 569 transitions. Second operand  has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:33,161 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:33,161 INFO  L93              Difference]: Finished difference Result 718 states and 1034 transitions.
[2024-11-08 18:17:33,162 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:33,162 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 132
[2024-11-08 18:17:33,163 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:33,164 INFO  L225             Difference]: With dead ends: 718
[2024-11-08 18:17:33,164 INFO  L226             Difference]: Without dead ends: 394
[2024-11-08 18:17:33,165 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:33,165 INFO  L432           NwaCegarLoop]: 545 mSDtfsCounter, 471 mSDsluCounter, 547 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 471 SdHoareTripleChecker+Valid, 1092 SdHoareTripleChecker+Invalid, 36 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:33,166 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [471 Valid, 1092 Invalid, 36 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:33,167 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 394 states.
[2024-11-08 18:17:33,176 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 394.
[2024-11-08 18:17:33,177 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 394 states, 389 states have (on average 1.4447300771208227) internal successors, (562), 389 states have internal predecessors, (562), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:33,178 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 568 transitions.
[2024-11-08 18:17:33,179 INFO  L78                 Accepts]: Start accepts. Automaton has 394 states and 568 transitions. Word has length 132
[2024-11-08 18:17:33,179 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:33,179 INFO  L471      AbstractCegarLoop]: Abstraction has 394 states and 568 transitions.
[2024-11-08 18:17:33,179 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:33,180 INFO  L276                IsEmpty]: Start isEmpty. Operand 394 states and 568 transitions.
[2024-11-08 18:17:33,181 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 134
[2024-11-08 18:17:33,181 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:33,181 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:33,181 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15
[2024-11-08 18:17:33,182 INFO  L396      AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:33,182 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:33,182 INFO  L85        PathProgramCache]: Analyzing trace with hash 1183901148, now seen corresponding path program 1 times
[2024-11-08 18:17:33,182 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:33,182 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062321585]
[2024-11-08 18:17:33,183 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:33,183 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:33,467 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:34,332 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:34,333 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:34,334 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:34,335 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:34,336 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:34,337 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:34,339 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:34,339 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:34,339 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062321585]
[2024-11-08 18:17:34,339 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2062321585] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:34,339 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:34,340 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:34,340 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427633767]
[2024-11-08 18:17:34,340 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:34,341 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:34,341 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:34,341 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:34,342 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:34,343 INFO  L87              Difference]: Start difference. First operand 394 states and 568 transitions. Second operand  has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:34,405 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:34,406 INFO  L93              Difference]: Finished difference Result 763 states and 1087 transitions.
[2024-11-08 18:17:34,406 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:17:34,406 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133
[2024-11-08 18:17:34,407 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:34,408 INFO  L225             Difference]: With dead ends: 763
[2024-11-08 18:17:34,409 INFO  L226             Difference]: Without dead ends: 439
[2024-11-08 18:17:34,409 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:34,410 INFO  L432           NwaCegarLoop]: 556 mSDtfsCounter, 17 mSDsluCounter, 1659 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 2215 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:34,410 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [17 Valid, 2215 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:34,411 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 439 states.
[2024-11-08 18:17:34,422 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 437.
[2024-11-08 18:17:34,423 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 437 states, 432 states have (on average 1.4189814814814814) internal successors, (613), 432 states have internal predecessors, (613), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:34,426 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 437 states to 437 states and 619 transitions.
[2024-11-08 18:17:34,426 INFO  L78                 Accepts]: Start accepts. Automaton has 437 states and 619 transitions. Word has length 133
[2024-11-08 18:17:34,426 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:34,427 INFO  L471      AbstractCegarLoop]: Abstraction has 437 states and 619 transitions.
[2024-11-08 18:17:34,427 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:34,427 INFO  L276                IsEmpty]: Start isEmpty. Operand 437 states and 619 transitions.
[2024-11-08 18:17:34,429 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 135
[2024-11-08 18:17:34,429 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:34,429 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:34,429 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16
[2024-11-08 18:17:34,430 INFO  L396      AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:34,430 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:34,430 INFO  L85        PathProgramCache]: Analyzing trace with hash -1044882654, now seen corresponding path program 1 times
[2024-11-08 18:17:34,430 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:34,430 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567413900]
[2024-11-08 18:17:34,431 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:34,431 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:34,671 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:35,407 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:35,408 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:35,410 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:35,411 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:35,413 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:35,414 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:35,416 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:35,417 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:35,417 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567413900]
[2024-11-08 18:17:35,417 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [567413900] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:35,417 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:35,417 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:35,418 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [437208123]
[2024-11-08 18:17:35,418 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:35,418 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:35,418 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:35,419 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:35,419 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:35,420 INFO  L87              Difference]: Start difference. First operand 437 states and 619 transitions. Second operand  has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:35,885 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:35,885 INFO  L93              Difference]: Finished difference Result 808 states and 1140 transitions.
[2024-11-08 18:17:35,886 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:17:35,886 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134
[2024-11-08 18:17:35,887 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:35,888 INFO  L225             Difference]: With dead ends: 808
[2024-11-08 18:17:35,889 INFO  L226             Difference]: Without dead ends: 441
[2024-11-08 18:17:35,889 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:35,890 INFO  L432           NwaCegarLoop]: 412 mSDtfsCounter, 479 mSDsluCounter, 803 mSDsCounter, 0 mSdLazyCounter, 463 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1215 SdHoareTripleChecker+Invalid, 463 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 463 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:35,890 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1215 Invalid, 463 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 463 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 18:17:35,891 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 441 states.
[2024-11-08 18:17:35,902 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 439.
[2024-11-08 18:17:35,903 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 439 states, 434 states have (on average 1.4170506912442395) internal successors, (615), 434 states have internal predecessors, (615), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:35,905 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 621 transitions.
[2024-11-08 18:17:35,905 INFO  L78                 Accepts]: Start accepts. Automaton has 439 states and 621 transitions. Word has length 134
[2024-11-08 18:17:35,905 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:35,905 INFO  L471      AbstractCegarLoop]: Abstraction has 439 states and 621 transitions.
[2024-11-08 18:17:35,906 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:35,906 INFO  L276                IsEmpty]: Start isEmpty. Operand 439 states and 621 transitions.
[2024-11-08 18:17:35,907 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 135
[2024-11-08 18:17:35,908 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:35,908 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:35,908 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17
[2024-11-08 18:17:35,909 INFO  L396      AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:35,909 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:35,909 INFO  L85        PathProgramCache]: Analyzing trace with hash -192240727, now seen corresponding path program 1 times
[2024-11-08 18:17:35,909 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:35,910 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29089899]
[2024-11-08 18:17:35,910 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:35,910 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:36,138 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:36,488 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:36,489 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:36,490 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:36,492 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:36,493 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:36,494 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:36,497 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:36,497 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:36,497 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29089899]
[2024-11-08 18:17:36,497 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [29089899] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:36,497 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:36,498 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:36,498 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043489999]
[2024-11-08 18:17:36,498 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:36,499 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:36,499 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:36,500 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:36,500 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:36,500 INFO  L87              Difference]: Start difference. First operand 439 states and 621 transitions. Second operand  has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:36,751 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:36,751 INFO  L93              Difference]: Finished difference Result 812 states and 1142 transitions.
[2024-11-08 18:17:36,752 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:36,752 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134
[2024-11-08 18:17:36,752 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:36,754 INFO  L225             Difference]: With dead ends: 812
[2024-11-08 18:17:36,754 INFO  L226             Difference]: Without dead ends: 439
[2024-11-08 18:17:36,755 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:36,755 INFO  L432           NwaCegarLoop]: 557 mSDtfsCounter, 2 mSDsluCounter, 964 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1521 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:36,756 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 1521 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 18:17:36,757 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 439 states.
[2024-11-08 18:17:36,766 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 439.
[2024-11-08 18:17:36,767 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 439 states, 434 states have (on average 1.412442396313364) internal successors, (613), 434 states have internal predecessors, (613), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:17:36,769 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 619 transitions.
[2024-11-08 18:17:36,769 INFO  L78                 Accepts]: Start accepts. Automaton has 439 states and 619 transitions. Word has length 134
[2024-11-08 18:17:36,770 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:36,770 INFO  L471      AbstractCegarLoop]: Abstraction has 439 states and 619 transitions.
[2024-11-08 18:17:36,770 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:36,770 INFO  L276                IsEmpty]: Start isEmpty. Operand 439 states and 619 transitions.
[2024-11-08 18:17:36,772 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 136
[2024-11-08 18:17:36,772 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:36,772 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:36,772 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18
[2024-11-08 18:17:36,772 INFO  L396      AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:36,773 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:36,773 INFO  L85        PathProgramCache]: Analyzing trace with hash -2061235916, now seen corresponding path program 1 times
[2024-11-08 18:17:36,773 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:36,773 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043709788]
[2024-11-08 18:17:36,773 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:36,774 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:36,953 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:37,737 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:37,740 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:37,743 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:37,744 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:37,749 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:37,750 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:37,753 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:17:37,753 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:37,754 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043709788]
[2024-11-08 18:17:37,754 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2043709788] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:37,754 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:37,754 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 18:17:37,754 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495991847]
[2024-11-08 18:17:37,755 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:37,755 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:17:37,755 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:37,756 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:17:37,756 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:37,757 INFO  L87              Difference]: Start difference. First operand 439 states and 619 transitions. Second operand  has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:37,914 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:37,914 INFO  L93              Difference]: Finished difference Result 974 states and 1352 transitions.
[2024-11-08 18:17:37,915 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:17:37,915 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 135
[2024-11-08 18:17:37,916 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:37,918 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:37,918 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:37,920 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72
[2024-11-08 18:17:37,920 INFO  L432           NwaCegarLoop]: 549 mSDtfsCounter, 848 mSDsluCounter, 1641 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 851 SdHoareTripleChecker+Valid, 2190 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:37,921 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [851 Valid, 2190 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:37,923 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:37,948 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:37,949 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3802345058626466) internal successors, (824), 597 states have internal predecessors, (824), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:37,951 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 836 transitions.
[2024-11-08 18:17:37,952 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 836 transitions. Word has length 135
[2024-11-08 18:17:37,952 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:37,952 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 836 transitions.
[2024-11-08 18:17:37,953 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:17:37,953 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 836 transitions.
[2024-11-08 18:17:37,959 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 325
[2024-11-08 18:17:37,959 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:37,960 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:37,960 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19
[2024-11-08 18:17:37,960 INFO  L396      AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:37,960 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:37,961 INFO  L85        PathProgramCache]: Analyzing trace with hash 218284186, now seen corresponding path program 1 times
[2024-11-08 18:17:37,961 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:37,961 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204221257]
[2024-11-08 18:17:37,961 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:37,961 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:38,487 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,265 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:39,267 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,268 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:39,270 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,276 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:39,277 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,279 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 232
[2024-11-08 18:17:39,280 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,281 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 248
[2024-11-08 18:17:39,281 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,283 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260
[2024-11-08 18:17:39,284 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:39,287 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:39,287 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:39,287 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204221257]
[2024-11-08 18:17:39,287 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [204221257] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:39,287 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:39,288 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:39,288 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587882973]
[2024-11-08 18:17:39,288 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:39,288 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:39,290 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:39,291 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:39,291 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:39,291 INFO  L87              Difference]: Start difference. First operand 605 states and 836 transitions. Second operand  has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:39,423 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:39,423 INFO  L93              Difference]: Finished difference Result 974 states and 1351 transitions.
[2024-11-08 18:17:39,424 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:39,424 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324
[2024-11-08 18:17:39,424 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:39,426 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:39,427 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:39,428 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:39,429 INFO  L432           NwaCegarLoop]: 526 mSDtfsCounter, 512 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:39,429 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1061 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:39,432 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:39,448 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:39,449 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3785594639865997) internal successors, (823), 597 states have internal predecessors, (823), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:39,451 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 835 transitions.
[2024-11-08 18:17:39,452 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 835 transitions. Word has length 324
[2024-11-08 18:17:39,452 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:39,452 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 835 transitions.
[2024-11-08 18:17:39,453 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:39,453 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 835 transitions.
[2024-11-08 18:17:39,458 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 326
[2024-11-08 18:17:39,458 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:39,459 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:39,459 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20
[2024-11-08 18:17:39,460 INFO  L396      AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:39,460 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:39,460 INFO  L85        PathProgramCache]: Analyzing trace with hash -981853628, now seen corresponding path program 1 times
[2024-11-08 18:17:39,461 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:39,461 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922467659]
[2024-11-08 18:17:39,461 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:39,461 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:39,814 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,418 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:40,420 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,421 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:40,423 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,425 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:40,426 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,428 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 233
[2024-11-08 18:17:40,429 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,430 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249
[2024-11-08 18:17:40,431 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,434 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261
[2024-11-08 18:17:40,435 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:40,437 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:40,437 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:40,437 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922467659]
[2024-11-08 18:17:40,437 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1922467659] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:40,437 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:40,438 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:40,438 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941790433]
[2024-11-08 18:17:40,438 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:40,438 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:40,439 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:40,439 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:40,440 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:40,440 INFO  L87              Difference]: Start difference. First operand 605 states and 835 transitions. Second operand  has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:40,562 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:40,563 INFO  L93              Difference]: Finished difference Result 974 states and 1349 transitions.
[2024-11-08 18:17:40,564 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:40,564 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325
[2024-11-08 18:17:40,565 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:40,567 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:40,567 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:40,568 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:40,570 INFO  L432           NwaCegarLoop]: 526 mSDtfsCounter, 916 mSDsluCounter, 528 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 919 SdHoareTripleChecker+Valid, 1054 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:40,570 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [919 Valid, 1054 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:40,571 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:40,587 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:40,588 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3768844221105527) internal successors, (822), 597 states have internal predecessors, (822), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:40,590 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 834 transitions.
[2024-11-08 18:17:40,591 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 834 transitions. Word has length 325
[2024-11-08 18:17:40,591 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:40,591 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 834 transitions.
[2024-11-08 18:17:40,591 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:40,592 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 834 transitions.
[2024-11-08 18:17:40,596 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 327
[2024-11-08 18:17:40,597 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:40,597 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:40,597 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21
[2024-11-08 18:17:40,598 INFO  L396      AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:40,598 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:40,599 INFO  L85        PathProgramCache]: Analyzing trace with hash 587676239, now seen corresponding path program 1 times
[2024-11-08 18:17:40,599 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:40,599 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172856558]
[2024-11-08 18:17:40,599 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:40,599 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:40,870 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,535 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:41,537 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,538 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:41,540 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,542 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:41,543 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,544 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 234
[2024-11-08 18:17:41,545 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,546 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250
[2024-11-08 18:17:41,547 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,548 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262
[2024-11-08 18:17:41,549 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:41,551 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:41,551 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:41,552 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172856558]
[2024-11-08 18:17:41,552 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [172856558] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:41,552 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:41,552 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:41,553 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110852780]
[2024-11-08 18:17:41,553 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:41,554 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:41,554 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:41,555 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:41,555 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:41,555 INFO  L87              Difference]: Start difference. First operand 605 states and 834 transitions. Second operand  has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:41,674 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:41,674 INFO  L93              Difference]: Finished difference Result 974 states and 1347 transitions.
[2024-11-08 18:17:41,675 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:41,675 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326
[2024-11-08 18:17:41,676 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:41,678 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:41,678 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:41,679 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:41,679 INFO  L432           NwaCegarLoop]: 526 mSDtfsCounter, 496 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 499 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:41,679 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [499 Valid, 1061 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:41,680 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:41,696 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:41,698 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3752093802345058) internal successors, (821), 597 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:41,701 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 833 transitions.
[2024-11-08 18:17:41,701 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 833 transitions. Word has length 326
[2024-11-08 18:17:41,701 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:41,701 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 833 transitions.
[2024-11-08 18:17:41,702 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:41,702 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 833 transitions.
[2024-11-08 18:17:41,707 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 328
[2024-11-08 18:17:41,708 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:41,710 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:41,710 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22
[2024-11-08 18:17:41,710 INFO  L396      AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:41,711 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:41,711 INFO  L85        PathProgramCache]: Analyzing trace with hash -1983046695, now seen corresponding path program 1 times
[2024-11-08 18:17:41,711 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:41,711 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1797356427]
[2024-11-08 18:17:41,711 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:41,713 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:42,009 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,648 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:42,650 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,653 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:42,654 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,657 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:42,659 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,661 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 235
[2024-11-08 18:17:42,662 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,663 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251
[2024-11-08 18:17:42,664 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,665 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263
[2024-11-08 18:17:42,666 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:42,668 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:42,669 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:42,669 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1797356427]
[2024-11-08 18:17:42,669 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1797356427] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:42,669 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:42,669 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:42,670 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660032525]
[2024-11-08 18:17:42,670 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:42,671 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:42,671 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:42,671 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:42,672 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:42,672 INFO  L87              Difference]: Start difference. First operand 605 states and 833 transitions. Second operand  has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:42,798 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:42,798 INFO  L93              Difference]: Finished difference Result 974 states and 1345 transitions.
[2024-11-08 18:17:42,799 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:42,799 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327
[2024-11-08 18:17:42,800 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:42,802 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:42,802 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:42,803 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:42,804 INFO  L432           NwaCegarLoop]: 526 mSDtfsCounter, 488 mSDsluCounter, 535 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 491 SdHoareTripleChecker+Valid, 1061 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:42,804 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [491 Valid, 1061 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:42,805 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:42,821 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:42,822 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.373534338358459) internal successors, (820), 597 states have internal predecessors, (820), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:42,824 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 832 transitions.
[2024-11-08 18:17:42,825 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 832 transitions. Word has length 327
[2024-11-08 18:17:42,825 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:42,825 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 832 transitions.
[2024-11-08 18:17:42,825 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:42,826 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 832 transitions.
[2024-11-08 18:17:42,830 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 329
[2024-11-08 18:17:42,830 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:42,831 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:42,831 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23
[2024-11-08 18:17:42,832 INFO  L396      AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:42,832 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:42,832 INFO  L85        PathProgramCache]: Analyzing trace with hash -51382396, now seen corresponding path program 1 times
[2024-11-08 18:17:42,832 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:42,833 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483183256]
[2024-11-08 18:17:42,833 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:42,833 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:43,122 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,877 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:43,879 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,882 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:43,883 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,885 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:43,886 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,888 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 236
[2024-11-08 18:17:43,889 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,891 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252
[2024-11-08 18:17:43,893 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,895 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264
[2024-11-08 18:17:43,897 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:43,900 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:43,901 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:43,901 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483183256]
[2024-11-08 18:17:43,901 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [483183256] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:43,901 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:43,902 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:43,902 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607710722]
[2024-11-08 18:17:43,902 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:43,903 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:43,903 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:43,904 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:43,904 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:43,905 INFO  L87              Difference]: Start difference. First operand 605 states and 832 transitions. Second operand  has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:44,008 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:44,011 INFO  L93              Difference]: Finished difference Result 974 states and 1343 transitions.
[2024-11-08 18:17:44,012 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:44,013 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328
[2024-11-08 18:17:44,013 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:44,015 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:44,016 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:44,016 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:44,017 INFO  L432           NwaCegarLoop]: 540 mSDtfsCounter, 861 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 864 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:44,017 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [864 Valid, 1082 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:44,022 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:44,045 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:44,050 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3718592964824121) internal successors, (819), 597 states have internal predecessors, (819), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:44,053 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 831 transitions.
[2024-11-08 18:17:44,054 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 831 transitions. Word has length 328
[2024-11-08 18:17:44,054 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:44,055 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 831 transitions.
[2024-11-08 18:17:44,056 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:44,056 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 831 transitions.
[2024-11-08 18:17:44,064 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 330
[2024-11-08 18:17:44,065 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:44,065 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:44,066 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24
[2024-11-08 18:17:44,066 INFO  L396      AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:44,066 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:44,066 INFO  L85        PathProgramCache]: Analyzing trace with hash -1093240594, now seen corresponding path program 1 times
[2024-11-08 18:17:44,067 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:44,067 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013521656]
[2024-11-08 18:17:44,067 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:44,067 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:44,448 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,202 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:45,204 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,206 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:45,207 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,209 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:45,209 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,212 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 237
[2024-11-08 18:17:45,213 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,214 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 18:17:45,215 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,217 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265
[2024-11-08 18:17:45,218 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:45,220 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:45,221 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:45,221 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013521656]
[2024-11-08 18:17:45,221 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013521656] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:45,221 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:45,221 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:45,221 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198012766]
[2024-11-08 18:17:45,222 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:45,222 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:45,222 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:45,223 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:45,224 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:45,224 INFO  L87              Difference]: Start difference. First operand 605 states and 831 transitions. Second operand  has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:45,306 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:45,307 INFO  L93              Difference]: Finished difference Result 974 states and 1341 transitions.
[2024-11-08 18:17:45,307 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:45,308 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329
[2024-11-08 18:17:45,308 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:45,311 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:45,311 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:45,311 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:45,312 INFO  L432           NwaCegarLoop]: 540 mSDtfsCounter, 845 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 848 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:45,314 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [848 Valid, 1082 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:45,315 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:45,338 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:45,339 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3701842546063652) internal successors, (818), 597 states have internal predecessors, (818), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:45,340 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 830 transitions.
[2024-11-08 18:17:45,341 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 830 transitions. Word has length 329
[2024-11-08 18:17:45,341 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:45,341 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 830 transitions.
[2024-11-08 18:17:45,342 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:45,342 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 830 transitions.
[2024-11-08 18:17:45,347 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 331
[2024-11-08 18:17:45,347 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:45,347 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:45,347 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25
[2024-11-08 18:17:45,348 INFO  L396      AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:45,348 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:45,348 INFO  L85        PathProgramCache]: Analyzing trace with hash 2114926649, now seen corresponding path program 1 times
[2024-11-08 18:17:45,348 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:45,349 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169925826]
[2024-11-08 18:17:45,349 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:45,349 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:45,659 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,316 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:46,317 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,319 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:46,320 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,321 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:46,322 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,324 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 238
[2024-11-08 18:17:46,325 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,326 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 18:17:46,327 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,329 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 266
[2024-11-08 18:17:46,331 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:46,333 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:46,334 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:46,335 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169925826]
[2024-11-08 18:17:46,335 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169925826] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:46,335 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:46,335 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:46,335 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799233679]
[2024-11-08 18:17:46,335 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:46,336 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:46,336 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:46,338 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:46,338 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:46,338 INFO  L87              Difference]: Start difference. First operand 605 states and 830 transitions. Second operand  has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:46,703 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:46,704 INFO  L93              Difference]: Finished difference Result 974 states and 1339 transitions.
[2024-11-08 18:17:46,704 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:46,704 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330
[2024-11-08 18:17:46,705 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:46,707 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:46,707 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:46,708 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:46,709 INFO  L432           NwaCegarLoop]: 399 mSDtfsCounter, 450 mSDsluCounter, 408 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 453 SdHoareTripleChecker+Valid, 807 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:46,709 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [453 Valid, 807 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 18:17:46,710 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:46,726 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:46,727 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3685092127303182) internal successors, (817), 597 states have internal predecessors, (817), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:46,729 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 829 transitions.
[2024-11-08 18:17:46,729 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 829 transitions. Word has length 330
[2024-11-08 18:17:46,730 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:46,730 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 829 transitions.
[2024-11-08 18:17:46,730 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:46,730 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 829 transitions.
[2024-11-08 18:17:46,735 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 332
[2024-11-08 18:17:46,735 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:46,736 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:46,736 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26
[2024-11-08 18:17:46,736 INFO  L396      AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:46,737 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:46,737 INFO  L85        PathProgramCache]: Analyzing trace with hash 1243246979, now seen corresponding path program 1 times
[2024-11-08 18:17:46,737 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:46,737 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2004473597]
[2024-11-08 18:17:46,737 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:46,737 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:47,413 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,340 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:48,341 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,344 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:48,345 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,347 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:48,347 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,350 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 239
[2024-11-08 18:17:48,351 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,352 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 18:17:48,352 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,353 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267
[2024-11-08 18:17:48,354 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:48,358 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:48,358 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:48,359 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2004473597]
[2024-11-08 18:17:48,359 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2004473597] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:48,359 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:48,360 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 18:17:48,360 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287247230]
[2024-11-08 18:17:48,360 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:48,361 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:17:48,362 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:48,362 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:17:48,363 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 18:17:48,363 INFO  L87              Difference]: Start difference. First operand 605 states and 829 transitions. Second operand  has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:48,434 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:48,434 INFO  L93              Difference]: Finished difference Result 974 states and 1337 transitions.
[2024-11-08 18:17:48,435 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:48,435 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331
[2024-11-08 18:17:48,436 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:48,438 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:48,438 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:48,438 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:48,439 INFO  L432           NwaCegarLoop]: 539 mSDtfsCounter, 379 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 379 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:48,439 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [379 Valid, 1080 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:17:48,440 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:48,456 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:48,457 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3668341708542713) internal successors, (816), 597 states have internal predecessors, (816), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:48,459 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 828 transitions.
[2024-11-08 18:17:48,459 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 828 transitions. Word has length 331
[2024-11-08 18:17:48,460 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:48,460 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 828 transitions.
[2024-11-08 18:17:48,460 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:48,460 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 828 transitions.
[2024-11-08 18:17:48,465 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 333
[2024-11-08 18:17:48,466 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:48,466 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:48,466 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27
[2024-11-08 18:17:48,467 INFO  L396      AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:48,467 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:48,467 INFO  L85        PathProgramCache]: Analyzing trace with hash 108477739, now seen corresponding path program 1 times
[2024-11-08 18:17:48,467 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:48,467 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632610364]
[2024-11-08 18:17:48,468 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:48,468 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:49,099 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,919 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:49,921 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,924 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:49,925 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,928 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:49,929 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,933 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240
[2024-11-08 18:17:49,934 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,935 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 18:17:49,936 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,937 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 268
[2024-11-08 18:17:49,938 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:49,941 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:49,941 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:49,941 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632610364]
[2024-11-08 18:17:49,941 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632610364] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:49,941 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:49,942 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:49,942 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743638783]
[2024-11-08 18:17:49,942 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:49,943 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:49,943 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:49,944 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:49,944 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:49,944 INFO  L87              Difference]: Start difference. First operand 605 states and 828 transitions. Second operand  has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:50,077 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:50,078 INFO  L93              Difference]: Finished difference Result 974 states and 1335 transitions.
[2024-11-08 18:17:50,078 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:50,082 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332
[2024-11-08 18:17:50,083 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:50,085 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:50,085 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:50,086 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:50,086 INFO  L432           NwaCegarLoop]: 522 mSDtfsCounter, 857 mSDsluCounter, 524 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 857 SdHoareTripleChecker+Valid, 1046 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:50,090 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [857 Valid, 1046 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:50,092 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:50,108 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:50,109 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3651591289782246) internal successors, (815), 597 states have internal predecessors, (815), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:50,111 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 827 transitions.
[2024-11-08 18:17:50,111 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 827 transitions. Word has length 332
[2024-11-08 18:17:50,112 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:50,112 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 827 transitions.
[2024-11-08 18:17:50,112 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:50,112 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 827 transitions.
[2024-11-08 18:17:50,117 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 334
[2024-11-08 18:17:50,118 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:50,118 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:50,118 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28
[2024-11-08 18:17:50,119 INFO  L396      AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:50,119 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:50,119 INFO  L85        PathProgramCache]: Analyzing trace with hash -343103293, now seen corresponding path program 1 times
[2024-11-08 18:17:50,119 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:50,119 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339329017]
[2024-11-08 18:17:50,120 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:50,120 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:50,836 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,827 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:51,829 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,832 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:51,833 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,836 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:51,838 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,841 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 241
[2024-11-08 18:17:51,842 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,843 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 18:17:51,844 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,845 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269
[2024-11-08 18:17:51,846 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:51,848 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:51,848 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:51,849 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339329017]
[2024-11-08 18:17:51,849 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [339329017] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:51,849 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:51,849 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:51,849 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675024495]
[2024-11-08 18:17:51,849 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:51,850 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:51,850 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:51,851 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:51,851 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:51,851 INFO  L87              Difference]: Start difference. First operand 605 states and 827 transitions. Second operand  has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:51,979 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:51,980 INFO  L93              Difference]: Finished difference Result 974 states and 1333 transitions.
[2024-11-08 18:17:51,980 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:51,980 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333
[2024-11-08 18:17:51,981 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:51,983 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:51,983 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:51,984 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:51,985 INFO  L432           NwaCegarLoop]: 522 mSDtfsCounter, 847 mSDsluCounter, 524 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 847 SdHoareTripleChecker+Valid, 1046 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:51,985 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [847 Valid, 1046 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:51,986 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:52,003 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:52,004 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3634840871021776) internal successors, (814), 597 states have internal predecessors, (814), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:52,005 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 826 transitions.
[2024-11-08 18:17:52,006 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 826 transitions. Word has length 333
[2024-11-08 18:17:52,006 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:52,006 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 826 transitions.
[2024-11-08 18:17:52,007 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:52,007 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 826 transitions.
[2024-11-08 18:17:52,009 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 335
[2024-11-08 18:17:52,009 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:52,009 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:52,010 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29
[2024-11-08 18:17:52,010 INFO  L396      AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:52,010 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:52,010 INFO  L85        PathProgramCache]: Analyzing trace with hash -1696520710, now seen corresponding path program 1 times
[2024-11-08 18:17:52,010 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:52,011 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117873019]
[2024-11-08 18:17:52,011 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:52,011 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:52,671 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,598 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:53,600 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,603 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:53,604 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,607 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:53,608 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,611 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 242
[2024-11-08 18:17:53,611 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,613 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 258
[2024-11-08 18:17:53,613 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,614 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270
[2024-11-08 18:17:53,615 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:53,618 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:53,618 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:53,618 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117873019]
[2024-11-08 18:17:53,618 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117873019] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:53,618 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:53,619 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:17:53,619 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473560401]
[2024-11-08 18:17:53,619 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:53,620 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:17:53,620 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:53,621 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:17:53,621 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:17:53,621 INFO  L87              Difference]: Start difference. First operand 605 states and 826 transitions. Second operand  has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:53,746 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:53,746 INFO  L93              Difference]: Finished difference Result 974 states and 1331 transitions.
[2024-11-08 18:17:53,747 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:17:53,747 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334
[2024-11-08 18:17:53,748 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:53,750 INFO  L225             Difference]: With dead ends: 974
[2024-11-08 18:17:53,750 INFO  L226             Difference]: Without dead ends: 605
[2024-11-08 18:17:53,751 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:53,751 INFO  L432           NwaCegarLoop]: 522 mSDtfsCounter, 450 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 450 SdHoareTripleChecker+Valid, 1053 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:53,751 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [450 Valid, 1053 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:17:53,752 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 18:17:53,767 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 18:17:53,769 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 605 states, 597 states have (on average 1.3618090452261307) internal successors, (813), 597 states have internal predecessors, (813), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:17:53,771 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 825 transitions.
[2024-11-08 18:17:53,771 INFO  L78                 Accepts]: Start accepts. Automaton has 605 states and 825 transitions. Word has length 334
[2024-11-08 18:17:53,771 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:53,772 INFO  L471      AbstractCegarLoop]: Abstraction has 605 states and 825 transitions.
[2024-11-08 18:17:53,772 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:53,772 INFO  L276                IsEmpty]: Start isEmpty. Operand 605 states and 825 transitions.
[2024-11-08 18:17:53,775 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 336
[2024-11-08 18:17:53,775 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:53,776 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:53,776 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30
[2024-11-08 18:17:53,776 INFO  L396      AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:53,777 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:53,777 INFO  L85        PathProgramCache]: Analyzing trace with hash 924333236, now seen corresponding path program 1 times
[2024-11-08 18:17:53,777 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:53,777 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409829831]
[2024-11-08 18:17:53,778 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:53,778 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:54,670 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,414 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:55,415 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,417 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:55,418 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,420 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:55,421 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,422 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 243
[2024-11-08 18:17:55,423 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,424 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 259
[2024-11-08 18:17:55,424 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,425 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 18:17:55,426 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:55,428 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:55,428 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:55,429 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [409829831]
[2024-11-08 18:17:55,429 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [409829831] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:55,429 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:55,429 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 18:17:55,429 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44291959]
[2024-11-08 18:17:55,430 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:55,430 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:17:55,430 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:55,431 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:17:55,431 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:55,432 INFO  L87              Difference]: Start difference. First operand 605 states and 825 transitions. Second operand  has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:55,915 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:55,916 INFO  L93              Difference]: Finished difference Result 1415 states and 1938 transitions.
[2024-11-08 18:17:55,916 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:17:55,916 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335
[2024-11-08 18:17:55,917 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:55,920 INFO  L225             Difference]: With dead ends: 1415
[2024-11-08 18:17:55,920 INFO  L226             Difference]: Without dead ends: 1046
[2024-11-08 18:17:55,921 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:17:55,922 INFO  L432           NwaCegarLoop]: 499 mSDtfsCounter, 563 mSDsluCounter, 1592 mSDsCounter, 0 mSdLazyCounter, 451 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 566 SdHoareTripleChecker+Valid, 2091 SdHoareTripleChecker+Invalid, 459 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 451 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:55,922 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [566 Valid, 2091 Invalid, 459 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 451 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 18:17:55,924 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1046 states.
[2024-11-08 18:17:55,947 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 930.
[2024-11-08 18:17:55,948 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 930 states, 919 states have (on average 1.3579978237214363) internal successors, (1248), 919 states have internal predecessors, (1248), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 18:17:55,951 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 1266 transitions.
[2024-11-08 18:17:55,951 INFO  L78                 Accepts]: Start accepts. Automaton has 930 states and 1266 transitions. Word has length 335
[2024-11-08 18:17:55,952 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:55,952 INFO  L471      AbstractCegarLoop]: Abstraction has 930 states and 1266 transitions.
[2024-11-08 18:17:55,952 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:55,952 INFO  L276                IsEmpty]: Start isEmpty. Operand 930 states and 1266 transitions.
[2024-11-08 18:17:55,955 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 337
[2024-11-08 18:17:55,955 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:55,956 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:55,956 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31
[2024-11-08 18:17:55,956 INFO  L396      AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:55,957 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:55,957 INFO  L85        PathProgramCache]: Analyzing trace with hash -50285408, now seen corresponding path program 1 times
[2024-11-08 18:17:55,957 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:55,957 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030931740]
[2024-11-08 18:17:55,957 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:55,958 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:56,863 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,939 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:17:57,941 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,943 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:17:57,944 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,945 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:17:57,946 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,950 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244
[2024-11-08 18:17:57,951 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,952 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260
[2024-11-08 18:17:57,952 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,953 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 18:17:57,954 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:17:57,956 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:17:57,957 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:17:57,957 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030931740]
[2024-11-08 18:17:57,957 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030931740] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:17:57,958 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:17:57,958 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 18:17:57,958 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997893810]
[2024-11-08 18:17:57,958 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:17:57,959 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:17:57,959 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:17:57,961 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:17:57,961 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:17:57,962 INFO  L87              Difference]: Start difference. First operand 930 states and 1266 transitions. Second operand  has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:58,634 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:17:58,635 INFO  L93              Difference]: Finished difference Result 1322 states and 1804 transitions.
[2024-11-08 18:17:58,635 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:17:58,635 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336
[2024-11-08 18:17:58,636 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:17:58,639 INFO  L225             Difference]: With dead ends: 1322
[2024-11-08 18:17:58,640 INFO  L226             Difference]: Without dead ends: 953
[2024-11-08 18:17:58,641 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:17:58,641 INFO  L432           NwaCegarLoop]: 396 mSDtfsCounter, 1003 mSDsluCounter, 1172 mSDsCounter, 0 mSdLazyCounter, 631 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1006 SdHoareTripleChecker+Valid, 1568 SdHoareTripleChecker+Invalid, 631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 631 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 18:17:58,642 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1006 Valid, 1568 Invalid, 631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 631 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 18:17:58,643 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 953 states.
[2024-11-08 18:17:58,665 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 953 to 931.
[2024-11-08 18:17:58,667 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 931 states, 920 states have (on average 1.357608695652174) internal successors, (1249), 920 states have internal predecessors, (1249), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 18:17:58,670 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 931 states to 931 states and 1267 transitions.
[2024-11-08 18:17:58,670 INFO  L78                 Accepts]: Start accepts. Automaton has 931 states and 1267 transitions. Word has length 336
[2024-11-08 18:17:58,671 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:17:58,671 INFO  L471      AbstractCegarLoop]: Abstraction has 931 states and 1267 transitions.
[2024-11-08 18:17:58,671 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:17:58,671 INFO  L276                IsEmpty]: Start isEmpty. Operand 931 states and 1267 transitions.
[2024-11-08 18:17:58,674 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 337
[2024-11-08 18:17:58,674 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:17:58,675 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:17:58,675 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32
[2024-11-08 18:17:58,675 INFO  L396      AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:17:58,676 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:17:58,676 INFO  L85        PathProgramCache]: Analyzing trace with hash -1057630427, now seen corresponding path program 1 times
[2024-11-08 18:17:58,676 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:17:58,676 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374055706]
[2024-11-08 18:17:58,676 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:17:58,677 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:17:59,472 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,846 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44
[2024-11-08 18:18:00,848 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,850 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 18:18:00,851 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,853 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72
[2024-11-08 18:18:00,854 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,856 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244
[2024-11-08 18:18:00,856 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,857 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260
[2024-11-08 18:18:00,858 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,859 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 18:18:00,859 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:00,861 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked.
[2024-11-08 18:18:00,861 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:00,861 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374055706]
[2024-11-08 18:18:00,862 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1374055706] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:00,862 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:00,862 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 18:18:00,862 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232509647]
[2024-11-08 18:18:00,862 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:00,863 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 18:18:00,863 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:00,864 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 18:18:00,864 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2024-11-08 18:18:00,864 INFO  L87              Difference]: Start difference. First operand 931 states and 1267 transitions. Second operand  has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:01,093 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:01,094 INFO  L93              Difference]: Finished difference Result 2100 states and 2849 transitions.
[2024-11-08 18:18:01,094 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2024-11-08 18:18:01,094 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336
[2024-11-08 18:18:01,095 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:01,100 INFO  L225             Difference]: With dead ends: 2100
[2024-11-08 18:18:01,100 INFO  L226             Difference]: Without dead ends: 1615
[2024-11-08 18:18:01,101 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-08 18:18:01,102 INFO  L432           NwaCegarLoop]: 1258 mSDtfsCounter, 778 mSDsluCounter, 5946 mSDsCounter, 0 mSdLazyCounter, 155 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 781 SdHoareTripleChecker+Valid, 7204 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 155 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:01,102 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [781 Valid, 7204 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 155 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:18:01,104 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1615 states.
[2024-11-08 18:18:01,131 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1615 to 998.
[2024-11-08 18:18:01,133 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 998 states, 984 states have (on average 1.3617886178861789) internal successors, (1340), 984 states have internal predecessors, (1340), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 18:18:01,135 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 998 states to 998 states and 1364 transitions.
[2024-11-08 18:18:01,135 INFO  L78                 Accepts]: Start accepts. Automaton has 998 states and 1364 transitions. Word has length 336
[2024-11-08 18:18:01,136 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:01,136 INFO  L471      AbstractCegarLoop]: Abstraction has 998 states and 1364 transitions.
[2024-11-08 18:18:01,136 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 32.25) internal successors, (258), 8 states have internal predecessors, (258), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:01,137 INFO  L276                IsEmpty]: Start isEmpty. Operand 998 states and 1364 transitions.
[2024-11-08 18:18:01,139 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 338
[2024-11-08 18:18:01,140 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:01,140 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:01,140 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33
[2024-11-08 18:18:01,140 INFO  L396      AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:01,141 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:01,141 INFO  L85        PathProgramCache]: Analyzing trace with hash 888896439, now seen corresponding path program 1 times
[2024-11-08 18:18:01,141 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:01,141 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1964112364]
[2024-11-08 18:18:01,141 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:01,142 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:02,030 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,712 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 18:18:02,714 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,716 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 18:18:02,717 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,719 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 18:18:02,720 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,722 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 245
[2024-11-08 18:18:02,723 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,724 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261
[2024-11-08 18:18:02,724 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,725 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 18:18:02,726 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:02,728 INFO  L134       CoverageAnalysis]: Checked inductivity of 144 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked.
[2024-11-08 18:18:02,728 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:02,728 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1964112364]
[2024-11-08 18:18:02,728 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1964112364] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:02,729 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:02,729 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-08 18:18:02,729 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [837048996]
[2024-11-08 18:18:02,729 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:02,730 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 18:18:02,730 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:02,731 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 18:18:02,731 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:18:02,731 INFO  L87              Difference]: Start difference. First operand 998 states and 1364 transitions. Second operand  has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:03,142 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:03,142 INFO  L93              Difference]: Finished difference Result 2120 states and 2895 transitions.
[2024-11-08 18:18:03,142 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-08 18:18:03,143 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337
[2024-11-08 18:18:03,143 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:03,146 INFO  L225             Difference]: With dead ends: 2120
[2024-11-08 18:18:03,146 INFO  L226             Difference]: Without dead ends: 1014
[2024-11-08 18:18:03,150 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110
[2024-11-08 18:18:03,150 INFO  L432           NwaCegarLoop]: 527 mSDtfsCounter, 628 mSDsluCounter, 1971 mSDsCounter, 0 mSdLazyCounter, 250 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 631 SdHoareTripleChecker+Valid, 2498 SdHoareTripleChecker+Invalid, 258 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 250 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:03,151 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [631 Valid, 2498 Invalid, 258 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 250 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 18:18:03,153 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1014 states.
[2024-11-08 18:18:03,180 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 1006.
[2024-11-08 18:18:03,182 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1006 states, 992 states have (on average 1.3548387096774193) internal successors, (1344), 992 states have internal predecessors, (1344), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 18:18:03,184 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1368 transitions.
[2024-11-08 18:18:03,186 INFO  L78                 Accepts]: Start accepts. Automaton has 1006 states and 1368 transitions. Word has length 337
[2024-11-08 18:18:03,186 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:03,186 INFO  L471      AbstractCegarLoop]: Abstraction has 1006 states and 1368 transitions.
[2024-11-08 18:18:03,186 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 39.285714285714285) internal successors, (275), 7 states have internal predecessors, (275), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:03,187 INFO  L276                IsEmpty]: Start isEmpty. Operand 1006 states and 1368 transitions.
[2024-11-08 18:18:03,190 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 340
[2024-11-08 18:18:03,190 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:03,190 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:03,190 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34
[2024-11-08 18:18:03,191 INFO  L396      AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:03,191 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:03,191 INFO  L85        PathProgramCache]: Analyzing trace with hash 809232881, now seen corresponding path program 1 times
[2024-11-08 18:18:03,191 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:03,191 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730916190]
[2024-11-08 18:18:03,192 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:03,192 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:03,957 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,938 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44
[2024-11-08 18:18:04,939 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,941 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 18:18:04,942 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,945 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72
[2024-11-08 18:18:04,946 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,948 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 247
[2024-11-08 18:18:04,949 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,950 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263
[2024-11-08 18:18:04,951 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,951 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275
[2024-11-08 18:18:04,952 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:04,954 INFO  L134       CoverageAnalysis]: Checked inductivity of 145 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked.
[2024-11-08 18:18:04,954 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:04,954 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730916190]
[2024-11-08 18:18:04,955 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730916190] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:04,955 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:04,955 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 18:18:04,955 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822854975]
[2024-11-08 18:18:04,955 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:04,956 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 18:18:04,956 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:04,957 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 18:18:04,957 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2024-11-08 18:18:04,957 INFO  L87              Difference]: Start difference. First operand 1006 states and 1368 transitions. Second operand  has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:05,872 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:05,872 INFO  L93              Difference]: Finished difference Result 2500 states and 3367 transitions.
[2024-11-08 18:18:05,873 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2024-11-08 18:18:05,873 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 339
[2024-11-08 18:18:05,873 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:05,880 INFO  L225             Difference]: With dead ends: 2500
[2024-11-08 18:18:05,881 INFO  L226             Difference]: Without dead ends: 1866
[2024-11-08 18:18:05,882 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132
[2024-11-08 18:18:05,883 INFO  L432           NwaCegarLoop]: 414 mSDtfsCounter, 1282 mSDsluCounter, 1983 mSDsCounter, 0 mSdLazyCounter, 970 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1285 SdHoareTripleChecker+Valid, 2397 SdHoareTripleChecker+Invalid, 970 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:05,883 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1285 Valid, 2397 Invalid, 970 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 970 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time]
[2024-11-08 18:18:05,887 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1866 states.
[2024-11-08 18:18:05,935 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1866 to 1858.
[2024-11-08 18:18:05,937 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1858 states, 1832 states have (on average 1.3460698689956332) internal successors, (2466), 1832 states have internal predecessors, (2466), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24)
[2024-11-08 18:18:05,942 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1858 states to 1858 states and 2514 transitions.
[2024-11-08 18:18:05,942 INFO  L78                 Accepts]: Start accepts. Automaton has 1858 states and 2514 transitions. Word has length 339
[2024-11-08 18:18:05,943 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:05,943 INFO  L471      AbstractCegarLoop]: Abstraction has 1858 states and 2514 transitions.
[2024-11-08 18:18:05,943 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:05,943 INFO  L276                IsEmpty]: Start isEmpty. Operand 1858 states and 2514 transitions.
[2024-11-08 18:18:05,948 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 342
[2024-11-08 18:18:05,948 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:05,949 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:05,949 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35
[2024-11-08 18:18:05,949 INFO  L396      AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:05,950 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:05,950 INFO  L85        PathProgramCache]: Analyzing trace with hash -1513156409, now seen corresponding path program 1 times
[2024-11-08 18:18:05,950 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:05,950 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335150979]
[2024-11-08 18:18:05,951 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:05,951 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:06,672 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,693 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44
[2024-11-08 18:18:07,695 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,696 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 18:18:07,697 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,699 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72
[2024-11-08 18:18:07,700 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,701 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 248
[2024-11-08 18:18:07,703 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,704 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264
[2024-11-08 18:18:07,704 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,705 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276
[2024-11-08 18:18:07,707 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:07,709 INFO  L134       CoverageAnalysis]: Checked inductivity of 146 backedges. 79 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked.
[2024-11-08 18:18:07,709 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:07,709 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [335150979]
[2024-11-08 18:18:07,709 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [335150979] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:07,710 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [410486388]
[2024-11-08 18:18:07,710 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:07,710 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:07,710 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:07,712 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:07,714 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-08 18:18:08,966 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:08,974 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 7 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:08,990 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:09,347 INFO  L134       CoverageAnalysis]: Checked inductivity of 146 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked.
[2024-11-08 18:18:09,348 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:18:09,348 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [410486388] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:09,348 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:18:09,348 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7
[2024-11-08 18:18:09,349 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080418205]
[2024-11-08 18:18:09,349 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:09,349 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:18:09,350 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:09,350 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:18:09,350 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:18:09,351 INFO  L87              Difference]: Start difference. First operand 1858 states and 2514 transitions. Second operand  has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:09,706 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:09,707 INFO  L93              Difference]: Finished difference Result 2581 states and 3478 transitions.
[2024-11-08 18:18:09,707 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:18:09,707 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 341
[2024-11-08 18:18:09,708 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:09,711 INFO  L225             Difference]: With dead ends: 2581
[2024-11-08 18:18:09,711 INFO  L226             Difference]: Without dead ends: 1004
[2024-11-08 18:18:09,713 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 356 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2024-11-08 18:18:09,713 INFO  L432           NwaCegarLoop]: 394 mSDtfsCounter, 456 mSDsluCounter, 396 mSDsCounter, 0 mSdLazyCounter, 309 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 456 SdHoareTripleChecker+Valid, 790 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 309 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:09,714 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [456 Valid, 790 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 309 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 18:18:09,715 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1004 states.
[2024-11-08 18:18:09,739 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1004 to 1004.
[2024-11-08 18:18:09,740 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1004 states, 990 states have (on average 1.3494949494949495) internal successors, (1336), 990 states have internal predecessors, (1336), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 18:18:09,742 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1004 states to 1004 states and 1360 transitions.
[2024-11-08 18:18:09,743 INFO  L78                 Accepts]: Start accepts. Automaton has 1004 states and 1360 transitions. Word has length 341
[2024-11-08 18:18:09,743 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:09,743 INFO  L471      AbstractCegarLoop]: Abstraction has 1004 states and 1360 transitions.
[2024-11-08 18:18:09,743 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:09,743 INFO  L276                IsEmpty]: Start isEmpty. Operand 1004 states and 1360 transitions.
[2024-11-08 18:18:09,746 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 342
[2024-11-08 18:18:09,746 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:09,747 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:09,773 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0
[2024-11-08 18:18:09,947 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:09,948 INFO  L396      AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:09,948 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:09,949 INFO  L85        PathProgramCache]: Analyzing trace with hash -840207759, now seen corresponding path program 1 times
[2024-11-08 18:18:09,949 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:09,949 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719713501]
[2024-11-08 18:18:09,949 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:09,949 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:10,953 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,160 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:12,161 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,163 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 18:18:12,164 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,165 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 18:18:12,166 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,168 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249
[2024-11-08 18:18:12,169 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,170 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265
[2024-11-08 18:18:12,171 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,172 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 277
[2024-11-08 18:18:12,173 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:12,175 INFO  L134       CoverageAnalysis]: Checked inductivity of 146 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked.
[2024-11-08 18:18:12,175 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:12,175 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719713501]
[2024-11-08 18:18:12,175 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1719713501] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:12,175 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:12,175 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 18:18:12,176 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978036176]
[2024-11-08 18:18:12,176 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:12,176 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 18:18:12,177 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:12,177 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 18:18:12,178 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56
[2024-11-08 18:18:12,178 INFO  L87              Difference]: Start difference. First operand 1004 states and 1360 transitions. Second operand  has 8 states, 8 states have (on average 38.375) internal successors, (307), 8 states have internal predecessors, (307), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5)
[2024-11-08 18:18:12,921 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:12,921 INFO  L93              Difference]: Finished difference Result 1831 states and 2470 transitions.
[2024-11-08 18:18:12,922 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2024-11-08 18:18:12,922 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 38.375) internal successors, (307), 8 states have internal predecessors, (307), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 341
[2024-11-08 18:18:12,922 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:12,925 INFO  L225             Difference]: With dead ends: 1831
[2024-11-08 18:18:12,926 INFO  L226             Difference]: Without dead ends: 1036
[2024-11-08 18:18:12,927 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56
[2024-11-08 18:18:12,927 INFO  L432           NwaCegarLoop]: 392 mSDtfsCounter, 355 mSDsluCounter, 1935 mSDsCounter, 0 mSdLazyCounter, 950 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 355 SdHoareTripleChecker+Valid, 2327 SdHoareTripleChecker+Invalid, 953 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 950 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:12,928 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [355 Valid, 2327 Invalid, 953 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 950 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 18:18:12,929 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1036 states.
[2024-11-08 18:18:12,955 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1036 to 1024.
[2024-11-08 18:18:12,956 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1024 states, 1010 states have (on average 1.3504950495049506) internal successors, (1364), 1010 states have internal predecessors, (1364), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 18:18:12,959 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1024 states to 1024 states and 1388 transitions.
[2024-11-08 18:18:12,959 INFO  L78                 Accepts]: Start accepts. Automaton has 1024 states and 1388 transitions. Word has length 341
[2024-11-08 18:18:12,959 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:12,959 INFO  L471      AbstractCegarLoop]: Abstraction has 1024 states and 1388 transitions.
[2024-11-08 18:18:12,960 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 38.375) internal successors, (307), 8 states have internal predecessors, (307), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5)
[2024-11-08 18:18:12,960 INFO  L276                IsEmpty]: Start isEmpty. Operand 1024 states and 1388 transitions.
[2024-11-08 18:18:12,963 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 344
[2024-11-08 18:18:12,963 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:12,963 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:12,964 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37
[2024-11-08 18:18:12,964 INFO  L396      AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:12,964 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:12,964 INFO  L85        PathProgramCache]: Analyzing trace with hash -997817135, now seen corresponding path program 1 times
[2024-11-08 18:18:12,965 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:12,965 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250883804]
[2024-11-08 18:18:12,965 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:12,965 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:13,747 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,562 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:14,564 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,565 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62
[2024-11-08 18:18:14,566 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,567 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74
[2024-11-08 18:18:14,568 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,570 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250
[2024-11-08 18:18:14,571 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,573 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267
[2024-11-08 18:18:14,573 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,574 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 279
[2024-11-08 18:18:14,575 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:14,577 INFO  L134       CoverageAnalysis]: Checked inductivity of 147 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:14,578 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:14,578 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250883804]
[2024-11-08 18:18:14,578 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [250883804] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:14,578 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1975598809]
[2024-11-08 18:18:14,578 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:14,578 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:14,579 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:14,580 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:14,582 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-08 18:18:15,882 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:15,891 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2053 conjuncts, 46 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:15,906 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:16,173 INFO  L134       CoverageAnalysis]: Checked inductivity of 147 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked.
[2024-11-08 18:18:16,173 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:18:16,174 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1975598809] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:16,174 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:18:16,174 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12
[2024-11-08 18:18:16,174 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [43157495]
[2024-11-08 18:18:16,175 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:16,175 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:18:16,175 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:16,176 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:18:16,176 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132
[2024-11-08 18:18:16,177 INFO  L87              Difference]: Start difference. First operand 1024 states and 1388 transitions. Second operand  has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 18:18:16,702 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:16,702 INFO  L93              Difference]: Finished difference Result 1858 states and 2505 transitions.
[2024-11-08 18:18:16,702 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:18:16,703 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 343
[2024-11-08 18:18:16,703 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:16,706 INFO  L225             Difference]: With dead ends: 1858
[2024-11-08 18:18:16,707 INFO  L226             Difference]: Without dead ends: 1040
[2024-11-08 18:18:16,708 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 354 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132
[2024-11-08 18:18:16,709 INFO  L432           NwaCegarLoop]: 388 mSDtfsCounter, 486 mSDsluCounter, 1150 mSDsCounter, 0 mSdLazyCounter, 642 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 488 SdHoareTripleChecker+Valid, 1538 SdHoareTripleChecker+Invalid, 644 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 642 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:16,709 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [488 Valid, 1538 Invalid, 644 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 642 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 18:18:16,710 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1040 states.
[2024-11-08 18:18:16,734 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1040 to 1016.
[2024-11-08 18:18:16,737 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1016 states, 1002 states have (on average 1.341317365269461) internal successors, (1344), 1002 states have internal predecessors, (1344), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 18:18:16,739 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1016 states to 1016 states and 1368 transitions.
[2024-11-08 18:18:16,739 INFO  L78                 Accepts]: Start accepts. Automaton has 1016 states and 1368 transitions. Word has length 343
[2024-11-08 18:18:16,740 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:16,740 INFO  L471      AbstractCegarLoop]: Abstraction has 1016 states and 1368 transitions.
[2024-11-08 18:18:16,740 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 43.0) internal successors, (258), 6 states have internal predecessors, (258), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 18:18:16,740 INFO  L276                IsEmpty]: Start isEmpty. Operand 1016 states and 1368 transitions.
[2024-11-08 18:18:16,743 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 346
[2024-11-08 18:18:16,743 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:16,744 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:16,772 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0
[2024-11-08 18:18:16,944 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:16,944 INFO  L396      AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:16,945 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:16,945 INFO  L85        PathProgramCache]: Analyzing trace with hash -449613781, now seen corresponding path program 1 times
[2024-11-08 18:18:16,945 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:16,945 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [875791816]
[2024-11-08 18:18:16,945 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:16,946 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:17,688 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,295 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:19,296 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,299 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:19,300 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,302 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 18:18:19,303 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,305 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251
[2024-11-08 18:18:19,306 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,308 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269
[2024-11-08 18:18:19,309 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,311 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 281
[2024-11-08 18:18:19,312 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:19,316 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 54 proven. 15 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked.
[2024-11-08 18:18:19,316 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:19,316 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [875791816]
[2024-11-08 18:18:19,317 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [875791816] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:19,317 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1414629418]
[2024-11-08 18:18:19,317 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:19,317 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:19,317 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:19,319 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:19,323 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2024-11-08 18:18:20,621 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:20,629 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:20,636 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:21,630 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked.
[2024-11-08 18:18:21,631 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:18:23,129 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 3 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked.
[2024-11-08 18:18:23,130 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1414629418] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 18:18:23,130 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 18:18:23,130 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 10] total 24
[2024-11-08 18:18:23,130 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522802821]
[2024-11-08 18:18:23,130 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 18:18:23,131 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 24 states
[2024-11-08 18:18:23,132 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:23,133 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants.
[2024-11-08 18:18:23,133 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552
[2024-11-08 18:18:23,134 INFO  L87              Difference]: Start difference. First operand 1016 states and 1368 transitions. Second operand  has 24 states, 24 states have (on average 33.291666666666664) internal successors, (799), 24 states have internal predecessors, (799), 6 states have call successors, (13), 2 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 6 states have call successors, (13)
[2024-11-08 18:18:25,626 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:25,626 INFO  L93              Difference]: Finished difference Result 2502 states and 3339 transitions.
[2024-11-08 18:18:25,626 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. 
[2024-11-08 18:18:25,627 INFO  L78                 Accepts]: Start accepts. Automaton has  has 24 states, 24 states have (on average 33.291666666666664) internal successors, (799), 24 states have internal predecessors, (799), 6 states have call successors, (13), 2 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 6 states have call successors, (13) Word has length 345
[2024-11-08 18:18:25,627 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:25,636 INFO  L225             Difference]: With dead ends: 2502
[2024-11-08 18:18:25,636 INFO  L226             Difference]: Without dead ends: 1734
[2024-11-08 18:18:25,641 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 721 GetRequests, 687 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=263, Invalid=997, Unknown=0, NotChecked=0, Total=1260
[2024-11-08 18:18:25,641 INFO  L432           NwaCegarLoop]: 575 mSDtfsCounter, 1011 mSDsluCounter, 6632 mSDsCounter, 0 mSdLazyCounter, 3349 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1011 SdHoareTripleChecker+Valid, 7207 SdHoareTripleChecker+Invalid, 3355 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 3349 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:25,642 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1011 Valid, 7207 Invalid, 3355 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 3349 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time]
[2024-11-08 18:18:25,643 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1734 states.
[2024-11-08 18:18:25,681 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1734 to 1116.
[2024-11-08 18:18:25,682 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1116 states, 1098 states have (on average 1.3333333333333333) internal successors, (1464), 1098 states have internal predecessors, (1464), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)
[2024-11-08 18:18:25,685 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1116 states to 1116 states and 1496 transitions.
[2024-11-08 18:18:25,685 INFO  L78                 Accepts]: Start accepts. Automaton has 1116 states and 1496 transitions. Word has length 345
[2024-11-08 18:18:25,686 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:25,686 INFO  L471      AbstractCegarLoop]: Abstraction has 1116 states and 1496 transitions.
[2024-11-08 18:18:25,686 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 24 states, 24 states have (on average 33.291666666666664) internal successors, (799), 24 states have internal predecessors, (799), 6 states have call successors, (13), 2 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 6 states have call successors, (13)
[2024-11-08 18:18:25,686 INFO  L276                IsEmpty]: Start isEmpty. Operand 1116 states and 1496 transitions.
[2024-11-08 18:18:25,689 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 350
[2024-11-08 18:18:25,690 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:25,690 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:25,716 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0
[2024-11-08 18:18:25,890 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:25,891 INFO  L396      AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:25,891 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:25,891 INFO  L85        PathProgramCache]: Analyzing trace with hash -1267129755, now seen corresponding path program 1 times
[2024-11-08 18:18:25,891 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:25,891 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090753072]
[2024-11-08 18:18:25,892 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:25,892 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:26,763 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,015 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:28,016 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,017 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:28,017 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,018 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 18:18:28,019 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,020 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 18:18:28,021 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,022 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 18:18:28,023 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,024 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285
[2024-11-08 18:18:28,025 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:28,027 INFO  L134       CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:28,027 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:28,027 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090753072]
[2024-11-08 18:18:28,028 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090753072] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:28,028 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1474461296]
[2024-11-08 18:18:28,028 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:28,028 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:28,028 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:28,032 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:28,035 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-08 18:18:29,476 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:29,485 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2063 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:29,491 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:29,569 INFO  L134       CoverageAnalysis]: Checked inductivity of 150 backedges. 73 proven. 0 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked.
[2024-11-08 18:18:29,569 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:18:29,569 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1474461296] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:29,570 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:18:29,570 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15
[2024-11-08 18:18:29,570 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150794536]
[2024-11-08 18:18:29,570 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:29,571 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:18:29,571 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:29,572 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:18:29,572 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210
[2024-11-08 18:18:29,572 INFO  L87              Difference]: Start difference. First operand 1116 states and 1496 transitions. Second operand  has 6 states, 5 states have (on average 59.2) internal successors, (296), 6 states have internal predecessors, (296), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 18:18:29,643 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:29,643 INFO  L93              Difference]: Finished difference Result 1903 states and 2538 transitions.
[2024-11-08 18:18:29,644 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:18:29,644 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 5 states have (on average 59.2) internal successors, (296), 6 states have internal predecessors, (296), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 349
[2024-11-08 18:18:29,644 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:29,650 INFO  L225             Difference]: With dead ends: 1903
[2024-11-08 18:18:29,651 INFO  L226             Difference]: Without dead ends: 1116
[2024-11-08 18:18:29,652 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 371 GetRequests, 358 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210
[2024-11-08 18:18:29,652 INFO  L432           NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:29,652 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:18:29,658 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1116 states.
[2024-11-08 18:18:29,692 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1116 to 1116.
[2024-11-08 18:18:29,693 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1116 states, 1098 states have (on average 1.3296903460837888) internal successors, (1460), 1098 states have internal predecessors, (1460), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)
[2024-11-08 18:18:29,696 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1116 states to 1116 states and 1492 transitions.
[2024-11-08 18:18:29,697 INFO  L78                 Accepts]: Start accepts. Automaton has 1116 states and 1492 transitions. Word has length 349
[2024-11-08 18:18:29,697 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:29,697 INFO  L471      AbstractCegarLoop]: Abstraction has 1116 states and 1492 transitions.
[2024-11-08 18:18:29,698 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 5 states have (on average 59.2) internal successors, (296), 6 states have internal predecessors, (296), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 18:18:29,698 INFO  L276                IsEmpty]: Start isEmpty. Operand 1116 states and 1492 transitions.
[2024-11-08 18:18:29,701 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 352
[2024-11-08 18:18:29,701 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:29,701 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:29,729 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0
[2024-11-08 18:18:29,902 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:29,902 INFO  L396      AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:29,903 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:29,903 INFO  L85        PathProgramCache]: Analyzing trace with hash 790251345, now seen corresponding path program 1 times
[2024-11-08 18:18:29,903 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:29,903 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143853540]
[2024-11-08 18:18:29,903 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:29,903 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:30,748 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,016 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:32,017 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,018 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:32,019 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,020 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 18:18:32,021 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,022 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 18:18:32,023 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,023 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 18:18:32,024 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,025 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286
[2024-11-08 18:18:32,026 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:32,028 INFO  L134       CoverageAnalysis]: Checked inductivity of 151 backedges. 4 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:32,028 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:32,028 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143853540]
[2024-11-08 18:18:32,028 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1143853540] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:32,028 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [941061158]
[2024-11-08 18:18:32,029 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:32,029 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:32,029 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:32,031 INFO  L229       MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:32,032 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2024-11-08 18:18:33,704 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:33,712 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2069 conjuncts, 14 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:33,718 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:34,426 INFO  L134       CoverageAnalysis]: Checked inductivity of 151 backedges. 127 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 18:18:34,426 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:18:34,426 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [941061158] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:34,426 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:18:34,427 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15
[2024-11-08 18:18:34,427 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [968226179]
[2024-11-08 18:18:34,427 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:34,427 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:18:34,428 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:34,428 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:18:34,429 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210
[2024-11-08 18:18:34,429 INFO  L87              Difference]: Start difference. First operand 1116 states and 1492 transitions. Second operand  has 6 states, 6 states have (on average 54.5) internal successors, (327), 6 states have internal predecessors, (327), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:35,083 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:35,083 INFO  L93              Difference]: Finished difference Result 2220 states and 2952 transitions.
[2024-11-08 18:18:35,083 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:18:35,084 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 54.5) internal successors, (327), 6 states have internal predecessors, (327), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351
[2024-11-08 18:18:35,084 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:35,087 INFO  L225             Difference]: With dead ends: 2220
[2024-11-08 18:18:35,087 INFO  L226             Difference]: Without dead ends: 1710
[2024-11-08 18:18:35,088 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 374 GetRequests, 360 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240
[2024-11-08 18:18:35,088 INFO  L432           NwaCegarLoop]: 591 mSDtfsCounter, 686 mSDsluCounter, 1554 mSDsCounter, 0 mSdLazyCounter, 894 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 686 SdHoareTripleChecker+Valid, 2145 SdHoareTripleChecker+Invalid, 895 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 894 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:35,088 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [686 Valid, 2145 Invalid, 895 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 894 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 18:18:35,090 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1710 states.
[2024-11-08 18:18:35,125 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1710 to 1480.
[2024-11-08 18:18:35,127 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1480 states, 1462 states have (on average 1.3043775649794802) internal successors, (1907), 1462 states have internal predecessors, (1907), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)
[2024-11-08 18:18:35,131 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1480 states to 1480 states and 1939 transitions.
[2024-11-08 18:18:35,131 INFO  L78                 Accepts]: Start accepts. Automaton has 1480 states and 1939 transitions. Word has length 351
[2024-11-08 18:18:35,132 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:35,132 INFO  L471      AbstractCegarLoop]: Abstraction has 1480 states and 1939 transitions.
[2024-11-08 18:18:35,132 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 54.5) internal successors, (327), 6 states have internal predecessors, (327), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:35,132 INFO  L276                IsEmpty]: Start isEmpty. Operand 1480 states and 1939 transitions.
[2024-11-08 18:18:35,136 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 352
[2024-11-08 18:18:35,136 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:35,137 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:35,165 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0
[2024-11-08 18:18:35,337 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:35,338 INFO  L396      AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:35,338 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:35,338 INFO  L85        PathProgramCache]: Analyzing trace with hash -1491461674, now seen corresponding path program 1 times
[2024-11-08 18:18:35,338 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:35,338 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977485122]
[2024-11-08 18:18:35,338 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:35,339 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:36,354 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,696 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:37,697 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,698 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:37,698 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,699 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:18:37,700 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,700 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 18:18:37,701 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,702 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 18:18:37,702 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,703 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286
[2024-11-08 18:18:37,704 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:37,705 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 4 proven. 85 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:37,706 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:37,706 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977485122]
[2024-11-08 18:18:37,706 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977485122] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:37,706 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1472935972]
[2024-11-08 18:18:37,706 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:37,706 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:37,706 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:37,707 INFO  L229       MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:37,708 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-08 18:18:39,402 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:39,411 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2069 conjuncts, 20 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:39,417 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:39,670 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked.
[2024-11-08 18:18:39,670 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:18:39,670 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1472935972] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:39,670 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:18:39,670 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17
[2024-11-08 18:18:39,671 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387662325]
[2024-11-08 18:18:39,671 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:39,671 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 18:18:39,672 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:39,673 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 18:18:39,674 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272
[2024-11-08 18:18:39,674 INFO  L87              Difference]: Start difference. First operand 1480 states and 1939 transitions. Second operand  has 8 states, 8 states have (on average 40.5) internal successors, (324), 8 states have internal predecessors, (324), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:40,244 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:40,245 INFO  L93              Difference]: Finished difference Result 3291 states and 4332 transitions.
[2024-11-08 18:18:40,245 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-08 18:18:40,245 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 40.5) internal successors, (324), 8 states have internal predecessors, (324), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351
[2024-11-08 18:18:40,246 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:40,250 INFO  L225             Difference]: With dead ends: 3291
[2024-11-08 18:18:40,250 INFO  L226             Difference]: Without dead ends: 2574
[2024-11-08 18:18:40,252 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 358 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342
[2024-11-08 18:18:40,253 INFO  L432           NwaCegarLoop]: 393 mSDtfsCounter, 1678 mSDsluCounter, 1465 mSDsCounter, 0 mSdLazyCounter, 753 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1684 SdHoareTripleChecker+Valid, 1858 SdHoareTripleChecker+Invalid, 756 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 753 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:40,253 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1684 Valid, 1858 Invalid, 756 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 753 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 18:18:40,256 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2574 states.
[2024-11-08 18:18:40,304 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2574 to 2140.
[2024-11-08 18:18:40,307 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2140 states, 2110 states have (on average 1.2834123222748814) internal successors, (2708), 2110 states have internal predecessors, (2708), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 18:18:40,311 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2140 states to 2140 states and 2764 transitions.
[2024-11-08 18:18:40,312 INFO  L78                 Accepts]: Start accepts. Automaton has 2140 states and 2764 transitions. Word has length 351
[2024-11-08 18:18:40,312 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:40,312 INFO  L471      AbstractCegarLoop]: Abstraction has 2140 states and 2764 transitions.
[2024-11-08 18:18:40,312 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 40.5) internal successors, (324), 8 states have internal predecessors, (324), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:40,312 INFO  L276                IsEmpty]: Start isEmpty. Operand 2140 states and 2764 transitions.
[2024-11-08 18:18:40,317 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 352
[2024-11-08 18:18:40,317 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:40,318 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:40,346 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0
[2024-11-08 18:18:40,518 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:40,519 INFO  L396      AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:40,519 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:40,520 INFO  L85        PathProgramCache]: Analyzing trace with hash -646572743, now seen corresponding path program 1 times
[2024-11-08 18:18:40,520 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:40,520 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077381042]
[2024-11-08 18:18:40,520 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:40,520 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:40,712 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,153 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:41,153 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,154 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:41,154 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,155 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:18:41,155 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,156 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 18:18:41,156 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,157 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 18:18:41,158 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,158 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286
[2024-11-08 18:18:41,159 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:41,160 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 47 proven. 0 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked.
[2024-11-08 18:18:41,160 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:41,160 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077381042]
[2024-11-08 18:18:41,160 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077381042] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:41,160 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:41,161 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:18:41,161 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73009006]
[2024-11-08 18:18:41,161 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:41,161 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:18:41,161 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:41,162 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:18:41,162 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:18:41,163 INFO  L87              Difference]: Start difference. First operand 2140 states and 2764 transitions. Second operand  has 5 states, 5 states have (on average 57.4) internal successors, (287), 5 states have internal predecessors, (287), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:41,216 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:41,216 INFO  L93              Difference]: Finished difference Result 3391 states and 4400 transitions.
[2024-11-08 18:18:41,216 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:18:41,217 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 57.4) internal successors, (287), 5 states have internal predecessors, (287), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351
[2024-11-08 18:18:41,217 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:41,221 INFO  L225             Difference]: With dead ends: 3391
[2024-11-08 18:18:41,221 INFO  L226             Difference]: Without dead ends: 2310
[2024-11-08 18:18:41,223 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:18:41,223 INFO  L432           NwaCegarLoop]: 541 mSDtfsCounter, 16 mSDsluCounter, 1611 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2152 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:41,224 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2152 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:18:41,226 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2310 states.
[2024-11-08 18:18:41,272 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2310 to 2310.
[2024-11-08 18:18:41,274 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2310 states, 2280 states have (on average 1.292982456140351) internal successors, (2948), 2280 states have internal predecessors, (2948), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 18:18:41,279 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2310 states to 2310 states and 3004 transitions.
[2024-11-08 18:18:41,279 INFO  L78                 Accepts]: Start accepts. Automaton has 2310 states and 3004 transitions. Word has length 351
[2024-11-08 18:18:41,280 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:41,280 INFO  L471      AbstractCegarLoop]: Abstraction has 2310 states and 3004 transitions.
[2024-11-08 18:18:41,280 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 57.4) internal successors, (287), 5 states have internal predecessors, (287), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:41,280 INFO  L276                IsEmpty]: Start isEmpty. Operand 2310 states and 3004 transitions.
[2024-11-08 18:18:41,285 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 353
[2024-11-08 18:18:41,285 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:41,286 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:41,286 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43
[2024-11-08 18:18:41,286 INFO  L396      AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:41,286 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:41,287 INFO  L85        PathProgramCache]: Analyzing trace with hash 1744954899, now seen corresponding path program 1 times
[2024-11-08 18:18:41,287 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:41,287 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284476309]
[2024-11-08 18:18:41,287 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:41,287 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:41,579 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,322 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:42,323 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,324 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:42,325 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,326 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:18:42,327 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,328 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 18:18:42,329 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,330 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 18:18:42,330 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,331 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287
[2024-11-08 18:18:42,332 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:42,333 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked.
[2024-11-08 18:18:42,334 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:42,334 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284476309]
[2024-11-08 18:18:42,334 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [284476309] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:42,334 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:42,334 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:18:42,334 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770504622]
[2024-11-08 18:18:42,335 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:42,335 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:18:42,335 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:42,336 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:18:42,336 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:18:42,336 INFO  L87              Difference]: Start difference. First operand 2310 states and 3004 transitions. Second operand  has 5 states, 5 states have (on average 56.0) internal successors, (280), 5 states have internal predecessors, (280), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:42,421 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:42,421 INFO  L93              Difference]: Finished difference Result 5275 states and 6826 transitions.
[2024-11-08 18:18:42,422 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 18:18:42,422 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 56.0) internal successors, (280), 5 states have internal predecessors, (280), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 352
[2024-11-08 18:18:42,422 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:42,426 INFO  L225             Difference]: With dead ends: 5275
[2024-11-08 18:18:42,426 INFO  L226             Difference]: Without dead ends: 3672
[2024-11-08 18:18:42,428 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:18:42,428 INFO  L432           NwaCegarLoop]: 882 mSDtfsCounter, 359 mSDsluCounter, 2291 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 359 SdHoareTripleChecker+Valid, 3173 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:42,429 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [359 Valid, 3173 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:18:42,432 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3672 states.
[2024-11-08 18:18:42,509 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3672 to 2810.
[2024-11-08 18:18:42,512 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2810 states, 2756 states have (on average 1.2917271407837445) internal successors, (3560), 2756 states have internal predecessors, (3560), 52 states have call successors, (52), 1 states have call predecessors, (52), 1 states have return successors, (52), 52 states have call predecessors, (52), 52 states have call successors, (52)
[2024-11-08 18:18:42,517 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2810 states to 2810 states and 3664 transitions.
[2024-11-08 18:18:42,518 INFO  L78                 Accepts]: Start accepts. Automaton has 2810 states and 3664 transitions. Word has length 352
[2024-11-08 18:18:42,518 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:42,518 INFO  L471      AbstractCegarLoop]: Abstraction has 2810 states and 3664 transitions.
[2024-11-08 18:18:42,518 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 56.0) internal successors, (280), 5 states have internal predecessors, (280), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:42,518 INFO  L276                IsEmpty]: Start isEmpty. Operand 2810 states and 3664 transitions.
[2024-11-08 18:18:42,524 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 353
[2024-11-08 18:18:42,525 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:42,525 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:42,525 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44
[2024-11-08 18:18:42,525 INFO  L396      AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:42,526 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:42,526 INFO  L85        PathProgramCache]: Analyzing trace with hash 891176057, now seen corresponding path program 1 times
[2024-11-08 18:18:42,526 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:42,526 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974061906]
[2024-11-08 18:18:42,526 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:42,526 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:43,304 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,699 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:44,699 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,701 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:44,701 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,702 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:18:44,703 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,704 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 18:18:44,705 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,706 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 18:18:44,707 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,708 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287
[2024-11-08 18:18:44,709 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:44,711 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 4 proven. 85 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:44,712 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:44,712 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974061906]
[2024-11-08 18:18:44,712 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [974061906] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:44,712 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2001227062]
[2024-11-08 18:18:44,712 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:44,712 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:44,712 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:44,714 INFO  L229       MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:44,719 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process
[2024-11-08 18:18:46,556 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:46,566 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2070 conjuncts, 24 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:46,574 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:46,834 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 83 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:46,834 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:18:47,221 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:47,221 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [2001227062] provided 1 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:47,221 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences.
[2024-11-08 18:18:47,221 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11, 8] total 22
[2024-11-08 18:18:47,222 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636949951]
[2024-11-08 18:18:47,222 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:47,223 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 18:18:47,223 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:47,224 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 18:18:47,224 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462
[2024-11-08 18:18:47,225 INFO  L87              Difference]: Start difference. First operand 2810 states and 3664 transitions. Second operand  has 7 states, 7 states have (on average 46.42857142857143) internal successors, (325), 7 states have internal predecessors, (325), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:47,430 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:47,430 INFO  L93              Difference]: Finished difference Result 3959 states and 5192 transitions.
[2024-11-08 18:18:47,431 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2024-11-08 18:18:47,431 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 46.42857142857143) internal successors, (325), 7 states have internal predecessors, (325), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 352
[2024-11-08 18:18:47,432 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:47,438 INFO  L225             Difference]: With dead ends: 3959
[2024-11-08 18:18:47,438 INFO  L226             Difference]: Without dead ends: 3386
[2024-11-08 18:18:47,440 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 727 GetRequests, 705 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552
[2024-11-08 18:18:47,440 INFO  L432           NwaCegarLoop]: 960 mSDtfsCounter, 348 mSDsluCounter, 4355 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 348 SdHoareTripleChecker+Valid, 5315 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:47,441 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [348 Valid, 5315 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:18:47,443 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3386 states.
[2024-11-08 18:18:47,514 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3386 to 3132.
[2024-11-08 18:18:47,517 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 3132 states, 3074 states have (on average 1.2872478854912166) internal successors, (3957), 3074 states have internal predecessors, (3957), 56 states have call successors, (56), 1 states have call predecessors, (56), 1 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56)
[2024-11-08 18:18:47,522 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 3132 states to 3132 states and 4069 transitions.
[2024-11-08 18:18:47,523 INFO  L78                 Accepts]: Start accepts. Automaton has 3132 states and 4069 transitions. Word has length 352
[2024-11-08 18:18:47,524 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:47,524 INFO  L471      AbstractCegarLoop]: Abstraction has 3132 states and 4069 transitions.
[2024-11-08 18:18:47,524 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 46.42857142857143) internal successors, (325), 7 states have internal predecessors, (325), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:18:47,524 INFO  L276                IsEmpty]: Start isEmpty. Operand 3132 states and 4069 transitions.
[2024-11-08 18:18:47,533 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 354
[2024-11-08 18:18:47,533 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:47,533 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:47,566 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0
[2024-11-08 18:18:47,733 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45
[2024-11-08 18:18:47,734 INFO  L396      AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:47,734 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:47,734 INFO  L85        PathProgramCache]: Analyzing trace with hash -17784546, now seen corresponding path program 1 times
[2024-11-08 18:18:47,735 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:47,735 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451679079]
[2024-11-08 18:18:47,735 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:47,735 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:48,002 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,415 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:48,416 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,416 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:48,417 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,418 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:18:48,418 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,419 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 18:18:48,419 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,420 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 18:18:48,420 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,421 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287
[2024-11-08 18:18:48,422 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:48,422 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked.
[2024-11-08 18:18:48,423 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:48,423 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451679079]
[2024-11-08 18:18:48,423 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451679079] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:48,423 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:18:48,423 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 18:18:48,423 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270414788]
[2024-11-08 18:18:48,423 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:48,424 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 18:18:48,424 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:48,424 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 18:18:48,425 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:18:48,425 INFO  L87              Difference]: Start difference. First operand 3132 states and 4069 transitions. Second operand  has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:18:48,485 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:48,485 INFO  L93              Difference]: Finished difference Result 5097 states and 6564 transitions.
[2024-11-08 18:18:48,485 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:18:48,485 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 353
[2024-11-08 18:18:48,486 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:48,491 INFO  L225             Difference]: With dead ends: 5097
[2024-11-08 18:18:48,491 INFO  L226             Difference]: Without dead ends: 3172
[2024-11-08 18:18:48,494 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 18:18:48,494 INFO  L432           NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 1610 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2152 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:48,495 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2152 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:18:48,497 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3172 states.
[2024-11-08 18:18:48,575 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3172 to 3140.
[2024-11-08 18:18:48,578 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 3140 states, 3082 states have (on average 1.2865022712524334) internal successors, (3965), 3082 states have internal predecessors, (3965), 56 states have call successors, (56), 1 states have call predecessors, (56), 1 states have return successors, (56), 56 states have call predecessors, (56), 56 states have call successors, (56)
[2024-11-08 18:18:48,583 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 3140 states to 3140 states and 4077 transitions.
[2024-11-08 18:18:48,584 INFO  L78                 Accepts]: Start accepts. Automaton has 3140 states and 4077 transitions. Word has length 353
[2024-11-08 18:18:48,585 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:48,585 INFO  L471      AbstractCegarLoop]: Abstraction has 3140 states and 4077 transitions.
[2024-11-08 18:18:48,585 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:18:48,585 INFO  L276                IsEmpty]: Start isEmpty. Operand 3140 states and 4077 transitions.
[2024-11-08 18:18:48,591 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 354
[2024-11-08 18:18:48,592 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:48,592 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:48,592 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46
[2024-11-08 18:18:48,592 INFO  L396      AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:48,593 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:48,593 INFO  L85        PathProgramCache]: Analyzing trace with hash -2118966398, now seen corresponding path program 1 times
[2024-11-08 18:18:48,593 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:48,593 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963950428]
[2024-11-08 18:18:48,593 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:48,594 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:49,621 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,918 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:18:51,920 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,921 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:18:51,922 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,924 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:18:51,925 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,926 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 18:18:51,927 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,929 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 18:18:51,929 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,930 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287
[2024-11-08 18:18:51,931 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:51,933 INFO  L134       CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:18:51,933 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:18:51,933 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963950428]
[2024-11-08 18:18:51,933 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1963950428] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:18:51,933 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301669372]
[2024-11-08 18:18:51,934 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:51,934 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:51,934 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:18:51,936 INFO  L229       MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:18:51,938 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process
[2024-11-08 18:18:54,190 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:18:54,201 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2071 conjuncts, 89 conjuncts are in the unsatisfiable core
[2024-11-08 18:18:54,211 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:18:56,383 INFO  L134       CoverageAnalysis]: Checked inductivity of 150 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 18:18:56,383 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:18:56,383 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1301669372] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:18:56,384 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:18:56,384 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [13] total 22
[2024-11-08 18:18:56,384 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121736406]
[2024-11-08 18:18:56,384 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:18:56,385 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 11 states
[2024-11-08 18:18:56,385 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:18:56,386 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2024-11-08 18:18:56,386 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462
[2024-11-08 18:18:56,386 INFO  L87              Difference]: Start difference. First operand 3140 states and 4077 transitions. Second operand  has 11 states, 11 states have (on average 29.90909090909091) internal successors, (329), 11 states have internal predecessors, (329), 3 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:18:57,555 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:18:57,556 INFO  L93              Difference]: Finished difference Result 5962 states and 7716 transitions.
[2024-11-08 18:18:57,556 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2024-11-08 18:18:57,556 INFO  L78                 Accepts]: Start accepts. Automaton has  has 11 states, 11 states have (on average 29.90909090909091) internal successors, (329), 11 states have internal predecessors, (329), 3 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 353
[2024-11-08 18:18:57,557 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:18:57,567 INFO  L225             Difference]: With dead ends: 5962
[2024-11-08 18:18:57,567 INFO  L226             Difference]: Without dead ends: 5059
[2024-11-08 18:18:57,570 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 380 GetRequests, 358 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462
[2024-11-08 18:18:57,570 INFO  L432           NwaCegarLoop]: 617 mSDtfsCounter, 856 mSDsluCounter, 2286 mSDsCounter, 0 mSdLazyCounter, 1390 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 861 SdHoareTripleChecker+Valid, 2903 SdHoareTripleChecker+Invalid, 1391 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1390 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:18:57,571 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [861 Valid, 2903 Invalid, 1391 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1390 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time]
[2024-11-08 18:18:57,574 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 5059 states.
[2024-11-08 18:18:57,694 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 5059 to 5035.
[2024-11-08 18:18:57,699 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5035 states, 4941 states have (on average 1.281117182756527) internal successors, (6330), 4941 states have internal predecessors, (6330), 92 states have call successors, (92), 1 states have call predecessors, (92), 1 states have return successors, (92), 92 states have call predecessors, (92), 92 states have call successors, (92)
[2024-11-08 18:18:57,707 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5035 states to 5035 states and 6514 transitions.
[2024-11-08 18:18:57,708 INFO  L78                 Accepts]: Start accepts. Automaton has 5035 states and 6514 transitions. Word has length 353
[2024-11-08 18:18:57,709 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:18:57,709 INFO  L471      AbstractCegarLoop]: Abstraction has 5035 states and 6514 transitions.
[2024-11-08 18:18:57,709 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 11 states, 11 states have (on average 29.90909090909091) internal successors, (329), 11 states have internal predecessors, (329), 3 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:18:57,709 INFO  L276                IsEmpty]: Start isEmpty. Operand 5035 states and 6514 transitions.
[2024-11-08 18:18:57,718 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 354
[2024-11-08 18:18:57,718 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:18:57,719 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:18:57,748 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0
[2024-11-08 18:18:57,919 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:18:57,919 INFO  L396      AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:18:57,920 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:18:57,920 INFO  L85        PathProgramCache]: Analyzing trace with hash 1680724258, now seen corresponding path program 1 times
[2024-11-08 18:18:57,920 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:18:57,920 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670037518]
[2024-11-08 18:18:57,920 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:18:57,921 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:18:59,510 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,471 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:19:04,472 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,473 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:19:04,474 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,475 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:19:04,476 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,477 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 18:19:04,477 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,478 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 18:19:04,479 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,480 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287
[2024-11-08 18:19:04,481 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:04,483 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 51 proven. 35 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked.
[2024-11-08 18:19:04,484 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:19:04,484 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670037518]
[2024-11-08 18:19:04,484 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1670037518] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:19:04,484 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [327964470]
[2024-11-08 18:19:04,484 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:04,484 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:04,484 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:19:04,485 INFO  L229       MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:19:04,487 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process
[2024-11-08 18:19:06,526 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:06,535 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2071 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 18:19:06,539 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:19:06,607 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked.
[2024-11-08 18:19:06,608 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:19:06,608 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [327964470] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:19:06,608 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:19:06,608 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [17] total 21
[2024-11-08 18:19:06,608 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19831322]
[2024-11-08 18:19:06,608 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:19:06,609 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:19:06,609 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:19:06,609 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:19:06,609 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420
[2024-11-08 18:19:06,609 INFO  L87              Difference]: Start difference. First operand 5035 states and 6514 transitions. Second operand  has 6 states, 5 states have (on average 54.6) internal successors, (273), 6 states have internal predecessors, (273), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 18:19:06,715 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:19:06,715 INFO  L93              Difference]: Finished difference Result 7544 states and 9735 transitions.
[2024-11-08 18:19:06,716 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:19:06,716 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 5 states have (on average 54.6) internal successors, (273), 6 states have internal predecessors, (273), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 353
[2024-11-08 18:19:06,716 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:19:06,724 INFO  L225             Difference]: With dead ends: 7544
[2024-11-08 18:19:06,725 INFO  L226             Difference]: Without dead ends: 5035
[2024-11-08 18:19:06,729 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 382 GetRequests, 363 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420
[2024-11-08 18:19:06,729 INFO  L432           NwaCegarLoop]: 541 mSDtfsCounter, 0 mSDsluCounter, 2145 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2686 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:19:06,729 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2686 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:19:06,733 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 5035 states.
[2024-11-08 18:19:06,848 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 5035 to 5035.
[2024-11-08 18:19:06,853 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5035 states, 4941 states have (on average 1.2782837482291034) internal successors, (6316), 4941 states have internal predecessors, (6316), 92 states have call successors, (92), 1 states have call predecessors, (92), 1 states have return successors, (92), 92 states have call predecessors, (92), 92 states have call successors, (92)
[2024-11-08 18:19:06,861 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5035 states to 5035 states and 6500 transitions.
[2024-11-08 18:19:06,862 INFO  L78                 Accepts]: Start accepts. Automaton has 5035 states and 6500 transitions. Word has length 353
[2024-11-08 18:19:06,862 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:19:06,863 INFO  L471      AbstractCegarLoop]: Abstraction has 5035 states and 6500 transitions.
[2024-11-08 18:19:06,863 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 5 states have (on average 54.6) internal successors, (273), 6 states have internal predecessors, (273), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 18:19:06,863 INFO  L276                IsEmpty]: Start isEmpty. Operand 5035 states and 6500 transitions.
[2024-11-08 18:19:06,871 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 355
[2024-11-08 18:19:06,871 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:19:06,872 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:19:06,901 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0
[2024-11-08 18:19:07,072 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable48
[2024-11-08 18:19:07,073 INFO  L396      AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:19:07,073 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:19:07,073 INFO  L85        PathProgramCache]: Analyzing trace with hash 1557255628, now seen corresponding path program 1 times
[2024-11-08 18:19:07,073 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:19:07,074 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716477210]
[2024-11-08 18:19:07,074 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:07,074 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:19:08,172 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,435 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:19:09,436 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,437 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 18:19:09,438 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,439 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 18:19:09,440 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,441 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 18:19:09,441 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,442 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 18:19:09,442 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,443 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288
[2024-11-08 18:19:09,443 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:09,444 INFO  L134       CoverageAnalysis]: Checked inductivity of 150 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked.
[2024-11-08 18:19:09,445 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:19:09,445 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716477210]
[2024-11-08 18:19:09,445 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716477210] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:19:09,445 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:19:09,445 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2024-11-08 18:19:09,445 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1285131690]
[2024-11-08 18:19:09,446 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:19:09,446 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 10 states
[2024-11-08 18:19:09,446 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:19:09,447 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-08 18:19:09,447 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90
[2024-11-08 18:19:09,447 INFO  L87              Difference]: Start difference. First operand 5035 states and 6500 transitions. Second operand  has 10 states, 10 states have (on average 28.0) internal successors, (280), 10 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:19:09,918 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:19:09,918 INFO  L93              Difference]: Finished difference Result 8187 states and 10548 transitions.
[2024-11-08 18:19:09,919 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-08 18:19:09,919 INFO  L78                 Accepts]: Start accepts. Automaton has  has 10 states, 10 states have (on average 28.0) internal successors, (280), 10 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 354
[2024-11-08 18:19:09,919 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:19:09,927 INFO  L225             Difference]: With dead ends: 8187
[2024-11-08 18:19:09,927 INFO  L226             Difference]: Without dead ends: 5977
[2024-11-08 18:19:09,931 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156
[2024-11-08 18:19:09,932 INFO  L432           NwaCegarLoop]: 820 mSDtfsCounter, 1255 mSDsluCounter, 4791 mSDsCounter, 0 mSdLazyCounter, 417 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1260 SdHoareTripleChecker+Valid, 5611 SdHoareTripleChecker+Invalid, 419 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 417 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 18:19:09,932 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1260 Valid, 5611 Invalid, 419 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 417 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 18:19:09,936 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 5977 states.
[2024-11-08 18:19:10,098 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 5977 to 5259.
[2024-11-08 18:19:10,103 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5259 states, 5153 states have (on average 1.2753735687948768) internal successors, (6572), 5153 states have internal predecessors, (6572), 104 states have call successors, (104), 1 states have call predecessors, (104), 1 states have return successors, (104), 104 states have call predecessors, (104), 104 states have call successors, (104)
[2024-11-08 18:19:10,111 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5259 states to 5259 states and 6780 transitions.
[2024-11-08 18:19:10,112 INFO  L78                 Accepts]: Start accepts. Automaton has 5259 states and 6780 transitions. Word has length 354
[2024-11-08 18:19:10,112 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:19:10,112 INFO  L471      AbstractCegarLoop]: Abstraction has 5259 states and 6780 transitions.
[2024-11-08 18:19:10,113 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 10 states, 10 states have (on average 28.0) internal successors, (280), 10 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:19:10,113 INFO  L276                IsEmpty]: Start isEmpty. Operand 5259 states and 6780 transitions.
[2024-11-08 18:19:10,121 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 355
[2024-11-08 18:19:10,122 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:19:10,122 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:19:10,122 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49
[2024-11-08 18:19:10,122 INFO  L396      AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:19:10,123 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:19:10,123 INFO  L85        PathProgramCache]: Analyzing trace with hash -786446861, now seen corresponding path program 1 times
[2024-11-08 18:19:10,123 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:19:10,123 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144698108]
[2024-11-08 18:19:10,123 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:10,124 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:19:11,436 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,661 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:19:13,662 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,663 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 18:19:13,664 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,666 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 18:19:13,666 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,668 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 18:19:13,669 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,670 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 18:19:13,671 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,673 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288
[2024-11-08 18:19:13,674 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:13,676 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:19:13,676 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:19:13,676 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144698108]
[2024-11-08 18:19:13,677 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144698108] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:19:13,677 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1025432963]
[2024-11-08 18:19:13,677 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:13,677 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:13,677 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:19:13,680 INFO  L229       MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:19:13,682 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process
[2024-11-08 18:19:15,698 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:15,708 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2074 conjuncts, 61 conjuncts are in the unsatisfiable core
[2024-11-08 18:19:15,717 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:19:16,869 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 121 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 18:19:16,870 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:19:18,643 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 85 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:19:18,643 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1025432963] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 18:19:18,643 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 18:19:18,643 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11, 10] total 30
[2024-11-08 18:19:18,643 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236447441]
[2024-11-08 18:19:18,643 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 18:19:18,644 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 30 states
[2024-11-08 18:19:18,645 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:19:18,646 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants.
[2024-11-08 18:19:18,646 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=769, Unknown=0, NotChecked=0, Total=870
[2024-11-08 18:19:18,647 INFO  L87              Difference]: Start difference. First operand 5259 states and 6780 transitions. Second operand  has 30 states, 30 states have (on average 29.5) internal successors, (885), 30 states have internal predecessors, (885), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 18:19:21,129 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:19:21,130 INFO  L93              Difference]: Finished difference Result 10261 states and 13172 transitions.
[2024-11-08 18:19:21,130 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. 
[2024-11-08 18:19:21,131 INFO  L78                 Accepts]: Start accepts. Automaton has  has 30 states, 30 states have (on average 29.5) internal successors, (885), 30 states have internal predecessors, (885), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 354
[2024-11-08 18:19:21,131 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:19:21,138 INFO  L225             Difference]: With dead ends: 10261
[2024-11-08 18:19:21,138 INFO  L226             Difference]: Without dead ends: 5337
[2024-11-08 18:19:21,145 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 751 GetRequests, 704 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 409 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=318, Invalid=1844, Unknown=0, NotChecked=0, Total=2162
[2024-11-08 18:19:21,146 INFO  L432           NwaCegarLoop]: 484 mSDtfsCounter, 2659 mSDsluCounter, 7155 mSDsCounter, 0 mSdLazyCounter, 3607 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2662 SdHoareTripleChecker+Valid, 7639 SdHoareTripleChecker+Invalid, 3629 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 3607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:19:21,146 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2662 Valid, 7639 Invalid, 3629 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 3607 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time]
[2024-11-08 18:19:21,149 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 5337 states.
[2024-11-08 18:19:21,273 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 5337 to 5305.
[2024-11-08 18:19:21,278 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5305 states, 5199 states have (on average 1.2740911713791114) internal successors, (6624), 5199 states have internal predecessors, (6624), 104 states have call successors, (104), 1 states have call predecessors, (104), 1 states have return successors, (104), 104 states have call predecessors, (104), 104 states have call successors, (104)
[2024-11-08 18:19:21,286 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5305 states to 5305 states and 6832 transitions.
[2024-11-08 18:19:21,287 INFO  L78                 Accepts]: Start accepts. Automaton has 5305 states and 6832 transitions. Word has length 354
[2024-11-08 18:19:21,288 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:19:21,288 INFO  L471      AbstractCegarLoop]: Abstraction has 5305 states and 6832 transitions.
[2024-11-08 18:19:21,289 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 30 states, 30 states have (on average 29.5) internal successors, (885), 30 states have internal predecessors, (885), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 18:19:21,289 INFO  L276                IsEmpty]: Start isEmpty. Operand 5305 states and 6832 transitions.
[2024-11-08 18:19:21,299 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 356
[2024-11-08 18:19:21,301 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:19:21,302 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:19:21,331 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0
[2024-11-08 18:19:21,502 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:21,503 INFO  L396      AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:19:21,503 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:19:21,503 INFO  L85        PathProgramCache]: Analyzing trace with hash 1777875976, now seen corresponding path program 1 times
[2024-11-08 18:19:21,503 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:19:21,503 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493836645]
[2024-11-08 18:19:21,504 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:21,504 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:19:22,952 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,982 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:19:23,983 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,985 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 18:19:23,986 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,987 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 18:19:23,988 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,989 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 18:19:23,989 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,990 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 18:19:23,990 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,991 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288
[2024-11-08 18:19:23,991 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:23,992 INFO  L134       CoverageAnalysis]: Checked inductivity of 147 backedges. 84 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:19:23,993 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:19:23,993 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493836645]
[2024-11-08 18:19:23,993 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [493836645] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:19:23,993 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2032807476]
[2024-11-08 18:19:23,993 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:23,993 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:23,993 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:19:23,994 INFO  L229       MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:19:23,995 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process
[2024-11-08 18:19:26,030 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:26,039 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2075 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 18:19:26,043 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:19:26,099 INFO  L134       CoverageAnalysis]: Checked inductivity of 147 backedges. 122 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked.
[2024-11-08 18:19:26,100 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:19:26,100 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [2032807476] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:19:26,100 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:19:26,100 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11
[2024-11-08 18:19:26,100 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889032140]
[2024-11-08 18:19:26,100 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:19:26,101 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:19:26,101 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:19:26,102 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:19:26,102 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110
[2024-11-08 18:19:26,102 INFO  L87              Difference]: Start difference. First operand 5305 states and 6832 transitions. Second operand  has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:19:26,216 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:19:26,217 INFO  L93              Difference]: Finished difference Result 10207 states and 13108 transitions.
[2024-11-08 18:19:26,217 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:19:26,218 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355
[2024-11-08 18:19:26,218 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:19:26,224 INFO  L225             Difference]: With dead ends: 10207
[2024-11-08 18:19:26,224 INFO  L226             Difference]: Without dead ends: 5305
[2024-11-08 18:19:26,230 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 374 GetRequests, 365 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110
[2024-11-08 18:19:26,230 INFO  L432           NwaCegarLoop]: 540 mSDtfsCounter, 0 mSDsluCounter, 2141 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2681 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:19:26,231 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2681 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:19:26,234 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 5305 states.
[2024-11-08 18:19:26,389 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 5305 to 5305.
[2024-11-08 18:19:26,394 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5305 states, 5199 states have (on average 1.2713983458357376) internal successors, (6610), 5199 states have internal predecessors, (6610), 104 states have call successors, (104), 1 states have call predecessors, (104), 1 states have return successors, (104), 104 states have call predecessors, (104), 104 states have call successors, (104)
[2024-11-08 18:19:26,402 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5305 states to 5305 states and 6818 transitions.
[2024-11-08 18:19:26,403 INFO  L78                 Accepts]: Start accepts. Automaton has 5305 states and 6818 transitions. Word has length 355
[2024-11-08 18:19:26,403 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:19:26,403 INFO  L471      AbstractCegarLoop]: Abstraction has 5305 states and 6818 transitions.
[2024-11-08 18:19:26,404 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:19:26,404 INFO  L276                IsEmpty]: Start isEmpty. Operand 5305 states and 6818 transitions.
[2024-11-08 18:19:26,411 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 357
[2024-11-08 18:19:26,412 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:19:26,412 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:19:26,441 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0
[2024-11-08 18:19:26,612 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable51
[2024-11-08 18:19:26,613 INFO  L396      AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:19:26,613 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:19:26,614 INFO  L85        PathProgramCache]: Analyzing trace with hash -515575947, now seen corresponding path program 1 times
[2024-11-08 18:19:26,614 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:19:26,614 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735525614]
[2024-11-08 18:19:26,614 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:26,615 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:19:28,325 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,445 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:19:30,446 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,448 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 18:19:30,449 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,450 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 18:19:30,451 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,452 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 18:19:30,453 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,454 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275
[2024-11-08 18:19:30,455 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,457 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289
[2024-11-08 18:19:30,458 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:30,460 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:19:30,461 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:19:30,461 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735525614]
[2024-11-08 18:19:30,461 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1735525614] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:19:30,461 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [611531207]
[2024-11-08 18:19:30,461 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:30,461 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:30,461 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:19:30,462 INFO  L229       MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:19:30,464 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process
[2024-11-08 18:19:32,884 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:32,895 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2078 conjuncts, 71 conjuncts are in the unsatisfiable core
[2024-11-08 18:19:32,904 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:19:34,291 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 117 proven. 7 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 18:19:34,291 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:19:41,855 INFO  L134       CoverageAnalysis]: Checked inductivity of 148 backedges. 84 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:19:41,855 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [611531207] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 18:19:41,855 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 18:19:41,855 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13, 11] total 30
[2024-11-08 18:19:41,855 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68027197]
[2024-11-08 18:19:41,855 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 18:19:41,856 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 30 states
[2024-11-08 18:19:41,856 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:19:41,857 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants.
[2024-11-08 18:19:41,858 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=703, Unknown=0, NotChecked=0, Total=870
[2024-11-08 18:19:41,858 INFO  L87              Difference]: Start difference. First operand 5305 states and 6818 transitions. Second operand  has 30 states, 30 states have (on average 29.766666666666666) internal successors, (893), 30 states have internal predecessors, (893), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 18:19:45,023 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:19:45,023 INFO  L93              Difference]: Finished difference Result 11361 states and 14284 transitions.
[2024-11-08 18:19:45,024 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. 
[2024-11-08 18:19:45,024 INFO  L78                 Accepts]: Start accepts. Automaton has  has 30 states, 30 states have (on average 29.766666666666666) internal successors, (893), 30 states have internal predecessors, (893), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 356
[2024-11-08 18:19:45,025 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:19:45,029 INFO  L225             Difference]: With dead ends: 11361
[2024-11-08 18:19:45,030 INFO  L226             Difference]: Without dead ends: 6457
[2024-11-08 18:19:45,036 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 759 GetRequests, 706 SyntacticMatches, 1 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 439 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=508, Invalid=2354, Unknown=0, NotChecked=0, Total=2862
[2024-11-08 18:19:45,036 INFO  L432           NwaCegarLoop]: 462 mSDtfsCounter, 2110 mSDsluCounter, 7895 mSDsCounter, 0 mSdLazyCounter, 4394 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2110 SdHoareTripleChecker+Valid, 8357 SdHoareTripleChecker+Invalid, 4399 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 4394 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.4s IncrementalHoareTripleChecker+Time
[2024-11-08 18:19:45,036 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2110 Valid, 8357 Invalid, 4399 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 4394 Invalid, 0 Unknown, 0 Unchecked, 2.4s Time]
[2024-11-08 18:19:45,040 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 6457 states.
[2024-11-08 18:19:45,170 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 6457 to 5255.
[2024-11-08 18:19:45,175 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5255 states, 5149 states have (on average 1.2705379685375802) internal successors, (6542), 5149 states have internal predecessors, (6542), 104 states have call successors, (104), 1 states have call predecessors, (104), 1 states have return successors, (104), 104 states have call predecessors, (104), 104 states have call successors, (104)
[2024-11-08 18:19:45,183 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5255 states to 5255 states and 6750 transitions.
[2024-11-08 18:19:45,184 INFO  L78                 Accepts]: Start accepts. Automaton has 5255 states and 6750 transitions. Word has length 356
[2024-11-08 18:19:45,184 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:19:45,184 INFO  L471      AbstractCegarLoop]: Abstraction has 5255 states and 6750 transitions.
[2024-11-08 18:19:45,185 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 30 states, 30 states have (on average 29.766666666666666) internal successors, (893), 30 states have internal predecessors, (893), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 18:19:45,185 INFO  L276                IsEmpty]: Start isEmpty. Operand 5255 states and 6750 transitions.
[2024-11-08 18:19:45,192 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 357
[2024-11-08 18:19:45,192 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:19:45,192 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:19:45,224 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0
[2024-11-08 18:19:45,393 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:45,393 INFO  L396      AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:19:45,394 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:19:45,394 INFO  L85        PathProgramCache]: Analyzing trace with hash -454379796, now seen corresponding path program 1 times
[2024-11-08 18:19:45,394 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:19:45,394 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [631011244]
[2024-11-08 18:19:45,394 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:45,394 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:19:47,006 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,850 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:19:50,851 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,853 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 18:19:50,853 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,855 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 18:19:50,855 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,856 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 18:19:50,857 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,858 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275
[2024-11-08 18:19:50,859 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,860 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289
[2024-11-08 18:19:50,860 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:50,862 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked.
[2024-11-08 18:19:50,863 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:19:50,863 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [631011244]
[2024-11-08 18:19:50,863 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [631011244] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:19:50,863 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1344116341]
[2024-11-08 18:19:50,863 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:19:50,863 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:19:50,863 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:19:50,864 INFO  L229       MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:19:50,901 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process
[2024-11-08 18:19:53,815 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:19:53,826 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2078 conjuncts, 245 conjuncts are in the unsatisfiable core
[2024-11-08 18:19:53,840 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:19:58,165 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:19:58,165 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:20:09,453 INFO  L134       CoverageAnalysis]: Checked inductivity of 149 backedges. 45 proven. 44 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:20:09,453 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1344116341] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 18:20:09,454 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 18:20:09,454 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 43, 41] total 97
[2024-11-08 18:20:09,454 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305540099]
[2024-11-08 18:20:09,454 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 18:20:09,456 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 97 states
[2024-11-08 18:20:09,456 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:20:09,458 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants.
[2024-11-08 18:20:09,459 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1087, Invalid=8225, Unknown=0, NotChecked=0, Total=9312
[2024-11-08 18:20:09,460 INFO  L87              Difference]: Start difference. First operand 5255 states and 6750 transitions. Second operand  has 97 states, 97 states have (on average 9.11340206185567) internal successors, (884), 97 states have internal predecessors, (884), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18)
[2024-11-08 18:22:02,587 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:22:02,587 INFO  L93              Difference]: Finished difference Result 67432 states and 86645 transitions.
[2024-11-08 18:22:02,588 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 673 states. 
[2024-11-08 18:22:02,588 INFO  L78                 Accepts]: Start accepts. Automaton has  has 97 states, 97 states have (on average 9.11340206185567) internal successors, (884), 97 states have internal predecessors, (884), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) Word has length 356
[2024-11-08 18:22:02,589 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:22:02,658 INFO  L225             Difference]: With dead ends: 67432
[2024-11-08 18:22:02,658 INFO  L226             Difference]: Without dead ends: 63997
[2024-11-08 18:22:02,715 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 1396 GetRequests, 645 SyntacticMatches, 0 SemanticMatches, 751 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237563 ImplicationChecksByTransitivity, 64.5s TimeCoverageRelationStatistics Valid=54548, Invalid=511708, Unknown=0, NotChecked=0, Total=566256
[2024-11-08 18:22:02,715 INFO  L432           NwaCegarLoop]: 1178 mSDtfsCounter, 52336 mSDsluCounter, 72669 mSDsCounter, 0 mSdLazyCounter, 53824 mSolverCounterSat, 377 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 35.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 52343 SdHoareTripleChecker+Valid, 73847 SdHoareTripleChecker+Invalid, 54201 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.6s SdHoareTripleChecker+Time, 377 IncrementalHoareTripleChecker+Valid, 53824 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 40.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:22:02,715 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [52343 Valid, 73847 Invalid, 54201 Unknown, 0 Unchecked, 0.6s Time], IncrementalHoareTripleChecker [377 Valid, 53824 Invalid, 0 Unknown, 0 Unchecked, 40.1s Time]
[2024-11-08 18:22:02,757 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 63997 states.
[2024-11-08 18:22:03,564 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 63997 to 20929.
[2024-11-08 18:22:03,579 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 20929 states, 20441 states have (on average 1.2663274790861503) internal successors, (25885), 20441 states have internal predecessors, (25885), 486 states have call successors, (486), 1 states have call predecessors, (486), 1 states have return successors, (486), 486 states have call predecessors, (486), 486 states have call successors, (486)
[2024-11-08 18:22:03,610 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 20929 states to 20929 states and 26857 transitions.
[2024-11-08 18:22:03,613 INFO  L78                 Accepts]: Start accepts. Automaton has 20929 states and 26857 transitions. Word has length 356
[2024-11-08 18:22:03,614 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:22:03,614 INFO  L471      AbstractCegarLoop]: Abstraction has 20929 states and 26857 transitions.
[2024-11-08 18:22:03,614 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 97 states, 97 states have (on average 9.11340206185567) internal successors, (884), 97 states have internal predecessors, (884), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18)
[2024-11-08 18:22:03,614 INFO  L276                IsEmpty]: Start isEmpty. Operand 20929 states and 26857 transitions.
[2024-11-08 18:22:03,636 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 357
[2024-11-08 18:22:03,636 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:03,637 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:03,658 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0
[2024-11-08 18:22:03,837 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable53
[2024-11-08 18:22:03,837 INFO  L396      AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:03,838 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:03,838 INFO  L85        PathProgramCache]: Analyzing trace with hash -358519076, now seen corresponding path program 1 times
[2024-11-08 18:22:03,838 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:22:03,838 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215976654]
[2024-11-08 18:22:03,838 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:03,838 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:22:04,933 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,625 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47
[2024-11-08 18:22:05,626 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,628 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65
[2024-11-08 18:22:05,629 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,631 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 18:22:05,631 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,633 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 18:22:05,634 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,635 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275
[2024-11-08 18:22:05,635 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,636 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290
[2024-11-08 18:22:05,637 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:05,639 INFO  L134       CoverageAnalysis]: Checked inductivity of 152 backedges. 92 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 18:22:05,639 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:22:05,639 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215976654]
[2024-11-08 18:22:05,639 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [215976654] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:22:05,639 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:22:05,640 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 18:22:05,640 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304428444]
[2024-11-08 18:22:05,640 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:22:05,641 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:22:05,641 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:22:05,641 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:22:05,642 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:22:05,642 INFO  L87              Difference]: Start difference. First operand 20929 states and 26857 transitions. Second operand  has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:22:06,753 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:22:06,753 INFO  L93              Difference]: Finished difference Result 29215 states and 37640 transitions.
[2024-11-08 18:22:06,754 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:22:06,754 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 356
[2024-11-08 18:22:06,755 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:22:06,786 INFO  L225             Difference]: With dead ends: 29215
[2024-11-08 18:22:06,786 INFO  L226             Difference]: Without dead ends: 24663
[2024-11-08 18:22:06,797 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 18:22:06,798 INFO  L432           NwaCegarLoop]: 689 mSDtfsCounter, 732 mSDsluCounter, 1728 mSDsCounter, 0 mSdLazyCounter, 952 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 735 SdHoareTripleChecker+Valid, 2417 SdHoareTripleChecker+Invalid, 953 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 952 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 18:22:06,798 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [735 Valid, 2417 Invalid, 953 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 952 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 18:22:06,813 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 24663 states.
[2024-11-08 18:22:07,449 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 24663 to 21659.
[2024-11-08 18:22:07,464 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 21659 states, 21155 states have (on average 1.268825336799811) internal successors, (26842), 21155 states have internal predecessors, (26842), 502 states have call successors, (502), 1 states have call predecessors, (502), 1 states have return successors, (502), 502 states have call predecessors, (502), 502 states have call successors, (502)
[2024-11-08 18:22:07,498 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 21659 states to 21659 states and 27846 transitions.
[2024-11-08 18:22:07,499 INFO  L78                 Accepts]: Start accepts. Automaton has 21659 states and 27846 transitions. Word has length 356
[2024-11-08 18:22:07,500 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:22:07,500 INFO  L471      AbstractCegarLoop]: Abstraction has 21659 states and 27846 transitions.
[2024-11-08 18:22:07,500 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 18:22:07,500 INFO  L276                IsEmpty]: Start isEmpty. Operand 21659 states and 27846 transitions.
[2024-11-08 18:22:07,525 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 358
[2024-11-08 18:22:07,525 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:07,526 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:07,526 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54
[2024-11-08 18:22:07,526 INFO  L396      AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:07,526 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:07,527 INFO  L85        PathProgramCache]: Analyzing trace with hash -124571980, now seen corresponding path program 1 times
[2024-11-08 18:22:07,527 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:22:07,527 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852900540]
[2024-11-08 18:22:07,527 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:07,527 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:22:07,881 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,767 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 18:22:08,769 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,770 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 18:22:08,771 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,773 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 18:22:08,774 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,776 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 18:22:08,777 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,779 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275
[2024-11-08 18:22:08,780 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,781 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290
[2024-11-08 18:22:08,782 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:08,784 INFO  L134       CoverageAnalysis]: Checked inductivity of 151 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 94 trivial. 0 not checked.
[2024-11-08 18:22:08,785 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 18:22:08,785 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852900540]
[2024-11-08 18:22:08,785 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1852900540] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:22:08,785 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:22:08,785 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 18:22:08,785 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472820686]
[2024-11-08 18:22:08,785 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:22:08,786 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 18:22:08,786 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 18:22:08,787 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 18:22:08,787 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:22:08,788 INFO  L87              Difference]: Start difference. First operand 21659 states and 27846 transitions. Second operand  has 6 states, 6 states have (on average 50.333333333333336) internal successors, (302), 6 states have internal predecessors, (302), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:22:09,649 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:22:09,649 INFO  L93              Difference]: Finished difference Result 35689 states and 45837 transitions.
[2024-11-08 18:22:09,649 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 18:22:09,650 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 50.333333333333336) internal successors, (302), 6 states have internal predecessors, (302), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 357
[2024-11-08 18:22:09,650 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:22:09,674 INFO  L225             Difference]: With dead ends: 35689
[2024-11-08 18:22:09,674 INFO  L226             Difference]: Without dead ends: 22219
[2024-11-08 18:22:09,688 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 18:22:09,689 INFO  L432           NwaCegarLoop]: 397 mSDtfsCounter, 330 mSDsluCounter, 1178 mSDsCounter, 0 mSdLazyCounter, 588 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 330 SdHoareTripleChecker+Valid, 1575 SdHoareTripleChecker+Invalid, 589 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 588 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 18:22:09,689 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [330 Valid, 1575 Invalid, 589 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 588 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 18:22:09,702 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 22219 states.
[2024-11-08 18:22:10,155 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 22219 to 21939.
[2024-11-08 18:22:10,167 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 21939 states, 21435 states have (on average 1.2653137392115699) internal successors, (27122), 21435 states have internal predecessors, (27122), 502 states have call successors, (502), 1 states have call predecessors, (502), 1 states have return successors, (502), 502 states have call predecessors, (502), 502 states have call successors, (502)
[2024-11-08 18:22:10,188 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 21939 states to 21939 states and 28126 transitions.
[2024-11-08 18:22:10,190 INFO  L78                 Accepts]: Start accepts. Automaton has 21939 states and 28126 transitions. Word has length 357
[2024-11-08 18:22:10,190 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:22:10,190 INFO  L471      AbstractCegarLoop]: Abstraction has 21939 states and 28126 transitions.
[2024-11-08 18:22:10,190 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 50.333333333333336) internal successors, (302), 6 states have internal predecessors, (302), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:22:10,191 INFO  L276                IsEmpty]: Start isEmpty. Operand 21939 states and 28126 transitions.
[2024-11-08 18:22:10,220 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 358
[2024-11-08 18:22:10,220 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:10,221 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:10,221 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55
[2024-11-08 18:22:10,221 INFO  L396      AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:10,221 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:10,221 INFO  L85        PathProgramCache]: Analyzing trace with hash 1686665257, now seen corresponding path program 1 times
[2024-11-08 18:22:10,221 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 18:22:10,222 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509538083]
[2024-11-08 18:22:10,222 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:10,222 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 18:22:12,416 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-08 18:22:12,416 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-08 18:22:14,468 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-08 18:22:14,704 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-08 18:22:14,705 INFO  L325         BasicCegarLoop]: Counterexample is feasible
[2024-11-08 18:22:14,706 INFO  L782   garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining)
[2024-11-08 18:22:14,708 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56
[2024-11-08 18:22:14,712 INFO  L407         BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:14,913 WARN  L290   BoogieBacktranslator]: Removing null node from list of ATEs: ATE  program state null
[2024-11-08 18:22:14,913 WARN  L290   BoogieBacktranslator]: Removing null node from list of ATEs: ATE  program state null
[2024-11-08 18:22:14,986 INFO  L170   ceAbstractionStarter]: Computing trace abstraction results
[2024-11-08 18:22:14,991 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.11 06:22:14 BoogieIcfgContainer
[2024-11-08 18:22:14,991 INFO  L131        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2024-11-08 18:22:14,991 INFO  L112        PluginConnector]: ------------------------Witness Printer----------------------------
[2024-11-08 18:22:14,991 INFO  L270        PluginConnector]: Initializing Witness Printer...
[2024-11-08 18:22:14,992 INFO  L274        PluginConnector]: Witness Printer initialized
[2024-11-08 18:22:14,992 INFO  L184        PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:17:20" (3/4) ...
[2024-11-08 18:22:14,997 INFO  L145         WitnessPrinter]: No result that supports witness generation found
[2024-11-08 18:22:14,998 INFO  L131        PluginConnector]: ------------------------ END Witness Printer----------------------------
[2024-11-08 18:22:14,998 INFO  L158              Benchmark]: Toolchain (without parser) took 298489.91ms. Allocated memory was 157.3MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 127.6MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 735.9MB. Max. memory is 16.1GB.
[2024-11-08 18:22:14,999 INFO  L158              Benchmark]: CDTParser took 0.24ms. Allocated memory is still 121.6MB. Free memory is still 95.0MB. There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 18:22:14,999 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 786.74ms. Allocated memory is still 157.3MB. Free memory was 127.6MB in the beginning and 95.9MB in the end (delta: 31.7MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB.
[2024-11-08 18:22:14,999 INFO  L158              Benchmark]: Boogie Procedure Inliner took 215.32ms. Allocated memory is still 157.3MB. Free memory was 95.9MB in the beginning and 66.6MB in the end (delta: 29.4MB). Peak memory consumption was 27.3MB. Max. memory is 16.1GB.
[2024-11-08 18:22:15,003 INFO  L158              Benchmark]: Boogie Preprocessor took 313.76ms. Allocated memory is still 157.3MB. Free memory was 66.6MB in the beginning and 108.3MB in the end (delta: -41.8MB). Peak memory consumption was 46.8MB. Max. memory is 16.1GB.
[2024-11-08 18:22:15,004 INFO  L158              Benchmark]: RCFGBuilder took 2301.19ms. Allocated memory was 157.3MB in the beginning and 239.1MB in the end (delta: 81.8MB). Free memory was 108.3MB in the beginning and 101.3MB in the end (delta: 7.0MB). Peak memory consumption was 93.5MB. Max. memory is 16.1GB.
[2024-11-08 18:22:15,004 INFO  L158              Benchmark]: TraceAbstraction took 294858.07ms. Allocated memory was 239.1MB in the beginning and 3.3GB in the end (delta: 3.0GB). Free memory was 100.3MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 704.6MB. Max. memory is 16.1GB.
[2024-11-08 18:22:15,004 INFO  L158              Benchmark]: Witness Printer took 6.70ms. Allocated memory is still 3.3GB. Free memory is still 2.5GB. There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 18:22:15,005 INFO  L338   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.24ms. Allocated memory is still 121.6MB. Free memory is still 95.0MB. There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 786.74ms. Allocated memory is still 157.3MB. Free memory was 127.6MB in the beginning and 95.9MB in the end (delta: 31.7MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 215.32ms. Allocated memory is still 157.3MB. Free memory was 95.9MB in the beginning and 66.6MB in the end (delta: 29.4MB). Peak memory consumption was 27.3MB. Max. memory is 16.1GB.
 * Boogie Preprocessor took 313.76ms. Allocated memory is still 157.3MB. Free memory was 66.6MB in the beginning and 108.3MB in the end (delta: -41.8MB). Peak memory consumption was 46.8MB. Max. memory is 16.1GB.
 * RCFGBuilder took 2301.19ms. Allocated memory was 157.3MB in the beginning and 239.1MB in the end (delta: 81.8MB). Free memory was 108.3MB in the beginning and 101.3MB in the end (delta: 7.0MB). Peak memory consumption was 93.5MB. Max. memory is 16.1GB.
 * TraceAbstraction took 294858.07ms. Allocated memory was 239.1MB in the beginning and 3.3GB in the end (delta: 3.0GB). Free memory was 100.3MB in the beginning and 2.5GB in the end (delta: -2.4GB). Peak memory consumption was 704.6MB. Max. memory is 16.1GB.
 * Witness Printer took 6.70ms. Allocated memory is still 3.3GB. Free memory is still 2.5GB. There was no memory consumed. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - StatisticsResult: ErrorAutomatonStatistics
    NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0
  - UnprovableResult [Line: 22]: Unable to prove that a call to reach_error is unreachable
    Unable to prove that a call to reach_error is unreachable
 Reason: overapproximation of bitwiseOr at line 291, overapproximation of bitwiseAnd at line 300. 
Possible FailurePath: 
[L27]               const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1);
[L28]               const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1);
[L30]               const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 128);
[L31]               const SORT_3 msb_SORT_3 = (SORT_3)1 << (128 - 1);
[L33]               const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5);
[L34]               const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1);
[L36]               const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4);
[L37]               const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1);
[L39]               const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3);
[L40]               const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1);
[L42]               const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2);
[L43]               const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1);
[L45]               const SORT_13 var_15 = 8;
[L46]               const SORT_19 var_20 = 7;
[L47]               const SORT_19 var_25 = 6;
[L48]               const SORT_19 var_30 = 5;
[L49]               const SORT_19 var_35 = 4;
[L50]               const SORT_40 var_41 = 3;
[L51]               const SORT_40 var_46 = 2;
[L52]               const SORT_1 var_51 = 1;
[L53]               const SORT_13 var_64 = 9;
[L54]               const SORT_11 var_81 = 0;
[L55]               const SORT_1 var_111 = 0;
[L56]               const SORT_3 var_268 = 0;
[L58]               SORT_1 input_2;
[L59]               SORT_3 input_4;
[L60]               SORT_1 input_5;
[L61]               SORT_1 input_6;
[L62]               SORT_1 input_7;
[L63]               SORT_1 input_8;
[L64]               SORT_3 input_9;
[L65]               SORT_1 input_109;
[L67]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L67]               SORT_3 state_10 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L68]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L68]               SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L69]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L69]               SORT_3 state_18 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L70]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L70]               SORT_3 state_24 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L71]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L71]               SORT_3 state_29 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L72]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L72]               SORT_3 state_34 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L73]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L73]               SORT_3 state_39 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L74]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L74]               SORT_3 state_45 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L75]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L75]               SORT_3 state_50 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L76]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L76]               SORT_3 state_55 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L77]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L77]               SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L78]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_1
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L78]               SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L79]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_1
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L79]               SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L80]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L80]               SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L81]   EXPR        __VERIFIER_nondet_uint128() & mask_SORT_3
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L81]               SORT_3 state_87 = __VERIFIER_nondet_uint128() & mask_SORT_3;
[L82]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_1
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L82]               SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L83]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L83]               SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L85]               SORT_1 init_92_arg_1 = var_51;
[L86]               state_91 = init_92_arg_1
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L89]               input_2 = __VERIFIER_nondet_uchar()
[L90]               input_4 = __VERIFIER_nondet_uint128()
[L91]               input_5 = __VERIFIER_nondet_uchar()
[L92]               input_6 = __VERIFIER_nondet_uchar()
[L93]               input_7 = __VERIFIER_nondet_uchar()
[L94]   EXPR        input_7 & mask_SORT_1
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L94]               input_7 = input_7 & mask_SORT_1
[L95]               input_8 = __VERIFIER_nondet_uchar()
[L96]               input_9 = __VERIFIER_nondet_uint128()
[L97]               input_109 = __VERIFIER_nondet_uchar()
[L99]               SORT_1 var_93_arg_0 = input_7;
[L100]              SORT_1 var_93_arg_1 = state_91;
[L101]              SORT_1 var_93 = var_93_arg_0 == var_93_arg_1;
[L102]              SORT_1 var_94_arg_0 = var_51;
[L103]              SORT_1 var_94 = ~var_94_arg_0;
[L104]              SORT_1 var_95_arg_0 = var_93;
[L105]              SORT_1 var_95_arg_1 = var_94;
        VAL         [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2]
[L106]  EXPR        var_95_arg_0 | var_95_arg_1
        VAL         [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L106]              SORT_1 var_95 = var_95_arg_0 | var_95_arg_1;
[L107]  EXPR        var_95 & mask_SORT_1
        VAL         [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L107]              var_95 = var_95 & mask_SORT_1
[L108]              SORT_1 constr_96_arg_0 = var_95;
        VAL         [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L109]  CALL        assume_abort_if_not(constr_96_arg_0)
        VAL         [\old(cond)=1]
[L23]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L109]  RET         assume_abort_if_not(constr_96_arg_0)
        VAL         [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L110]              SORT_13 var_65_arg_0 = var_64;
        VAL         [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0]
[L111]  EXPR        var_65_arg_0 & mask_SORT_13
        VAL         [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L111]              var_65_arg_0 = var_65_arg_0 & mask_SORT_13
[L112]              SORT_11 var_65 = var_65_arg_0;
[L113]              SORT_11 var_66_arg_0 = state_60;
[L114]              SORT_11 var_66_arg_1 = var_65;
[L115]              SORT_1 var_66 = var_66_arg_0 == var_66_arg_1;
[L116]              SORT_1 var_97_arg_0 = var_66;
[L117]              SORT_1 var_97 = ~var_97_arg_0;
[L118]              SORT_1 var_98_arg_0 = input_6;
[L119]              SORT_1 var_98 = ~var_98_arg_0;
[L120]              SORT_1 var_99_arg_0 = var_97;
[L121]              SORT_1 var_99_arg_1 = var_98;
        VAL         [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1]
[L122]  EXPR        var_99_arg_0 | var_99_arg_1
        VAL         [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L122]              SORT_1 var_99 = var_99_arg_0 | var_99_arg_1;
[L123]              SORT_1 var_100_arg_0 = var_51;
[L124]              SORT_1 var_100 = ~var_100_arg_0;
[L125]              SORT_1 var_101_arg_0 = var_99;
[L126]              SORT_1 var_101_arg_1 = var_100;
        VAL         [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L127]  EXPR        var_101_arg_0 | var_101_arg_1
        VAL         [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L127]              SORT_1 var_101 = var_101_arg_0 | var_101_arg_1;
[L128]  EXPR        var_101 & mask_SORT_1
        VAL         [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L128]              var_101 = var_101 & mask_SORT_1
[L129]              SORT_1 constr_102_arg_0 = var_101;
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L130]  CALL        assume_abort_if_not(constr_102_arg_0)
        VAL         [\old(cond)=1]
[L23]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L130]  RET         assume_abort_if_not(constr_102_arg_0)
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L131]              SORT_11 var_61_arg_0 = state_60;
[L132]              SORT_1 var_61 = var_61_arg_0 != 0;
[L133]              SORT_1 var_62_arg_0 = var_61;
[L134]              SORT_1 var_62 = ~var_62_arg_0;
[L135]              SORT_1 var_103_arg_0 = var_62;
[L136]              SORT_1 var_103 = ~var_103_arg_0;
[L137]              SORT_1 var_104_arg_0 = input_5;
[L138]              SORT_1 var_104 = ~var_104_arg_0;
[L139]              SORT_1 var_105_arg_0 = var_103;
[L140]              SORT_1 var_105_arg_1 = var_104;
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L141]  EXPR        var_105_arg_0 | var_105_arg_1
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L141]              SORT_1 var_105 = var_105_arg_0 | var_105_arg_1;
[L142]              SORT_1 var_106_arg_0 = var_51;
[L143]              SORT_1 var_106 = ~var_106_arg_0;
[L144]              SORT_1 var_107_arg_0 = var_105;
[L145]              SORT_1 var_107_arg_1 = var_106;
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L146]  EXPR        var_107_arg_0 | var_107_arg_1
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L146]              SORT_1 var_107 = var_107_arg_0 | var_107_arg_1;
[L147]  EXPR        var_107 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L147]              var_107 = var_107 & mask_SORT_1
[L148]              SORT_1 constr_108_arg_0 = var_107;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L149]  CALL        assume_abort_if_not(constr_108_arg_0)
        VAL         [\old(cond)=1]
[L23]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L149]  RET         assume_abort_if_not(constr_108_arg_0)
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L151]              SORT_1 var_112_arg_0 = state_91;
[L152]              SORT_1 var_112_arg_1 = var_111;
[L153]              SORT_1 var_112_arg_2 = var_51;
[L154]              SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2;
[L155]              SORT_1 var_70_arg_0 = state_69;
[L156]              SORT_1 var_70 = ~var_70_arg_0;
[L157]              SORT_1 var_71_arg_0 = state_68;
[L158]              SORT_1 var_71_arg_1 = var_70;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0]
[L159]  EXPR        var_71_arg_0 & var_71_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L159]              SORT_1 var_71 = var_71_arg_0 & var_71_arg_1;
[L160]              SORT_11 var_73_arg_0 = state_72;
[L161]              SORT_1 var_73 = var_73_arg_0 != 0;
[L162]              SORT_1 var_74_arg_0 = var_71;
[L163]              SORT_1 var_74_arg_1 = var_73;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0]
[L164]  EXPR        var_74_arg_0 & var_74_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L164]              SORT_1 var_74 = var_74_arg_0 & var_74_arg_1;
[L165]              SORT_1 var_75_arg_0 = state_68;
[L166]              SORT_1 var_75 = ~var_75_arg_0;
[L167]              SORT_1 var_76_arg_0 = input_6;
[L168]              SORT_1 var_76_arg_1 = var_75;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0]
[L169]  EXPR        var_76_arg_0 & var_76_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L169]              SORT_1 var_76 = var_76_arg_0 & var_76_arg_1;
[L170]              SORT_1 var_77_arg_0 = var_76;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0]
[L171]  EXPR        var_77_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L171]              var_77_arg_0 = var_77_arg_0 & mask_SORT_1
[L172]              SORT_11 var_77 = var_77_arg_0;
[L173]              SORT_11 var_78_arg_0 = state_72;
[L174]              SORT_11 var_78_arg_1 = var_77;
[L175]              SORT_11 var_78 = var_78_arg_0 + var_78_arg_1;
[L176]              SORT_1 var_79_arg_0 = input_5;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0]
[L177]  EXPR        var_79_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0]
[L177]              var_79_arg_0 = var_79_arg_0 & mask_SORT_1
[L178]              SORT_11 var_79 = var_79_arg_0;
[L179]              SORT_11 var_80_arg_0 = var_78;
[L180]              SORT_11 var_80_arg_1 = var_79;
[L181]              SORT_11 var_80 = var_80_arg_0 - var_80_arg_1;
[L182]              SORT_1 var_82_arg_0 = input_7;
[L183]              SORT_11 var_82_arg_1 = var_81;
[L184]              SORT_11 var_82_arg_2 = var_80;
[L185]              SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0]
[L186]  EXPR        var_82 & mask_SORT_11
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L186]              var_82 = var_82 & mask_SORT_11
[L187]              SORT_11 var_83_arg_0 = var_82;
[L188]              SORT_1 var_83 = var_83_arg_0 != 0;
[L189]              SORT_1 var_84_arg_0 = var_83;
[L190]              SORT_1 var_84 = ~var_84_arg_0;
[L191]              SORT_1 var_85_arg_0 = var_74;
[L192]              SORT_1 var_85_arg_1 = var_84;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1]
[L193]  EXPR        var_85_arg_0 & var_85_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L193]              SORT_1 var_85 = var_85_arg_0 & var_85_arg_1;
[L194]              SORT_1 var_86_arg_0 = var_85;
[L195]              SORT_1 var_86 = ~var_86_arg_0;
[L196]              SORT_11 var_14_arg_0 = state_12;
[L197]              SORT_13 var_14 = var_14_arg_0 >> 0;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L198]  EXPR        var_14 & mask_SORT_13
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L198]              var_14 = var_14 & mask_SORT_13
[L199]              SORT_13 var_56_arg_0 = var_14;
[L200]              SORT_1 var_56 = var_56_arg_0 != 0;
[L201]              SORT_1 var_57_arg_0 = var_56;
[L202]              SORT_1 var_57 = ~var_57_arg_0;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L203]  EXPR        var_57 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L203]              var_57 = var_57 & mask_SORT_1
[L204]              SORT_1 var_52_arg_0 = var_51;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L205]  EXPR        var_52_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L205]              var_52_arg_0 = var_52_arg_0 & mask_SORT_1
[L206]              SORT_13 var_52 = var_52_arg_0;
[L207]              SORT_13 var_53_arg_0 = var_14;
[L208]              SORT_13 var_53_arg_1 = var_52;
[L209]              SORT_1 var_53 = var_53_arg_0 == var_53_arg_1;
[L210]              SORT_40 var_47_arg_0 = var_46;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L211]  EXPR        var_47_arg_0 & mask_SORT_40
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L211]              var_47_arg_0 = var_47_arg_0 & mask_SORT_40
[L212]              SORT_13 var_47 = var_47_arg_0;
[L213]              SORT_13 var_48_arg_0 = var_14;
[L214]              SORT_13 var_48_arg_1 = var_47;
[L215]              SORT_1 var_48 = var_48_arg_0 == var_48_arg_1;
[L216]              SORT_40 var_42_arg_0 = var_41;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L217]  EXPR        var_42_arg_0 & mask_SORT_40
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L217]              var_42_arg_0 = var_42_arg_0 & mask_SORT_40
[L218]              SORT_13 var_42 = var_42_arg_0;
[L219]              SORT_13 var_43_arg_0 = var_14;
[L220]              SORT_13 var_43_arg_1 = var_42;
[L221]              SORT_1 var_43 = var_43_arg_0 == var_43_arg_1;
[L222]              SORT_19 var_36_arg_0 = var_35;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L223]  EXPR        var_36_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L223]              var_36_arg_0 = var_36_arg_0 & mask_SORT_19
[L224]              SORT_13 var_36 = var_36_arg_0;
[L225]              SORT_13 var_37_arg_0 = var_14;
[L226]              SORT_13 var_37_arg_1 = var_36;
[L227]              SORT_1 var_37 = var_37_arg_0 == var_37_arg_1;
[L228]              SORT_19 var_31_arg_0 = var_30;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L229]  EXPR        var_31_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L229]              var_31_arg_0 = var_31_arg_0 & mask_SORT_19
[L230]              SORT_13 var_31 = var_31_arg_0;
[L231]              SORT_13 var_32_arg_0 = var_14;
[L232]              SORT_13 var_32_arg_1 = var_31;
[L233]              SORT_1 var_32 = var_32_arg_0 == var_32_arg_1;
[L234]              SORT_19 var_26_arg_0 = var_25;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L235]  EXPR        var_26_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L235]              var_26_arg_0 = var_26_arg_0 & mask_SORT_19
[L236]              SORT_13 var_26 = var_26_arg_0;
[L237]              SORT_13 var_27_arg_0 = var_14;
[L238]              SORT_13 var_27_arg_1 = var_26;
[L239]              SORT_1 var_27 = var_27_arg_0 == var_27_arg_1;
[L240]              SORT_19 var_21_arg_0 = var_20;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L241]  EXPR        var_21_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=1, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L241]              var_21_arg_0 = var_21_arg_0 & mask_SORT_19
[L242]              SORT_13 var_21 = var_21_arg_0;
[L243]              SORT_13 var_22_arg_0 = var_14;
[L244]              SORT_13 var_22_arg_1 = var_21;
[L245]              SORT_1 var_22 = var_22_arg_0 == var_22_arg_1;
[L246]              SORT_13 var_16_arg_0 = var_14;
[L247]              SORT_13 var_16_arg_1 = var_15;
[L248]              SORT_1 var_16 = var_16_arg_0 == var_16_arg_1;
[L249]              SORT_1 var_17_arg_0 = var_16;
[L250]              SORT_3 var_17_arg_1 = state_10;
[L251]              SORT_3 var_17_arg_2 = input_9;
[L252]              SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2;
[L253]              SORT_1 var_23_arg_0 = var_22;
[L254]              SORT_3 var_23_arg_1 = state_18;
[L255]              SORT_3 var_23_arg_2 = var_17;
[L256]              SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2;
[L257]              SORT_1 var_28_arg_0 = var_27;
[L258]              SORT_3 var_28_arg_1 = state_24;
[L259]              SORT_3 var_28_arg_2 = var_23;
[L260]              SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2;
[L261]              SORT_1 var_33_arg_0 = var_32;
[L262]              SORT_3 var_33_arg_1 = state_29;
[L263]              SORT_3 var_33_arg_2 = var_28;
[L264]              SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2;
[L265]              SORT_1 var_38_arg_0 = var_37;
[L266]              SORT_3 var_38_arg_1 = state_34;
[L267]              SORT_3 var_38_arg_2 = var_33;
[L268]              SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2;
[L269]              SORT_1 var_44_arg_0 = var_43;
[L270]              SORT_3 var_44_arg_1 = state_39;
[L271]              SORT_3 var_44_arg_2 = var_38;
[L272]              SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2;
[L273]              SORT_1 var_49_arg_0 = var_48;
[L274]              SORT_3 var_49_arg_1 = state_45;
[L275]              SORT_3 var_49_arg_2 = var_44;
[L276]              SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2;
[L277]              SORT_1 var_54_arg_0 = var_53;
[L278]              SORT_3 var_54_arg_1 = state_50;
[L279]              SORT_3 var_54_arg_2 = var_49;
[L280]              SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2;
[L281]              SORT_1 var_58_arg_0 = var_57;
[L282]              SORT_3 var_58_arg_1 = state_55;
[L283]              SORT_3 var_58_arg_2 = var_54;
[L284]              SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L285]  EXPR        var_58 & mask_SORT_3
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L285]              var_58 = var_58 & mask_SORT_3
[L286]              SORT_3 var_88_arg_0 = state_87;
[L287]              SORT_3 var_88_arg_1 = var_58;
[L288]              SORT_1 var_88 = var_88_arg_0 == var_88_arg_1;
[L289]              SORT_1 var_89_arg_0 = var_86;
[L290]              SORT_1 var_89_arg_1 = var_88;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1]
[L291]  EXPR        var_89_arg_0 | var_89_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L291]              SORT_1 var_89 = var_89_arg_0 | var_89_arg_1;
[L292]              SORT_1 var_110_arg_0 = state_91;
[L293]              SORT_1 var_110_arg_1 = input_109;
[L294]              SORT_1 var_110_arg_2 = var_89;
[L295]              SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2;
[L296]              SORT_1 var_113_arg_0 = var_110;
[L297]              SORT_1 var_113 = ~var_113_arg_0;
[L298]              SORT_1 var_114_arg_0 = var_112;
[L299]              SORT_1 var_114_arg_1 = var_113;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L300]  EXPR        var_114_arg_0 & var_114_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L300]              SORT_1 var_114 = var_114_arg_0 & var_114_arg_1;
[L301]  EXPR        var_114 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L301]              var_114 = var_114 & mask_SORT_1
[L302]              SORT_1 bad_115_arg_0 = var_114;
[L303]  CALL        __VERIFIER_assert(!(bad_115_arg_0))
[L22]   COND FALSE  !(!(cond))
[L303]  RET         __VERIFIER_assert(!(bad_115_arg_0))
[L305]              SORT_11 var_137_arg_0 = state_136;
[L306]              SORT_13 var_137 = var_137_arg_0 >> 0;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L307]  EXPR        var_137 & mask_SORT_13
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L307]              var_137 = var_137 & mask_SORT_13
[L308]              SORT_13 var_194_arg_0 = var_137;
[L309]              SORT_13 var_194_arg_1 = var_15;
[L310]              SORT_1 var_194 = var_194_arg_0 == var_194_arg_1;
[L311]              SORT_1 var_195_arg_0 = input_6;
[L312]              SORT_1 var_195_arg_1 = var_194;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L313]  EXPR        var_195_arg_0 & var_195_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L313]              SORT_1 var_195 = var_195_arg_0 & var_195_arg_1;
[L314]  EXPR        var_195 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L314]              var_195 = var_195 & mask_SORT_1
[L315]              SORT_1 var_267_arg_0 = var_195;
[L316]              SORT_3 var_267_arg_1 = input_4;
[L317]              SORT_3 var_267_arg_2 = state_10;
[L318]              SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2;
[L319]              SORT_1 var_269_arg_0 = input_7;
[L320]              SORT_3 var_269_arg_1 = var_268;
[L321]              SORT_3 var_269_arg_2 = var_267;
[L322]              SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2;
[L323]              SORT_3 next_270_arg_1 = var_269;
[L324]              SORT_1 var_119_arg_0 = input_6;
[L325]              SORT_1 var_119_arg_1 = input_5;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L326]  EXPR        var_119_arg_0 | var_119_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L326]              SORT_1 var_119 = var_119_arg_0 | var_119_arg_1;
[L327]              SORT_1 var_120_arg_0 = var_119;
[L328]              SORT_1 var_120_arg_1 = input_7;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L329]  EXPR        var_120_arg_0 | var_120_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L329]              SORT_1 var_120 = var_120_arg_0 | var_120_arg_1;
[L330]  EXPR        var_120 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L330]              var_120 = var_120 & mask_SORT_1
[L331]              SORT_1 var_198_arg_0 = input_5;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L332]  EXPR        var_198_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L332]              var_198_arg_0 = var_198_arg_0 & mask_SORT_1
[L333]              SORT_11 var_198 = var_198_arg_0;
[L334]              SORT_11 var_199_arg_0 = state_12;
[L335]              SORT_11 var_199_arg_1 = var_198;
[L336]              SORT_11 var_199 = var_199_arg_0 + var_199_arg_1;
[L337]              SORT_1 var_271_arg_0 = var_120;
[L338]              SORT_11 var_271_arg_1 = var_199;
[L339]              SORT_11 var_271_arg_2 = state_12;
[L340]              SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2;
[L341]              SORT_1 var_272_arg_0 = input_7;
[L342]              SORT_11 var_272_arg_1 = var_81;
[L343]              SORT_11 var_272_arg_2 = var_271;
[L344]              SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2;
[L345]              SORT_11 next_273_arg_1 = var_272;
[L346]              SORT_19 var_187_arg_0 = var_20;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L347]  EXPR        var_187_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L347]              var_187_arg_0 = var_187_arg_0 & mask_SORT_19
[L348]              SORT_13 var_187 = var_187_arg_0;
[L349]              SORT_13 var_188_arg_0 = var_137;
[L350]              SORT_13 var_188_arg_1 = var_187;
[L351]              SORT_1 var_188 = var_188_arg_0 == var_188_arg_1;
[L352]              SORT_1 var_189_arg_0 = input_6;
[L353]              SORT_1 var_189_arg_1 = var_188;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L354]  EXPR        var_189_arg_0 & var_189_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L354]              SORT_1 var_189 = var_189_arg_0 & var_189_arg_1;
[L355]  EXPR        var_189 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L355]              var_189 = var_189 & mask_SORT_1
[L356]              SORT_1 var_274_arg_0 = var_189;
[L357]              SORT_3 var_274_arg_1 = input_4;
[L358]              SORT_3 var_274_arg_2 = state_18;
[L359]              SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2;
[L360]              SORT_1 var_275_arg_0 = input_7;
[L361]              SORT_3 var_275_arg_1 = var_268;
[L362]              SORT_3 var_275_arg_2 = var_274;
[L363]              SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2;
[L364]              SORT_3 next_276_arg_1 = var_275;
[L365]              SORT_19 var_180_arg_0 = var_25;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L366]  EXPR        var_180_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L366]              var_180_arg_0 = var_180_arg_0 & mask_SORT_19
[L367]              SORT_13 var_180 = var_180_arg_0;
[L368]              SORT_13 var_181_arg_0 = var_137;
[L369]              SORT_13 var_181_arg_1 = var_180;
[L370]              SORT_1 var_181 = var_181_arg_0 == var_181_arg_1;
[L371]              SORT_1 var_182_arg_0 = input_6;
[L372]              SORT_1 var_182_arg_1 = var_181;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L373]  EXPR        var_182_arg_0 & var_182_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L373]              SORT_1 var_182 = var_182_arg_0 & var_182_arg_1;
[L374]  EXPR        var_182 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L374]              var_182 = var_182 & mask_SORT_1
[L375]              SORT_1 var_277_arg_0 = var_182;
[L376]              SORT_3 var_277_arg_1 = input_4;
[L377]              SORT_3 var_277_arg_2 = state_24;
[L378]              SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2;
[L379]              SORT_1 var_278_arg_0 = input_7;
[L380]              SORT_3 var_278_arg_1 = var_268;
[L381]              SORT_3 var_278_arg_2 = var_277;
[L382]              SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2;
[L383]              SORT_3 next_279_arg_1 = var_278;
[L384]              SORT_19 var_173_arg_0 = var_30;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L385]  EXPR        var_173_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L385]              var_173_arg_0 = var_173_arg_0 & mask_SORT_19
[L386]              SORT_13 var_173 = var_173_arg_0;
[L387]              SORT_13 var_174_arg_0 = var_137;
[L388]              SORT_13 var_174_arg_1 = var_173;
[L389]              SORT_1 var_174 = var_174_arg_0 == var_174_arg_1;
[L390]              SORT_1 var_175_arg_0 = input_6;
[L391]              SORT_1 var_175_arg_1 = var_174;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L392]  EXPR        var_175_arg_0 & var_175_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L392]              SORT_1 var_175 = var_175_arg_0 & var_175_arg_1;
[L393]  EXPR        var_175 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L393]              var_175 = var_175 & mask_SORT_1
[L394]              SORT_1 var_280_arg_0 = var_175;
[L395]              SORT_3 var_280_arg_1 = input_4;
[L396]              SORT_3 var_280_arg_2 = state_29;
[L397]              SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2;
[L398]              SORT_1 var_281_arg_0 = input_7;
[L399]              SORT_3 var_281_arg_1 = var_268;
[L400]              SORT_3 var_281_arg_2 = var_280;
[L401]              SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2;
[L402]              SORT_3 next_282_arg_1 = var_281;
[L403]              SORT_19 var_166_arg_0 = var_35;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L404]  EXPR        var_166_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L404]              var_166_arg_0 = var_166_arg_0 & mask_SORT_19
[L405]              SORT_13 var_166 = var_166_arg_0;
[L406]              SORT_13 var_167_arg_0 = var_137;
[L407]              SORT_13 var_167_arg_1 = var_166;
[L408]              SORT_1 var_167 = var_167_arg_0 == var_167_arg_1;
[L409]              SORT_1 var_168_arg_0 = input_6;
[L410]              SORT_1 var_168_arg_1 = var_167;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L411]  EXPR        var_168_arg_0 & var_168_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L411]              SORT_1 var_168 = var_168_arg_0 & var_168_arg_1;
[L412]  EXPR        var_168 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L412]              var_168 = var_168 & mask_SORT_1
[L413]              SORT_1 var_283_arg_0 = var_168;
[L414]              SORT_3 var_283_arg_1 = input_4;
[L415]              SORT_3 var_283_arg_2 = state_34;
[L416]              SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2;
[L417]              SORT_1 var_284_arg_0 = input_7;
[L418]              SORT_3 var_284_arg_1 = var_268;
[L419]              SORT_3 var_284_arg_2 = var_283;
[L420]              SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2;
[L421]              SORT_3 next_285_arg_1 = var_284;
[L422]              SORT_40 var_159_arg_0 = var_41;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L423]  EXPR        var_159_arg_0 & mask_SORT_40
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L423]              var_159_arg_0 = var_159_arg_0 & mask_SORT_40
[L424]              SORT_13 var_159 = var_159_arg_0;
[L425]              SORT_13 var_160_arg_0 = var_137;
[L426]              SORT_13 var_160_arg_1 = var_159;
[L427]              SORT_1 var_160 = var_160_arg_0 == var_160_arg_1;
[L428]              SORT_1 var_161_arg_0 = input_6;
[L429]              SORT_1 var_161_arg_1 = var_160;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L430]  EXPR        var_161_arg_0 & var_161_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L430]              SORT_1 var_161 = var_161_arg_0 & var_161_arg_1;
[L431]  EXPR        var_161 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L431]              var_161 = var_161 & mask_SORT_1
[L432]              SORT_1 var_286_arg_0 = var_161;
[L433]              SORT_3 var_286_arg_1 = input_4;
[L434]              SORT_3 var_286_arg_2 = state_39;
[L435]              SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2;
[L436]              SORT_1 var_287_arg_0 = input_7;
[L437]              SORT_3 var_287_arg_1 = var_268;
[L438]              SORT_3 var_287_arg_2 = var_286;
[L439]              SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2;
[L440]              SORT_3 next_288_arg_1 = var_287;
[L441]              SORT_40 var_152_arg_0 = var_46;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L442]  EXPR        var_152_arg_0 & mask_SORT_40
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L442]              var_152_arg_0 = var_152_arg_0 & mask_SORT_40
[L443]              SORT_13 var_152 = var_152_arg_0;
[L444]              SORT_13 var_153_arg_0 = var_137;
[L445]              SORT_13 var_153_arg_1 = var_152;
[L446]              SORT_1 var_153 = var_153_arg_0 == var_153_arg_1;
[L447]              SORT_1 var_154_arg_0 = input_6;
[L448]              SORT_1 var_154_arg_1 = var_153;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L449]  EXPR        var_154_arg_0 & var_154_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L449]              SORT_1 var_154 = var_154_arg_0 & var_154_arg_1;
[L450]  EXPR        var_154 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L450]              var_154 = var_154 & mask_SORT_1
[L451]              SORT_1 var_289_arg_0 = var_154;
[L452]              SORT_3 var_289_arg_1 = input_4;
[L453]              SORT_3 var_289_arg_2 = state_45;
[L454]              SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2;
[L455]              SORT_1 var_290_arg_0 = input_7;
[L456]              SORT_3 var_290_arg_1 = var_268;
[L457]              SORT_3 var_290_arg_2 = var_289;
[L458]              SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2;
[L459]              SORT_3 next_291_arg_1 = var_290;
[L460]              SORT_1 var_145_arg_0 = var_51;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L461]  EXPR        var_145_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L461]              var_145_arg_0 = var_145_arg_0 & mask_SORT_1
[L462]              SORT_13 var_145 = var_145_arg_0;
[L463]              SORT_13 var_146_arg_0 = var_137;
[L464]              SORT_13 var_146_arg_1 = var_145;
[L465]              SORT_1 var_146 = var_146_arg_0 == var_146_arg_1;
[L466]              SORT_1 var_147_arg_0 = input_6;
[L467]              SORT_1 var_147_arg_1 = var_146;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L468]  EXPR        var_147_arg_0 & var_147_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L468]              SORT_1 var_147 = var_147_arg_0 & var_147_arg_1;
[L469]  EXPR        var_147 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L469]              var_147 = var_147 & mask_SORT_1
[L470]              SORT_1 var_292_arg_0 = var_147;
[L471]              SORT_3 var_292_arg_1 = input_4;
[L472]              SORT_3 var_292_arg_2 = state_50;
[L473]              SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2;
[L474]              SORT_1 var_293_arg_0 = input_7;
[L475]              SORT_3 var_293_arg_1 = var_268;
[L476]              SORT_3 var_293_arg_2 = var_292;
[L477]              SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2;
[L478]              SORT_3 next_294_arg_1 = var_293;
[L479]              SORT_13 var_138_arg_0 = var_137;
[L480]              SORT_1 var_138 = var_138_arg_0 != 0;
[L481]              SORT_1 var_139_arg_0 = var_138;
[L482]              SORT_1 var_139 = ~var_139_arg_0;
[L483]              SORT_1 var_140_arg_0 = input_6;
[L484]              SORT_1 var_140_arg_1 = var_139;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L485]  EXPR        var_140_arg_0 & var_140_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L485]              SORT_1 var_140 = var_140_arg_0 & var_140_arg_1;
[L486]  EXPR        var_140 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L486]              var_140 = var_140 & mask_SORT_1
[L487]              SORT_1 var_295_arg_0 = var_140;
[L488]              SORT_3 var_295_arg_1 = input_4;
[L489]              SORT_3 var_295_arg_2 = state_55;
[L490]              SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2;
[L491]              SORT_1 var_296_arg_0 = input_7;
[L492]              SORT_3 var_296_arg_1 = var_268;
[L493]              SORT_3 var_296_arg_2 = var_295;
[L494]              SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2;
[L495]              SORT_3 next_297_arg_1 = var_296;
[L496]              SORT_1 var_298_arg_0 = input_6;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L497]  EXPR        var_298_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L497]              var_298_arg_0 = var_298_arg_0 & mask_SORT_1
[L498]              SORT_11 var_298 = var_298_arg_0;
[L499]              SORT_11 var_299_arg_0 = state_60;
[L500]              SORT_11 var_299_arg_1 = var_298;
[L501]              SORT_11 var_299 = var_299_arg_0 + var_299_arg_1;
[L502]              SORT_1 var_300_arg_0 = input_5;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L503]  EXPR        var_300_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L503]              var_300_arg_0 = var_300_arg_0 & mask_SORT_1
[L504]              SORT_11 var_300 = var_300_arg_0;
[L505]              SORT_11 var_301_arg_0 = var_299;
[L506]              SORT_11 var_301_arg_1 = var_300;
[L507]              SORT_11 var_301 = var_301_arg_0 - var_301_arg_1;
[L508]              SORT_1 var_302_arg_0 = input_7;
[L509]              SORT_11 var_302_arg_1 = var_81;
[L510]              SORT_11 var_302_arg_2 = var_301;
[L511]              SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L512]  EXPR        var_302 & mask_SORT_11
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L512]              var_302 = var_302 & mask_SORT_11
[L513]              SORT_11 next_303_arg_1 = var_302;
[L514]              SORT_1 var_228_arg_0 = state_68;
[L515]              SORT_1 var_228 = ~var_228_arg_0;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L516]  EXPR        var_228 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L516]              var_228 = var_228 & mask_SORT_1
[L517]              SORT_1 var_224_arg_0 = input_8;
[L518]              SORT_1 var_224_arg_1 = input_6;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L519]  EXPR        var_224_arg_0 & var_224_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L519]              SORT_1 var_224 = var_224_arg_0 & var_224_arg_1;
[L520]              SORT_1 var_225_arg_0 = state_68;
[L521]              SORT_1 var_225_arg_1 = var_224;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L522]  EXPR        var_225_arg_0 | var_225_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L522]              SORT_1 var_225 = var_225_arg_0 | var_225_arg_1;
[L523]              SORT_1 var_304_arg_0 = var_228;
[L524]              SORT_1 var_304_arg_1 = var_225;
[L525]              SORT_1 var_304_arg_2 = state_68;
[L526]              SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2;
[L527]              SORT_1 var_305_arg_0 = input_7;
[L528]              SORT_1 var_305_arg_1 = var_111;
[L529]              SORT_1 var_305_arg_2 = var_304;
[L530]              SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2;
[L531]              SORT_1 next_306_arg_1 = var_305;
[L532]              SORT_1 var_236_arg_0 = var_85;
[L533]              SORT_1 var_236_arg_1 = state_69;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L534]  EXPR        var_236_arg_0 | var_236_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L534]              SORT_1 var_236 = var_236_arg_0 | var_236_arg_1;
[L535]              SORT_1 var_307_arg_0 = var_51;
[L536]              SORT_1 var_307_arg_1 = var_236;
[L537]              SORT_1 var_307_arg_2 = state_69;
[L538]              SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2;
[L539]              SORT_1 var_308_arg_0 = input_7;
[L540]              SORT_1 var_308_arg_1 = var_111;
[L541]              SORT_1 var_308_arg_2 = var_307;
[L542]              SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2;
[L543]              SORT_1 next_309_arg_1 = var_308;
[L544]              SORT_1 var_248_arg_0 = input_6;
[L545]              SORT_1 var_248_arg_1 = input_5;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L546]  EXPR        var_248_arg_0 | var_248_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L546]              SORT_1 var_248 = var_248_arg_0 | var_248_arg_1;
[L547]              SORT_1 var_249_arg_0 = var_248;
[L548]              SORT_1 var_249_arg_1 = input_7;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L549]  EXPR        var_249_arg_0 | var_249_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L549]              SORT_1 var_249 = var_249_arg_0 | var_249_arg_1;
[L550]              SORT_1 var_250_arg_0 = var_249;
[L551]              SORT_1 var_250_arg_1 = state_68;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L552]  EXPR        var_250_arg_0 | var_250_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L552]              SORT_1 var_250 = var_250_arg_0 | var_250_arg_1;
[L553]  EXPR        var_250 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L553]              var_250 = var_250 & mask_SORT_1
[L554]              SORT_1 var_310_arg_0 = var_250;
[L555]              SORT_11 var_310_arg_1 = var_82;
[L556]              SORT_11 var_310_arg_2 = state_72;
[L557]              SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2;
[L558]              SORT_1 var_311_arg_0 = input_7;
[L559]              SORT_11 var_311_arg_1 = var_81;
[L560]              SORT_11 var_311_arg_2 = var_310;
[L561]              SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L562]  EXPR        var_311 & mask_SORT_11
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L562]              var_311 = var_311 & mask_SORT_11
[L563]              SORT_11 next_312_arg_1 = var_311;
[L564]              SORT_1 var_233_arg_0 = var_224;
[L565]              SORT_1 var_233_arg_1 = var_228;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L566]  EXPR        var_233_arg_0 & var_233_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L566]              SORT_1 var_233 = var_233_arg_0 & var_233_arg_1;
[L567]  EXPR        var_233 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L567]              var_233 = var_233 & mask_SORT_1
[L568]              SORT_1 var_313_arg_0 = var_233;
[L569]              SORT_3 var_313_arg_1 = input_4;
[L570]              SORT_3 var_313_arg_2 = state_87;
[L571]              SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2;
[L572]              SORT_1 var_314_arg_0 = input_7;
[L573]              SORT_3 var_314_arg_1 = var_268;
[L574]              SORT_3 var_314_arg_2 = var_313;
[L575]              SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L576]  EXPR        var_314 & mask_SORT_3
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L576]              var_314 = var_314 & mask_SORT_3
[L577]              SORT_3 next_315_arg_1 = var_314;
[L578]              SORT_1 next_316_arg_1 = var_111;
[L579]              SORT_1 var_204_arg_0 = input_6;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L580]  EXPR        var_204_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L580]              var_204_arg_0 = var_204_arg_0 & mask_SORT_1
[L581]              SORT_11 var_204 = var_204_arg_0;
[L582]              SORT_11 var_205_arg_0 = state_136;
[L583]              SORT_11 var_205_arg_1 = var_204;
[L584]              SORT_11 var_205 = var_205_arg_0 + var_205_arg_1;
[L585]              SORT_1 var_317_arg_0 = var_120;
[L586]              SORT_11 var_317_arg_1 = var_205;
[L587]              SORT_11 var_317_arg_2 = state_136;
[L588]              SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2;
[L589]              SORT_1 var_318_arg_0 = input_7;
[L590]              SORT_11 var_318_arg_1 = var_81;
[L591]              SORT_11 var_318_arg_2 = var_317;
[L592]              SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2;
[L593]              SORT_11 next_319_arg_1 = var_318;
[L595]              state_10 = next_270_arg_1
[L596]              state_12 = next_273_arg_1
[L597]              state_18 = next_276_arg_1
[L598]              state_24 = next_279_arg_1
[L599]              state_29 = next_282_arg_1
[L600]              state_34 = next_285_arg_1
[L601]              state_39 = next_288_arg_1
[L602]              state_45 = next_291_arg_1
[L603]              state_50 = next_294_arg_1
[L604]              state_55 = next_297_arg_1
[L605]              state_60 = next_303_arg_1
[L606]              state_68 = next_306_arg_1
[L607]              state_69 = next_309_arg_1
[L608]              state_72 = next_312_arg_1
[L609]              state_87 = next_315_arg_1
[L610]              state_91 = next_316_arg_1
[L611]              state_136 = next_319_arg_1
[L89]               input_2 = __VERIFIER_nondet_uchar()
[L90]               input_4 = __VERIFIER_nondet_uint128()
[L91]               input_5 = __VERIFIER_nondet_uchar()
[L92]               input_6 = __VERIFIER_nondet_uchar()
[L93]               input_7 = __VERIFIER_nondet_uchar()
[L94]   EXPR        input_7 & mask_SORT_1
        VAL         [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L94]               input_7 = input_7 & mask_SORT_1
[L95]               input_8 = __VERIFIER_nondet_uchar()
[L96]               input_9 = __VERIFIER_nondet_uint128()
[L97]               input_109 = __VERIFIER_nondet_uchar()
[L99]               SORT_1 var_93_arg_0 = input_7;
[L100]              SORT_1 var_93_arg_1 = state_91;
[L101]              SORT_1 var_93 = var_93_arg_0 == var_93_arg_1;
[L102]              SORT_1 var_94_arg_0 = var_51;
[L103]              SORT_1 var_94 = ~var_94_arg_0;
[L104]              SORT_1 var_95_arg_0 = var_93;
[L105]              SORT_1 var_95_arg_1 = var_94;
        VAL         [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2]
[L106]  EXPR        var_95_arg_0 | var_95_arg_1
        VAL         [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L106]              SORT_1 var_95 = var_95_arg_0 | var_95_arg_1;
[L107]  EXPR        var_95 & mask_SORT_1
        VAL         [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L107]              var_95 = var_95 & mask_SORT_1
[L108]              SORT_1 constr_96_arg_0 = var_95;
        VAL         [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L109]  CALL        assume_abort_if_not(constr_96_arg_0)
        VAL         [\old(cond)=1]
[L23]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L109]  RET         assume_abort_if_not(constr_96_arg_0)
        VAL         [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L110]              SORT_13 var_65_arg_0 = var_64;
        VAL         [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0]
[L111]  EXPR        var_65_arg_0 & mask_SORT_13
        VAL         [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L111]              var_65_arg_0 = var_65_arg_0 & mask_SORT_13
[L112]              SORT_11 var_65 = var_65_arg_0;
[L113]              SORT_11 var_66_arg_0 = state_60;
[L114]              SORT_11 var_66_arg_1 = var_65;
[L115]              SORT_1 var_66 = var_66_arg_0 == var_66_arg_1;
[L116]              SORT_1 var_97_arg_0 = var_66;
[L117]              SORT_1 var_97 = ~var_97_arg_0;
[L118]              SORT_1 var_98_arg_0 = input_6;
[L119]              SORT_1 var_98 = ~var_98_arg_0;
[L120]              SORT_1 var_99_arg_0 = var_97;
[L121]              SORT_1 var_99_arg_1 = var_98;
        VAL         [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1]
[L122]  EXPR        var_99_arg_0 | var_99_arg_1
        VAL         [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L122]              SORT_1 var_99 = var_99_arg_0 | var_99_arg_1;
[L123]              SORT_1 var_100_arg_0 = var_51;
[L124]              SORT_1 var_100 = ~var_100_arg_0;
[L125]              SORT_1 var_101_arg_0 = var_99;
[L126]              SORT_1 var_101_arg_1 = var_100;
        VAL         [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L127]  EXPR        var_101_arg_0 | var_101_arg_1
        VAL         [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L127]              SORT_1 var_101 = var_101_arg_0 | var_101_arg_1;
[L128]  EXPR        var_101 & mask_SORT_1
        VAL         [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L128]              var_101 = var_101 & mask_SORT_1
[L129]              SORT_1 constr_102_arg_0 = var_101;
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L130]  CALL        assume_abort_if_not(constr_102_arg_0)
        VAL         [\old(cond)=1]
[L23]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L130]  RET         assume_abort_if_not(constr_102_arg_0)
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L131]              SORT_11 var_61_arg_0 = state_60;
[L132]              SORT_1 var_61 = var_61_arg_0 != 0;
[L133]              SORT_1 var_62_arg_0 = var_61;
[L134]              SORT_1 var_62 = ~var_62_arg_0;
[L135]              SORT_1 var_103_arg_0 = var_62;
[L136]              SORT_1 var_103 = ~var_103_arg_0;
[L137]              SORT_1 var_104_arg_0 = input_5;
[L138]              SORT_1 var_104 = ~var_104_arg_0;
[L139]              SORT_1 var_105_arg_0 = var_103;
[L140]              SORT_1 var_105_arg_1 = var_104;
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L141]  EXPR        var_105_arg_0 | var_105_arg_1
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L141]              SORT_1 var_105 = var_105_arg_0 | var_105_arg_1;
[L142]              SORT_1 var_106_arg_0 = var_51;
[L143]              SORT_1 var_106 = ~var_106_arg_0;
[L144]              SORT_1 var_107_arg_0 = var_105;
[L145]              SORT_1 var_107_arg_1 = var_106;
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L146]  EXPR        var_107_arg_0 | var_107_arg_1
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L146]              SORT_1 var_107 = var_107_arg_0 | var_107_arg_1;
[L147]  EXPR        var_107 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L147]              var_107 = var_107 & mask_SORT_1
[L148]              SORT_1 constr_108_arg_0 = var_107;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L149]  CALL        assume_abort_if_not(constr_108_arg_0)
        VAL         [\old(cond)=1]
[L23]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L149]  RET         assume_abort_if_not(constr_108_arg_0)
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L151]              SORT_1 var_112_arg_0 = state_91;
[L152]              SORT_1 var_112_arg_1 = var_111;
[L153]              SORT_1 var_112_arg_2 = var_51;
[L154]              SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2;
[L155]              SORT_1 var_70_arg_0 = state_69;
[L156]              SORT_1 var_70 = ~var_70_arg_0;
[L157]              SORT_1 var_71_arg_0 = state_68;
[L158]              SORT_1 var_71_arg_1 = var_70;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0]
[L159]  EXPR        var_71_arg_0 & var_71_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L159]              SORT_1 var_71 = var_71_arg_0 & var_71_arg_1;
[L160]              SORT_11 var_73_arg_0 = state_72;
[L161]              SORT_1 var_73 = var_73_arg_0 != 0;
[L162]              SORT_1 var_74_arg_0 = var_71;
[L163]              SORT_1 var_74_arg_1 = var_73;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0]
[L164]  EXPR        var_74_arg_0 & var_74_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L164]              SORT_1 var_74 = var_74_arg_0 & var_74_arg_1;
[L165]              SORT_1 var_75_arg_0 = state_68;
[L166]              SORT_1 var_75 = ~var_75_arg_0;
[L167]              SORT_1 var_76_arg_0 = input_6;
[L168]              SORT_1 var_76_arg_1 = var_75;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0]
[L169]  EXPR        var_76_arg_0 & var_76_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L169]              SORT_1 var_76 = var_76_arg_0 & var_76_arg_1;
[L170]              SORT_1 var_77_arg_0 = var_76;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0]
[L171]  EXPR        var_77_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L171]              var_77_arg_0 = var_77_arg_0 & mask_SORT_1
[L172]              SORT_11 var_77 = var_77_arg_0;
[L173]              SORT_11 var_78_arg_0 = state_72;
[L174]              SORT_11 var_78_arg_1 = var_77;
[L175]              SORT_11 var_78 = var_78_arg_0 + var_78_arg_1;
[L176]              SORT_1 var_79_arg_0 = input_5;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0]
[L177]  EXPR        var_79_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0]
[L177]              var_79_arg_0 = var_79_arg_0 & mask_SORT_1
[L178]              SORT_11 var_79 = var_79_arg_0;
[L179]              SORT_11 var_80_arg_0 = var_78;
[L180]              SORT_11 var_80_arg_1 = var_79;
[L181]              SORT_11 var_80 = var_80_arg_0 - var_80_arg_1;
[L182]              SORT_1 var_82_arg_0 = input_7;
[L183]              SORT_11 var_82_arg_1 = var_81;
[L184]              SORT_11 var_82_arg_2 = var_80;
[L185]              SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0]
[L186]  EXPR        var_82 & mask_SORT_11
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L186]              var_82 = var_82 & mask_SORT_11
[L187]              SORT_11 var_83_arg_0 = var_82;
[L188]              SORT_1 var_83 = var_83_arg_0 != 0;
[L189]              SORT_1 var_84_arg_0 = var_83;
[L190]              SORT_1 var_84 = ~var_84_arg_0;
[L191]              SORT_1 var_85_arg_0 = var_74;
[L192]              SORT_1 var_85_arg_1 = var_84;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1]
[L193]  EXPR        var_85_arg_0 & var_85_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L193]              SORT_1 var_85 = var_85_arg_0 & var_85_arg_1;
[L194]              SORT_1 var_86_arg_0 = var_85;
[L195]              SORT_1 var_86 = ~var_86_arg_0;
[L196]              SORT_11 var_14_arg_0 = state_12;
[L197]              SORT_13 var_14 = var_14_arg_0 >> 0;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L198]  EXPR        var_14 & mask_SORT_13
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L198]              var_14 = var_14 & mask_SORT_13
[L199]              SORT_13 var_56_arg_0 = var_14;
[L200]              SORT_1 var_56 = var_56_arg_0 != 0;
[L201]              SORT_1 var_57_arg_0 = var_56;
[L202]              SORT_1 var_57 = ~var_57_arg_0;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L203]  EXPR        var_57 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L203]              var_57 = var_57 & mask_SORT_1
[L204]              SORT_1 var_52_arg_0 = var_51;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L205]  EXPR        var_52_arg_0 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L205]              var_52_arg_0 = var_52_arg_0 & mask_SORT_1
[L206]              SORT_13 var_52 = var_52_arg_0;
[L207]              SORT_13 var_53_arg_0 = var_14;
[L208]              SORT_13 var_53_arg_1 = var_52;
[L209]              SORT_1 var_53 = var_53_arg_0 == var_53_arg_1;
[L210]              SORT_40 var_47_arg_0 = var_46;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L211]  EXPR        var_47_arg_0 & mask_SORT_40
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L211]              var_47_arg_0 = var_47_arg_0 & mask_SORT_40
[L212]              SORT_13 var_47 = var_47_arg_0;
[L213]              SORT_13 var_48_arg_0 = var_14;
[L214]              SORT_13 var_48_arg_1 = var_47;
[L215]              SORT_1 var_48 = var_48_arg_0 == var_48_arg_1;
[L216]              SORT_40 var_42_arg_0 = var_41;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L217]  EXPR        var_42_arg_0 & mask_SORT_40
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L217]              var_42_arg_0 = var_42_arg_0 & mask_SORT_40
[L218]              SORT_13 var_42 = var_42_arg_0;
[L219]              SORT_13 var_43_arg_0 = var_14;
[L220]              SORT_13 var_43_arg_1 = var_42;
[L221]              SORT_1 var_43 = var_43_arg_0 == var_43_arg_1;
[L222]              SORT_19 var_36_arg_0 = var_35;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L223]  EXPR        var_36_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L223]              var_36_arg_0 = var_36_arg_0 & mask_SORT_19
[L224]              SORT_13 var_36 = var_36_arg_0;
[L225]              SORT_13 var_37_arg_0 = var_14;
[L226]              SORT_13 var_37_arg_1 = var_36;
[L227]              SORT_1 var_37 = var_37_arg_0 == var_37_arg_1;
[L228]              SORT_19 var_31_arg_0 = var_30;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L229]  EXPR        var_31_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L229]              var_31_arg_0 = var_31_arg_0 & mask_SORT_19
[L230]              SORT_13 var_31 = var_31_arg_0;
[L231]              SORT_13 var_32_arg_0 = var_14;
[L232]              SORT_13 var_32_arg_1 = var_31;
[L233]              SORT_1 var_32 = var_32_arg_0 == var_32_arg_1;
[L234]              SORT_19 var_26_arg_0 = var_25;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L235]  EXPR        var_26_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L235]              var_26_arg_0 = var_26_arg_0 & mask_SORT_19
[L236]              SORT_13 var_26 = var_26_arg_0;
[L237]              SORT_13 var_27_arg_0 = var_14;
[L238]              SORT_13 var_27_arg_1 = var_26;
[L239]              SORT_1 var_27 = var_27_arg_0 == var_27_arg_1;
[L240]              SORT_19 var_21_arg_0 = var_20;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L241]  EXPR        var_21_arg_0 & mask_SORT_19
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L241]              var_21_arg_0 = var_21_arg_0 & mask_SORT_19
[L242]              SORT_13 var_21 = var_21_arg_0;
[L243]              SORT_13 var_22_arg_0 = var_14;
[L244]              SORT_13 var_22_arg_1 = var_21;
[L245]              SORT_1 var_22 = var_22_arg_0 == var_22_arg_1;
[L246]              SORT_13 var_16_arg_0 = var_14;
[L247]              SORT_13 var_16_arg_1 = var_15;
[L248]              SORT_1 var_16 = var_16_arg_0 == var_16_arg_1;
[L249]              SORT_1 var_17_arg_0 = var_16;
[L250]              SORT_3 var_17_arg_1 = state_10;
[L251]              SORT_3 var_17_arg_2 = input_9;
[L252]              SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2;
[L253]              SORT_1 var_23_arg_0 = var_22;
[L254]              SORT_3 var_23_arg_1 = state_18;
[L255]              SORT_3 var_23_arg_2 = var_17;
[L256]              SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2;
[L257]              SORT_1 var_28_arg_0 = var_27;
[L258]              SORT_3 var_28_arg_1 = state_24;
[L259]              SORT_3 var_28_arg_2 = var_23;
[L260]              SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2;
[L261]              SORT_1 var_33_arg_0 = var_32;
[L262]              SORT_3 var_33_arg_1 = state_29;
[L263]              SORT_3 var_33_arg_2 = var_28;
[L264]              SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2;
[L265]              SORT_1 var_38_arg_0 = var_37;
[L266]              SORT_3 var_38_arg_1 = state_34;
[L267]              SORT_3 var_38_arg_2 = var_33;
[L268]              SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2;
[L269]              SORT_1 var_44_arg_0 = var_43;
[L270]              SORT_3 var_44_arg_1 = state_39;
[L271]              SORT_3 var_44_arg_2 = var_38;
[L272]              SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2;
[L273]              SORT_1 var_49_arg_0 = var_48;
[L274]              SORT_3 var_49_arg_1 = state_45;
[L275]              SORT_3 var_49_arg_2 = var_44;
[L276]              SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2;
[L277]              SORT_1 var_54_arg_0 = var_53;
[L278]              SORT_3 var_54_arg_1 = state_50;
[L279]              SORT_3 var_54_arg_2 = var_49;
[L280]              SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2;
[L281]              SORT_1 var_58_arg_0 = var_57;
[L282]              SORT_3 var_58_arg_1 = state_55;
[L283]              SORT_3 var_58_arg_2 = var_54;
[L284]              SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L285]  EXPR        var_58 & mask_SORT_3
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L285]              var_58 = var_58 & mask_SORT_3
[L286]              SORT_3 var_88_arg_0 = state_87;
[L287]              SORT_3 var_88_arg_1 = var_58;
[L288]              SORT_1 var_88 = var_88_arg_0 == var_88_arg_1;
[L289]              SORT_1 var_89_arg_0 = var_86;
[L290]              SORT_1 var_89_arg_1 = var_88;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1]
[L291]  EXPR        var_89_arg_0 | var_89_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L291]              SORT_1 var_89 = var_89_arg_0 | var_89_arg_1;
[L292]              SORT_1 var_110_arg_0 = state_91;
[L293]              SORT_1 var_110_arg_1 = input_109;
[L294]              SORT_1 var_110_arg_2 = var_89;
[L295]              SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2;
[L296]              SORT_1 var_113_arg_0 = var_110;
[L297]              SORT_1 var_113 = ~var_113_arg_0;
[L298]              SORT_1 var_114_arg_0 = var_112;
[L299]              SORT_1 var_114_arg_1 = var_113;
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L300]  EXPR        var_114_arg_0 & var_114_arg_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L300]              SORT_1 var_114 = var_114_arg_0 & var_114_arg_1;
[L301]  EXPR        var_114 & mask_SORT_1
        VAL         [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L301]              var_114 = var_114 & mask_SORT_1
[L302]              SORT_1 bad_115_arg_0 = var_114;
[L303]  CALL        __VERIFIER_assert(!(bad_115_arg_0))
[L22]   COND TRUE   !(cond)
[L22]               reach_error()

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 2 procedures, 393 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 294.5s, OverallIterations: 57, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 136.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 86437 SdHoareTripleChecker+Valid, 57.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 86357 mSDsluCounter, 194747 SdHoareTripleChecker+Invalid, 49.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 163113 mSDsCounter, 485 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 77506 IncrementalHoareTripleChecker+Invalid, 77991 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 485 mSolverCounterUnsat, 31634 mSDtfsCounter, 77506 mSolverCounterSat, 1.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 8032 GetRequests, 6827 SyntacticMatches, 5 SemanticMatches, 1200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 239031 ImplicationChecksByTransitivity, 70.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21939occurred in iteration=56, InterpolantAutomatonStates: 1013, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.3s AutomataMinimizationTime, 56 MinimizatonAttempts, 51571 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.9s SsaConstructionTime, 37.1s SatisfiabilityAnalysisTime, 89.6s InterpolantComputationTime, 19769 NumberOfCodeBlocks, 19769 NumberOfCodeBlocksAsserted, 70 NumberOfCheckSat, 21101 ConstructedInterpolants, 0 QuantifiedInterpolants, 132960 SizeOfPredicates, 51 NumberOfNonLiveVariables, 26873 ConjunctsInSsa, 643 ConjunctsInUnsatCore, 74 InterpolantComputations, 52 PerfectInterpolantSequences, 7376/8193 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available
RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces
[2024-11-08 18:22:15,063 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Using bit-precise analysis
Retrying with bit-precise analysis

### Bit-precise run ###
Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-a016563
[2024-11-08 18:22:17,673 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-11-08 18:22:17,757 INFO  L114        SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf
[2024-11-08 18:22:17,762 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-11-08 18:22:17,763 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-08 18:22:17,792 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-08 18:22:17,793 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-08 18:22:17,793 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-08 18:22:17,794 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-08 18:22:17,795 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-11-08 18:22:17,795 INFO  L151        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2024-11-08 18:22:17,795 INFO  L153        SettingsManager]:  * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2024-11-08 18:22:17,796 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-08 18:22:17,796 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-11-08 18:22:17,797 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-11-08 18:22:17,797 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-08 18:22:17,798 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2024-11-08 18:22:17,798 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-11-08 18:22:17,798 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2024-11-08 18:22:17,799 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2024-11-08 18:22:17,799 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2024-11-08 18:22:17,799 INFO  L153        SettingsManager]:  * Adapt memory model on pointer casts if necessary=true
[2024-11-08 18:22:17,800 INFO  L153        SettingsManager]:  * Use bitvectors instead of ints=true
[2024-11-08 18:22:17,800 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-11-08 18:22:17,801 INFO  L153        SettingsManager]:  * Memory model=HoenickeLindenmann_4ByteResolution
[2024-11-08 18:22:17,801 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-11-08 18:22:17,801 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-11-08 18:22:17,802 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-08 18:22:17,802 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-11-08 18:22:17,802 INFO  L153        SettingsManager]:  * Only consider context switches at boundaries of atomic blocks=true
[2024-11-08 18:22:17,803 INFO  L153        SettingsManager]:  * SMT solver=External_DefaultMode
[2024-11-08 18:22:17,803 INFO  L153        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 18:22:17,803 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-08 18:22:17,804 INFO  L153        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2024-11-08 18:22:17,804 INFO  L153        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopHeads
[2024-11-08 18:22:17,804 INFO  L153        SettingsManager]:  * Trace refinement strategy=FOX
[2024-11-08 18:22:17,804 INFO  L153        SettingsManager]:  * Command for external solver=cvc4 --incremental --print-success --lang smt 
[2024-11-08 18:22:17,805 INFO  L153        SettingsManager]:  * Apply one-shot large block encoding in concurrent analysis=false
[2024-11-08 18:22:17,805 INFO  L153        SettingsManager]:  * Automaton type used in concurrency analysis=PETRI_NET
[2024-11-08 18:22:17,805 INFO  L153        SettingsManager]:  * Order on configurations for Petri net unfoldings=DBO
[2024-11-08 18:22:17,806 INFO  L153        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2024-11-08 18:22:17,806 INFO  L153        SettingsManager]:  * Looper check in Petri net analysis=SEMANTIC
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cc215c1310f8b4d8a3ef1501261e91ba08e9c5718658396972a4e0020f5cf43f
[2024-11-08 18:22:18,216 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-08 18:22:18,251 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-08 18:22:18,253 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-08 18:22:18,255 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-11-08 18:22:18,255 INFO  L274        PluginConnector]: CDTParser initialized
[2024-11-08 18:22:18,257 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c
Unable to find full path for "g++"
[2024-11-08 18:22:20,299 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-11-08 18:22:20,603 INFO  L384              CDTParser]: Found 1 translation units.
[2024-11-08 18:22:20,603 INFO  L180              CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c
[2024-11-08 18:22:20,615 INFO  L427              CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data/6fe4e6d5f/89c0ee165e13495098ff83c078843945/FLAG4f43d7c9b
[2024-11-08 18:22:20,630 INFO  L435              CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/data/6fe4e6d5f/89c0ee165e13495098ff83c078843945
[2024-11-08 18:22:20,633 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-08 18:22:20,634 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-08 18:22:20,636 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-08 18:22:20,636 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-08 18:22:20,642 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-08 18:22:20,644 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:22:20" (1/1) ...
[2024-11-08 18:22:20,645 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@20e0f784 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:20, skipping insertion in model container
[2024-11-08 18:22:20,645 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 06:22:20" (1/1) ...
[2024-11-08 18:22:20,703 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-11-08 18:22:20,961 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347]
[2024-11-08 18:22:21,166 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 18:22:21,185 INFO  L200         MainTranslator]: Completed pre-run
[2024-11-08 18:22:21,199 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c[1334,1347]
[2024-11-08 18:22:21,337 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 18:22:21,372 INFO  L204         MainTranslator]: Completed translation
[2024-11-08 18:22:21,373 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21 WrapperNode
[2024-11-08 18:22:21,373 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-08 18:22:21,374 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-08 18:22:21,374 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-08 18:22:21,375 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-08 18:22:21,383 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,409 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,471 INFO  L138                Inliner]: procedures = 18, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 640
[2024-11-08 18:22:21,472 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-08 18:22:21,472 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-08 18:22:21,472 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-08 18:22:21,472 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-11-08 18:22:21,496 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,496 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,507 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,550 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-08 18:22:21,550 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,551 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,564 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,567 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,570 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,574 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,580 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-08 18:22:21,581 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-08 18:22:21,581 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2024-11-08 18:22:21,581 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2024-11-08 18:22:21,582 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (1/1) ...
[2024-11-08 18:22:21,588 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 18:22:21,609 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:22:21,629 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null)
[2024-11-08 18:22:21,635 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process
[2024-11-08 18:22:21,670 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-08 18:22:21,671 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0
[2024-11-08 18:22:21,671 INFO  L130     BoogieDeclarations]: Found specification of procedure assume_abort_if_not
[2024-11-08 18:22:21,672 INFO  L138     BoogieDeclarations]: Found implementation of procedure assume_abort_if_not
[2024-11-08 18:22:21,672 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-08 18:22:21,672 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-08 18:22:21,884 INFO  L238             CfgBuilder]: Building ICFG
[2024-11-08 18:22:21,887 INFO  L264             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-08 18:22:22,663 INFO  L?                        ?]: Removed 198 outVars from TransFormulas that were not future-live.
[2024-11-08 18:22:22,664 INFO  L287             CfgBuilder]: Performing block encoding
[2024-11-08 18:22:22,680 INFO  L311             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-08 18:22:22,680 INFO  L316             CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-08 18:22:22,681 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:22:22 BoogieIcfgContainer
[2024-11-08 18:22:22,681 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-08 18:22:22,684 INFO  L112        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2024-11-08 18:22:22,686 INFO  L270        PluginConnector]: Initializing TraceAbstraction...
[2024-11-08 18:22:22,690 INFO  L274        PluginConnector]: TraceAbstraction initialized
[2024-11-08 18:22:22,690 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 06:22:20" (1/3) ...
[2024-11-08 18:22:22,691 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77943452 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 06:22:22, skipping insertion in model container
[2024-11-08 18:22:22,692 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 06:22:21" (2/3) ...
[2024-11-08 18:22:22,693 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@77943452 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 06:22:22, skipping insertion in model container
[2024-11-08 18:22:22,694 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 06:22:22" (3/3) ...
[2024-11-08 18:22:22,696 INFO  L112   eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w128_d8_e0.c
[2024-11-08 18:22:22,716 INFO  L214   ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2024-11-08 18:22:22,717 INFO  L154   ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations.
[2024-11-08 18:22:22,776 INFO  L332      AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2024-11-08 18:22:22,786 INFO  L333      AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@21ac36a2, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms]
[2024-11-08 18:22:22,786 INFO  L334      AbstractCegarLoop]: Starting to check reachability of 1 error locations.
[2024-11-08 18:22:22,790 INFO  L276                IsEmpty]: Start isEmpty. Operand  has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:22:22,799 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2024-11-08 18:22:22,799 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:22,800 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:22,800 INFO  L396      AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:22,805 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:22,806 INFO  L85        PathProgramCache]: Analyzing trace with hash -1169761190, now seen corresponding path program 1 times
[2024-11-08 18:22:22,832 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 18:22:22,832 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2070115489]
[2024-11-08 18:22:22,832 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:22,833 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:22,833 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:22:22,836 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:22:22,838 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-08 18:22:23,208 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:23,214 INFO  L255         TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 1 conjuncts are in the unsatisfiable core
[2024-11-08 18:22:23,221 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:22:23,246 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked.
[2024-11-08 18:22:23,247 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:22:23,249 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 18:22:23,249 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2070115489]
[2024-11-08 18:22:23,250 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [2070115489] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:22:23,251 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 18:22:23,251 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2024-11-08 18:22:23,253 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254699884]
[2024-11-08 18:22:23,253 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:22:23,257 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 2 states
[2024-11-08 18:22:23,258 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 18:22:23,286 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-08 18:22:23,287 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 18:22:23,289 INFO  L87              Difference]: Start difference. First operand  has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 18:22:23,305 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:22:23,305 INFO  L93              Difference]: Finished difference Result 36 states and 50 transitions.
[2024-11-08 18:22:23,306 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2024-11-08 18:22:23,308 INFO  L78                 Accepts]: Start accepts. Automaton has  has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 23
[2024-11-08 18:22:23,308 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:22:23,313 INFO  L225             Difference]: With dead ends: 36
[2024-11-08 18:22:23,313 INFO  L226             Difference]: Without dead ends: 17
[2024-11-08 18:22:23,316 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 18:22:23,320 INFO  L432           NwaCegarLoop]: 19 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 18:22:23,321 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 18:22:23,345 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 17 states.
[2024-11-08 18:22:23,362 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17.
[2024-11-08 18:22:23,363 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 18:22:23,365 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions.
[2024-11-08 18:22:23,368 INFO  L78                 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 23
[2024-11-08 18:22:23,368 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:22:23,368 INFO  L471      AbstractCegarLoop]: Abstraction has 17 states and 19 transitions.
[2024-11-08 18:22:23,369 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 18:22:23,369 INFO  L276                IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions.
[2024-11-08 18:22:23,371 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2024-11-08 18:22:23,372 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:23,372 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:23,397 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0
[2024-11-08 18:22:23,573 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:23,573 INFO  L396      AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:23,574 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:23,575 INFO  L85        PathProgramCache]: Analyzing trace with hash 1446485140, now seen corresponding path program 1 times
[2024-11-08 18:22:23,575 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 18:22:23,576 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1631892390]
[2024-11-08 18:22:23,576 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:23,576 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:23,576 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:22:23,578 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:22:23,579 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-08 18:22:23,883 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:23,888 INFO  L255         TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 20 conjuncts are in the unsatisfiable core
[2024-11-08 18:22:23,895 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:22:24,197 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked.
[2024-11-08 18:22:24,198 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:22:24,411 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 18:22:24,411 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1631892390]
[2024-11-08 18:22:24,412 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1631892390] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:22:24,412 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [358308371]
[2024-11-08 18:22:24,412 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:24,412 INFO  L173          SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 18:22:24,416 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 18:22:24,418 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 18:22:24,420 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process
[2024-11-08 18:22:25,048 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:25,055 INFO  L255         TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core
[2024-11-08 18:22:25,060 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:22:25,186 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 18:22:25,186 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 18:22:25,186 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleCvc4 [358308371] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 18:22:25,187 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 18:22:25,187 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7
[2024-11-08 18:22:25,188 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556638604]
[2024-11-08 18:22:25,188 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 18:22:25,189 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 18:22:25,189 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 18:22:25,190 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 18:22:25,190 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2024-11-08 18:22:25,190 INFO  L87              Difference]: Start difference. First operand 17 states and 19 transitions. Second operand  has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:22:25,331 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:22:25,332 INFO  L93              Difference]: Finished difference Result 27 states and 32 transitions.
[2024-11-08 18:22:25,332 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 18:22:25,332 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23
[2024-11-08 18:22:25,333 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:22:25,333 INFO  L225             Difference]: With dead ends: 27
[2024-11-08 18:22:25,334 INFO  L226             Difference]: Without dead ends: 25
[2024-11-08 18:22:25,334 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2024-11-08 18:22:25,336 INFO  L432           NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 18:22:25,336 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 18:22:25,337 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 25 states.
[2024-11-08 18:22:25,342 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25.
[2024-11-08 18:22:25,342 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 18:22:25,343 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions.
[2024-11-08 18:22:25,343 INFO  L78                 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23
[2024-11-08 18:22:25,345 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:22:25,345 INFO  L471      AbstractCegarLoop]: Abstraction has 25 states and 30 transitions.
[2024-11-08 18:22:25,345 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 18:22:25,346 INFO  L276                IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions.
[2024-11-08 18:22:25,347 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2024-11-08 18:22:25,347 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:25,347 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1]
[2024-11-08 18:22:25,353 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (4)] Ended with exit code 0
[2024-11-08 18:22:25,562 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0
[2024-11-08 18:22:25,748 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:25,749 INFO  L396      AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:25,749 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:25,749 INFO  L85        PathProgramCache]: Analyzing trace with hash 636552131, now seen corresponding path program 1 times
[2024-11-08 18:22:25,750 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 18:22:25,751 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1888746728]
[2024-11-08 18:22:25,751 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:25,751 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:25,751 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:22:25,753 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:22:25,756 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-08 18:22:26,254 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:26,269 INFO  L255         TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core
[2024-11-08 18:22:26,283 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:22:26,952 INFO  L134       CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 18:22:26,952 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:22:27,188 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 18:22:27,188 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1888746728]
[2024-11-08 18:22:27,188 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1888746728] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:22:27,189 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [121883924]
[2024-11-08 18:22:27,189 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 18:22:27,189 INFO  L173          SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 18:22:27,189 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 18:22:27,192 INFO  L229       MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 18:22:27,194 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process
[2024-11-08 18:22:28,174 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 18:22:28,204 INFO  L255         TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core
[2024-11-08 18:22:28,226 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:22:28,687 INFO  L134       CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 18:22:28,687 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:22:28,866 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleCvc4 [121883924] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:22:28,867 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences.
[2024-11-08 18:22:28,867 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10
[2024-11-08 18:22:28,867 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677389979]
[2024-11-08 18:22:28,867 INFO  L85    oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton
[2024-11-08 18:22:28,868 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 10 states
[2024-11-08 18:22:28,868 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 18:22:28,869 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-08 18:22:28,869 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132
[2024-11-08 18:22:28,869 INFO  L87              Difference]: Start difference. First operand 25 states and 30 transitions. Second operand  has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:22:29,499 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 18:22:29,499 INFO  L93              Difference]: Finished difference Result 36 states and 44 transitions.
[2024-11-08 18:22:29,499 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2024-11-08 18:22:29,500 INFO  L78                 Accepts]: Start accepts. Automaton has  has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44
[2024-11-08 18:22:29,500 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 18:22:29,501 INFO  L225             Difference]: With dead ends: 36
[2024-11-08 18:22:29,501 INFO  L226             Difference]: Without dead ends: 34
[2024-11-08 18:22:29,502 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240
[2024-11-08 18:22:29,503 INFO  L432           NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 18:22:29,504 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 86 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 18:22:29,509 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 34 states.
[2024-11-08 18:22:29,515 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34.
[2024-11-08 18:22:29,518 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 18:22:29,519 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions.
[2024-11-08 18:22:29,519 INFO  L78                 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44
[2024-11-08 18:22:29,520 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 18:22:29,520 INFO  L471      AbstractCegarLoop]: Abstraction has 34 states and 42 transitions.
[2024-11-08 18:22:29,520 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 18:22:29,520 INFO  L276                IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions.
[2024-11-08 18:22:29,524 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 66
[2024-11-08 18:22:29,526 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 18:22:29,526 INFO  L215           NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1]
[2024-11-08 18:22:29,536 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (6)] Forceful destruction successful, exit code 0
[2024-11-08 18:22:29,742 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0
[2024-11-08 18:22:29,927 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:29,928 INFO  L396      AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 18:22:29,928 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 18:22:29,928 INFO  L85        PathProgramCache]: Analyzing trace with hash 343621620, now seen corresponding path program 2 times
[2024-11-08 18:22:29,930 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 18:22:29,930 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1086567037]
[2024-11-08 18:22:29,930 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-08 18:22:29,930 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:22:29,930 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 18:22:29,935 INFO  L229       MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 18:22:29,937 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-08 18:22:30,772 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-08 18:22:30,772 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 18:22:30,782 INFO  L255         TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core
[2024-11-08 18:22:30,803 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:22:52,109 INFO  L134       CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked.
[2024-11-08 18:22:52,109 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 18:23:49,428 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 18:23:49,429 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1086567037]
[2024-11-08 18:23:49,429 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1086567037] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 18:23:49,429 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1393486050]
[2024-11-08 18:23:49,429 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-08 18:23:49,430 INFO  L173          SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 18:23:49,430 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 18:23:49,434 INFO  L229       MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 18:23:49,435 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process
[2024-11-08 18:23:50,884 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-08 18:23:50,884 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 18:23:50,926 INFO  L255         TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core
[2024-11-08 18:23:50,944 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 18:24:05,311 WARN  L249               Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory")

[2024-11-08 18:24:05,311 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101
[2024-11-08 18:24:05,313 WARN  L320   FreeRefinementEngine]: Global settings require throwing the following exception
[2024-11-08 18:24:05,326 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0
[2024-11-08 18:24:05,533 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0
[2024-11-08 18:24:05,715 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 18:24:05,716 FATAL L?                        ?]: An unrecoverable error occured during an interaction with an SMT solver:
de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")

	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:277)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:140)
	at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99)
	at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117)
	at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.pop(ManagedScript.java:138)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:86)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:912)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.<init>(PredicateUnifier.java:786)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:553)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:195)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:290)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:180)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.<init>(TraceCheckSpWp.java:159)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getInterpolantComputationStatus(IpTcStrategyModuleBase.java:77)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.tryExecuteInterpolantGenerator(AutomatonFreeRefinementEngine.java:267)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.generateProof(AutomatonFreeRefinementEngine.java:148)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:137)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.<init>(AutomatonFreeRefinementEngine.java:85)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.<init>(TraceAbstractionRefinementEngine.java:82)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:302)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:426)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:312)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:273)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.<init>(TraceAbstractionStarter.java:143)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145)
	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63)
Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701)
	at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258)
	... 46 more
[2024-11-08 18:24:05,720 INFO  L158              Benchmark]: Toolchain (without parser) took 105085.22ms. Allocated memory was 60.8MB in the beginning and 348.1MB in the end (delta: 287.3MB). Free memory was 39.5MB in the beginning and 277.0MB in the end (delta: -237.4MB). Peak memory consumption was 49.4MB. Max. memory is 16.1GB.
[2024-11-08 18:24:05,720 INFO  L158              Benchmark]: CDTParser took 0.34ms. Allocated memory is still 60.8MB. Free memory was 36.7MB in the beginning and 36.6MB in the end (delta: 81.6kB). There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 18:24:05,722 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 737.75ms. Allocated memory was 60.8MB in the beginning and 81.8MB in the end (delta: 21.0MB). Free memory was 39.2MB in the beginning and 45.5MB in the end (delta: -6.3MB). Peak memory consumption was 15.6MB. Max. memory is 16.1GB.
[2024-11-08 18:24:05,722 INFO  L158              Benchmark]: Boogie Procedure Inliner took 97.46ms. Allocated memory is still 81.8MB. Free memory was 45.5MB in the beginning and 40.0MB in the end (delta: 5.6MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB.
[2024-11-08 18:24:05,723 INFO  L158              Benchmark]: Boogie Preprocessor took 108.15ms. Allocated memory is still 81.8MB. Free memory was 40.0MB in the beginning and 53.5MB in the end (delta: -13.6MB). Peak memory consumption was 5.2MB. Max. memory is 16.1GB.
[2024-11-08 18:24:05,723 INFO  L158              Benchmark]: RCFGBuilder took 1100.03ms. Allocated memory is still 81.8MB. Free memory was 53.5MB in the beginning and 36.6MB in the end (delta: 16.9MB). Peak memory consumption was 28.6MB. Max. memory is 16.1GB.
[2024-11-08 18:24:05,724 INFO  L158              Benchmark]: TraceAbstraction took 103034.77ms. Allocated memory was 81.8MB in the beginning and 348.1MB in the end (delta: 266.3MB). Free memory was 35.9MB in the beginning and 277.0MB in the end (delta: -241.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB.
[2024-11-08 18:24:05,726 INFO  L338   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.34ms. Allocated memory is still 60.8MB. Free memory was 36.7MB in the beginning and 36.6MB in the end (delta: 81.6kB). There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 737.75ms. Allocated memory was 60.8MB in the beginning and 81.8MB in the end (delta: 21.0MB). Free memory was 39.2MB in the beginning and 45.5MB in the end (delta: -6.3MB). Peak memory consumption was 15.6MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 97.46ms. Allocated memory is still 81.8MB. Free memory was 45.5MB in the beginning and 40.0MB in the end (delta: 5.6MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB.
 * Boogie Preprocessor took 108.15ms. Allocated memory is still 81.8MB. Free memory was 40.0MB in the beginning and 53.5MB in the end (delta: -13.6MB). Peak memory consumption was 5.2MB. Max. memory is 16.1GB.
 * RCFGBuilder took 1100.03ms. Allocated memory is still 81.8MB. Free memory was 53.5MB in the beginning and 36.6MB in the end (delta: 16.9MB). Peak memory consumption was 28.6MB. Max. memory is 16.1GB.
 * TraceAbstraction took 103034.77ms. Allocated memory was 81.8MB in the beginning and 348.1MB in the end (delta: 266.3MB). Free memory was 35.9MB in the beginning and 277.0MB in the end (delta: -241.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")

    de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")
: de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262)
RESULT: Ultimate could not prove your program: Toolchain returned no result.
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Writing output log to file Ultimate.log
Result:
ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c747d5bf-4f6d-4367-ab21-fd647b5e9d6b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")