./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c --full-output --architecture 64bit
--------------------------------------------------------------------------------
Checking for ERROR reachability
Using default analysis
Version a0165632
Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )
--witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-a016563
[2024-11-08 16:05:34,036 INFO L188 SettingsManager]: Resetting all preferences to default values...
[2024-11-08 16:05:34,094 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf
[2024-11-08 16:05:34,099 WARN L101 SettingsManager]: Preference file contains the following unknown settings:
[2024-11-08 16:05:34,099 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-08 16:05:34,121 INFO L130 SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-08 16:05:34,126 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-08 16:05:34,126 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-08 16:05:34,127 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-08 16:05:34,127 INFO L153 SettingsManager]: * Use memory slicer=true
[2024-11-08 16:05:34,128 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2024-11-08 16:05:34,128 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2024-11-08 16:05:34,129 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-08 16:05:34,129 INFO L153 SettingsManager]: * Create parallel compositions if possible=false
[2024-11-08 16:05:34,130 INFO L153 SettingsManager]: * Use SBE=true
[2024-11-08 16:05:34,130 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-08 16:05:34,132 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE
[2024-11-08 16:05:34,135 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true
[2024-11-08 16:05:34,136 INFO L153 SettingsManager]: * Check division by zero=IGNORE
[2024-11-08 16:05:34,136 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE
[2024-11-08 16:05:34,137 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2024-11-08 16:05:34,137 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE
[2024-11-08 16:05:34,138 INFO L153 SettingsManager]: * Allow undefined functions=false
[2024-11-08 16:05:34,138 INFO L153 SettingsManager]: * Check if freed pointer was valid=false
[2024-11-08 16:05:34,139 INFO L153 SettingsManager]: * Use constant arrays=true
[2024-11-08 16:05:34,139 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-08 16:05:34,139 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements
[2024-11-08 16:05:34,140 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true
[2024-11-08 16:05:34,140 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode
[2024-11-08 16:05:34,141 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 16:05:34,141 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-08 16:05:34,142 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2024-11-08 16:05:34,142 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads
[2024-11-08 16:05:34,142 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL
[2024-11-08 16:05:34,143 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2024-11-08 16:05:34,143 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false
[2024-11-08 16:05:34,143 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET
[2024-11-08 16:05:34,144 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO
[2024-11-08 16:05:34,144 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode
[2024-11-08 16:05:34,145 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa
[2024-11-08 16:05:34,394 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-08 16:05:34,427 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-08 16:05:34,431 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-08 16:05:34,433 INFO L270 PluginConnector]: Initializing CDTParser...
[2024-11-08 16:05:34,434 INFO L274 PluginConnector]: CDTParser initialized
[2024-11-08 16:05:34,436 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c
Unable to find full path for "g++"
[2024-11-08 16:05:36,522 INFO L533 CDTParser]: Created temporary CDT project at NULL
[2024-11-08 16:05:36,827 INFO L384 CDTParser]: Found 1 translation units.
[2024-11-08 16:05:36,828 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c
[2024-11-08 16:05:36,848 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data/b2e299c96/07e278e28b7e410f80954ab66b6d3dcd/FLAG0fa207ae5
[2024-11-08 16:05:36,872 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data/b2e299c96/07e278e28b7e410f80954ab66b6d3dcd
[2024-11-08 16:05:36,876 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-08 16:05:36,878 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-08 16:05:36,880 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-08 16:05:36,880 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-08 16:05:36,889 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-08 16:05:36,892 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:05:36" (1/1) ...
[2024-11-08 16:05:36,894 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@17862214 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:36, skipping insertion in model container
[2024-11-08 16:05:36,895 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:05:36" (1/1) ...
[2024-11-08 16:05:36,966 INFO L175 MainTranslator]: Built tables and reachable declarations
[2024-11-08 16:05:37,214 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292]
[2024-11-08 16:05:37,449 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-08 16:05:37,460 INFO L200 MainTranslator]: Completed pre-run
[2024-11-08 16:05:37,474 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292]
[2024-11-08 16:05:37,596 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-08 16:05:37,618 INFO L204 MainTranslator]: Completed translation
[2024-11-08 16:05:37,619 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37 WrapperNode
[2024-11-08 16:05:37,619 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-08 16:05:37,621 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-08 16:05:37,621 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-08 16:05:37,621 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-08 16:05:37,629 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,659 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,835 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1384
[2024-11-08 16:05:37,836 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-08 16:05:37,836 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-08 16:05:37,837 INFO L270 PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-08 16:05:37,837 INFO L274 PluginConnector]: Boogie Preprocessor initialized
[2024-11-08 16:05:37,852 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,852 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,878 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,938 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-08 16:05:37,939 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,939 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:37,995 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:38,014 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:38,054 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:38,068 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:38,111 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-08 16:05:38,112 INFO L112 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-08 16:05:38,112 INFO L270 PluginConnector]: Initializing RCFGBuilder...
[2024-11-08 16:05:38,112 INFO L274 PluginConnector]: RCFGBuilder initialized
[2024-11-08 16:05:38,113 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (1/1) ...
[2024-11-08 16:05:38,121 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 16:05:38,134 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:05:38,154 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null)
[2024-11-08 16:05:38,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process
[2024-11-08 16:05:38,196 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-08 16:05:38,196 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not
[2024-11-08 16:05:38,197 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not
[2024-11-08 16:05:38,197 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-11-08 16:05:38,197 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-08 16:05:38,197 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-08 16:05:38,431 INFO L238 CfgBuilder]: Building ICFG
[2024-11-08 16:05:38,434 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-08 16:05:40,739 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live.
[2024-11-08 16:05:40,739 INFO L287 CfgBuilder]: Performing block encoding
[2024-11-08 16:05:40,768 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-08 16:05:40,771 INFO L316 CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-08 16:05:40,772 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:05:40 BoogieIcfgContainer
[2024-11-08 16:05:40,772 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-08 16:05:40,775 INFO L112 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2024-11-08 16:05:40,776 INFO L270 PluginConnector]: Initializing TraceAbstraction...
[2024-11-08 16:05:40,780 INFO L274 PluginConnector]: TraceAbstraction initialized
[2024-11-08 16:05:40,780 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 04:05:36" (1/3) ...
[2024-11-08 16:05:40,781 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12448ee0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:05:40, skipping insertion in model container
[2024-11-08 16:05:40,781 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:05:37" (2/3) ...
[2024-11-08 16:05:40,782 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12448ee0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:05:40, skipping insertion in model container
[2024-11-08 16:05:40,782 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:05:40" (3/3) ...
[2024-11-08 16:05:40,784 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c
[2024-11-08 16:05:40,804 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2024-11-08 16:05:40,804 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations.
[2024-11-08 16:05:40,910 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2024-11-08 16:05:40,921 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5af0ab7b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms]
[2024-11-08 16:05:40,921 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations.
[2024-11-08 16:05:40,928 INFO L276 IsEmpty]: Start isEmpty. Operand has 393 states, 387 states have (on average 1.4935400516795865) internal successors, (578), 388 states have internal predecessors, (578), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:40,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118
[2024-11-08 16:05:40,947 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:40,949 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:40,951 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:40,959 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:40,959 INFO L85 PathProgramCache]: Analyzing trace with hash 1737159139, now seen corresponding path program 1 times
[2024-11-08 16:05:40,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:40,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012381753]
[2024-11-08 16:05:40,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:40,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:41,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:42,663 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:42,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:42,670 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 16:05:42,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:42,679 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 16:05:42,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:42,686 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:42,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:42,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012381753]
[2024-11-08 16:05:42,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1012381753] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:42,689 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:42,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:05:42,692 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1843596635]
[2024-11-08 16:05:42,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:42,703 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:05:42,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:42,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:05:42,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:42,763 INFO L87 Difference]: Start difference. First operand has 393 states, 387 states have (on average 1.4935400516795865) internal successors, (578), 388 states have internal predecessors, (578), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:42,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:42,900 INFO L93 Difference]: Finished difference Result 714 states and 1067 transitions.
[2024-11-08 16:05:42,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:42,907 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117
[2024-11-08 16:05:42,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:42,927 INFO L225 Difference]: With dead ends: 714
[2024-11-08 16:05:42,927 INFO L226 Difference]: Without dead ends: 391
[2024-11-08 16:05:42,933 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:42,937 INFO L432 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:42,940 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:05:42,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states.
[2024-11-08 16:05:43,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391.
[2024-11-08 16:05:43,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:43,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions.
[2024-11-08 16:05:43,020 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117
[2024-11-08 16:05:43,022 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:43,022 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions.
[2024-11-08 16:05:43,023 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:43,023 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions.
[2024-11-08 16:05:43,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119
[2024-11-08 16:05:43,027 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:43,028 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:43,028 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0
[2024-11-08 16:05:43,028 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:43,029 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:43,029 INFO L85 PathProgramCache]: Analyzing trace with hash -1980945765, now seen corresponding path program 1 times
[2024-11-08 16:05:43,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:43,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68888791]
[2024-11-08 16:05:43,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:43,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:43,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:43,636 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:43,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:43,641 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 16:05:43,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:43,647 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 16:05:43,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:43,654 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:43,656 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:43,656 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68888791]
[2024-11-08 16:05:43,656 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [68888791] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:43,657 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:43,657 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:43,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022800762]
[2024-11-08 16:05:43,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:43,659 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:43,661 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:43,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:43,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:43,663 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:44,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:44,226 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions.
[2024-11-08 16:05:44,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:05:44,227 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118
[2024-11-08 16:05:44,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:44,231 INFO L225 Difference]: With dead ends: 971
[2024-11-08 16:05:44,231 INFO L226 Difference]: Without dead ends: 391
[2024-11-08 16:05:44,236 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56
[2024-11-08 16:05:44,238 INFO L432 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:44,240 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 16:05:44,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states.
[2024-11-08 16:05:44,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391.
[2024-11-08 16:05:44,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:44,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions.
[2024-11-08 16:05:44,305 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118
[2024-11-08 16:05:44,305 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:44,305 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions.
[2024-11-08 16:05:44,306 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:44,306 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions.
[2024-11-08 16:05:44,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120
[2024-11-08 16:05:44,313 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:44,313 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:44,314 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1
[2024-11-08 16:05:44,314 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:44,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:44,316 INFO L85 PathProgramCache]: Analyzing trace with hash 70360093, now seen corresponding path program 1 times
[2024-11-08 16:05:44,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:44,317 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775654172]
[2024-11-08 16:05:44,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:44,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:44,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:44,806 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:44,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:44,809 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 16:05:44,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:44,816 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 16:05:44,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:44,819 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:44,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:44,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1775654172]
[2024-11-08 16:05:44,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1775654172] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:44,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:44,823 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:05:44,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383804438]
[2024-11-08 16:05:44,824 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:44,825 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:05:44,826 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:44,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:05:44,828 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:44,828 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:44,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:44,897 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions.
[2024-11-08 16:05:44,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:44,898 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119
[2024-11-08 16:05:44,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:44,901 INFO L225 Difference]: With dead ends: 714
[2024-11-08 16:05:44,901 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:44,902 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:44,903 INFO L432 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:44,904 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:05:44,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:44,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:44,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:44,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions.
[2024-11-08 16:05:44,918 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119
[2024-11-08 16:05:44,918 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:44,919 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions.
[2024-11-08 16:05:44,919 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:44,919 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions.
[2024-11-08 16:05:44,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121
[2024-11-08 16:05:44,921 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:44,921 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:44,922 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2
[2024-11-08 16:05:44,922 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:44,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:44,923 INFO L85 PathProgramCache]: Analyzing trace with hash 1083197562, now seen corresponding path program 1 times
[2024-11-08 16:05:44,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:44,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142780877]
[2024-11-08 16:05:44,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:44,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:45,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:45,571 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:45,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:45,579 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57
[2024-11-08 16:05:45,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:45,585 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69
[2024-11-08 16:05:45,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:45,588 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:45,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:45,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142780877]
[2024-11-08 16:05:45,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142780877] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:45,590 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:45,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:05:45,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369377501]
[2024-11-08 16:05:45,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:45,591 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:05:45,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:45,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:05:45,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:45,594 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 16:05:45,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:45,691 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions.
[2024-11-08 16:05:45,692 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:45,692 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 120
[2024-11-08 16:05:45,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:45,694 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:45,694 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:45,698 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:45,699 INFO L432 NwaCegarLoop]: 560 mSDtfsCounter, 525 mSDsluCounter, 562 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 527 SdHoareTripleChecker+Valid, 1122 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:45,700 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [527 Valid, 1122 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:45,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:45,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:45,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4768041237113403) internal successors, (573), 388 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:45,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 579 transitions.
[2024-11-08 16:05:45,716 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 579 transitions. Word has length 120
[2024-11-08 16:05:45,716 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:45,717 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 579 transitions.
[2024-11-08 16:05:45,717 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 16:05:45,717 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 579 transitions.
[2024-11-08 16:05:45,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122
[2024-11-08 16:05:45,719 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:45,719 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:45,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3
[2024-11-08 16:05:45,720 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:45,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:45,721 INFO L85 PathProgramCache]: Analyzing trace with hash 1971108038, now seen corresponding path program 1 times
[2024-11-08 16:05:45,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:45,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194769683]
[2024-11-08 16:05:45,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:45,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:45,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,316 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:46,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:46,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,326 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:46,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,331 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:46,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:46,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194769683]
[2024-11-08 16:05:46,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1194769683] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:46,332 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:46,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:05:46,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [937109342]
[2024-11-08 16:05:46,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:46,333 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:05:46,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:46,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:05:46,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:46,334 INFO L87 Difference]: Start difference. First operand 393 states and 579 transitions. Second operand has 4 states, 4 states have (on average 27.25) internal successors, (109), 4 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:46,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:46,424 INFO L93 Difference]: Finished difference Result 716 states and 1054 transitions.
[2024-11-08 16:05:46,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:46,425 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.25) internal successors, (109), 4 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 121
[2024-11-08 16:05:46,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:46,427 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:46,427 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:46,428 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:46,429 INFO L432 NwaCegarLoop]: 553 mSDtfsCounter, 485 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 485 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:46,429 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [485 Valid, 1108 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:46,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:46,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:46,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:46,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions.
[2024-11-08 16:05:46,441 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 121
[2024-11-08 16:05:46,441 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:46,441 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions.
[2024-11-08 16:05:46,442 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.25) internal successors, (109), 4 states have internal predecessors, (109), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:46,442 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions.
[2024-11-08 16:05:46,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124
[2024-11-08 16:05:46,443 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:46,443 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:46,444 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4
[2024-11-08 16:05:46,444 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:46,444 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:46,444 INFO L85 PathProgramCache]: Analyzing trace with hash 815976899, now seen corresponding path program 1 times
[2024-11-08 16:05:46,445 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:46,445 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10406425]
[2024-11-08 16:05:46,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:46,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:46,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,924 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:46,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,932 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:46,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,939 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:46,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:46,951 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:46,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:46,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10406425]
[2024-11-08 16:05:46,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [10406425] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:46,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:46,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:46,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286376686]
[2024-11-08 16:05:46,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:46,956 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:46,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:46,957 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:46,957 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:46,958 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:47,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:47,060 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions.
[2024-11-08 16:05:47,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:47,061 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123
[2024-11-08 16:05:47,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:47,063 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:47,063 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:47,064 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:47,065 INFO L432 NwaCegarLoop]: 553 mSDtfsCounter, 1038 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1041 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:47,065 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1041 Valid, 1108 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:47,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:47,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:47,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:47,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions.
[2024-11-08 16:05:47,081 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123
[2024-11-08 16:05:47,081 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:47,081 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions.
[2024-11-08 16:05:47,081 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.2) internal successors, (111), 5 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:47,082 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions.
[2024-11-08 16:05:47,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125
[2024-11-08 16:05:47,084 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:47,084 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:47,084 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5
[2024-11-08 16:05:47,084 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:47,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:47,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1552850565, now seen corresponding path program 1 times
[2024-11-08 16:05:47,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:47,086 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187145907]
[2024-11-08 16:05:47,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:47,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:47,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:47,749 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:47,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:47,756 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:47,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:47,761 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:47,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:47,767 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:47,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:47,768 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187145907]
[2024-11-08 16:05:47,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [187145907] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:47,768 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:47,768 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:05:47,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425434477]
[2024-11-08 16:05:47,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:47,769 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:05:47,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:47,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:05:47,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:47,770 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:47,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:47,927 INFO L93 Difference]: Finished difference Result 716 states and 1048 transitions.
[2024-11-08 16:05:47,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:47,929 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124
[2024-11-08 16:05:47,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:47,930 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:47,931 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:47,931 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:47,932 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 476 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 476 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:47,932 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [476 Valid, 1062 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:47,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:47,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:47,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4664948453608246) internal successors, (569), 388 states have internal predecessors, (569), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:47,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 575 transitions.
[2024-11-08 16:05:47,944 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 575 transitions. Word has length 124
[2024-11-08 16:05:47,945 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:47,945 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 575 transitions.
[2024-11-08 16:05:47,945 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.0) internal successors, (112), 4 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:47,945 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 575 transitions.
[2024-11-08 16:05:47,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126
[2024-11-08 16:05:47,947 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:47,947 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:47,948 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6
[2024-11-08 16:05:47,948 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:47,948 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:47,948 INFO L85 PathProgramCache]: Analyzing trace with hash 2138822652, now seen corresponding path program 1 times
[2024-11-08 16:05:47,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:47,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243766290]
[2024-11-08 16:05:47,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:47,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:48,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,330 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:48,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,334 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:48,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:48,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,342 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:48,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:48,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243766290]
[2024-11-08 16:05:48,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243766290] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:48,343 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:48,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:48,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [22978218]
[2024-11-08 16:05:48,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:48,344 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:48,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:48,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:48,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:48,346 INFO L87 Difference]: Start difference. First operand 393 states and 575 transitions. Second operand has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:48,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:48,493 INFO L93 Difference]: Finished difference Result 716 states and 1046 transitions.
[2024-11-08 16:05:48,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:48,494 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 125
[2024-11-08 16:05:48,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:48,496 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:48,496 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:48,497 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:48,498 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 1029 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1032 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:48,498 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1032 Valid, 1062 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:48,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:48,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:48,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4639175257731958) internal successors, (568), 388 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:48,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 574 transitions.
[2024-11-08 16:05:48,512 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 574 transitions. Word has length 125
[2024-11-08 16:05:48,512 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:48,513 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 574 transitions.
[2024-11-08 16:05:48,513 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:48,513 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 574 transitions.
[2024-11-08 16:05:48,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127
[2024-11-08 16:05:48,515 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:48,515 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:48,515 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7
[2024-11-08 16:05:48,516 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:48,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:48,516 INFO L85 PathProgramCache]: Analyzing trace with hash 39478686, now seen corresponding path program 1 times
[2024-11-08 16:05:48,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:48,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479380728]
[2024-11-08 16:05:48,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:48,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:48,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,903 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:48,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,907 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:48,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,910 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:48,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:48,914 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:48,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:48,914 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479380728]
[2024-11-08 16:05:48,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [479380728] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:48,915 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:48,915 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:48,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104935589]
[2024-11-08 16:05:48,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:48,915 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:48,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:48,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:48,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:48,917 INFO L87 Difference]: Start difference. First operand 393 states and 574 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:49,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:49,079 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions.
[2024-11-08 16:05:49,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:49,080 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 126
[2024-11-08 16:05:49,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:49,081 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:49,081 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:49,082 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:49,082 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 555 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 558 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:49,083 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [558 Valid, 1069 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:49,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:49,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:49,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.461340206185567) internal successors, (567), 388 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:49,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 573 transitions.
[2024-11-08 16:05:49,096 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 573 transitions. Word has length 126
[2024-11-08 16:05:49,097 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:49,097 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 573 transitions.
[2024-11-08 16:05:49,097 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:49,097 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 573 transitions.
[2024-11-08 16:05:49,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128
[2024-11-08 16:05:49,099 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:49,099 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:49,099 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8
[2024-11-08 16:05:49,100 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:49,100 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:49,100 INFO L85 PathProgramCache]: Analyzing trace with hash 301784757, now seen corresponding path program 1 times
[2024-11-08 16:05:49,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:49,101 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813121721]
[2024-11-08 16:05:49,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:49,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:49,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:49,478 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:49,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:49,483 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:49,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:49,488 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:49,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:49,492 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:49,493 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:49,493 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813121721]
[2024-11-08 16:05:49,493 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [813121721] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:49,493 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:49,493 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:49,494 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568230446]
[2024-11-08 16:05:49,494 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:49,494 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:49,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:49,495 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:49,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:49,496 INFO L87 Difference]: Start difference. First operand 393 states and 573 transitions. Second operand has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:49,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:49,638 INFO L93 Difference]: Finished difference Result 716 states and 1042 transitions.
[2024-11-08 16:05:49,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:49,641 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 127
[2024-11-08 16:05:49,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:49,643 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:49,643 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:49,644 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:49,645 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 551 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 554 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:49,646 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [554 Valid, 1069 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:49,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:49,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:49,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:49,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 572 transitions.
[2024-11-08 16:05:49,661 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 572 transitions. Word has length 127
[2024-11-08 16:05:49,661 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:49,661 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 572 transitions.
[2024-11-08 16:05:49,661 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:49,662 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 572 transitions.
[2024-11-08 16:05:49,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129
[2024-11-08 16:05:49,663 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:49,663 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:49,664 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9
[2024-11-08 16:05:49,664 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:49,664 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:49,665 INFO L85 PathProgramCache]: Analyzing trace with hash -405985993, now seen corresponding path program 1 times
[2024-11-08 16:05:49,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:49,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120822800]
[2024-11-08 16:05:49,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:49,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:49,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:50,384 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:50,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:50,389 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:50,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:50,395 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:50,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:50,401 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:50,401 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:50,401 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120822800]
[2024-11-08 16:05:50,401 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [120822800] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:50,402 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:50,402 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:50,402 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733650621]
[2024-11-08 16:05:50,402 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:50,402 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:50,402 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:50,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:50,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:50,403 INFO L87 Difference]: Start difference. First operand 393 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:50,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:50,569 INFO L93 Difference]: Finished difference Result 716 states and 1040 transitions.
[2024-11-08 16:05:50,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:50,569 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128
[2024-11-08 16:05:50,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:50,572 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:50,572 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:50,573 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:50,573 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 473 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:50,574 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1062 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:50,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:50,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:50,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4561855670103092) internal successors, (565), 388 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:50,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions.
[2024-11-08 16:05:50,588 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 571 transitions. Word has length 128
[2024-11-08 16:05:50,588 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:50,589 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 571 transitions.
[2024-11-08 16:05:50,589 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:50,589 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 571 transitions.
[2024-11-08 16:05:50,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130
[2024-11-08 16:05:50,591 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:50,591 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:50,591 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10
[2024-11-08 16:05:50,592 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:50,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:50,592 INFO L85 PathProgramCache]: Analyzing trace with hash -728262927, now seen corresponding path program 1 times
[2024-11-08 16:05:50,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:50,593 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [652591084]
[2024-11-08 16:05:50,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:50,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:50,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:51,285 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:51,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:51,295 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:51,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:51,303 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:51,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:51,314 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:51,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:51,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [652591084]
[2024-11-08 16:05:51,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [652591084] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:51,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:51,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:51,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [748463122]
[2024-11-08 16:05:51,315 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:51,316 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:51,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:51,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:51,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:51,318 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:51,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:51,528 INFO L93 Difference]: Finished difference Result 716 states and 1038 transitions.
[2024-11-08 16:05:51,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:51,529 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129
[2024-11-08 16:05:51,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:51,531 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:51,531 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:51,532 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:51,533 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 469 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 469 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:51,533 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [469 Valid, 1069 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:51,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:51,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:51,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4536082474226804) internal successors, (564), 388 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:51,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions.
[2024-11-08 16:05:51,551 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 129
[2024-11-08 16:05:51,551 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:51,551 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions.
[2024-11-08 16:05:51,552 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:51,552 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions.
[2024-11-08 16:05:51,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131
[2024-11-08 16:05:51,554 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:51,554 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:51,555 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11
[2024-11-08 16:05:51,555 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:51,555 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:51,556 INFO L85 PathProgramCache]: Analyzing trace with hash -1275435784, now seen corresponding path program 1 times
[2024-11-08 16:05:51,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:51,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552631584]
[2024-11-08 16:05:51,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:51,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:51,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:52,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:52,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:52,198 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:52,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:52,206 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:52,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:52,214 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:52,215 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:52,215 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552631584]
[2024-11-08 16:05:52,215 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552631584] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:52,215 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:52,215 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:52,215 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506774237]
[2024-11-08 16:05:52,216 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:52,216 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:52,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:52,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:52,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:52,217 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:52,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:52,367 INFO L93 Difference]: Finished difference Result 716 states and 1036 transitions.
[2024-11-08 16:05:52,367 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:52,367 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130
[2024-11-08 16:05:52,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:52,370 INFO L225 Difference]: With dead ends: 716
[2024-11-08 16:05:52,370 INFO L226 Difference]: Without dead ends: 393
[2024-11-08 16:05:52,370 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:52,372 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 468 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:52,372 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1069 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:52,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states.
[2024-11-08 16:05:52,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393.
[2024-11-08 16:05:52,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4510309278350515) internal successors, (563), 388 states have internal predecessors, (563), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:52,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 569 transitions.
[2024-11-08 16:05:52,385 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 569 transitions. Word has length 130
[2024-11-08 16:05:52,385 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:52,385 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 569 transitions.
[2024-11-08 16:05:52,386 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:52,386 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 569 transitions.
[2024-11-08 16:05:52,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132
[2024-11-08 16:05:52,387 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:52,388 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:52,388 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12
[2024-11-08 16:05:52,388 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:52,388 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:52,389 INFO L85 PathProgramCache]: Analyzing trace with hash 1143867120, now seen corresponding path program 1 times
[2024-11-08 16:05:52,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:52,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487588789]
[2024-11-08 16:05:52,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:52,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:52,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,207 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:53,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,209 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:53,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,211 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:53,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,214 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:53,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:53,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487588789]
[2024-11-08 16:05:53,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1487588789] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:53,218 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:53,218 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:53,218 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140188585]
[2024-11-08 16:05:53,218 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:53,219 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:53,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:53,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:53,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:53,220 INFO L87 Difference]: Start difference. First operand 393 states and 569 transitions. Second operand has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:53,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:53,536 INFO L93 Difference]: Finished difference Result 722 states and 1042 transitions.
[2024-11-08 16:05:53,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2024-11-08 16:05:53,537 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 131
[2024-11-08 16:05:53,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:53,540 INFO L225 Difference]: With dead ends: 722
[2024-11-08 16:05:53,540 INFO L226 Difference]: Without dead ends: 397
[2024-11-08 16:05:53,541 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:53,541 INFO L432 NwaCegarLoop]: 559 mSDtfsCounter, 2 mSDsluCounter, 1524 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2083 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:53,542 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2083 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 16:05:53,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states.
[2024-11-08 16:05:53,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 395.
[2024-11-08 16:05:53,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4487179487179487) internal successors, (565), 390 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:53,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 571 transitions.
[2024-11-08 16:05:53,556 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 571 transitions. Word has length 131
[2024-11-08 16:05:53,557 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:53,557 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 571 transitions.
[2024-11-08 16:05:53,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:53,557 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 571 transitions.
[2024-11-08 16:05:53,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133
[2024-11-08 16:05:53,559 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:53,559 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:53,559 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13
[2024-11-08 16:05:53,559 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:53,560 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:53,560 INFO L85 PathProgramCache]: Analyzing trace with hash 1708280115, now seen corresponding path program 1 times
[2024-11-08 16:05:53,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:53,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233613796]
[2024-11-08 16:05:53,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:53,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:53,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,990 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:53,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,994 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58
[2024-11-08 16:05:53,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,996 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70
[2024-11-08 16:05:53,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:53,999 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:53,999 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:54,000 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233613796]
[2024-11-08 16:05:54,000 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1233613796] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:54,000 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:54,000 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:05:54,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1384248334]
[2024-11-08 16:05:54,000 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:54,001 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:05:54,001 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:54,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:05:54,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:05:54,002 INFO L87 Difference]: Start difference. First operand 395 states and 571 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 16:05:54,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:54,113 INFO L93 Difference]: Finished difference Result 720 states and 1038 transitions.
[2024-11-08 16:05:54,114 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:54,114 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 132
[2024-11-08 16:05:54,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:54,116 INFO L225 Difference]: With dead ends: 720
[2024-11-08 16:05:54,116 INFO L226 Difference]: Without dead ends: 395
[2024-11-08 16:05:54,120 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:54,121 INFO L432 NwaCegarLoop]: 550 mSDtfsCounter, 513 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:54,121 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1102 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:05:54,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states.
[2024-11-08 16:05:54,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395.
[2024-11-08 16:05:54,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 390 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:54,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 570 transitions.
[2024-11-08 16:05:54,134 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 570 transitions. Word has length 132
[2024-11-08 16:05:54,134 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:54,135 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 570 transitions.
[2024-11-08 16:05:54,135 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 16:05:54,135 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 570 transitions.
[2024-11-08 16:05:54,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134
[2024-11-08 16:05:54,137 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:54,137 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:54,137 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14
[2024-11-08 16:05:54,137 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:54,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:54,138 INFO L85 PathProgramCache]: Analyzing trace with hash 1183901148, now seen corresponding path program 1 times
[2024-11-08 16:05:54,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:54,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325310618]
[2024-11-08 16:05:54,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:54,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:54,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:55,138 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:55,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:55,140 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:05:55,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:55,143 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:05:55,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:55,145 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:55,149 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:55,149 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325310618]
[2024-11-08 16:05:55,150 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1325310618] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:55,150 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:55,150 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:55,150 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1205758888]
[2024-11-08 16:05:55,150 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:55,150 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:55,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:55,151 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:55,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:55,152 INFO L87 Difference]: Start difference. First operand 395 states and 570 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:55,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:55,258 INFO L93 Difference]: Finished difference Result 766 states and 1093 transitions.
[2024-11-08 16:05:55,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2024-11-08 16:05:55,259 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133
[2024-11-08 16:05:55,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:55,261 INFO L225 Difference]: With dead ends: 766
[2024-11-08 16:05:55,261 INFO L226 Difference]: Without dead ends: 441
[2024-11-08 16:05:55,262 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:55,262 INFO L432 NwaCegarLoop]: 558 mSDtfsCounter, 19 mSDsluCounter, 1665 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:55,263 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 2223 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:55,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states.
[2024-11-08 16:05:55,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 439.
[2024-11-08 16:05:55,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 434 states have (on average 1.4216589861751152) internal successors, (617), 434 states have internal predecessors, (617), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:05:55,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 623 transitions.
[2024-11-08 16:05:55,278 INFO L78 Accepts]: Start accepts. Automaton has 439 states and 623 transitions. Word has length 133
[2024-11-08 16:05:55,279 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:55,279 INFO L471 AbstractCegarLoop]: Abstraction has 439 states and 623 transitions.
[2024-11-08 16:05:55,279 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:55,279 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 623 transitions.
[2024-11-08 16:05:55,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135
[2024-11-08 16:05:55,281 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:55,281 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:55,282 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15
[2024-11-08 16:05:55,282 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:55,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:55,282 INFO L85 PathProgramCache]: Analyzing trace with hash -1044882654, now seen corresponding path program 1 times
[2024-11-08 16:05:55,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:55,283 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1521049257]
[2024-11-08 16:05:55,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:55,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:55,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:56,324 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:56,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:56,329 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:05:56,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:56,336 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:05:56,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:56,341 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:05:56,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:56,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1521049257]
[2024-11-08 16:05:56,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1521049257] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:56,342 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:56,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:05:56,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986965689]
[2024-11-08 16:05:56,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:56,344 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:05:56,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:56,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:05:56,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:56,345 INFO L87 Difference]: Start difference. First operand 439 states and 623 transitions. Second operand has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:56,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:56,524 INFO L93 Difference]: Finished difference Result 974 states and 1364 transitions.
[2024-11-08 16:05:56,525 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:05:56,525 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134
[2024-11-08 16:05:56,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:56,528 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:05:56,528 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:05:56,529 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:05:56,529 INFO L432 NwaCegarLoop]: 552 mSDtfsCounter, 861 mSDsluCounter, 1650 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 864 SdHoareTripleChecker+Valid, 2202 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:56,530 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [864 Valid, 2202 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:56,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:05:56,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:05:56,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3936348408710217) internal successors, (832), 597 states have internal predecessors, (832), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:05:56,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 844 transitions.
[2024-11-08 16:05:56,552 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 844 transitions. Word has length 134
[2024-11-08 16:05:56,584 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:56,585 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 844 transitions.
[2024-11-08 16:05:56,585 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.333333333333332) internal successors, (122), 6 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:05:56,585 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 844 transitions.
[2024-11-08 16:05:56,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 323
[2024-11-08 16:05:56,593 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:56,593 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:56,593 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16
[2024-11-08 16:05:56,594 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:56,594 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:56,595 INFO L85 PathProgramCache]: Analyzing trace with hash 1875724266, now seen corresponding path program 1 times
[2024-11-08 16:05:56,595 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:56,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727793098]
[2024-11-08 16:05:56,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:56,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:57,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:57,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,804 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:05:57,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:05:57,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,812 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 231
[2024-11-08 16:05:57,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,815 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 247
[2024-11-08 16:05:57,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,818 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 259
[2024-11-08 16:05:57,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:57,822 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:05:57,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:57,823 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727793098]
[2024-11-08 16:05:57,823 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [727793098] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:57,823 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:57,823 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:57,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391420105]
[2024-11-08 16:05:57,823 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:57,824 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:57,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:57,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:57,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:57,826 INFO L87 Difference]: Start difference. First operand 605 states and 844 transitions. Second operand has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:05:57,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:57,967 INFO L93 Difference]: Finished difference Result 974 states and 1363 transitions.
[2024-11-08 16:05:57,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:57,968 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 322
[2024-11-08 16:05:57,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:57,970 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:05:57,971 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:05:57,971 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:57,972 INFO L432 NwaCegarLoop]: 529 mSDtfsCounter, 515 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 518 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:57,972 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [518 Valid, 1067 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:57,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:05:57,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:05:57,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3919597989949748) internal successors, (831), 597 states have internal predecessors, (831), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:05:57,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 843 transitions.
[2024-11-08 16:05:57,999 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 843 transitions. Word has length 322
[2024-11-08 16:05:57,999 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:57,999 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 843 transitions.
[2024-11-08 16:05:57,999 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.0) internal successors, (295), 5 states have internal predecessors, (295), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:05:58,000 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 843 transitions.
[2024-11-08 16:05:58,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324
[2024-11-08 16:05:58,006 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:58,007 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:58,007 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17
[2024-11-08 16:05:58,008 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:58,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:58,008 INFO L85 PathProgramCache]: Analyzing trace with hash 1904073956, now seen corresponding path program 1 times
[2024-11-08 16:05:58,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:58,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991188018]
[2024-11-08 16:05:58,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:58,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:58,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,963 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:05:58,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,967 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:05:58,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,972 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:05:58,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,977 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 232
[2024-11-08 16:05:58,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,980 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 248
[2024-11-08 16:05:58,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,982 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260
[2024-11-08 16:05:58,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:05:58,985 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:05:58,985 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:05:58,985 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991188018]
[2024-11-08 16:05:58,985 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1991188018] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:05:58,986 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:05:58,986 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:05:58,986 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534467100]
[2024-11-08 16:05:58,986 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:05:58,987 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:05:58,987 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:05:58,987 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:05:58,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:05:58,988 INFO L87 Difference]: Start difference. First operand 605 states and 843 transitions. Second operand has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:05:59,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:05:59,116 INFO L93 Difference]: Finished difference Result 974 states and 1361 transitions.
[2024-11-08 16:05:59,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:05:59,117 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 323
[2024-11-08 16:05:59,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:05:59,120 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:05:59,120 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:05:59,121 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:05:59,121 INFO L432 NwaCegarLoop]: 529 mSDtfsCounter, 923 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 926 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:05:59,121 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [926 Valid, 1060 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:05:59,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:05:59,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:05:59,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.390284757118928) internal successors, (830), 597 states have internal predecessors, (830), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:05:59,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 842 transitions.
[2024-11-08 16:05:59,143 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 842 transitions. Word has length 323
[2024-11-08 16:05:59,143 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:05:59,143 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 842 transitions.
[2024-11-08 16:05:59,144 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.2) internal successors, (296), 5 states have internal predecessors, (296), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:05:59,144 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 842 transitions.
[2024-11-08 16:05:59,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325
[2024-11-08 16:05:59,150 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:05:59,150 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:05:59,150 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18
[2024-11-08 16:05:59,151 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:05:59,151 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:05:59,151 INFO L85 PathProgramCache]: Analyzing trace with hash 1124188181, now seen corresponding path program 1 times
[2024-11-08 16:05:59,151 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:05:59,152 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1365248718]
[2024-11-08 16:05:59,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:05:59,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:05:59,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,092 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:00,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,095 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:00,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,098 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:00,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,101 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 233
[2024-11-08 16:06:00,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,108 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249
[2024-11-08 16:06:00,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,110 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261
[2024-11-08 16:06:00,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:00,113 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:00,114 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:00,114 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1365248718]
[2024-11-08 16:06:00,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1365248718] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:00,114 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:00,114 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:00,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076584073]
[2024-11-08 16:06:00,115 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:00,117 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:00,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:00,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:00,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:00,119 INFO L87 Difference]: Start difference. First operand 605 states and 842 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:00,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:00,262 INFO L93 Difference]: Finished difference Result 974 states and 1359 transitions.
[2024-11-08 16:06:00,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:00,263 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324
[2024-11-08 16:06:00,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:00,267 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:00,267 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:00,269 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:00,269 INFO L432 NwaCegarLoop]: 529 mSDtfsCounter, 907 mSDsluCounter, 531 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 910 SdHoareTripleChecker+Valid, 1060 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:00,270 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [910 Valid, 1060 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:00,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:00,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:00,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3886097152428811) internal successors, (829), 597 states have internal predecessors, (829), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:00,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 841 transitions.
[2024-11-08 16:06:00,295 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 841 transitions. Word has length 324
[2024-11-08 16:06:00,295 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:00,296 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 841 transitions.
[2024-11-08 16:06:00,296 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:00,296 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 841 transitions.
[2024-11-08 16:06:00,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326
[2024-11-08 16:06:00,302 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:00,302 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:00,303 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19
[2024-11-08 16:06:00,303 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:00,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:00,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1342171183, now seen corresponding path program 1 times
[2024-11-08 16:06:00,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:00,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204819303]
[2024-11-08 16:06:00,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:00,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:00,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,391 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:01,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,394 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:01,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,398 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:01,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,401 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 234
[2024-11-08 16:06:01,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,405 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250
[2024-11-08 16:06:01,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,407 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262
[2024-11-08 16:06:01,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:01,412 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:01,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:01,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204819303]
[2024-11-08 16:06:01,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [204819303] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:01,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:01,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:01,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696226005]
[2024-11-08 16:06:01,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:01,414 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:01,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:01,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:01,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:01,415 INFO L87 Difference]: Start difference. First operand 605 states and 841 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:01,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:01,548 INFO L93 Difference]: Finished difference Result 974 states and 1357 transitions.
[2024-11-08 16:06:01,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:01,549 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325
[2024-11-08 16:06:01,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:01,551 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:01,552 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:01,552 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:01,553 INFO L432 NwaCegarLoop]: 529 mSDtfsCounter, 491 mSDsluCounter, 538 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 494 SdHoareTripleChecker+Valid, 1067 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:01,553 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [494 Valid, 1067 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:01,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:01,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:01,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3869346733668342) internal successors, (828), 597 states have internal predecessors, (828), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:01,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 840 transitions.
[2024-11-08 16:06:01,577 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 840 transitions. Word has length 325
[2024-11-08 16:06:01,578 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:01,578 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 840 transitions.
[2024-11-08 16:06:01,578 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:01,579 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 840 transitions.
[2024-11-08 16:06:01,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327
[2024-11-08 16:06:01,584 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:01,584 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:01,584 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20
[2024-11-08 16:06:01,584 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:01,585 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:01,585 INFO L85 PathProgramCache]: Analyzing trace with hash -628202304, now seen corresponding path program 1 times
[2024-11-08 16:06:01,585 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:01,585 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926600983]
[2024-11-08 16:06:01,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:01,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:01,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,831 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:02,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,837 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:02,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,841 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:02,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,851 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 235
[2024-11-08 16:06:02,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,854 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251
[2024-11-08 16:06:02,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,858 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263
[2024-11-08 16:06:02,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:02,863 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:02,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:02,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [926600983]
[2024-11-08 16:06:02,863 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [926600983] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:02,863 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:02,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:02,864 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277467553]
[2024-11-08 16:06:02,864 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:02,865 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:02,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:02,867 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:02,867 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:02,868 INFO L87 Difference]: Start difference. First operand 605 states and 840 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:02,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:02,991 INFO L93 Difference]: Finished difference Result 974 states and 1355 transitions.
[2024-11-08 16:06:02,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:02,992 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326
[2024-11-08 16:06:02,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:02,996 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:02,996 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:02,998 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:02,999 INFO L432 NwaCegarLoop]: 541 mSDtfsCounter, 476 mSDsluCounter, 550 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 479 SdHoareTripleChecker+Valid, 1091 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:03,000 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [479 Valid, 1091 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:03,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:03,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:03,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3852596314907872) internal successors, (827), 597 states have internal predecessors, (827), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:03,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 839 transitions.
[2024-11-08 16:06:03,029 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 839 transitions. Word has length 326
[2024-11-08 16:06:03,030 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:03,030 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 839 transitions.
[2024-11-08 16:06:03,031 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:03,031 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 839 transitions.
[2024-11-08 16:06:03,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328
[2024-11-08 16:06:03,037 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:03,038 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:03,038 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21
[2024-11-08 16:06:03,038 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:03,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:03,039 INFO L85 PathProgramCache]: Analyzing trace with hash -358922246, now seen corresponding path program 1 times
[2024-11-08 16:06:03,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:03,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [485703547]
[2024-11-08 16:06:03,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:03,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:03,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:04,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:04,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,204 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:04,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,207 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 236
[2024-11-08 16:06:04,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,210 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252
[2024-11-08 16:06:04,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,212 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264
[2024-11-08 16:06:04,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:04,216 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:04,216 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:04,216 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [485703547]
[2024-11-08 16:06:04,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [485703547] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:04,217 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:04,217 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:04,217 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [713254976]
[2024-11-08 16:06:04,217 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:04,218 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:04,218 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:04,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:04,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:04,223 INFO L87 Difference]: Start difference. First operand 605 states and 839 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:04,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:04,348 INFO L93 Difference]: Finished difference Result 974 states and 1353 transitions.
[2024-11-08 16:06:04,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:04,349 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327
[2024-11-08 16:06:04,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:04,352 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:04,352 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:04,353 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:04,353 INFO L432 NwaCegarLoop]: 541 mSDtfsCounter, 468 mSDsluCounter, 550 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 471 SdHoareTripleChecker+Valid, 1091 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:04,354 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [471 Valid, 1091 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:04,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:04,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:04,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3835845896147403) internal successors, (826), 597 states have internal predecessors, (826), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:04,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 838 transitions.
[2024-11-08 16:06:04,379 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 838 transitions. Word has length 327
[2024-11-08 16:06:04,380 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:04,380 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 838 transitions.
[2024-11-08 16:06:04,380 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:04,380 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 838 transitions.
[2024-11-08 16:06:04,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329
[2024-11-08 16:06:04,387 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:04,388 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:04,388 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22
[2024-11-08 16:06:04,391 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:04,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:04,392 INFO L85 PathProgramCache]: Analyzing trace with hash -425658901, now seen corresponding path program 1 times
[2024-11-08 16:06:04,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:04,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668187840]
[2024-11-08 16:06:04,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:04,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:04,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,505 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:05,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,508 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:05,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,511 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:05,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,514 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 237
[2024-11-08 16:06:05,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,516 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 16:06:05,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,519 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265
[2024-11-08 16:06:05,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:05,522 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:05,522 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:05,522 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668187840]
[2024-11-08 16:06:05,523 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1668187840] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:05,523 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:05,523 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:05,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705412738]
[2024-11-08 16:06:05,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:05,524 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:05,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:05,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:05,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:05,525 INFO L87 Difference]: Start difference. First operand 605 states and 838 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:05,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:05,944 INFO L93 Difference]: Finished difference Result 974 states and 1351 transitions.
[2024-11-08 16:06:05,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:05,945 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328
[2024-11-08 16:06:05,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:05,948 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:05,948 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:05,949 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:05,950 INFO L432 NwaCegarLoop]: 401 mSDtfsCounter, 830 mSDsluCounter, 403 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 833 SdHoareTripleChecker+Valid, 804 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:05,950 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [833 Valid, 804 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 16:06:05,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:05,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:05,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3819095477386936) internal successors, (825), 597 states have internal predecessors, (825), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:05,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 837 transitions.
[2024-11-08 16:06:05,974 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 837 transitions. Word has length 328
[2024-11-08 16:06:05,975 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:05,975 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 837 transitions.
[2024-11-08 16:06:05,975 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:05,975 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 837 transitions.
[2024-11-08 16:06:05,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330
[2024-11-08 16:06:05,981 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:05,982 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:05,982 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23
[2024-11-08 16:06:05,982 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:05,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:05,983 INFO L85 PathProgramCache]: Analyzing trace with hash -327435195, now seen corresponding path program 1 times
[2024-11-08 16:06:05,983 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:05,983 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198259978]
[2024-11-08 16:06:05,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:05,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:06,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,796 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:07,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:07,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,806 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:07,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,811 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 238
[2024-11-08 16:06:07,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,816 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 16:06:07,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,818 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 266
[2024-11-08 16:06:07,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:07,822 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:07,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:07,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198259978]
[2024-11-08 16:06:07,823 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198259978] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:07,824 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:07,824 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:06:07,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415188502]
[2024-11-08 16:06:07,824 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:07,825 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:06:07,825 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:07,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:06:07,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:06:07,827 INFO L87 Difference]: Start difference. First operand 605 states and 837 transitions. Second operand has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:07,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:07,926 INFO L93 Difference]: Finished difference Result 974 states and 1349 transitions.
[2024-11-08 16:06:07,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:07,927 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329
[2024-11-08 16:06:07,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:07,930 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:07,931 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:07,932 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:07,932 INFO L432 NwaCegarLoop]: 540 mSDtfsCounter, 383 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 383 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:07,936 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [383 Valid, 1082 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:07,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:07,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:07,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3802345058626466) internal successors, (824), 597 states have internal predecessors, (824), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:07,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 836 transitions.
[2024-11-08 16:06:07,998 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 836 transitions. Word has length 329
[2024-11-08 16:06:07,998 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:07,998 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 836 transitions.
[2024-11-08 16:06:07,999 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 75.5) internal successors, (302), 4 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:07,999 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 836 transitions.
[2024-11-08 16:06:08,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331
[2024-11-08 16:06:08,007 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:08,007 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:08,008 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24
[2024-11-08 16:06:08,008 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:08,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:08,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1435130055, now seen corresponding path program 1 times
[2024-11-08 16:06:08,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:08,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017412433]
[2024-11-08 16:06:08,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:08,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:09,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,199 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:10,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,205 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:10,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,212 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:10,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,220 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 239
[2024-11-08 16:06:10,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,222 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 16:06:10,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267
[2024-11-08 16:06:10,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:10,230 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:10,231 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:10,231 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017412433]
[2024-11-08 16:06:10,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2017412433] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:10,232 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:10,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:10,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [736497650]
[2024-11-08 16:06:10,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:10,234 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:10,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:10,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:10,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:10,236 INFO L87 Difference]: Start difference. First operand 605 states and 836 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:10,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:10,398 INFO L93 Difference]: Finished difference Result 974 states and 1347 transitions.
[2024-11-08 16:06:10,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:10,399 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330
[2024-11-08 16:06:10,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:10,402 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:10,402 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:10,404 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:10,404 INFO L432 NwaCegarLoop]: 525 mSDtfsCounter, 456 mSDsluCounter, 534 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 456 SdHoareTripleChecker+Valid, 1059 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:10,406 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [456 Valid, 1059 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:10,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:10,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:10,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3785594639865997) internal successors, (823), 597 states have internal predecessors, (823), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:10,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 835 transitions.
[2024-11-08 16:06:10,439 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 835 transitions. Word has length 330
[2024-11-08 16:06:10,439 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:10,440 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 835 transitions.
[2024-11-08 16:06:10,440 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:10,440 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 835 transitions.
[2024-11-08 16:06:10,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332
[2024-11-08 16:06:10,448 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:10,448 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:10,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25
[2024-11-08 16:06:10,449 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:10,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:10,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1923027077, now seen corresponding path program 1 times
[2024-11-08 16:06:10,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:10,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054318854]
[2024-11-08 16:06:10,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:10,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:11,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,190 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:12,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:12,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:12,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,204 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240
[2024-11-08 16:06:12,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,206 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 16:06:12,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,208 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 268
[2024-11-08 16:06:12,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:12,212 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:12,212 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:12,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054318854]
[2024-11-08 16:06:12,213 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054318854] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:12,213 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:12,213 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:12,213 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786026117]
[2024-11-08 16:06:12,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:12,214 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:12,214 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:12,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:12,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:12,215 INFO L87 Difference]: Start difference. First operand 605 states and 835 transitions. Second operand has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:12,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:12,356 INFO L93 Difference]: Finished difference Result 974 states and 1345 transitions.
[2024-11-08 16:06:12,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:12,357 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331
[2024-11-08 16:06:12,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:12,359 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:12,360 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:12,360 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:12,361 INFO L432 NwaCegarLoop]: 525 mSDtfsCounter, 855 mSDsluCounter, 527 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 855 SdHoareTripleChecker+Valid, 1052 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:12,361 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [855 Valid, 1052 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:12,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:12,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:12,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3768844221105527) internal successors, (822), 597 states have internal predecessors, (822), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:12,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 834 transitions.
[2024-11-08 16:06:12,380 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 834 transitions. Word has length 331
[2024-11-08 16:06:12,380 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:12,381 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 834 transitions.
[2024-11-08 16:06:12,381 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.8) internal successors, (304), 5 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:12,381 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 834 transitions.
[2024-11-08 16:06:12,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333
[2024-11-08 16:06:12,384 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:12,384 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:12,384 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26
[2024-11-08 16:06:12,384 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:12,385 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:12,385 INFO L85 PathProgramCache]: Analyzing trace with hash -1633098486, now seen corresponding path program 1 times
[2024-11-08 16:06:12,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:12,385 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723811458]
[2024-11-08 16:06:12,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:12,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:13,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,017 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:14,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,021 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:14,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,025 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:14,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,029 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 241
[2024-11-08 16:06:14,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,031 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 16:06:14,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,034 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269
[2024-11-08 16:06:14,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:14,037 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:14,037 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:14,037 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723811458]
[2024-11-08 16:06:14,037 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1723811458] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:14,038 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:14,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:06:14,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [436293092]
[2024-11-08 16:06:14,038 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:14,039 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:06:14,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:14,040 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:06:14,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:06:14,040 INFO L87 Difference]: Start difference. First operand 605 states and 834 transitions. Second operand has 4 states, 4 states have (on average 76.25) internal successors, (305), 4 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:14,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:14,149 INFO L93 Difference]: Finished difference Result 974 states and 1343 transitions.
[2024-11-08 16:06:14,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:14,149 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 76.25) internal successors, (305), 4 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332
[2024-11-08 16:06:14,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:14,152 INFO L225 Difference]: With dead ends: 974
[2024-11-08 16:06:14,152 INFO L226 Difference]: Without dead ends: 605
[2024-11-08 16:06:14,153 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:14,153 INFO L432 NwaCegarLoop]: 525 mSDtfsCounter, 392 mSDsluCounter, 527 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 392 SdHoareTripleChecker+Valid, 1052 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:14,153 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [392 Valid, 1052 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:06:14,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 605 states.
[2024-11-08 16:06:14,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 605 to 605.
[2024-11-08 16:06:14,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 605 states, 597 states have (on average 1.3752093802345058) internal successors, (821), 597 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:06:14,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 833 transitions.
[2024-11-08 16:06:14,171 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 833 transitions. Word has length 332
[2024-11-08 16:06:14,172 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:14,172 INFO L471 AbstractCegarLoop]: Abstraction has 605 states and 833 transitions.
[2024-11-08 16:06:14,172 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 76.25) internal successors, (305), 4 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:14,172 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 833 transitions.
[2024-11-08 16:06:14,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334
[2024-11-08 16:06:14,175 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:14,175 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:14,175 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27
[2024-11-08 16:06:14,176 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:14,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:14,176 INFO L85 PathProgramCache]: Analyzing trace with hash -566995468, now seen corresponding path program 1 times
[2024-11-08 16:06:14,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:14,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998332760]
[2024-11-08 16:06:14,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:14,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:15,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,879 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:15,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,881 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:15,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,885 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:15,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,887 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 242
[2024-11-08 16:06:15,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,889 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 258
[2024-11-08 16:06:15,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,891 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270
[2024-11-08 16:06:15,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:15,894 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:15,894 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:15,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998332760]
[2024-11-08 16:06:15,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1998332760] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:15,895 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:15,895 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:06:15,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989218928]
[2024-11-08 16:06:15,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:15,896 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:06:15,896 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:15,897 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:06:15,898 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:15,898 INFO L87 Difference]: Start difference. First operand 605 states and 833 transitions. Second operand has 6 states, 6 states have (on average 51.0) internal successors, (306), 6 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:16,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:16,457 INFO L93 Difference]: Finished difference Result 1419 states and 1960 transitions.
[2024-11-08 16:06:16,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:06:16,458 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.0) internal successors, (306), 6 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333
[2024-11-08 16:06:16,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:16,463 INFO L225 Difference]: With dead ends: 1419
[2024-11-08 16:06:16,463 INFO L226 Difference]: Without dead ends: 1050
[2024-11-08 16:06:16,464 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2024-11-08 16:06:16,466 INFO L432 NwaCegarLoop]: 483 mSDtfsCounter, 584 mSDsluCounter, 1565 mSDsCounter, 0 mSdLazyCounter, 453 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 587 SdHoareTripleChecker+Valid, 2048 SdHoareTripleChecker+Invalid, 462 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 453 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:16,466 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [587 Valid, 2048 Invalid, 462 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 453 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 16:06:16,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1050 states.
[2024-11-08 16:06:16,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1050 to 930.
[2024-11-08 16:06:16,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 930 states, 919 states have (on average 1.3710554951033733) internal successors, (1260), 919 states have internal predecessors, (1260), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 16:06:16,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 930 states to 930 states and 1278 transitions.
[2024-11-08 16:06:16,507 INFO L78 Accepts]: Start accepts. Automaton has 930 states and 1278 transitions. Word has length 333
[2024-11-08 16:06:16,507 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:16,507 INFO L471 AbstractCegarLoop]: Abstraction has 930 states and 1278 transitions.
[2024-11-08 16:06:16,508 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.0) internal successors, (306), 6 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:16,508 INFO L276 IsEmpty]: Start isEmpty. Operand 930 states and 1278 transitions.
[2024-11-08 16:06:16,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335
[2024-11-08 16:06:16,516 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:16,516 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:16,516 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28
[2024-11-08 16:06:16,517 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:16,517 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:16,519 INFO L85 PathProgramCache]: Analyzing trace with hash -1204697564, now seen corresponding path program 1 times
[2024-11-08 16:06:16,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:16,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334909186]
[2024-11-08 16:06:16,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:16,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:17,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,794 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:18,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:18,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:18,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,805 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 243
[2024-11-08 16:06:18,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 259
[2024-11-08 16:06:18,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,810 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:06:18,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:18,813 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:18,813 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:18,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334909186]
[2024-11-08 16:06:18,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [334909186] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:18,814 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:18,814 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:06:18,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1845787593]
[2024-11-08 16:06:18,814 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:18,815 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:06:18,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:18,817 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:06:18,817 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:18,818 INFO L87 Difference]: Start difference. First operand 930 states and 1278 transitions. Second operand has 6 states, 6 states have (on average 51.166666666666664) internal successors, (307), 6 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:19,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:19,733 INFO L93 Difference]: Finished difference Result 1322 states and 1820 transitions.
[2024-11-08 16:06:19,734 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:06:19,734 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.166666666666664) internal successors, (307), 6 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334
[2024-11-08 16:06:19,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:19,738 INFO L225 Difference]: With dead ends: 1322
[2024-11-08 16:06:19,738 INFO L226 Difference]: Without dead ends: 953
[2024-11-08 16:06:19,739 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 16:06:19,741 INFO L432 NwaCegarLoop]: 398 mSDtfsCounter, 769 mSDsluCounter, 1178 mSDsCounter, 0 mSdLazyCounter, 635 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 772 SdHoareTripleChecker+Valid, 1576 SdHoareTripleChecker+Invalid, 635 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 635 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:19,741 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [772 Valid, 1576 Invalid, 635 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 635 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time]
[2024-11-08 16:06:19,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 953 states.
[2024-11-08 16:06:19,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 953 to 931.
[2024-11-08 16:06:19,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 931 states, 920 states have (on average 1.3706521739130435) internal successors, (1261), 920 states have internal predecessors, (1261), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 16:06:19,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 931 states to 931 states and 1279 transitions.
[2024-11-08 16:06:19,784 INFO L78 Accepts]: Start accepts. Automaton has 931 states and 1279 transitions. Word has length 334
[2024-11-08 16:06:19,785 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:19,785 INFO L471 AbstractCegarLoop]: Abstraction has 931 states and 1279 transitions.
[2024-11-08 16:06:19,785 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.166666666666664) internal successors, (307), 6 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:19,785 INFO L276 IsEmpty]: Start isEmpty. Operand 931 states and 1279 transitions.
[2024-11-08 16:06:19,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335
[2024-11-08 16:06:19,791 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:19,791 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:19,792 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29
[2024-11-08 16:06:19,792 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:19,792 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:19,793 INFO L85 PathProgramCache]: Analyzing trace with hash 1464459429, now seen corresponding path program 1 times
[2024-11-08 16:06:19,793 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:19,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778887420]
[2024-11-08 16:06:19,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:19,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:21,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,926 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44
[2024-11-08 16:06:22,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,936 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 16:06:22,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,941 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72
[2024-11-08 16:06:22,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,947 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 243
[2024-11-08 16:06:22,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,949 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 259
[2024-11-08 16:06:22,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,952 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:06:22,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:22,955 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 113 trivial. 0 not checked.
[2024-11-08 16:06:22,956 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:22,956 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778887420]
[2024-11-08 16:06:22,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778887420] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:22,956 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:22,957 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 16:06:22,957 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318816583]
[2024-11-08 16:06:22,957 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:22,958 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 16:06:22,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:22,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 16:06:22,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2024-11-08 16:06:22,960 INFO L87 Difference]: Start difference. First operand 931 states and 1279 transitions. Second operand has 8 states, 8 states have (on average 32.125) internal successors, (257), 8 states have internal predecessors, (257), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:23,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:23,280 INFO L93 Difference]: Finished difference Result 2100 states and 2877 transitions.
[2024-11-08 16:06:23,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2024-11-08 16:06:23,281 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.125) internal successors, (257), 8 states have internal predecessors, (257), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334
[2024-11-08 16:06:23,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:23,287 INFO L225 Difference]: With dead ends: 2100
[2024-11-08 16:06:23,287 INFO L226 Difference]: Without dead ends: 1615
[2024-11-08 16:06:23,288 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:06:23,289 INFO L432 NwaCegarLoop]: 1290 mSDtfsCounter, 784 mSDsluCounter, 6619 mSDsCounter, 0 mSdLazyCounter, 173 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 787 SdHoareTripleChecker+Valid, 7909 SdHoareTripleChecker+Invalid, 173 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 173 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:23,289 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [787 Valid, 7909 Invalid, 173 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 173 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 16:06:23,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1615 states.
[2024-11-08 16:06:23,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1615 to 998.
[2024-11-08 16:06:23,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 998 states, 984 states have (on average 1.3739837398373984) internal successors, (1352), 984 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:23,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 998 states to 998 states and 1376 transitions.
[2024-11-08 16:06:23,339 INFO L78 Accepts]: Start accepts. Automaton has 998 states and 1376 transitions. Word has length 334
[2024-11-08 16:06:23,340 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:23,340 INFO L471 AbstractCegarLoop]: Abstraction has 998 states and 1376 transitions.
[2024-11-08 16:06:23,340 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.125) internal successors, (257), 8 states have internal predecessors, (257), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:23,341 INFO L276 IsEmpty]: Start isEmpty. Operand 998 states and 1376 transitions.
[2024-11-08 16:06:23,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336
[2024-11-08 16:06:23,344 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:23,345 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:23,345 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30
[2024-11-08 16:06:23,346 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:23,346 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:23,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1921930769, now seen corresponding path program 1 times
[2024-11-08 16:06:23,347 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:23,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244864545]
[2024-11-08 16:06:23,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:23,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:24,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,248 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43
[2024-11-08 16:06:25,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,252 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 16:06:25,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,255 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71
[2024-11-08 16:06:25,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,259 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244
[2024-11-08 16:06:25,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,261 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260
[2024-11-08 16:06:25,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,265 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 16:06:25,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:25,270 INFO L134 CoverageAnalysis]: Checked inductivity of 143 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked.
[2024-11-08 16:06:25,271 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:25,271 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244864545]
[2024-11-08 16:06:25,271 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [244864545] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:25,271 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:25,271 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-08 16:06:25,271 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1562507533]
[2024-11-08 16:06:25,272 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:25,272 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 16:06:25,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:25,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 16:06:25,273 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-08 16:06:25,274 INFO L87 Difference]: Start difference. First operand 998 states and 1376 transitions. Second operand has 7 states, 7 states have (on average 39.142857142857146) internal successors, (274), 7 states have internal predecessors, (274), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:25,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:25,755 INFO L93 Difference]: Finished difference Result 2132 states and 2937 transitions.
[2024-11-08 16:06:25,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2024-11-08 16:06:25,755 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 39.142857142857146) internal successors, (274), 7 states have internal predecessors, (274), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335
[2024-11-08 16:06:25,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:25,759 INFO L225 Difference]: With dead ends: 2132
[2024-11-08 16:06:25,759 INFO L226 Difference]: Without dead ends: 1014
[2024-11-08 16:06:25,760 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110
[2024-11-08 16:06:25,761 INFO L432 NwaCegarLoop]: 529 mSDtfsCounter, 635 mSDsluCounter, 1979 mSDsCounter, 0 mSdLazyCounter, 255 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 638 SdHoareTripleChecker+Valid, 2508 SdHoareTripleChecker+Invalid, 264 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 255 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:25,761 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [638 Valid, 2508 Invalid, 264 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 255 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 16:06:25,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1014 states.
[2024-11-08 16:06:25,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1014 to 1006.
[2024-11-08 16:06:25,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1006 states, 992 states have (on average 1.3669354838709677) internal successors, (1356), 992 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:25,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1380 transitions.
[2024-11-08 16:06:25,791 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1380 transitions. Word has length 335
[2024-11-08 16:06:25,791 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:25,791 INFO L471 AbstractCegarLoop]: Abstraction has 1006 states and 1380 transitions.
[2024-11-08 16:06:25,791 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 39.142857142857146) internal successors, (274), 7 states have internal predecessors, (274), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:25,791 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1380 transitions.
[2024-11-08 16:06:25,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338
[2024-11-08 16:06:25,794 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:25,795 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:25,795 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31
[2024-11-08 16:06:25,795 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:25,796 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:25,796 INFO L85 PathProgramCache]: Analyzing trace with hash 441253897, now seen corresponding path program 1 times
[2024-11-08 16:06:25,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:25,796 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [580188688]
[2024-11-08 16:06:25,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:25,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:26,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,818 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44
[2024-11-08 16:06:27,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,823 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 16:06:27,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,825 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72
[2024-11-08 16:06:27,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,828 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 246
[2024-11-08 16:06:27,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,830 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262
[2024-11-08 16:06:27,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,832 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 16:06:27,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:27,837 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 125 trivial. 0 not checked.
[2024-11-08 16:06:27,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:27,838 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [580188688]
[2024-11-08 16:06:27,838 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [580188688] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:27,838 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:27,838 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-08 16:06:27,838 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897498871]
[2024-11-08 16:06:27,838 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:27,839 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 16:06:27,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:27,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 16:06:27,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42
[2024-11-08 16:06:27,841 INFO L87 Difference]: Start difference. First operand 1006 states and 1380 transitions. Second operand has 7 states, 7 states have (on average 35.714285714285715) internal successors, (250), 7 states have internal predecessors, (250), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 16:06:28,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:28,559 INFO L93 Difference]: Finished difference Result 1834 states and 2507 transitions.
[2024-11-08 16:06:28,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:06:28,560 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 35.714285714285715) internal successors, (250), 7 states have internal predecessors, (250), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 337
[2024-11-08 16:06:28,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:28,564 INFO L225 Difference]: With dead ends: 1834
[2024-11-08 16:06:28,564 INFO L226 Difference]: Without dead ends: 1022
[2024-11-08 16:06:28,566 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90
[2024-11-08 16:06:28,567 INFO L432 NwaCegarLoop]: 390 mSDtfsCounter, 1037 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 654 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1039 SdHoareTripleChecker+Valid, 1553 SdHoareTripleChecker+Invalid, 658 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 654 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:28,567 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1039 Valid, 1553 Invalid, 658 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 654 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 16:06:28,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1022 states.
[2024-11-08 16:06:28,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1022 to 1014.
[2024-11-08 16:06:28,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1014 states, 1000 states have (on average 1.36) internal successors, (1360), 1000 states have internal predecessors, (1360), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:28,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1014 states to 1014 states and 1384 transitions.
[2024-11-08 16:06:28,606 INFO L78 Accepts]: Start accepts. Automaton has 1014 states and 1384 transitions. Word has length 337
[2024-11-08 16:06:28,606 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:28,606 INFO L471 AbstractCegarLoop]: Abstraction has 1014 states and 1384 transitions.
[2024-11-08 16:06:28,607 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 35.714285714285715) internal successors, (250), 7 states have internal predecessors, (250), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 16:06:28,607 INFO L276 IsEmpty]: Start isEmpty. Operand 1014 states and 1384 transitions.
[2024-11-08 16:06:28,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340
[2024-11-08 16:06:28,610 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:28,611 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:28,611 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32
[2024-11-08 16:06:28,611 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:28,612 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:28,612 INFO L85 PathProgramCache]: Analyzing trace with hash -1620039087, now seen corresponding path program 1 times
[2024-11-08 16:06:28,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:28,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270422757]
[2024-11-08 16:06:28,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:28,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:29,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,671 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44
[2024-11-08 16:06:30,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,673 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 16:06:30,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,675 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 16:06:30,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,677 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 247
[2024-11-08 16:06:30,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,679 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264
[2024-11-08 16:06:30,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,682 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276
[2024-11-08 16:06:30,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:30,686 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked.
[2024-11-08 16:06:30,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:30,687 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270422757]
[2024-11-08 16:06:30,687 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [270422757] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:30,687 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:30,687 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:06:30,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273432856]
[2024-11-08 16:06:30,688 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:30,689 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:06:30,689 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:30,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:06:30,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:06:30,690 INFO L87 Difference]: Start difference. First operand 1014 states and 1384 transitions. Second operand has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:31,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:31,398 INFO L93 Difference]: Finished difference Result 1884 states and 2560 transitions.
[2024-11-08 16:06:31,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:06:31,399 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 339
[2024-11-08 16:06:31,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:31,404 INFO L225 Difference]: With dead ends: 1884
[2024-11-08 16:06:31,404 INFO L226 Difference]: Without dead ends: 1022
[2024-11-08 16:06:31,406 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:06:31,406 INFO L432 NwaCegarLoop]: 390 mSDtfsCounter, 511 mSDsluCounter, 1163 mSDsCounter, 0 mSdLazyCounter, 654 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1553 SdHoareTripleChecker+Invalid, 654 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 654 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:31,407 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1553 Invalid, 654 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 654 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 16:06:31,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1022 states.
[2024-11-08 16:06:31,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1022 to 1018.
[2024-11-08 16:06:31,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1018 states, 1004 states have (on average 1.3585657370517927) internal successors, (1364), 1004 states have internal predecessors, (1364), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:31,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1018 states to 1018 states and 1388 transitions.
[2024-11-08 16:06:31,439 INFO L78 Accepts]: Start accepts. Automaton has 1018 states and 1388 transitions. Word has length 339
[2024-11-08 16:06:31,440 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:31,440 INFO L471 AbstractCegarLoop]: Abstraction has 1018 states and 1388 transitions.
[2024-11-08 16:06:31,440 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 40.0) internal successors, (240), 6 states have internal predecessors, (240), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:31,440 INFO L276 IsEmpty]: Start isEmpty. Operand 1018 states and 1388 transitions.
[2024-11-08 16:06:31,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342
[2024-11-08 16:06:31,444 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:31,444 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:31,445 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33
[2024-11-08 16:06:31,445 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:31,445 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:31,445 INFO L85 PathProgramCache]: Analyzing trace with hash -1397548669, now seen corresponding path program 1 times
[2024-11-08 16:06:31,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:31,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446022653]
[2024-11-08 16:06:31,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:31,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:32,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,058 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:35,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,062 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62
[2024-11-08 16:06:35,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,063 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74
[2024-11-08 16:06:35,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,065 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249
[2024-11-08 16:06:35,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,066 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 266
[2024-11-08 16:06:35,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,068 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 278
[2024-11-08 16:06:35,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:35,070 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 125 trivial. 0 not checked.
[2024-11-08 16:06:35,070 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:35,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446022653]
[2024-11-08 16:06:35,071 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1446022653] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:35,071 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:35,071 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 16:06:35,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218197623]
[2024-11-08 16:06:35,071 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:35,073 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 16:06:35,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:35,074 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 16:06:35,074 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56
[2024-11-08 16:06:35,075 INFO L87 Difference]: Start difference. First operand 1018 states and 1388 transitions. Second operand has 8 states, 8 states have (on average 31.75) internal successors, (254), 8 states have internal predecessors, (254), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 16:06:35,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:35,951 INFO L93 Difference]: Finished difference Result 1853 states and 2515 transitions.
[2024-11-08 16:06:35,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2024-11-08 16:06:35,952 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 31.75) internal successors, (254), 8 states have internal predecessors, (254), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 341
[2024-11-08 16:06:35,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:35,956 INFO L225 Difference]: With dead ends: 1853
[2024-11-08 16:06:35,956 INFO L226 Difference]: Without dead ends: 1050
[2024-11-08 16:06:35,958 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56
[2024-11-08 16:06:35,959 INFO L432 NwaCegarLoop]: 393 mSDtfsCounter, 498 mSDsluCounter, 1934 mSDsCounter, 0 mSdLazyCounter, 967 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 500 SdHoareTripleChecker+Valid, 2327 SdHoareTripleChecker+Invalid, 968 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 967 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:35,959 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [500 Valid, 2327 Invalid, 968 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 967 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time]
[2024-11-08 16:06:35,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1050 states.
[2024-11-08 16:06:35,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1050 to 1038.
[2024-11-08 16:06:35,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1038 states, 1024 states have (on average 1.35546875) internal successors, (1388), 1024 states have internal predecessors, (1388), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:35,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1412 transitions.
[2024-11-08 16:06:35,997 INFO L78 Accepts]: Start accepts. Automaton has 1038 states and 1412 transitions. Word has length 341
[2024-11-08 16:06:35,998 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:35,998 INFO L471 AbstractCegarLoop]: Abstraction has 1038 states and 1412 transitions.
[2024-11-08 16:06:35,998 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 31.75) internal successors, (254), 8 states have internal predecessors, (254), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 16:06:35,999 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1412 transitions.
[2024-11-08 16:06:36,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 344
[2024-11-08 16:06:36,002 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:36,003 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:36,003 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34
[2024-11-08 16:06:36,003 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:36,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:36,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1296469935, now seen corresponding path program 1 times
[2024-11-08 16:06:36,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:36,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953819957]
[2024-11-08 16:06:36,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:36,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:36,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,223 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:38,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,226 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:38,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 16:06:38,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250
[2024-11-08 16:06:38,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,234 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 268
[2024-11-08 16:06:38,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,237 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 280
[2024-11-08 16:06:38,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:38,240 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 4 proven. 83 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:06:38,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:38,241 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953819957]
[2024-11-08 16:06:38,241 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [953819957] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:06:38,241 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [816812406]
[2024-11-08 16:06:38,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:38,242 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:06:38,242 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:06:38,244 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:06:38,245 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-08 16:06:39,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:39,582 INFO L255 TraceCheckSpWp]: Trace formula consists of 2053 conjuncts, 33 conjuncts are in the unsatisfiable core
[2024-11-08 16:06:39,610 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:06:40,807 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 77 proven. 6 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked.
[2024-11-08 16:06:40,807 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:06:42,639 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 77 proven. 3 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked.
[2024-11-08 16:06:42,640 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [816812406] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 16:06:42,640 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 16:06:42,640 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 26
[2024-11-08 16:06:42,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612056284]
[2024-11-08 16:06:42,645 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 16:06:42,646 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states
[2024-11-08 16:06:42,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:42,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants.
[2024-11-08 16:06:42,648 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650
[2024-11-08 16:06:42,652 INFO L87 Difference]: Start difference. First operand 1038 states and 1412 transitions. Second operand has 26 states, 26 states have (on average 32.80769230769231) internal successors, (853), 26 states have internal predecessors, (853), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15)
[2024-11-08 16:06:45,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:45,255 INFO L93 Difference]: Finished difference Result 1874 states and 2547 transitions.
[2024-11-08 16:06:45,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states.
[2024-11-08 16:06:45,256 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 32.80769230769231) internal successors, (853), 26 states have internal predecessors, (853), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) Word has length 343
[2024-11-08 16:06:45,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:45,260 INFO L225 Difference]: With dead ends: 1874
[2024-11-08 16:06:45,260 INFO L226 Difference]: Without dead ends: 1066
[2024-11-08 16:06:45,262 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 731 GetRequests, 685 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=367, Invalid=1889, Unknown=0, NotChecked=0, Total=2256
[2024-11-08 16:06:45,263 INFO L432 NwaCegarLoop]: 483 mSDtfsCounter, 787 mSDsluCounter, 6772 mSDsCounter, 0 mSdLazyCounter, 3580 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 787 SdHoareTripleChecker+Valid, 7255 SdHoareTripleChecker+Invalid, 3585 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 3580 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:45,264 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [787 Valid, 7255 Invalid, 3585 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 3580 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time]
[2024-11-08 16:06:45,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1066 states.
[2024-11-08 16:06:45,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1066 to 1035.
[2024-11-08 16:06:45,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1035 states, 1021 states have (on average 1.3496571988246817) internal successors, (1378), 1021 states have internal predecessors, (1378), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:45,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1402 transitions.
[2024-11-08 16:06:45,305 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1402 transitions. Word has length 343
[2024-11-08 16:06:45,305 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:45,306 INFO L471 AbstractCegarLoop]: Abstraction has 1035 states and 1402 transitions.
[2024-11-08 16:06:45,306 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 32.80769230769231) internal successors, (853), 26 states have internal predecessors, (853), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15)
[2024-11-08 16:06:45,306 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1402 transitions.
[2024-11-08 16:06:45,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348
[2024-11-08 16:06:45,310 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:45,310 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:45,344 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0
[2024-11-08 16:06:45,514 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35
[2024-11-08 16:06:45,515 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:45,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:45,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1252924324, now seen corresponding path program 1 times
[2024-11-08 16:06:45,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:45,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [558783529]
[2024-11-08 16:06:45,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:45,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:45,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,204 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:46,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,205 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:46,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,207 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:06:46,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,209 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252
[2024-11-08 16:06:46,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,211 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270
[2024-11-08 16:06:46,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,213 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 284
[2024-11-08 16:06:46,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:46,215 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked.
[2024-11-08 16:06:46,216 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:46,216 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [558783529]
[2024-11-08 16:06:46,216 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [558783529] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:46,216 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:46,216 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:46,217 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221623496]
[2024-11-08 16:06:46,217 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:46,218 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:46,218 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:46,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:46,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:46,219 INFO L87 Difference]: Start difference. First operand 1035 states and 1402 transitions. Second operand has 5 states, 5 states have (on average 57.2) internal successors, (286), 5 states have internal predecessors, (286), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:46,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:46,274 INFO L93 Difference]: Finished difference Result 1707 states and 2317 transitions.
[2024-11-08 16:06:46,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2024-11-08 16:06:46,275 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.2) internal successors, (286), 5 states have internal predecessors, (286), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 347
[2024-11-08 16:06:46,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:46,279 INFO L225 Difference]: With dead ends: 1707
[2024-11-08 16:06:46,280 INFO L226 Difference]: Without dead ends: 1089
[2024-11-08 16:06:46,281 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:46,282 INFO L432 NwaCegarLoop]: 547 mSDtfsCounter, 16 mSDsluCounter, 1629 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2176 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:46,282 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2176 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:06:46,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states.
[2024-11-08 16:06:46,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1089.
[2024-11-08 16:06:46,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1075 states have (on average 1.3544186046511628) internal successors, (1456), 1075 states have internal predecessors, (1456), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:46,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1480 transitions.
[2024-11-08 16:06:46,316 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 1480 transitions. Word has length 347
[2024-11-08 16:06:46,317 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:46,317 INFO L471 AbstractCegarLoop]: Abstraction has 1089 states and 1480 transitions.
[2024-11-08 16:06:46,318 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.2) internal successors, (286), 5 states have internal predecessors, (286), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:46,318 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 1480 transitions.
[2024-11-08 16:06:46,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349
[2024-11-08 16:06:46,321 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:46,322 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:46,322 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36
[2024-11-08 16:06:46,322 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:46,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:46,323 INFO L85 PathProgramCache]: Analyzing trace with hash -1531051254, now seen corresponding path program 1 times
[2024-11-08 16:06:46,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:46,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131003679]
[2024-11-08 16:06:46,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:46,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:46,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,082 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:47,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,084 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:47,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,086 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:06:47,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,088 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252
[2024-11-08 16:06:47,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,090 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270
[2024-11-08 16:06:47,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,092 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 284
[2024-11-08 16:06:47,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:47,097 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked.
[2024-11-08 16:06:47,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:47,098 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131003679]
[2024-11-08 16:06:47,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131003679] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:47,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:47,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:47,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160854572]
[2024-11-08 16:06:47,099 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:47,099 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:47,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:47,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:47,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:47,102 INFO L87 Difference]: Start difference. First operand 1089 states and 1480 transitions. Second operand has 5 states, 5 states have (on average 57.8) internal successors, (289), 5 states have internal predecessors, (289), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:47,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:47,154 INFO L93 Difference]: Finished difference Result 1859 states and 2515 transitions.
[2024-11-08 16:06:47,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:47,154 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.8) internal successors, (289), 5 states have internal predecessors, (289), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 348
[2024-11-08 16:06:47,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:47,159 INFO L225 Difference]: With dead ends: 1859
[2024-11-08 16:06:47,159 INFO L226 Difference]: Without dead ends: 1095
[2024-11-08 16:06:47,160 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:47,161 INFO L432 NwaCegarLoop]: 548 mSDtfsCounter, 0 mSDsluCounter, 1086 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1634 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:47,161 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1634 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:06:47,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1095 states.
[2024-11-08 16:06:47,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1095 to 1095.
[2024-11-08 16:06:47,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1095 states, 1081 states have (on average 1.3524514338575393) internal successors, (1462), 1081 states have internal predecessors, (1462), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:47,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1095 states to 1095 states and 1486 transitions.
[2024-11-08 16:06:47,194 INFO L78 Accepts]: Start accepts. Automaton has 1095 states and 1486 transitions. Word has length 348
[2024-11-08 16:06:47,195 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:47,195 INFO L471 AbstractCegarLoop]: Abstraction has 1095 states and 1486 transitions.
[2024-11-08 16:06:47,196 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.8) internal successors, (289), 5 states have internal predecessors, (289), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:47,196 INFO L276 IsEmpty]: Start isEmpty. Operand 1095 states and 1486 transitions.
[2024-11-08 16:06:47,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349
[2024-11-08 16:06:47,200 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:47,200 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:47,200 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37
[2024-11-08 16:06:47,201 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:47,201 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:47,201 INFO L85 PathProgramCache]: Analyzing trace with hash -42554550, now seen corresponding path program 1 times
[2024-11-08 16:06:47,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:47,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209267604]
[2024-11-08 16:06:47,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:47,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:48,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,187 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:49,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,190 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:49,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,193 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:06:49,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252
[2024-11-08 16:06:49,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,198 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270
[2024-11-08 16:06:49,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 284
[2024-11-08 16:06:49,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:49,202 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked.
[2024-11-08 16:06:49,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:49,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209267604]
[2024-11-08 16:06:49,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1209267604] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:49,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:49,204 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 16:06:49,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076085210]
[2024-11-08 16:06:49,204 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:49,205 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 16:06:49,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:49,206 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 16:06:49,206 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:49,206 INFO L87 Difference]: Start difference. First operand 1095 states and 1486 transitions. Second operand has 5 states, 5 states have (on average 57.8) internal successors, (289), 5 states have internal predecessors, (289), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:49,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:49,643 INFO L93 Difference]: Finished difference Result 1789 states and 2410 transitions.
[2024-11-08 16:06:49,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2024-11-08 16:06:49,644 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.8) internal successors, (289), 5 states have internal predecessors, (289), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 348
[2024-11-08 16:06:49,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:49,652 INFO L225 Difference]: With dead ends: 1789
[2024-11-08 16:06:49,656 INFO L226 Difference]: Without dead ends: 1107
[2024-11-08 16:06:49,657 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 16:06:49,658 INFO L432 NwaCegarLoop]: 401 mSDtfsCounter, 460 mSDsluCounter, 795 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 460 SdHoareTripleChecker+Valid, 1196 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:49,658 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [460 Valid, 1196 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 16:06:49,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states.
[2024-11-08 16:06:49,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 1101.
[2024-11-08 16:06:49,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1101 states, 1087 states have (on average 1.3505059797608097) internal successors, (1468), 1087 states have internal predecessors, (1468), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:49,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1101 states to 1101 states and 1492 transitions.
[2024-11-08 16:06:49,692 INFO L78 Accepts]: Start accepts. Automaton has 1101 states and 1492 transitions. Word has length 348
[2024-11-08 16:06:49,693 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:49,693 INFO L471 AbstractCegarLoop]: Abstraction has 1101 states and 1492 transitions.
[2024-11-08 16:06:49,693 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.8) internal successors, (289), 5 states have internal predecessors, (289), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:06:49,694 INFO L276 IsEmpty]: Start isEmpty. Operand 1101 states and 1492 transitions.
[2024-11-08 16:06:49,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 349
[2024-11-08 16:06:49,697 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:49,698 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:49,698 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38
[2024-11-08 16:06:49,698 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:49,699 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:49,699 INFO L85 PathProgramCache]: Analyzing trace with hash 1903994410, now seen corresponding path program 1 times
[2024-11-08 16:06:49,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:49,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728994208]
[2024-11-08 16:06:49,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:49,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:50,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,020 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:51,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,023 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:51,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,025 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:06:51,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,030 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252
[2024-11-08 16:06:51,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,033 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270
[2024-11-08 16:06:51,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,036 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 284
[2024-11-08 16:06:51,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:51,039 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked.
[2024-11-08 16:06:51,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:51,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728994208]
[2024-11-08 16:06:51,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728994208] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:51,040 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:51,040 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 16:06:51,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580665964]
[2024-11-08 16:06:51,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:51,041 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:06:51,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:51,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:06:51,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:06:51,043 INFO L87 Difference]: Start difference. First operand 1101 states and 1492 transitions. Second operand has 4 states, 4 states have (on average 69.75) internal successors, (279), 4 states have internal predecessors, (279), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:51,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:51,394 INFO L93 Difference]: Finished difference Result 1785 states and 2400 transitions.
[2024-11-08 16:06:51,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:06:51,395 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 69.75) internal successors, (279), 4 states have internal predecessors, (279), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 348
[2024-11-08 16:06:51,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:51,399 INFO L225 Difference]: With dead ends: 1785
[2024-11-08 16:06:51,399 INFO L226 Difference]: Without dead ends: 1101
[2024-11-08 16:06:51,401 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12
[2024-11-08 16:06:51,401 INFO L432 NwaCegarLoop]: 402 mSDtfsCounter, 349 mSDsluCounter, 394 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 349 SdHoareTripleChecker+Valid, 796 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:51,401 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [349 Valid, 796 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 299 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 16:06:51,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states.
[2024-11-08 16:06:51,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 1101.
[2024-11-08 16:06:51,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1101 states, 1087 states have (on average 1.344986200551978) internal successors, (1462), 1087 states have internal predecessors, (1462), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:06:51,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1101 states to 1101 states and 1486 transitions.
[2024-11-08 16:06:51,433 INFO L78 Accepts]: Start accepts. Automaton has 1101 states and 1486 transitions. Word has length 348
[2024-11-08 16:06:51,434 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:51,434 INFO L471 AbstractCegarLoop]: Abstraction has 1101 states and 1486 transitions.
[2024-11-08 16:06:51,434 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 69.75) internal successors, (279), 4 states have internal predecessors, (279), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:06:51,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1101 states and 1486 transitions.
[2024-11-08 16:06:51,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351
[2024-11-08 16:06:51,437 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:51,438 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:51,438 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39
[2024-11-08 16:06:51,438 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:51,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:51,439 INFO L85 PathProgramCache]: Analyzing trace with hash 2132706902, now seen corresponding path program 1 times
[2024-11-08 16:06:51,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:51,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213364387]
[2024-11-08 16:06:51,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:51,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:52,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,841 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:53,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,844 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:53,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,846 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:06:53,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,849 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 16:06:53,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,850 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:06:53,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,852 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285
[2024-11-08 16:06:53,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:53,854 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked.
[2024-11-08 16:06:53,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:53,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213364387]
[2024-11-08 16:06:53,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213364387] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:53,855 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:53,855 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-08 16:06:53,855 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079853534]
[2024-11-08 16:06:53,855 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:53,856 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states
[2024-11-08 16:06:53,856 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:53,857 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-08 16:06:53,857 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:06:53,857 INFO L87 Difference]: Start difference. First operand 1101 states and 1486 transitions. Second operand has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:06:55,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:55,414 INFO L93 Difference]: Finished difference Result 2656 states and 3550 transitions.
[2024-11-08 16:06:55,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states.
[2024-11-08 16:06:55,415 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350
[2024-11-08 16:06:55,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:55,420 INFO L225 Difference]: With dead ends: 2656
[2024-11-08 16:06:55,420 INFO L226 Difference]: Without dead ends: 1900
[2024-11-08 16:06:55,421 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210
[2024-11-08 16:06:55,422 INFO L432 NwaCegarLoop]: 585 mSDtfsCounter, 883 mSDsluCounter, 2689 mSDsCounter, 0 mSdLazyCounter, 1521 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 884 SdHoareTripleChecker+Valid, 3274 SdHoareTripleChecker+Invalid, 1527 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1521 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:55,422 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [884 Valid, 3274 Invalid, 1527 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1521 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time]
[2024-11-08 16:06:55,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1900 states.
[2024-11-08 16:06:55,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1900 to 1253.
[2024-11-08 16:06:55,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1253 states, 1235 states have (on average 1.345748987854251) internal successors, (1662), 1235 states have internal predecessors, (1662), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)
[2024-11-08 16:06:55,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1253 states to 1253 states and 1694 transitions.
[2024-11-08 16:06:55,464 INFO L78 Accepts]: Start accepts. Automaton has 1253 states and 1694 transitions. Word has length 350
[2024-11-08 16:06:55,464 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:55,464 INFO L471 AbstractCegarLoop]: Abstraction has 1253 states and 1694 transitions.
[2024-11-08 16:06:55,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:06:55,465 INFO L276 IsEmpty]: Start isEmpty. Operand 1253 states and 1694 transitions.
[2024-11-08 16:06:55,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351
[2024-11-08 16:06:55,468 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:55,469 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:55,469 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40
[2024-11-08 16:06:55,469 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:55,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:55,470 INFO L85 PathProgramCache]: Analyzing trace with hash -306969834, now seen corresponding path program 1 times
[2024-11-08 16:06:55,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:55,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1616372652]
[2024-11-08 16:06:55,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:55,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:06:56,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,169 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:06:58,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,171 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:06:58,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,174 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:06:58,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,177 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 16:06:58,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,178 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:06:58,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,179 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285
[2024-11-08 16:06:58,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:06:58,181 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked.
[2024-11-08 16:06:58,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:06:58,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1616372652]
[2024-11-08 16:06:58,181 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1616372652] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:06:58,181 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:06:58,181 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2024-11-08 16:06:58,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1060397599]
[2024-11-08 16:06:58,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:06:58,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states
[2024-11-08 16:06:58,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:06:58,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-08 16:06:58,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90
[2024-11-08 16:06:58,184 INFO L87 Difference]: Start difference. First operand 1253 states and 1694 transitions. Second operand has 10 states, 10 states have (on average 27.7) internal successors, (277), 10 states have internal predecessors, (277), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:06:58,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:06:58,591 INFO L93 Difference]: Finished difference Result 2373 states and 3205 transitions.
[2024-11-08 16:06:58,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2024-11-08 16:06:58,591 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 27.7) internal successors, (277), 10 states have internal predecessors, (277), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350
[2024-11-08 16:06:58,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:06:58,596 INFO L225 Difference]: With dead ends: 2373
[2024-11-08 16:06:58,596 INFO L226 Difference]: Without dead ends: 1650
[2024-11-08 16:06:58,597 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156
[2024-11-08 16:06:58,598 INFO L432 NwaCegarLoop]: 828 mSDtfsCounter, 1262 mSDsluCounter, 4851 mSDsCounter, 0 mSdLazyCounter, 404 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1267 SdHoareTripleChecker+Valid, 5679 SdHoareTripleChecker+Invalid, 405 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 404 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 16:06:58,598 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1267 Valid, 5679 Invalid, 405 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 404 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 16:06:58,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1650 states.
[2024-11-08 16:06:58,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1650 to 1321.
[2024-11-08 16:06:58,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1321 states, 1300 states have (on average 1.3423076923076922) internal successors, (1745), 1300 states have internal predecessors, (1745), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19)
[2024-11-08 16:06:58,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1321 states to 1321 states and 1783 transitions.
[2024-11-08 16:06:58,639 INFO L78 Accepts]: Start accepts. Automaton has 1321 states and 1783 transitions. Word has length 350
[2024-11-08 16:06:58,639 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:06:58,639 INFO L471 AbstractCegarLoop]: Abstraction has 1321 states and 1783 transitions.
[2024-11-08 16:06:58,640 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 27.7) internal successors, (277), 10 states have internal predecessors, (277), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:06:58,640 INFO L276 IsEmpty]: Start isEmpty. Operand 1321 states and 1783 transitions.
[2024-11-08 16:06:58,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351
[2024-11-08 16:06:58,643 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:06:58,644 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:06:58,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41
[2024-11-08 16:06:58,644 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:06:58,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:06:58,645 INFO L85 PathProgramCache]: Analyzing trace with hash 852572534, now seen corresponding path program 1 times
[2024-11-08 16:06:58,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:06:58,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1001143326]
[2024-11-08 16:06:58,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:06:58,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:00,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,665 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:05,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,669 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:07:05,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,673 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:07:05,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,675 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 16:07:05,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,678 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:07:05,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,680 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285
[2024-11-08 16:07:05,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:05,685 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:05,685 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:05,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1001143326]
[2024-11-08 16:07:05,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1001143326] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:07:05,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1902667093]
[2024-11-08 16:07:05,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:05,686 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:05,687 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:07:05,688 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:07:05,691 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-08 16:07:07,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:07,257 INFO L255 TraceCheckSpWp]: Trace formula consists of 2064 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 16:07:07,269 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:07:07,379 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked.
[2024-11-08 16:07:07,379 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 16:07:07,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1902667093] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:07,380 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 16:07:07,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22
[2024-11-08 16:07:07,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957012561]
[2024-11-08 16:07:07,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:07,381 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:07:07,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:07,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:07:07,382 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=404, Unknown=0, NotChecked=0, Total=462
[2024-11-08 16:07:07,382 INFO L87 Difference]: Start difference. First operand 1321 states and 1783 transitions. Second operand has 6 states, 5 states have (on average 53.6) internal successors, (268), 6 states have internal predecessors, (268), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 16:07:07,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:07,464 INFO L93 Difference]: Finished difference Result 2358 states and 3176 transitions.
[2024-11-08 16:07:07,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:07:07,465 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 53.6) internal successors, (268), 6 states have internal predecessors, (268), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 350
[2024-11-08 16:07:07,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:07,469 INFO L225 Difference]: With dead ends: 2358
[2024-11-08 16:07:07,469 INFO L226 Difference]: Without dead ends: 1321
[2024-11-08 16:07:07,471 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 379 GetRequests, 359 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=404, Unknown=0, NotChecked=0, Total=462
[2024-11-08 16:07:07,473 INFO L432 NwaCegarLoop]: 546 mSDtfsCounter, 0 mSDsluCounter, 2165 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2711 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:07,475 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2711 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:07:07,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1321 states.
[2024-11-08 16:07:07,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1321 to 1321.
[2024-11-08 16:07:07,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1321 states, 1300 states have (on average 1.3392307692307692) internal successors, (1741), 1300 states have internal predecessors, (1741), 19 states have call successors, (19), 1 states have call predecessors, (19), 1 states have return successors, (19), 19 states have call predecessors, (19), 19 states have call successors, (19)
[2024-11-08 16:07:07,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1321 states to 1321 states and 1779 transitions.
[2024-11-08 16:07:07,514 INFO L78 Accepts]: Start accepts. Automaton has 1321 states and 1779 transitions. Word has length 350
[2024-11-08 16:07:07,514 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:07,515 INFO L471 AbstractCegarLoop]: Abstraction has 1321 states and 1779 transitions.
[2024-11-08 16:07:07,516 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 53.6) internal successors, (268), 6 states have internal predecessors, (268), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 16:07:07,516 INFO L276 IsEmpty]: Start isEmpty. Operand 1321 states and 1779 transitions.
[2024-11-08 16:07:07,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351
[2024-11-08 16:07:07,519 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:07,520 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:07,548 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0
[2024-11-08 16:07:07,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42
[2024-11-08 16:07:07,721 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:07,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:07,721 INFO L85 PathProgramCache]: Analyzing trace with hash 186116469, now seen corresponding path program 1 times
[2024-11-08 16:07:07,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:07,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772025648]
[2024-11-08 16:07:07,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:07,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:08,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,125 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46
[2024-11-08 16:07:09,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,128 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:07:09,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,130 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 16:07:09,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,133 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 16:07:09,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,135 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:07:09,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,137 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285
[2024-11-08 16:07:09,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:09,140 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:09,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:09,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772025648]
[2024-11-08 16:07:09,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772025648] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:09,141 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:07:09,141 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:07:09,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408808446]
[2024-11-08 16:07:09,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:09,142 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:07:09,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:09,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:07:09,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:07:09,143 INFO L87 Difference]: Start difference. First operand 1321 states and 1779 transitions. Second operand has 6 states, 6 states have (on average 53.833333333333336) internal successors, (323), 6 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:09,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:09,936 INFO L93 Difference]: Finished difference Result 2191 states and 2958 transitions.
[2024-11-08 16:07:09,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:07:09,937 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 53.833333333333336) internal successors, (323), 6 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350
[2024-11-08 16:07:09,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:09,941 INFO L225 Difference]: With dead ends: 2191
[2024-11-08 16:07:09,941 INFO L226 Difference]: Without dead ends: 1743
[2024-11-08 16:07:09,942 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 16:07:09,942 INFO L432 NwaCegarLoop]: 693 mSDtfsCounter, 750 mSDsluCounter, 1758 mSDsCounter, 0 mSdLazyCounter, 995 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 753 SdHoareTripleChecker+Valid, 2451 SdHoareTripleChecker+Invalid, 996 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 995 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:09,942 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [753 Valid, 2451 Invalid, 996 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 995 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 16:07:09,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1743 states.
[2024-11-08 16:07:09,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1743 to 1363.
[2024-11-08 16:07:09,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1363 states, 1341 states have (on average 1.3400447427293065) internal successors, (1797), 1341 states have internal predecessors, (1797), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20)
[2024-11-08 16:07:09,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1363 states to 1363 states and 1837 transitions.
[2024-11-08 16:07:09,985 INFO L78 Accepts]: Start accepts. Automaton has 1363 states and 1837 transitions. Word has length 350
[2024-11-08 16:07:09,986 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:09,986 INFO L471 AbstractCegarLoop]: Abstraction has 1363 states and 1837 transitions.
[2024-11-08 16:07:09,986 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 53.833333333333336) internal successors, (323), 6 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:09,986 INFO L276 IsEmpty]: Start isEmpty. Operand 1363 states and 1837 transitions.
[2024-11-08 16:07:09,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351
[2024-11-08 16:07:09,990 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:09,991 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:09,991 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43
[2024-11-08 16:07:09,991 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:09,991 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:09,992 INFO L85 PathProgramCache]: Analyzing trace with hash -1968413514, now seen corresponding path program 1 times
[2024-11-08 16:07:09,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:09,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994606619]
[2024-11-08 16:07:09,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:09,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:10,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,470 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47
[2024-11-08 16:07:11,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,474 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65
[2024-11-08 16:07:11,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,477 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 16:07:11,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,481 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253
[2024-11-08 16:07:11,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,483 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271
[2024-11-08 16:07:11,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,485 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285
[2024-11-08 16:07:11,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:11,488 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:11,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:11,489 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994606619]
[2024-11-08 16:07:11,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1994606619] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:11,489 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:07:11,490 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:07:11,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455257601]
[2024-11-08 16:07:11,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:11,491 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:07:11,491 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:11,491 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:07:11,492 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:07:11,492 INFO L87 Difference]: Start difference. First operand 1363 states and 1837 transitions. Second operand has 6 states, 6 states have (on average 53.833333333333336) internal successors, (323), 6 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:12,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:12,184 INFO L93 Difference]: Finished difference Result 1974 states and 2674 transitions.
[2024-11-08 16:07:12,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:07:12,185 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 53.833333333333336) internal successors, (323), 6 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350
[2024-11-08 16:07:12,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:12,187 INFO L225 Difference]: With dead ends: 1974
[2024-11-08 16:07:12,188 INFO L226 Difference]: Without dead ends: 1526
[2024-11-08 16:07:12,189 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 16:07:12,189 INFO L432 NwaCegarLoop]: 395 mSDtfsCounter, 720 mSDsluCounter, 1149 mSDsCounter, 0 mSdLazyCounter, 614 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 723 SdHoareTripleChecker+Valid, 1544 SdHoareTripleChecker+Invalid, 617 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 614 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:12,190 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [723 Valid, 1544 Invalid, 617 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 614 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 16:07:12,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1526 states.
[2024-11-08 16:07:12,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1526 to 1104.
[2024-11-08 16:07:12,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1104 states, 1086 states have (on average 1.347145488029466) internal successors, (1463), 1086 states have internal predecessors, (1463), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)
[2024-11-08 16:07:12,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1104 states to 1104 states and 1495 transitions.
[2024-11-08 16:07:12,226 INFO L78 Accepts]: Start accepts. Automaton has 1104 states and 1495 transitions. Word has length 350
[2024-11-08 16:07:12,226 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:12,227 INFO L471 AbstractCegarLoop]: Abstraction has 1104 states and 1495 transitions.
[2024-11-08 16:07:12,227 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 53.833333333333336) internal successors, (323), 6 states have internal predecessors, (323), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:12,227 INFO L276 IsEmpty]: Start isEmpty. Operand 1104 states and 1495 transitions.
[2024-11-08 16:07:12,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352
[2024-11-08 16:07:12,230 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:12,230 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:12,230 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44
[2024-11-08 16:07:12,230 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:12,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:12,231 INFO L85 PathProgramCache]: Analyzing trace with hash -74577809, now seen corresponding path program 1 times
[2024-11-08 16:07:12,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:12,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98955737]
[2024-11-08 16:07:12,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:12,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:12,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,077 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:13,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,080 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 16:07:13,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,083 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 16:07:13,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,089 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 16:07:13,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,091 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 16:07:13,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,093 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286
[2024-11-08 16:07:13,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:13,095 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked.
[2024-11-08 16:07:13,095 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:13,095 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98955737]
[2024-11-08 16:07:13,096 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [98955737] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:13,096 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:07:13,096 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 16:07:13,096 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688936122]
[2024-11-08 16:07:13,096 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:13,097 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:07:13,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:13,098 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:07:13,098 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:07:13,098 INFO L87 Difference]: Start difference. First operand 1104 states and 1495 transitions. Second operand has 6 states, 6 states have (on average 46.666666666666664) internal successors, (280), 6 states have internal predecessors, (280), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:13,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:13,605 INFO L93 Difference]: Finished difference Result 1843 states and 2492 transitions.
[2024-11-08 16:07:13,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:07:13,605 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 46.666666666666664) internal successors, (280), 6 states have internal predecessors, (280), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351
[2024-11-08 16:07:13,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:13,607 INFO L225 Difference]: With dead ends: 1843
[2024-11-08 16:07:13,607 INFO L226 Difference]: Without dead ends: 1136
[2024-11-08 16:07:13,609 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 16:07:13,609 INFO L432 NwaCegarLoop]: 399 mSDtfsCounter, 506 mSDsluCounter, 1184 mSDsCounter, 0 mSdLazyCounter, 630 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 506 SdHoareTripleChecker+Valid, 1583 SdHoareTripleChecker+Invalid, 631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 630 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:13,610 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [506 Valid, 1583 Invalid, 631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 630 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 16:07:13,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1136 states.
[2024-11-08 16:07:13,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1136 to 1120.
[2024-11-08 16:07:13,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1120 states, 1102 states have (on average 1.3421052631578947) internal successors, (1479), 1102 states have internal predecessors, (1479), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16)
[2024-11-08 16:07:13,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1120 states to 1120 states and 1511 transitions.
[2024-11-08 16:07:13,642 INFO L78 Accepts]: Start accepts. Automaton has 1120 states and 1511 transitions. Word has length 351
[2024-11-08 16:07:13,643 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:13,643 INFO L471 AbstractCegarLoop]: Abstraction has 1120 states and 1511 transitions.
[2024-11-08 16:07:13,643 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 46.666666666666664) internal successors, (280), 6 states have internal predecessors, (280), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:13,643 INFO L276 IsEmpty]: Start isEmpty. Operand 1120 states and 1511 transitions.
[2024-11-08 16:07:13,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352
[2024-11-08 16:07:13,646 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:13,646 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:13,647 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45
[2024-11-08 16:07:13,647 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:13,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:13,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1507140027, now seen corresponding path program 1 times
[2024-11-08 16:07:13,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:13,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169138536]
[2024-11-08 16:07:13,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:13,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:14,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,650 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:19,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,653 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:07:19,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,656 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 16:07:19,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,659 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254
[2024-11-08 16:07:19,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,662 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272
[2024-11-08 16:07:19,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,664 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286
[2024-11-08 16:07:19,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:19,668 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 50 proven. 39 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:19,668 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:19,668 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169138536]
[2024-11-08 16:07:19,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169138536] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:07:19,668 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [374281404]
[2024-11-08 16:07:19,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:19,669 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:19,669 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:07:19,672 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:07:19,674 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2024-11-08 16:07:21,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:21,447 INFO L255 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 20 conjuncts are in the unsatisfiable core
[2024-11-08 16:07:21,453 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:07:21,780 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked.
[2024-11-08 16:07:21,781 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 16:07:21,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [374281404] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:21,781 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 16:07:21,781 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [20] total 26
[2024-11-08 16:07:21,781 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463354210]
[2024-11-08 16:07:21,781 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:21,782 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 16:07:21,782 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:21,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 16:07:21,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=581, Unknown=0, NotChecked=0, Total=650
[2024-11-08 16:07:21,783 INFO L87 Difference]: Start difference. First operand 1120 states and 1511 transitions. Second operand has 8 states, 8 states have (on average 40.5) internal successors, (324), 8 states have internal predecessors, (324), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:22,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:22,419 INFO L93 Difference]: Finished difference Result 2346 states and 3164 transitions.
[2024-11-08 16:07:22,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2024-11-08 16:07:22,420 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 40.5) internal successors, (324), 8 states have internal predecessors, (324), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351
[2024-11-08 16:07:22,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:22,425 INFO L225 Difference]: With dead ends: 2346
[2024-11-08 16:07:22,425 INFO L226 Difference]: Without dead ends: 1749
[2024-11-08 16:07:22,427 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 359 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=675, Unknown=0, NotChecked=0, Total=756
[2024-11-08 16:07:22,428 INFO L432 NwaCegarLoop]: 395 mSDtfsCounter, 1690 mSDsluCounter, 1466 mSDsCounter, 0 mSdLazyCounter, 755 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1696 SdHoareTripleChecker+Valid, 1861 SdHoareTripleChecker+Invalid, 758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 755 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:22,429 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1696 Valid, 1861 Invalid, 758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 755 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 16:07:22,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1749 states.
[2024-11-08 16:07:22,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1749 to 1555.
[2024-11-08 16:07:22,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1555 states, 1525 states have (on average 1.3265573770491803) internal successors, (2023), 1525 states have internal predecessors, (2023), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 16:07:22,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1555 states to 1555 states and 2079 transitions.
[2024-11-08 16:07:22,481 INFO L78 Accepts]: Start accepts. Automaton has 1555 states and 2079 transitions. Word has length 351
[2024-11-08 16:07:22,483 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:22,484 INFO L471 AbstractCegarLoop]: Abstraction has 1555 states and 2079 transitions.
[2024-11-08 16:07:22,484 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 40.5) internal successors, (324), 8 states have internal predecessors, (324), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 16:07:22,484 INFO L276 IsEmpty]: Start isEmpty. Operand 1555 states and 2079 transitions.
[2024-11-08 16:07:22,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353
[2024-11-08 16:07:22,489 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:22,490 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:22,518 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0
[2024-11-08 16:07:22,690 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:22,693 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:22,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:22,693 INFO L85 PathProgramCache]: Analyzing trace with hash -432178302, now seen corresponding path program 1 times
[2024-11-08 16:07:22,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:22,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889608290]
[2024-11-08 16:07:22,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:22,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:24,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,967 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:28,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,970 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:07:28,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,972 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 16:07:28,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,975 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255
[2024-11-08 16:07:28,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,979 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273
[2024-11-08 16:07:28,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,983 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287
[2024-11-08 16:07:28,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:28,989 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 51 proven. 39 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:28,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:28,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889608290]
[2024-11-08 16:07:28,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1889608290] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:07:28,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [359846113]
[2024-11-08 16:07:28,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:28,990 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:28,990 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:07:28,992 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:07:28,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-08 16:07:31,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:31,084 INFO L255 TraceCheckSpWp]: Trace formula consists of 2068 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 16:07:31,089 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:07:31,190 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked.
[2024-11-08 16:07:31,191 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 16:07:31,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [359846113] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:31,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 16:07:31,191 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22
[2024-11-08 16:07:31,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2005161552]
[2024-11-08 16:07:31,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:31,192 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:07:31,192 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:31,193 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:07:31,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462
[2024-11-08 16:07:31,193 INFO L87 Difference]: Start difference. First operand 1555 states and 2079 transitions. Second operand has 6 states, 5 states have (on average 60.4) internal successors, (302), 6 states have internal predecessors, (302), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 16:07:31,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:31,297 INFO L93 Difference]: Finished difference Result 2595 states and 3464 transitions.
[2024-11-08 16:07:31,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:07:31,297 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 60.4) internal successors, (302), 6 states have internal predecessors, (302), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 352
[2024-11-08 16:07:31,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:31,301 INFO L225 Difference]: With dead ends: 2595
[2024-11-08 16:07:31,302 INFO L226 Difference]: Without dead ends: 1555
[2024-11-08 16:07:31,305 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 361 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462
[2024-11-08 16:07:31,306 INFO L432 NwaCegarLoop]: 545 mSDtfsCounter, 0 mSDsluCounter, 2161 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2706 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:31,306 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2706 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:07:31,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1555 states.
[2024-11-08 16:07:31,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1555 to 1555.
[2024-11-08 16:07:31,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1555 states, 1525 states have (on average 1.3173770491803278) internal successors, (2009), 1525 states have internal predecessors, (2009), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 16:07:31,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1555 states to 1555 states and 2065 transitions.
[2024-11-08 16:07:31,362 INFO L78 Accepts]: Start accepts. Automaton has 1555 states and 2065 transitions. Word has length 352
[2024-11-08 16:07:31,362 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:31,362 INFO L471 AbstractCegarLoop]: Abstraction has 1555 states and 2065 transitions.
[2024-11-08 16:07:31,363 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 60.4) internal successors, (302), 6 states have internal predecessors, (302), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 16:07:31,363 INFO L276 IsEmpty]: Start isEmpty. Operand 1555 states and 2065 transitions.
[2024-11-08 16:07:31,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355
[2024-11-08 16:07:31,367 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:31,367 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:31,398 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0
[2024-11-08 16:07:31,567 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:31,568 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:31,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:31,568 INFO L85 PathProgramCache]: Analyzing trace with hash 1506443438, now seen corresponding path program 1 times
[2024-11-08 16:07:31,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:31,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [343901975]
[2024-11-08 16:07:31,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:31,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:32,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,902 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:33,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,905 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:07:33,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,908 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 16:07:33,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,911 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 16:07:33,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,912 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 16:07:33,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,913 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288
[2024-11-08 16:07:33,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:33,915 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:33,915 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:33,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [343901975]
[2024-11-08 16:07:33,916 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [343901975] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:33,916 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:07:33,916 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-08 16:07:33,916 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861879306]
[2024-11-08 16:07:33,916 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:33,917 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states
[2024-11-08 16:07:33,917 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:33,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-08 16:07:33,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:07:33,918 INFO L87 Difference]: Start difference. First operand 1555 states and 2065 transitions. Second operand has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:07:34,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:34,969 INFO L93 Difference]: Finished difference Result 2766 states and 3672 transitions.
[2024-11-08 16:07:34,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2024-11-08 16:07:34,970 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 354
[2024-11-08 16:07:34,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:34,973 INFO L225 Difference]: With dead ends: 2766
[2024-11-08 16:07:34,973 INFO L226 Difference]: Without dead ends: 2203
[2024-11-08 16:07:34,974 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156
[2024-11-08 16:07:34,974 INFO L432 NwaCegarLoop]: 589 mSDtfsCounter, 822 mSDsluCounter, 2693 mSDsCounter, 0 mSdLazyCounter, 1483 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 823 SdHoareTripleChecker+Valid, 3282 SdHoareTripleChecker+Invalid, 1487 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 1483 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:34,975 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [823 Valid, 3282 Invalid, 1487 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 1483 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time]
[2024-11-08 16:07:34,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2203 states.
[2024-11-08 16:07:35,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2203 to 1955.
[2024-11-08 16:07:35,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1955 states, 1925 states have (on average 1.305974025974026) internal successors, (2514), 1925 states have internal predecessors, (2514), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 16:07:35,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1955 states to 1955 states and 2570 transitions.
[2024-11-08 16:07:35,027 INFO L78 Accepts]: Start accepts. Automaton has 1955 states and 2570 transitions. Word has length 354
[2024-11-08 16:07:35,027 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:35,028 INFO L471 AbstractCegarLoop]: Abstraction has 1955 states and 2570 transitions.
[2024-11-08 16:07:35,028 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:07:35,028 INFO L276 IsEmpty]: Start isEmpty. Operand 1955 states and 2570 transitions.
[2024-11-08 16:07:35,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355
[2024-11-08 16:07:35,032 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:35,032 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:35,033 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48
[2024-11-08 16:07:35,033 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:35,033 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:35,033 INFO L85 PathProgramCache]: Analyzing trace with hash -786446861, now seen corresponding path program 1 times
[2024-11-08 16:07:35,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:35,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587978839]
[2024-11-08 16:07:35,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:35,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:36,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,782 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:38,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,785 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:07:38,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,787 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 16:07:38,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,789 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 16:07:38,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,790 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 16:07:38,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,792 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288
[2024-11-08 16:07:38,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:38,794 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:38,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:38,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587978839]
[2024-11-08 16:07:38,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1587978839] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:07:38,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [369324302]
[2024-11-08 16:07:38,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:38,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:38,795 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:07:38,796 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:07:38,797 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2024-11-08 16:07:41,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:41,487 INFO L255 TraceCheckSpWp]: Trace formula consists of 2074 conjuncts, 121 conjuncts are in the unsatisfiable core
[2024-11-08 16:07:41,498 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:07:43,958 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 121 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 16:07:43,958 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:07:46,231 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 84 proven. 5 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:46,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [369324302] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 16:07:46,231 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 16:07:46,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 34
[2024-11-08 16:07:46,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1437949058]
[2024-11-08 16:07:46,232 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 16:07:46,233 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 34 states
[2024-11-08 16:07:46,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:46,234 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants.
[2024-11-08 16:07:46,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=985, Unknown=0, NotChecked=0, Total=1122
[2024-11-08 16:07:46,235 INFO L87 Difference]: Start difference. First operand 1955 states and 2570 transitions. Second operand has 34 states, 34 states have (on average 26.08823529411765) internal successors, (887), 34 states have internal predecessors, (887), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 16:07:49,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:49,289 INFO L93 Difference]: Finished difference Result 3997 states and 5171 transitions.
[2024-11-08 16:07:49,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states.
[2024-11-08 16:07:49,290 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 26.08823529411765) internal successors, (887), 34 states have internal predecessors, (887), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 354
[2024-11-08 16:07:49,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:49,294 INFO L225 Difference]: With dead ends: 3997
[2024-11-08 16:07:49,294 INFO L226 Difference]: Without dead ends: 2245
[2024-11-08 16:07:49,297 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 752 GetRequests, 700 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 609 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=364, Invalid=2288, Unknown=0, NotChecked=0, Total=2652
[2024-11-08 16:07:49,298 INFO L432 NwaCegarLoop]: 467 mSDtfsCounter, 2701 mSDsluCounter, 7974 mSDsCounter, 0 mSdLazyCounter, 4687 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2701 SdHoareTripleChecker+Valid, 8441 SdHoareTripleChecker+Invalid, 4710 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 4687 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:49,298 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2701 Valid, 8441 Invalid, 4710 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 4687 Invalid, 0 Unknown, 0 Unchecked, 2.5s Time]
[2024-11-08 16:07:49,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2245 states.
[2024-11-08 16:07:49,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2245 to 1983.
[2024-11-08 16:07:49,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1983 states, 1953 states have (on average 1.3036354326676907) internal successors, (2546), 1953 states have internal predecessors, (2546), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 16:07:49,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1983 states to 1983 states and 2602 transitions.
[2024-11-08 16:07:49,353 INFO L78 Accepts]: Start accepts. Automaton has 1983 states and 2602 transitions. Word has length 354
[2024-11-08 16:07:49,354 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:49,354 INFO L471 AbstractCegarLoop]: Abstraction has 1983 states and 2602 transitions.
[2024-11-08 16:07:49,355 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 26.08823529411765) internal successors, (887), 34 states have internal predecessors, (887), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 16:07:49,355 INFO L276 IsEmpty]: Start isEmpty. Operand 1983 states and 2602 transitions.
[2024-11-08 16:07:49,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356
[2024-11-08 16:07:49,359 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:49,359 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:49,389 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0
[2024-11-08 16:07:49,559 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49
[2024-11-08 16:07:49,560 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:49,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:49,561 INFO L85 PathProgramCache]: Analyzing trace with hash 1777875976, now seen corresponding path program 1 times
[2024-11-08 16:07:49,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:49,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517861671]
[2024-11-08 16:07:49,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:49,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:50,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,310 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:07:52,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,313 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:07:52,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,315 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 16:07:52,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,317 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256
[2024-11-08 16:07:52,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,319 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274
[2024-11-08 16:07:52,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,322 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288
[2024-11-08 16:07:52,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:52,327 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 2 proven. 85 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:07:52,327 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:07:52,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1517861671]
[2024-11-08 16:07:52,328 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1517861671] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:07:52,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [995206248]
[2024-11-08 16:07:52,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:52,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:52,328 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:07:52,330 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:07:52,332 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-08 16:07:54,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:07:54,759 INFO L255 TraceCheckSpWp]: Trace formula consists of 2075 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 16:07:54,766 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:07:54,835 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 122 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked.
[2024-11-08 16:07:54,835 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 16:07:54,835 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [995206248] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:07:54,835 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 16:07:54,836 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 14
[2024-11-08 16:07:54,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422842408]
[2024-11-08 16:07:54,836 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:07:54,837 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 16:07:54,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:07:54,837 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 16:07:54,838 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182
[2024-11-08 16:07:54,838 INFO L87 Difference]: Start difference. First operand 1983 states and 2602 transitions. Second operand has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:07:54,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:07:54,929 INFO L93 Difference]: Finished difference Result 3729 states and 4873 transitions.
[2024-11-08 16:07:54,929 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2024-11-08 16:07:54,930 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355
[2024-11-08 16:07:54,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:07:54,935 INFO L225 Difference]: With dead ends: 3729
[2024-11-08 16:07:54,935 INFO L226 Difference]: Without dead ends: 1983
[2024-11-08 16:07:54,937 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 378 GetRequests, 366 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=156, Unknown=0, NotChecked=0, Total=182
[2024-11-08 16:07:54,938 INFO L432 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:07:54,938 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:07:54,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1983 states.
[2024-11-08 16:07:54,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1983 to 1983.
[2024-11-08 16:07:54,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1983 states, 1953 states have (on average 1.3000512032770097) internal successors, (2539), 1953 states have internal predecessors, (2539), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28)
[2024-11-08 16:07:54,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1983 states to 1983 states and 2595 transitions.
[2024-11-08 16:07:54,991 INFO L78 Accepts]: Start accepts. Automaton has 1983 states and 2595 transitions. Word has length 355
[2024-11-08 16:07:54,992 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:07:54,992 INFO L471 AbstractCegarLoop]: Abstraction has 1983 states and 2595 transitions.
[2024-11-08 16:07:54,992 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:07:54,992 INFO L276 IsEmpty]: Start isEmpty. Operand 1983 states and 2595 transitions.
[2024-11-08 16:07:54,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357
[2024-11-08 16:07:54,997 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:07:54,997 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:07:55,026 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0
[2024-11-08 16:07:55,197 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:07:55,198 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:07:55,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:07:55,199 INFO L85 PathProgramCache]: Analyzing trace with hash -515575947, now seen corresponding path program 1 times
[2024-11-08 16:07:55,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:07:55,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35848345]
[2024-11-08 16:07:55,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:07:55,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:07:56,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,217 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:08:00,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,221 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:08:00,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,224 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 16:08:00,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 16:08:00,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,230 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275
[2024-11-08 16:08:00,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,233 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289
[2024-11-08 16:08:00,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:00,237 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 51 proven. 37 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:08:00,237 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:08:00,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [35848345]
[2024-11-08 16:08:00,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [35848345] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:08:00,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [964011419]
[2024-11-08 16:08:00,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:08:00,238 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:08:00,238 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:08:00,240 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:08:00,243 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process
[2024-11-08 16:08:02,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:02,451 INFO L255 TraceCheckSpWp]: Trace formula consists of 2078 conjuncts, 95 conjuncts are in the unsatisfiable core
[2024-11-08 16:08:02,461 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:08:05,081 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 5 proven. 98 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 16:08:05,081 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:08:11,066 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 5 proven. 98 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 16:08:11,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [964011419] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 16:08:11,066 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 16:08:11,066 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 25, 23] total 61
[2024-11-08 16:08:11,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1181949565]
[2024-11-08 16:08:11,067 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 16:08:11,067 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 61 states
[2024-11-08 16:08:11,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:08:11,068 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants.
[2024-11-08 16:08:11,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=329, Invalid=3331, Unknown=0, NotChecked=0, Total=3660
[2024-11-08 16:08:11,070 INFO L87 Difference]: Start difference. First operand 1983 states and 2595 transitions. Second operand has 61 states, 59 states have (on average 16.54237288135593) internal successors, (976), 61 states have internal predecessors, (976), 10 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 8 states have call predecessors, (18), 10 states have call successors, (18)
[2024-11-08 16:08:38,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:08:38,299 INFO L93 Difference]: Finished difference Result 14235 states and 18300 transitions.
[2024-11-08 16:08:38,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 232 states.
[2024-11-08 16:08:38,300 INFO L78 Accepts]: Start accepts. Automaton has has 61 states, 59 states have (on average 16.54237288135593) internal successors, (976), 61 states have internal predecessors, (976), 10 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 8 states have call predecessors, (18), 10 states have call successors, (18) Word has length 356
[2024-11-08 16:08:38,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:08:38,325 INFO L225 Difference]: With dead ends: 14235
[2024-11-08 16:08:38,325 INFO L226 Difference]: Without dead ends: 12839
[2024-11-08 16:08:38,342 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 962 GetRequests, 682 SyntacticMatches, 0 SemanticMatches, 280 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27459 ImplicationChecksByTransitivity, 12.9s TimeCoverageRelationStatistics Valid=6781, Invalid=72461, Unknown=0, NotChecked=0, Total=79242
[2024-11-08 16:08:38,343 INFO L432 NwaCegarLoop]: 929 mSDtfsCounter, 8683 mSDsluCounter, 30270 mSDsCounter, 0 mSdLazyCounter, 21075 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 12.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8689 SdHoareTripleChecker+Valid, 31199 SdHoareTripleChecker+Invalid, 21137 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 21075 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 14.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:08:38,344 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [8689 Valid, 31199 Invalid, 21137 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [62 Valid, 21075 Invalid, 0 Unknown, 0 Unchecked, 14.5s Time]
[2024-11-08 16:08:38,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12839 states.
[2024-11-08 16:08:38,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12839 to 4700.
[2024-11-08 16:08:38,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4700 states, 4628 states have (on average 1.2847882454624027) internal successors, (5946), 4628 states have internal predecessors, (5946), 70 states have call successors, (70), 1 states have call predecessors, (70), 1 states have return successors, (70), 70 states have call predecessors, (70), 70 states have call successors, (70)
[2024-11-08 16:08:38,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4700 states to 4700 states and 6086 transitions.
[2024-11-08 16:08:38,541 INFO L78 Accepts]: Start accepts. Automaton has 4700 states and 6086 transitions. Word has length 356
[2024-11-08 16:08:38,542 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:08:38,543 INFO L471 AbstractCegarLoop]: Abstraction has 4700 states and 6086 transitions.
[2024-11-08 16:08:38,543 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 61 states, 59 states have (on average 16.54237288135593) internal successors, (976), 61 states have internal predecessors, (976), 10 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 8 states have call predecessors, (18), 10 states have call successors, (18)
[2024-11-08 16:08:38,543 INFO L276 IsEmpty]: Start isEmpty. Operand 4700 states and 6086 transitions.
[2024-11-08 16:08:38,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358
[2024-11-08 16:08:38,553 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:08:38,554 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:08:38,590 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0
[2024-11-08 16:08:38,754 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:08:38,756 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:08:38,757 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:08:38,757 INFO L85 PathProgramCache]: Analyzing trace with hash 990522145, now seen corresponding path program 1 times
[2024-11-08 16:08:38,757 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:08:38,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791905292]
[2024-11-08 16:08:38,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:08:38,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:08:40,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,462 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45
[2024-11-08 16:08:41,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,465 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64
[2024-11-08 16:08:41,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,467 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 16:08:41,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,469 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257
[2024-11-08 16:08:41,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,470 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276
[2024-11-08 16:08:41,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,472 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290
[2024-11-08 16:08:41,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:41,474 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked.
[2024-11-08 16:08:41,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 16:08:41,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791905292]
[2024-11-08 16:08:41,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1791905292] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:08:41,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727752342]
[2024-11-08 16:08:41,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:08:41,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:08:41,475 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:08:41,476 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:08:41,478 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process
[2024-11-08 16:08:44,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:08:44,887 INFO L255 TraceCheckSpWp]: Trace formula consists of 2081 conjuncts, 57 conjuncts are in the unsatisfiable core
[2024-11-08 16:08:44,898 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:08:46,507 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 119 proven. 7 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 16:08:46,507 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:08:49,005 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 85 proven. 5 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 16:08:49,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727752342] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 16:08:49,006 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 16:08:49,006 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 10, 11] total 22
[2024-11-08 16:08:49,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [151984130]
[2024-11-08 16:08:49,006 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 16:08:49,007 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states
[2024-11-08 16:08:49,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 16:08:49,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants.
[2024-11-08 16:08:49,008 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=367, Unknown=0, NotChecked=0, Total=462
[2024-11-08 16:08:49,009 INFO L87 Difference]: Start difference. First operand 4700 states and 6086 transitions. Second operand has 22 states, 22 states have (on average 34.81818181818182) internal successors, (766), 22 states have internal predecessors, (766), 5 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15)
[2024-11-08 16:08:50,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:08:50,939 INFO L93 Difference]: Finished difference Result 9968 states and 12900 transitions.
[2024-11-08 16:08:50,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states.
[2024-11-08 16:08:50,940 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 34.81818181818182) internal successors, (766), 22 states have internal predecessors, (766), 5 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) Word has length 357
[2024-11-08 16:08:50,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:08:50,949 INFO L225 Difference]: With dead ends: 9968
[2024-11-08 16:08:50,949 INFO L226 Difference]: Without dead ends: 5573
[2024-11-08 16:08:50,955 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 742 GetRequests, 712 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=210, Invalid=782, Unknown=0, NotChecked=0, Total=992
[2024-11-08 16:08:50,956 INFO L432 NwaCegarLoop]: 376 mSDtfsCounter, 747 mSDsluCounter, 3984 mSDsCounter, 0 mSdLazyCounter, 2001 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 747 SdHoareTripleChecker+Valid, 4360 SdHoareTripleChecker+Invalid, 2005 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 2001 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time
[2024-11-08 16:08:50,956 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [747 Valid, 4360 Invalid, 2005 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 2001 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time]
[2024-11-08 16:08:50,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5573 states.
[2024-11-08 16:08:51,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5573 to 4658.
[2024-11-08 16:08:51,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4658 states, 4586 states have (on average 1.2839075447012647) internal successors, (5888), 4586 states have internal predecessors, (5888), 70 states have call successors, (70), 1 states have call predecessors, (70), 1 states have return successors, (70), 70 states have call predecessors, (70), 70 states have call successors, (70)
[2024-11-08 16:08:51,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4658 states to 4658 states and 6028 transitions.
[2024-11-08 16:08:51,107 INFO L78 Accepts]: Start accepts. Automaton has 4658 states and 6028 transitions. Word has length 357
[2024-11-08 16:08:51,108 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:08:51,108 INFO L471 AbstractCegarLoop]: Abstraction has 4658 states and 6028 transitions.
[2024-11-08 16:08:51,109 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 34.81818181818182) internal successors, (766), 22 states have internal predecessors, (766), 5 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15)
[2024-11-08 16:08:51,109 INFO L276 IsEmpty]: Start isEmpty. Operand 4658 states and 6028 transitions.
[2024-11-08 16:08:51,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358
[2024-11-08 16:08:51,119 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:08:51,119 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:08:51,158 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0
[2024-11-08 16:08:51,320 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:08:51,320 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:08:51,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:08:51,321 INFO L85 PathProgramCache]: Analyzing trace with hash 1686665257, now seen corresponding path program 1 times
[2024-11-08 16:08:51,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 16:08:51,321 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235703891]
[2024-11-08 16:08:51,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:08:51,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 16:08:54,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-08 16:08:54,277 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-08 16:08:56,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-08 16:08:57,109 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-08 16:08:57,109 INFO L325 BasicCegarLoop]: Counterexample is feasible
[2024-11-08 16:08:57,111 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining)
[2024-11-08 16:08:57,113 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53
[2024-11-08 16:08:57,117 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:08:57,351 WARN L290 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null
[2024-11-08 16:08:57,352 WARN L290 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null
[2024-11-08 16:08:57,430 INFO L170 ceAbstractionStarter]: Computing trace abstraction results
[2024-11-08 16:08:57,439 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.11 04:08:57 BoogieIcfgContainer
[2024-11-08 16:08:57,439 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2024-11-08 16:08:57,440 INFO L112 PluginConnector]: ------------------------Witness Printer----------------------------
[2024-11-08 16:08:57,440 INFO L270 PluginConnector]: Initializing Witness Printer...
[2024-11-08 16:08:57,441 INFO L274 PluginConnector]: Witness Printer initialized
[2024-11-08 16:08:57,441 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:05:40" (3/4) ...
[2024-11-08 16:08:57,447 INFO L145 WitnessPrinter]: No result that supports witness generation found
[2024-11-08 16:08:57,448 INFO L131 PluginConnector]: ------------------------ END Witness Printer----------------------------
[2024-11-08 16:08:57,449 INFO L158 Benchmark]: Toolchain (without parser) took 200571.80ms. Allocated memory was 167.8MB in the beginning and 1.8GB in the end (delta: 1.7GB). Free memory was 125.8MB in the beginning and 776.7MB in the end (delta: -650.9MB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB.
[2024-11-08 16:08:57,450 INFO L158 Benchmark]: CDTParser took 0.38ms. Allocated memory is still 111.1MB. Free memory is still 57.8MB. There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 16:08:57,450 INFO L158 Benchmark]: CACSL2BoogieTranslator took 739.99ms. Allocated memory is still 167.8MB. Free memory was 125.3MB in the beginning and 94.2MB in the end (delta: 31.1MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB.
[2024-11-08 16:08:57,451 INFO L158 Benchmark]: Boogie Procedure Inliner took 215.19ms. Allocated memory is still 167.8MB. Free memory was 94.2MB in the beginning and 108.9MB in the end (delta: -14.7MB). Peak memory consumption was 11.7MB. Max. memory is 16.1GB.
[2024-11-08 16:08:57,451 INFO L158 Benchmark]: Boogie Preprocessor took 274.48ms. Allocated memory is still 167.8MB. Free memory was 108.9MB in the beginning and 93.2MB in the end (delta: 15.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB.
[2024-11-08 16:08:57,452 INFO L158 Benchmark]: RCFGBuilder took 2660.86ms. Allocated memory was 167.8MB in the beginning and 247.5MB in the end (delta: 79.7MB). Free memory was 93.2MB in the beginning and 174.0MB in the end (delta: -80.8MB). Peak memory consumption was 67.1MB. Max. memory is 16.1GB.
[2024-11-08 16:08:57,452 INFO L158 Benchmark]: TraceAbstraction took 196665.00ms. Allocated memory was 247.5MB in the beginning and 1.8GB in the end (delta: 1.6GB). Free memory was 174.0MB in the beginning and 776.7MB in the end (delta: -602.7MB). Peak memory consumption was 974.4MB. Max. memory is 16.1GB.
[2024-11-08 16:08:57,455 INFO L158 Benchmark]: Witness Printer took 8.54ms. Allocated memory is still 1.8GB. Free memory is still 776.7MB. There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 16:08:57,456 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.38ms. Allocated memory is still 111.1MB. Free memory is still 57.8MB. There was no memory consumed. Max. memory is 16.1GB.
* CACSL2BoogieTranslator took 739.99ms. Allocated memory is still 167.8MB. Free memory was 125.3MB in the beginning and 94.2MB in the end (delta: 31.1MB). Peak memory consumption was 31.5MB. Max. memory is 16.1GB.
* Boogie Procedure Inliner took 215.19ms. Allocated memory is still 167.8MB. Free memory was 94.2MB in the beginning and 108.9MB in the end (delta: -14.7MB). Peak memory consumption was 11.7MB. Max. memory is 16.1GB.
* Boogie Preprocessor took 274.48ms. Allocated memory is still 167.8MB. Free memory was 108.9MB in the beginning and 93.2MB in the end (delta: 15.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB.
* RCFGBuilder took 2660.86ms. Allocated memory was 167.8MB in the beginning and 247.5MB in the end (delta: 79.7MB). Free memory was 93.2MB in the beginning and 174.0MB in the end (delta: -80.8MB). Peak memory consumption was 67.1MB. Max. memory is 16.1GB.
* TraceAbstraction took 196665.00ms. Allocated memory was 247.5MB in the beginning and 1.8GB in the end (delta: 1.6GB). Free memory was 174.0MB in the beginning and 776.7MB in the end (delta: -602.7MB). Peak memory consumption was 974.4MB. Max. memory is 16.1GB.
* Witness Printer took 8.54ms. Allocated memory is still 1.8GB. Free memory is still 776.7MB. There was no memory consumed. Max. memory is 16.1GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- StatisticsResult: ErrorAutomatonStatistics
NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0
- UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable
Unable to prove that a call to reach_error is unreachable
Reason: overapproximation of bitwiseOr at line 290, overapproximation of bitwiseAnd at line 299.
Possible FailurePath:
[L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1);
[L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1);
[L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32);
[L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1);
[L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5);
[L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1);
[L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4);
[L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1);
[L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3);
[L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1);
[L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2);
[L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1);
[L44] const SORT_13 var_15 = 8;
[L45] const SORT_19 var_20 = 7;
[L46] const SORT_19 var_25 = 6;
[L47] const SORT_19 var_30 = 5;
[L48] const SORT_19 var_35 = 4;
[L49] const SORT_40 var_41 = 3;
[L50] const SORT_40 var_46 = 2;
[L51] const SORT_1 var_51 = 1;
[L52] const SORT_13 var_64 = 9;
[L53] const SORT_11 var_81 = 0;
[L54] const SORT_1 var_111 = 0;
[L55] const SORT_3 var_268 = 0;
[L57] SORT_1 input_2;
[L58] SORT_3 input_4;
[L59] SORT_1 input_5;
[L60] SORT_1 input_6;
[L61] SORT_1 input_7;
[L62] SORT_1 input_8;
[L63] SORT_3 input_9;
[L64] SORT_1 input_109;
[L66] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L66] SORT_3 state_10 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L68] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L68] SORT_3 state_18 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L69] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L69] SORT_3 state_24 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L70] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L70] SORT_3 state_29 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L71] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L71] SORT_3 state_34 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L72] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L72] SORT_3 state_39 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L73] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L73] SORT_3 state_45 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L74] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L74] SORT_3 state_50 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L75] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L75] SORT_3 state_55 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L80] EXPR __VERIFIER_nondet_uint() & mask_SORT_3
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L80] SORT_3 state_87 = __VERIFIER_nondet_uint() & mask_SORT_3;
[L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L84] SORT_1 init_92_arg_1 = var_51;
[L85] state_91 = init_92_arg_1
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L88] input_2 = __VERIFIER_nondet_uchar()
[L89] input_4 = __VERIFIER_nondet_uint()
[L90] input_5 = __VERIFIER_nondet_uchar()
[L91] input_6 = __VERIFIER_nondet_uchar()
[L92] input_7 = __VERIFIER_nondet_uchar()
[L93] EXPR input_7 & mask_SORT_1
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L93] input_7 = input_7 & mask_SORT_1
[L94] input_8 = __VERIFIER_nondet_uchar()
[L95] input_9 = __VERIFIER_nondet_uint()
[L96] input_109 = __VERIFIER_nondet_uchar()
[L98] SORT_1 var_93_arg_0 = input_7;
[L99] SORT_1 var_93_arg_1 = state_91;
[L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1;
[L101] SORT_1 var_94_arg_0 = var_51;
[L102] SORT_1 var_94 = ~var_94_arg_0;
[L103] SORT_1 var_95_arg_0 = var_93;
[L104] SORT_1 var_95_arg_1 = var_94;
VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2]
[L105] EXPR var_95_arg_0 | var_95_arg_1
VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1;
[L106] EXPR var_95 & mask_SORT_1
VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L106] var_95 = var_95 & mask_SORT_1
[L107] SORT_1 constr_96_arg_0 = var_95;
VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L108] CALL assume_abort_if_not(constr_96_arg_0)
VAL [\old(cond)=1]
[L22] COND FALSE !(!cond)
VAL [\old(cond)=1]
[L108] RET assume_abort_if_not(constr_96_arg_0)
VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L109] SORT_13 var_65_arg_0 = var_64;
VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0]
[L110] EXPR var_65_arg_0 & mask_SORT_13
VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13
[L111] SORT_11 var_65 = var_65_arg_0;
[L112] SORT_11 var_66_arg_0 = state_60;
[L113] SORT_11 var_66_arg_1 = var_65;
[L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1;
[L115] SORT_1 var_97_arg_0 = var_66;
[L116] SORT_1 var_97 = ~var_97_arg_0;
[L117] SORT_1 var_98_arg_0 = input_6;
[L118] SORT_1 var_98 = ~var_98_arg_0;
[L119] SORT_1 var_99_arg_0 = var_97;
[L120] SORT_1 var_99_arg_1 = var_98;
VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1]
[L121] EXPR var_99_arg_0 | var_99_arg_1
VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1;
[L122] SORT_1 var_100_arg_0 = var_51;
[L123] SORT_1 var_100 = ~var_100_arg_0;
[L124] SORT_1 var_101_arg_0 = var_99;
[L125] SORT_1 var_101_arg_1 = var_100;
VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L126] EXPR var_101_arg_0 | var_101_arg_1
VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1;
[L127] EXPR var_101 & mask_SORT_1
VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L127] var_101 = var_101 & mask_SORT_1
[L128] SORT_1 constr_102_arg_0 = var_101;
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L129] CALL assume_abort_if_not(constr_102_arg_0)
VAL [\old(cond)=1]
[L22] COND FALSE !(!cond)
VAL [\old(cond)=1]
[L129] RET assume_abort_if_not(constr_102_arg_0)
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L130] SORT_11 var_61_arg_0 = state_60;
[L131] SORT_1 var_61 = var_61_arg_0 != 0;
[L132] SORT_1 var_62_arg_0 = var_61;
[L133] SORT_1 var_62 = ~var_62_arg_0;
[L134] SORT_1 var_103_arg_0 = var_62;
[L135] SORT_1 var_103 = ~var_103_arg_0;
[L136] SORT_1 var_104_arg_0 = input_5;
[L137] SORT_1 var_104 = ~var_104_arg_0;
[L138] SORT_1 var_105_arg_0 = var_103;
[L139] SORT_1 var_105_arg_1 = var_104;
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L140] EXPR var_105_arg_0 | var_105_arg_1
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1;
[L141] SORT_1 var_106_arg_0 = var_51;
[L142] SORT_1 var_106 = ~var_106_arg_0;
[L143] SORT_1 var_107_arg_0 = var_105;
[L144] SORT_1 var_107_arg_1 = var_106;
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L145] EXPR var_107_arg_0 | var_107_arg_1
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1;
[L146] EXPR var_107 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L146] var_107 = var_107 & mask_SORT_1
[L147] SORT_1 constr_108_arg_0 = var_107;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L148] CALL assume_abort_if_not(constr_108_arg_0)
VAL [\old(cond)=1]
[L22] COND FALSE !(!cond)
VAL [\old(cond)=1]
[L148] RET assume_abort_if_not(constr_108_arg_0)
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L150] SORT_1 var_112_arg_0 = state_91;
[L151] SORT_1 var_112_arg_1 = var_111;
[L152] SORT_1 var_112_arg_2 = var_51;
[L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2;
[L154] SORT_1 var_70_arg_0 = state_69;
[L155] SORT_1 var_70 = ~var_70_arg_0;
[L156] SORT_1 var_71_arg_0 = state_68;
[L157] SORT_1 var_71_arg_1 = var_70;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0]
[L158] EXPR var_71_arg_0 & var_71_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1;
[L159] SORT_11 var_73_arg_0 = state_72;
[L160] SORT_1 var_73 = var_73_arg_0 != 0;
[L161] SORT_1 var_74_arg_0 = var_71;
[L162] SORT_1 var_74_arg_1 = var_73;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0]
[L163] EXPR var_74_arg_0 & var_74_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1;
[L164] SORT_1 var_75_arg_0 = state_68;
[L165] SORT_1 var_75 = ~var_75_arg_0;
[L166] SORT_1 var_76_arg_0 = input_6;
[L167] SORT_1 var_76_arg_1 = var_75;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0]
[L168] EXPR var_76_arg_0 & var_76_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1;
[L169] SORT_1 var_77_arg_0 = var_76;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0]
[L170] EXPR var_77_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1
[L171] SORT_11 var_77 = var_77_arg_0;
[L172] SORT_11 var_78_arg_0 = state_72;
[L173] SORT_11 var_78_arg_1 = var_77;
[L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1;
[L175] SORT_1 var_79_arg_0 = input_5;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0]
[L176] EXPR var_79_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0]
[L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1
[L177] SORT_11 var_79 = var_79_arg_0;
[L178] SORT_11 var_80_arg_0 = var_78;
[L179] SORT_11 var_80_arg_1 = var_79;
[L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1;
[L181] SORT_1 var_82_arg_0 = input_7;
[L182] SORT_11 var_82_arg_1 = var_81;
[L183] SORT_11 var_82_arg_2 = var_80;
[L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0]
[L185] EXPR var_82 & mask_SORT_11
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L185] var_82 = var_82 & mask_SORT_11
[L186] SORT_11 var_83_arg_0 = var_82;
[L187] SORT_1 var_83 = var_83_arg_0 != 0;
[L188] SORT_1 var_84_arg_0 = var_83;
[L189] SORT_1 var_84 = ~var_84_arg_0;
[L190] SORT_1 var_85_arg_0 = var_74;
[L191] SORT_1 var_85_arg_1 = var_84;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1]
[L192] EXPR var_85_arg_0 & var_85_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1;
[L193] SORT_1 var_86_arg_0 = var_85;
[L194] SORT_1 var_86 = ~var_86_arg_0;
[L195] SORT_11 var_14_arg_0 = state_12;
[L196] SORT_13 var_14 = var_14_arg_0 >> 0;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L197] EXPR var_14 & mask_SORT_13
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L197] var_14 = var_14 & mask_SORT_13
[L198] SORT_13 var_56_arg_0 = var_14;
[L199] SORT_1 var_56 = var_56_arg_0 != 0;
[L200] SORT_1 var_57_arg_0 = var_56;
[L201] SORT_1 var_57 = ~var_57_arg_0;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L202] EXPR var_57 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L202] var_57 = var_57 & mask_SORT_1
[L203] SORT_1 var_52_arg_0 = var_51;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L204] EXPR var_52_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1
[L205] SORT_13 var_52 = var_52_arg_0;
[L206] SORT_13 var_53_arg_0 = var_14;
[L207] SORT_13 var_53_arg_1 = var_52;
[L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1;
[L209] SORT_40 var_47_arg_0 = var_46;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L210] EXPR var_47_arg_0 & mask_SORT_40
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40
[L211] SORT_13 var_47 = var_47_arg_0;
[L212] SORT_13 var_48_arg_0 = var_14;
[L213] SORT_13 var_48_arg_1 = var_47;
[L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1;
[L215] SORT_40 var_42_arg_0 = var_41;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L216] EXPR var_42_arg_0 & mask_SORT_40
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40
[L217] SORT_13 var_42 = var_42_arg_0;
[L218] SORT_13 var_43_arg_0 = var_14;
[L219] SORT_13 var_43_arg_1 = var_42;
[L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1;
[L221] SORT_19 var_36_arg_0 = var_35;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L222] EXPR var_36_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19
[L223] SORT_13 var_36 = var_36_arg_0;
[L224] SORT_13 var_37_arg_0 = var_14;
[L225] SORT_13 var_37_arg_1 = var_36;
[L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1;
[L227] SORT_19 var_31_arg_0 = var_30;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L228] EXPR var_31_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19
[L229] SORT_13 var_31 = var_31_arg_0;
[L230] SORT_13 var_32_arg_0 = var_14;
[L231] SORT_13 var_32_arg_1 = var_31;
[L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1;
[L233] SORT_19 var_26_arg_0 = var_25;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L234] EXPR var_26_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19
[L235] SORT_13 var_26 = var_26_arg_0;
[L236] SORT_13 var_27_arg_0 = var_14;
[L237] SORT_13 var_27_arg_1 = var_26;
[L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1;
[L239] SORT_19 var_21_arg_0 = var_20;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L240] EXPR var_21_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19
[L241] SORT_13 var_21 = var_21_arg_0;
[L242] SORT_13 var_22_arg_0 = var_14;
[L243] SORT_13 var_22_arg_1 = var_21;
[L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1;
[L245] SORT_13 var_16_arg_0 = var_14;
[L246] SORT_13 var_16_arg_1 = var_15;
[L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1;
[L248] SORT_1 var_17_arg_0 = var_16;
[L249] SORT_3 var_17_arg_1 = state_10;
[L250] SORT_3 var_17_arg_2 = input_9;
[L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2;
[L252] SORT_1 var_23_arg_0 = var_22;
[L253] SORT_3 var_23_arg_1 = state_18;
[L254] SORT_3 var_23_arg_2 = var_17;
[L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2;
[L256] SORT_1 var_28_arg_0 = var_27;
[L257] SORT_3 var_28_arg_1 = state_24;
[L258] SORT_3 var_28_arg_2 = var_23;
[L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2;
[L260] SORT_1 var_33_arg_0 = var_32;
[L261] SORT_3 var_33_arg_1 = state_29;
[L262] SORT_3 var_33_arg_2 = var_28;
[L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2;
[L264] SORT_1 var_38_arg_0 = var_37;
[L265] SORT_3 var_38_arg_1 = state_34;
[L266] SORT_3 var_38_arg_2 = var_33;
[L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2;
[L268] SORT_1 var_44_arg_0 = var_43;
[L269] SORT_3 var_44_arg_1 = state_39;
[L270] SORT_3 var_44_arg_2 = var_38;
[L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2;
[L272] SORT_1 var_49_arg_0 = var_48;
[L273] SORT_3 var_49_arg_1 = state_45;
[L274] SORT_3 var_49_arg_2 = var_44;
[L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2;
[L276] SORT_1 var_54_arg_0 = var_53;
[L277] SORT_3 var_54_arg_1 = state_50;
[L278] SORT_3 var_54_arg_2 = var_49;
[L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2;
[L280] SORT_1 var_58_arg_0 = var_57;
[L281] SORT_3 var_58_arg_1 = state_55;
[L282] SORT_3 var_58_arg_2 = var_54;
[L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L284] EXPR var_58 & mask_SORT_3
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L284] var_58 = var_58 & mask_SORT_3
[L285] SORT_3 var_88_arg_0 = state_87;
[L286] SORT_3 var_88_arg_1 = var_58;
[L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1;
[L288] SORT_1 var_89_arg_0 = var_86;
[L289] SORT_1 var_89_arg_1 = var_88;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1]
[L290] EXPR var_89_arg_0 | var_89_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1;
[L291] SORT_1 var_110_arg_0 = state_91;
[L292] SORT_1 var_110_arg_1 = input_109;
[L293] SORT_1 var_110_arg_2 = var_89;
[L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2;
[L295] SORT_1 var_113_arg_0 = var_110;
[L296] SORT_1 var_113 = ~var_113_arg_0;
[L297] SORT_1 var_114_arg_0 = var_112;
[L298] SORT_1 var_114_arg_1 = var_113;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L299] EXPR var_114_arg_0 & var_114_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1;
[L300] EXPR var_114 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L300] var_114 = var_114 & mask_SORT_1
[L301] SORT_1 bad_115_arg_0 = var_114;
[L302] CALL __VERIFIER_assert(!(bad_115_arg_0))
[L21] COND FALSE !(!(cond))
[L302] RET __VERIFIER_assert(!(bad_115_arg_0))
[L304] SORT_11 var_137_arg_0 = state_136;
[L305] SORT_13 var_137 = var_137_arg_0 >> 0;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L306] EXPR var_137 & mask_SORT_13
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L306] var_137 = var_137 & mask_SORT_13
[L307] SORT_13 var_194_arg_0 = var_137;
[L308] SORT_13 var_194_arg_1 = var_15;
[L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1;
[L310] SORT_1 var_195_arg_0 = input_6;
[L311] SORT_1 var_195_arg_1 = var_194;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L312] EXPR var_195_arg_0 & var_195_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1;
[L313] EXPR var_195 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L313] var_195 = var_195 & mask_SORT_1
[L314] SORT_1 var_267_arg_0 = var_195;
[L315] SORT_3 var_267_arg_1 = input_4;
[L316] SORT_3 var_267_arg_2 = state_10;
[L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2;
[L318] SORT_1 var_269_arg_0 = input_7;
[L319] SORT_3 var_269_arg_1 = var_268;
[L320] SORT_3 var_269_arg_2 = var_267;
[L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2;
[L322] SORT_3 next_270_arg_1 = var_269;
[L323] SORT_1 var_119_arg_0 = input_6;
[L324] SORT_1 var_119_arg_1 = input_5;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L325] EXPR var_119_arg_0 | var_119_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1;
[L326] SORT_1 var_120_arg_0 = var_119;
[L327] SORT_1 var_120_arg_1 = input_7;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L328] EXPR var_120_arg_0 | var_120_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1;
[L329] EXPR var_120 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L329] var_120 = var_120 & mask_SORT_1
[L330] SORT_1 var_198_arg_0 = input_5;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L331] EXPR var_198_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1
[L332] SORT_11 var_198 = var_198_arg_0;
[L333] SORT_11 var_199_arg_0 = state_12;
[L334] SORT_11 var_199_arg_1 = var_198;
[L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1;
[L336] SORT_1 var_271_arg_0 = var_120;
[L337] SORT_11 var_271_arg_1 = var_199;
[L338] SORT_11 var_271_arg_2 = state_12;
[L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2;
[L340] SORT_1 var_272_arg_0 = input_7;
[L341] SORT_11 var_272_arg_1 = var_81;
[L342] SORT_11 var_272_arg_2 = var_271;
[L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2;
[L344] SORT_11 next_273_arg_1 = var_272;
[L345] SORT_19 var_187_arg_0 = var_20;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L346] EXPR var_187_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19
[L347] SORT_13 var_187 = var_187_arg_0;
[L348] SORT_13 var_188_arg_0 = var_137;
[L349] SORT_13 var_188_arg_1 = var_187;
[L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1;
[L351] SORT_1 var_189_arg_0 = input_6;
[L352] SORT_1 var_189_arg_1 = var_188;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L353] EXPR var_189_arg_0 & var_189_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1;
[L354] EXPR var_189 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L354] var_189 = var_189 & mask_SORT_1
[L355] SORT_1 var_274_arg_0 = var_189;
[L356] SORT_3 var_274_arg_1 = input_4;
[L357] SORT_3 var_274_arg_2 = state_18;
[L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2;
[L359] SORT_1 var_275_arg_0 = input_7;
[L360] SORT_3 var_275_arg_1 = var_268;
[L361] SORT_3 var_275_arg_2 = var_274;
[L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2;
[L363] SORT_3 next_276_arg_1 = var_275;
[L364] SORT_19 var_180_arg_0 = var_25;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L365] EXPR var_180_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19
[L366] SORT_13 var_180 = var_180_arg_0;
[L367] SORT_13 var_181_arg_0 = var_137;
[L368] SORT_13 var_181_arg_1 = var_180;
[L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1;
[L370] SORT_1 var_182_arg_0 = input_6;
[L371] SORT_1 var_182_arg_1 = var_181;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L372] EXPR var_182_arg_0 & var_182_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1;
[L373] EXPR var_182 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L373] var_182 = var_182 & mask_SORT_1
[L374] SORT_1 var_277_arg_0 = var_182;
[L375] SORT_3 var_277_arg_1 = input_4;
[L376] SORT_3 var_277_arg_2 = state_24;
[L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2;
[L378] SORT_1 var_278_arg_0 = input_7;
[L379] SORT_3 var_278_arg_1 = var_268;
[L380] SORT_3 var_278_arg_2 = var_277;
[L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2;
[L382] SORT_3 next_279_arg_1 = var_278;
[L383] SORT_19 var_173_arg_0 = var_30;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L384] EXPR var_173_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19
[L385] SORT_13 var_173 = var_173_arg_0;
[L386] SORT_13 var_174_arg_0 = var_137;
[L387] SORT_13 var_174_arg_1 = var_173;
[L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1;
[L389] SORT_1 var_175_arg_0 = input_6;
[L390] SORT_1 var_175_arg_1 = var_174;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L391] EXPR var_175_arg_0 & var_175_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1;
[L392] EXPR var_175 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L392] var_175 = var_175 & mask_SORT_1
[L393] SORT_1 var_280_arg_0 = var_175;
[L394] SORT_3 var_280_arg_1 = input_4;
[L395] SORT_3 var_280_arg_2 = state_29;
[L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2;
[L397] SORT_1 var_281_arg_0 = input_7;
[L398] SORT_3 var_281_arg_1 = var_268;
[L399] SORT_3 var_281_arg_2 = var_280;
[L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2;
[L401] SORT_3 next_282_arg_1 = var_281;
[L402] SORT_19 var_166_arg_0 = var_35;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L403] EXPR var_166_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19
[L404] SORT_13 var_166 = var_166_arg_0;
[L405] SORT_13 var_167_arg_0 = var_137;
[L406] SORT_13 var_167_arg_1 = var_166;
[L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1;
[L408] SORT_1 var_168_arg_0 = input_6;
[L409] SORT_1 var_168_arg_1 = var_167;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L410] EXPR var_168_arg_0 & var_168_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1;
[L411] EXPR var_168 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L411] var_168 = var_168 & mask_SORT_1
[L412] SORT_1 var_283_arg_0 = var_168;
[L413] SORT_3 var_283_arg_1 = input_4;
[L414] SORT_3 var_283_arg_2 = state_34;
[L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2;
[L416] SORT_1 var_284_arg_0 = input_7;
[L417] SORT_3 var_284_arg_1 = var_268;
[L418] SORT_3 var_284_arg_2 = var_283;
[L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2;
[L420] SORT_3 next_285_arg_1 = var_284;
[L421] SORT_40 var_159_arg_0 = var_41;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L422] EXPR var_159_arg_0 & mask_SORT_40
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40
[L423] SORT_13 var_159 = var_159_arg_0;
[L424] SORT_13 var_160_arg_0 = var_137;
[L425] SORT_13 var_160_arg_1 = var_159;
[L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1;
[L427] SORT_1 var_161_arg_0 = input_6;
[L428] SORT_1 var_161_arg_1 = var_160;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L429] EXPR var_161_arg_0 & var_161_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1;
[L430] EXPR var_161 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L430] var_161 = var_161 & mask_SORT_1
[L431] SORT_1 var_286_arg_0 = var_161;
[L432] SORT_3 var_286_arg_1 = input_4;
[L433] SORT_3 var_286_arg_2 = state_39;
[L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2;
[L435] SORT_1 var_287_arg_0 = input_7;
[L436] SORT_3 var_287_arg_1 = var_268;
[L437] SORT_3 var_287_arg_2 = var_286;
[L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2;
[L439] SORT_3 next_288_arg_1 = var_287;
[L440] SORT_40 var_152_arg_0 = var_46;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L441] EXPR var_152_arg_0 & mask_SORT_40
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40
[L442] SORT_13 var_152 = var_152_arg_0;
[L443] SORT_13 var_153_arg_0 = var_137;
[L444] SORT_13 var_153_arg_1 = var_152;
[L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1;
[L446] SORT_1 var_154_arg_0 = input_6;
[L447] SORT_1 var_154_arg_1 = var_153;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L448] EXPR var_154_arg_0 & var_154_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1;
[L449] EXPR var_154 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L449] var_154 = var_154 & mask_SORT_1
[L450] SORT_1 var_289_arg_0 = var_154;
[L451] SORT_3 var_289_arg_1 = input_4;
[L452] SORT_3 var_289_arg_2 = state_45;
[L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2;
[L454] SORT_1 var_290_arg_0 = input_7;
[L455] SORT_3 var_290_arg_1 = var_268;
[L456] SORT_3 var_290_arg_2 = var_289;
[L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2;
[L458] SORT_3 next_291_arg_1 = var_290;
[L459] SORT_1 var_145_arg_0 = var_51;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L460] EXPR var_145_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1
[L461] SORT_13 var_145 = var_145_arg_0;
[L462] SORT_13 var_146_arg_0 = var_137;
[L463] SORT_13 var_146_arg_1 = var_145;
[L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1;
[L465] SORT_1 var_147_arg_0 = input_6;
[L466] SORT_1 var_147_arg_1 = var_146;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L467] EXPR var_147_arg_0 & var_147_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1;
[L468] EXPR var_147 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L468] var_147 = var_147 & mask_SORT_1
[L469] SORT_1 var_292_arg_0 = var_147;
[L470] SORT_3 var_292_arg_1 = input_4;
[L471] SORT_3 var_292_arg_2 = state_50;
[L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2;
[L473] SORT_1 var_293_arg_0 = input_7;
[L474] SORT_3 var_293_arg_1 = var_268;
[L475] SORT_3 var_293_arg_2 = var_292;
[L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2;
[L477] SORT_3 next_294_arg_1 = var_293;
[L478] SORT_13 var_138_arg_0 = var_137;
[L479] SORT_1 var_138 = var_138_arg_0 != 0;
[L480] SORT_1 var_139_arg_0 = var_138;
[L481] SORT_1 var_139 = ~var_139_arg_0;
[L482] SORT_1 var_140_arg_0 = input_6;
[L483] SORT_1 var_140_arg_1 = var_139;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L484] EXPR var_140_arg_0 & var_140_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1;
[L485] EXPR var_140 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L485] var_140 = var_140 & mask_SORT_1
[L486] SORT_1 var_295_arg_0 = var_140;
[L487] SORT_3 var_295_arg_1 = input_4;
[L488] SORT_3 var_295_arg_2 = state_55;
[L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2;
[L490] SORT_1 var_296_arg_0 = input_7;
[L491] SORT_3 var_296_arg_1 = var_268;
[L492] SORT_3 var_296_arg_2 = var_295;
[L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2;
[L494] SORT_3 next_297_arg_1 = var_296;
[L495] SORT_1 var_298_arg_0 = input_6;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L496] EXPR var_298_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1
[L497] SORT_11 var_298 = var_298_arg_0;
[L498] SORT_11 var_299_arg_0 = state_60;
[L499] SORT_11 var_299_arg_1 = var_298;
[L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1;
[L501] SORT_1 var_300_arg_0 = input_5;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L502] EXPR var_300_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1
[L503] SORT_11 var_300 = var_300_arg_0;
[L504] SORT_11 var_301_arg_0 = var_299;
[L505] SORT_11 var_301_arg_1 = var_300;
[L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1;
[L507] SORT_1 var_302_arg_0 = input_7;
[L508] SORT_11 var_302_arg_1 = var_81;
[L509] SORT_11 var_302_arg_2 = var_301;
[L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L511] EXPR var_302 & mask_SORT_11
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L511] var_302 = var_302 & mask_SORT_11
[L512] SORT_11 next_303_arg_1 = var_302;
[L513] SORT_1 var_228_arg_0 = state_68;
[L514] SORT_1 var_228 = ~var_228_arg_0;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L515] EXPR var_228 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L515] var_228 = var_228 & mask_SORT_1
[L516] SORT_1 var_224_arg_0 = input_8;
[L517] SORT_1 var_224_arg_1 = input_6;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L518] EXPR var_224_arg_0 & var_224_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1;
[L519] SORT_1 var_225_arg_0 = state_68;
[L520] SORT_1 var_225_arg_1 = var_224;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L521] EXPR var_225_arg_0 | var_225_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1;
[L522] SORT_1 var_304_arg_0 = var_228;
[L523] SORT_1 var_304_arg_1 = var_225;
[L524] SORT_1 var_304_arg_2 = state_68;
[L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2;
[L526] SORT_1 var_305_arg_0 = input_7;
[L527] SORT_1 var_305_arg_1 = var_111;
[L528] SORT_1 var_305_arg_2 = var_304;
[L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2;
[L530] SORT_1 next_306_arg_1 = var_305;
[L531] SORT_1 var_236_arg_0 = var_85;
[L532] SORT_1 var_236_arg_1 = state_69;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L533] EXPR var_236_arg_0 | var_236_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1;
[L534] SORT_1 var_307_arg_0 = var_51;
[L535] SORT_1 var_307_arg_1 = var_236;
[L536] SORT_1 var_307_arg_2 = state_69;
[L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2;
[L538] SORT_1 var_308_arg_0 = input_7;
[L539] SORT_1 var_308_arg_1 = var_111;
[L540] SORT_1 var_308_arg_2 = var_307;
[L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2;
[L542] SORT_1 next_309_arg_1 = var_308;
[L543] SORT_1 var_248_arg_0 = input_6;
[L544] SORT_1 var_248_arg_1 = input_5;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L545] EXPR var_248_arg_0 | var_248_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1;
[L546] SORT_1 var_249_arg_0 = var_248;
[L547] SORT_1 var_249_arg_1 = input_7;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L548] EXPR var_249_arg_0 | var_249_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1;
[L549] SORT_1 var_250_arg_0 = var_249;
[L550] SORT_1 var_250_arg_1 = state_68;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L551] EXPR var_250_arg_0 | var_250_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1;
[L552] EXPR var_250 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L552] var_250 = var_250 & mask_SORT_1
[L553] SORT_1 var_310_arg_0 = var_250;
[L554] SORT_11 var_310_arg_1 = var_82;
[L555] SORT_11 var_310_arg_2 = state_72;
[L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2;
[L557] SORT_1 var_311_arg_0 = input_7;
[L558] SORT_11 var_311_arg_1 = var_81;
[L559] SORT_11 var_311_arg_2 = var_310;
[L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L561] EXPR var_311 & mask_SORT_11
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L561] var_311 = var_311 & mask_SORT_11
[L562] SORT_11 next_312_arg_1 = var_311;
[L563] SORT_1 var_233_arg_0 = var_224;
[L564] SORT_1 var_233_arg_1 = var_228;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L565] EXPR var_233_arg_0 & var_233_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1;
[L566] EXPR var_233 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L566] var_233 = var_233 & mask_SORT_1
[L567] SORT_1 var_313_arg_0 = var_233;
[L568] SORT_3 var_313_arg_1 = input_4;
[L569] SORT_3 var_313_arg_2 = state_87;
[L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2;
[L571] SORT_1 var_314_arg_0 = input_7;
[L572] SORT_3 var_314_arg_1 = var_268;
[L573] SORT_3 var_314_arg_2 = var_313;
[L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L575] EXPR var_314 & mask_SORT_3
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L575] var_314 = var_314 & mask_SORT_3
[L576] SORT_3 next_315_arg_1 = var_314;
[L577] SORT_1 next_316_arg_1 = var_111;
[L578] SORT_1 var_204_arg_0 = input_6;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L579] EXPR var_204_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1
[L580] SORT_11 var_204 = var_204_arg_0;
[L581] SORT_11 var_205_arg_0 = state_136;
[L582] SORT_11 var_205_arg_1 = var_204;
[L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1;
[L584] SORT_1 var_317_arg_0 = var_120;
[L585] SORT_11 var_317_arg_1 = var_205;
[L586] SORT_11 var_317_arg_2 = state_136;
[L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2;
[L588] SORT_1 var_318_arg_0 = input_7;
[L589] SORT_11 var_318_arg_1 = var_81;
[L590] SORT_11 var_318_arg_2 = var_317;
[L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2;
[L592] SORT_11 next_319_arg_1 = var_318;
[L594] state_10 = next_270_arg_1
[L595] state_12 = next_273_arg_1
[L596] state_18 = next_276_arg_1
[L597] state_24 = next_279_arg_1
[L598] state_29 = next_282_arg_1
[L599] state_34 = next_285_arg_1
[L600] state_39 = next_288_arg_1
[L601] state_45 = next_291_arg_1
[L602] state_50 = next_294_arg_1
[L603] state_55 = next_297_arg_1
[L604] state_60 = next_303_arg_1
[L605] state_68 = next_306_arg_1
[L606] state_69 = next_309_arg_1
[L607] state_72 = next_312_arg_1
[L608] state_87 = next_315_arg_1
[L609] state_91 = next_316_arg_1
[L610] state_136 = next_319_arg_1
[L88] input_2 = __VERIFIER_nondet_uchar()
[L89] input_4 = __VERIFIER_nondet_uint()
[L90] input_5 = __VERIFIER_nondet_uchar()
[L91] input_6 = __VERIFIER_nondet_uchar()
[L92] input_7 = __VERIFIER_nondet_uchar()
[L93] EXPR input_7 & mask_SORT_1
VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L93] input_7 = input_7 & mask_SORT_1
[L94] input_8 = __VERIFIER_nondet_uchar()
[L95] input_9 = __VERIFIER_nondet_uint()
[L96] input_109 = __VERIFIER_nondet_uchar()
[L98] SORT_1 var_93_arg_0 = input_7;
[L99] SORT_1 var_93_arg_1 = state_91;
[L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1;
[L101] SORT_1 var_94_arg_0 = var_51;
[L102] SORT_1 var_94 = ~var_94_arg_0;
[L103] SORT_1 var_95_arg_0 = var_93;
[L104] SORT_1 var_95_arg_1 = var_94;
VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2]
[L105] EXPR var_95_arg_0 | var_95_arg_1
VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1;
[L106] EXPR var_95 & mask_SORT_1
VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L106] var_95 = var_95 & mask_SORT_1
[L107] SORT_1 constr_96_arg_0 = var_95;
VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L108] CALL assume_abort_if_not(constr_96_arg_0)
VAL [\old(cond)=1]
[L22] COND FALSE !(!cond)
VAL [\old(cond)=1]
[L108] RET assume_abort_if_not(constr_96_arg_0)
VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L109] SORT_13 var_65_arg_0 = var_64;
VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0]
[L110] EXPR var_65_arg_0 & mask_SORT_13
VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13
[L111] SORT_11 var_65 = var_65_arg_0;
[L112] SORT_11 var_66_arg_0 = state_60;
[L113] SORT_11 var_66_arg_1 = var_65;
[L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1;
[L115] SORT_1 var_97_arg_0 = var_66;
[L116] SORT_1 var_97 = ~var_97_arg_0;
[L117] SORT_1 var_98_arg_0 = input_6;
[L118] SORT_1 var_98 = ~var_98_arg_0;
[L119] SORT_1 var_99_arg_0 = var_97;
[L120] SORT_1 var_99_arg_1 = var_98;
VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1]
[L121] EXPR var_99_arg_0 | var_99_arg_1
VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1;
[L122] SORT_1 var_100_arg_0 = var_51;
[L123] SORT_1 var_100 = ~var_100_arg_0;
[L124] SORT_1 var_101_arg_0 = var_99;
[L125] SORT_1 var_101_arg_1 = var_100;
VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L126] EXPR var_101_arg_0 | var_101_arg_1
VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1;
[L127] EXPR var_101 & mask_SORT_1
VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L127] var_101 = var_101 & mask_SORT_1
[L128] SORT_1 constr_102_arg_0 = var_101;
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L129] CALL assume_abort_if_not(constr_102_arg_0)
VAL [\old(cond)=1]
[L22] COND FALSE !(!cond)
VAL [\old(cond)=1]
[L129] RET assume_abort_if_not(constr_102_arg_0)
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L130] SORT_11 var_61_arg_0 = state_60;
[L131] SORT_1 var_61 = var_61_arg_0 != 0;
[L132] SORT_1 var_62_arg_0 = var_61;
[L133] SORT_1 var_62 = ~var_62_arg_0;
[L134] SORT_1 var_103_arg_0 = var_62;
[L135] SORT_1 var_103 = ~var_103_arg_0;
[L136] SORT_1 var_104_arg_0 = input_5;
[L137] SORT_1 var_104 = ~var_104_arg_0;
[L138] SORT_1 var_105_arg_0 = var_103;
[L139] SORT_1 var_105_arg_1 = var_104;
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L140] EXPR var_105_arg_0 | var_105_arg_1
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1;
[L141] SORT_1 var_106_arg_0 = var_51;
[L142] SORT_1 var_106 = ~var_106_arg_0;
[L143] SORT_1 var_107_arg_0 = var_105;
[L144] SORT_1 var_107_arg_1 = var_106;
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L145] EXPR var_107_arg_0 | var_107_arg_1
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1;
[L146] EXPR var_107 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L146] var_107 = var_107 & mask_SORT_1
[L147] SORT_1 constr_108_arg_0 = var_107;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L148] CALL assume_abort_if_not(constr_108_arg_0)
VAL [\old(cond)=1]
[L22] COND FALSE !(!cond)
VAL [\old(cond)=1]
[L148] RET assume_abort_if_not(constr_108_arg_0)
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L150] SORT_1 var_112_arg_0 = state_91;
[L151] SORT_1 var_112_arg_1 = var_111;
[L152] SORT_1 var_112_arg_2 = var_51;
[L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2;
[L154] SORT_1 var_70_arg_0 = state_69;
[L155] SORT_1 var_70 = ~var_70_arg_0;
[L156] SORT_1 var_71_arg_0 = state_68;
[L157] SORT_1 var_71_arg_1 = var_70;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0]
[L158] EXPR var_71_arg_0 & var_71_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1;
[L159] SORT_11 var_73_arg_0 = state_72;
[L160] SORT_1 var_73 = var_73_arg_0 != 0;
[L161] SORT_1 var_74_arg_0 = var_71;
[L162] SORT_1 var_74_arg_1 = var_73;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0]
[L163] EXPR var_74_arg_0 & var_74_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0]
[L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1;
[L164] SORT_1 var_75_arg_0 = state_68;
[L165] SORT_1 var_75 = ~var_75_arg_0;
[L166] SORT_1 var_76_arg_0 = input_6;
[L167] SORT_1 var_76_arg_1 = var_75;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0]
[L168] EXPR var_76_arg_0 & var_76_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1;
[L169] SORT_1 var_77_arg_0 = var_76;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0]
[L170] EXPR var_77_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1
[L171] SORT_11 var_77 = var_77_arg_0;
[L172] SORT_11 var_78_arg_0 = state_72;
[L173] SORT_11 var_78_arg_1 = var_77;
[L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1;
[L175] SORT_1 var_79_arg_0 = input_5;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0]
[L176] EXPR var_79_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0]
[L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1
[L177] SORT_11 var_79 = var_79_arg_0;
[L178] SORT_11 var_80_arg_0 = var_78;
[L179] SORT_11 var_80_arg_1 = var_79;
[L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1;
[L181] SORT_1 var_82_arg_0 = input_7;
[L182] SORT_11 var_82_arg_1 = var_81;
[L183] SORT_11 var_82_arg_2 = var_80;
[L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0]
[L185] EXPR var_82 & mask_SORT_11
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0]
[L185] var_82 = var_82 & mask_SORT_11
[L186] SORT_11 var_83_arg_0 = var_82;
[L187] SORT_1 var_83 = var_83_arg_0 != 0;
[L188] SORT_1 var_84_arg_0 = var_83;
[L189] SORT_1 var_84 = ~var_84_arg_0;
[L190] SORT_1 var_85_arg_0 = var_74;
[L191] SORT_1 var_85_arg_1 = var_84;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1]
[L192] EXPR var_85_arg_0 & var_85_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0]
[L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1;
[L193] SORT_1 var_86_arg_0 = var_85;
[L194] SORT_1 var_86 = ~var_86_arg_0;
[L195] SORT_11 var_14_arg_0 = state_12;
[L196] SORT_13 var_14 = var_14_arg_0 >> 0;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L197] EXPR var_14 & mask_SORT_13
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L197] var_14 = var_14 & mask_SORT_13
[L198] SORT_13 var_56_arg_0 = var_14;
[L199] SORT_1 var_56 = var_56_arg_0 != 0;
[L200] SORT_1 var_57_arg_0 = var_56;
[L201] SORT_1 var_57 = ~var_57_arg_0;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L202] EXPR var_57 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L202] var_57 = var_57 & mask_SORT_1
[L203] SORT_1 var_52_arg_0 = var_51;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L204] EXPR var_52_arg_0 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1
[L205] SORT_13 var_52 = var_52_arg_0;
[L206] SORT_13 var_53_arg_0 = var_14;
[L207] SORT_13 var_53_arg_1 = var_52;
[L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1;
[L209] SORT_40 var_47_arg_0 = var_46;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L210] EXPR var_47_arg_0 & mask_SORT_40
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40
[L211] SORT_13 var_47 = var_47_arg_0;
[L212] SORT_13 var_48_arg_0 = var_14;
[L213] SORT_13 var_48_arg_1 = var_47;
[L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1;
[L215] SORT_40 var_42_arg_0 = var_41;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L216] EXPR var_42_arg_0 & mask_SORT_40
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40
[L217] SORT_13 var_42 = var_42_arg_0;
[L218] SORT_13 var_43_arg_0 = var_14;
[L219] SORT_13 var_43_arg_1 = var_42;
[L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1;
[L221] SORT_19 var_36_arg_0 = var_35;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L222] EXPR var_36_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19
[L223] SORT_13 var_36 = var_36_arg_0;
[L224] SORT_13 var_37_arg_0 = var_14;
[L225] SORT_13 var_37_arg_1 = var_36;
[L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1;
[L227] SORT_19 var_31_arg_0 = var_30;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L228] EXPR var_31_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19
[L229] SORT_13 var_31 = var_31_arg_0;
[L230] SORT_13 var_32_arg_0 = var_14;
[L231] SORT_13 var_32_arg_1 = var_31;
[L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1;
[L233] SORT_19 var_26_arg_0 = var_25;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L234] EXPR var_26_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19
[L235] SORT_13 var_26 = var_26_arg_0;
[L236] SORT_13 var_27_arg_0 = var_14;
[L237] SORT_13 var_27_arg_1 = var_26;
[L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1;
[L239] SORT_19 var_21_arg_0 = var_20;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L240] EXPR var_21_arg_0 & mask_SORT_19
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=1, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19
[L241] SORT_13 var_21 = var_21_arg_0;
[L242] SORT_13 var_22_arg_0 = var_14;
[L243] SORT_13 var_22_arg_1 = var_21;
[L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1;
[L245] SORT_13 var_16_arg_0 = var_14;
[L246] SORT_13 var_16_arg_1 = var_15;
[L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1;
[L248] SORT_1 var_17_arg_0 = var_16;
[L249] SORT_3 var_17_arg_1 = state_10;
[L250] SORT_3 var_17_arg_2 = input_9;
[L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2;
[L252] SORT_1 var_23_arg_0 = var_22;
[L253] SORT_3 var_23_arg_1 = state_18;
[L254] SORT_3 var_23_arg_2 = var_17;
[L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2;
[L256] SORT_1 var_28_arg_0 = var_27;
[L257] SORT_3 var_28_arg_1 = state_24;
[L258] SORT_3 var_28_arg_2 = var_23;
[L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2;
[L260] SORT_1 var_33_arg_0 = var_32;
[L261] SORT_3 var_33_arg_1 = state_29;
[L262] SORT_3 var_33_arg_2 = var_28;
[L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2;
[L264] SORT_1 var_38_arg_0 = var_37;
[L265] SORT_3 var_38_arg_1 = state_34;
[L266] SORT_3 var_38_arg_2 = var_33;
[L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2;
[L268] SORT_1 var_44_arg_0 = var_43;
[L269] SORT_3 var_44_arg_1 = state_39;
[L270] SORT_3 var_44_arg_2 = var_38;
[L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2;
[L272] SORT_1 var_49_arg_0 = var_48;
[L273] SORT_3 var_49_arg_1 = state_45;
[L274] SORT_3 var_49_arg_2 = var_44;
[L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2;
[L276] SORT_1 var_54_arg_0 = var_53;
[L277] SORT_3 var_54_arg_1 = state_50;
[L278] SORT_3 var_54_arg_2 = var_49;
[L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2;
[L280] SORT_1 var_58_arg_0 = var_57;
[L281] SORT_3 var_58_arg_1 = state_55;
[L282] SORT_3 var_58_arg_2 = var_54;
[L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L284] EXPR var_58 & mask_SORT_3
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1]
[L284] var_58 = var_58 & mask_SORT_3
[L285] SORT_3 var_88_arg_0 = state_87;
[L286] SORT_3 var_88_arg_1 = var_58;
[L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1;
[L288] SORT_1 var_89_arg_0 = var_86;
[L289] SORT_1 var_89_arg_1 = var_88;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1]
[L290] EXPR var_89_arg_0 | var_89_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1;
[L291] SORT_1 var_110_arg_0 = state_91;
[L292] SORT_1 var_110_arg_1 = input_109;
[L293] SORT_1 var_110_arg_2 = var_89;
[L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2;
[L295] SORT_1 var_113_arg_0 = var_110;
[L296] SORT_1 var_113 = ~var_113_arg_0;
[L297] SORT_1 var_114_arg_0 = var_112;
[L298] SORT_1 var_114_arg_1 = var_113;
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L299] EXPR var_114_arg_0 & var_114_arg_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1;
[L300] EXPR var_114 & mask_SORT_1
VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0]
[L300] var_114 = var_114 & mask_SORT_1
[L301] SORT_1 bad_115_arg_0 = var_114;
[L302] CALL __VERIFIER_assert(!(bad_115_arg_0))
[L21] COND TRUE !(cond)
[L21] reach_error()
- StatisticsResult: Ultimate Automizer benchmark data
CFG has 2 procedures, 393 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 196.2s, OverallIterations: 54, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 51.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 40528 SdHoareTripleChecker+Valid, 33.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 40444 mSDsluCounter, 139336 SdHoareTripleChecker+Invalid, 28.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 110704 mSDsCounter, 182 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 44551 IncrementalHoareTripleChecker+Invalid, 44733 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 182 mSolverCounterUnsat, 28632 mSDtfsCounter, 44551 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5477 GetRequests, 4779 SyntacticMatches, 2 SemanticMatches, 696 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29096 ImplicationChecksByTransitivity, 19.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4700occurred in iteration=52, InterpolantAutomatonStates: 555, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.9s AutomataMinimizationTime, 53 MinimizatonAttempts, 12384 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.3s SsaConstructionTime, 39.7s SatisfiabilityAnalysisTime, 81.7s InterpolantComputationTime, 17576 NumberOfCodeBlocks, 17576 NumberOfCodeBlocksAsserted, 62 NumberOfCheckSat, 18564 ConstructedInterpolants, 0 QuantifiedInterpolants, 102060 SizeOfPredicates, 37 NumberOfNonLiveVariables, 16560 ConjunctsInSsa, 359 ConjunctsInUnsatCore, 65 InterpolantComputations, 49 PerfectInterpolantSequences, 6611/7249 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available
RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces
[2024-11-08 16:08:57,539 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0
Received shutdown request...
--- End real Ultimate output ---
Execution finished normally
Using bit-precise analysis
Retrying with bit-precise analysis
### Bit-precise run ###
Calling Ultimate with: /usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )
--witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-a016563
[2024-11-08 16:09:00,456 INFO L188 SettingsManager]: Resetting all preferences to default values...
[2024-11-08 16:09:00,577 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf
[2024-11-08 16:09:00,588 WARN L101 SettingsManager]: Preference file contains the following unknown settings:
[2024-11-08 16:09:00,590 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-08 16:09:00,652 INFO L130 SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-08 16:09:00,653 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-08 16:09:00,653 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-08 16:09:00,655 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-08 16:09:00,658 INFO L153 SettingsManager]: * Use memory slicer=true
[2024-11-08 16:09:00,659 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2024-11-08 16:09:00,660 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2024-11-08 16:09:00,661 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-08 16:09:00,665 INFO L153 SettingsManager]: * Create parallel compositions if possible=false
[2024-11-08 16:09:00,666 INFO L153 SettingsManager]: * Use SBE=true
[2024-11-08 16:09:00,666 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-08 16:09:00,667 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE
[2024-11-08 16:09:00,667 INFO L153 SettingsManager]: * Check division by zero=IGNORE
[2024-11-08 16:09:00,668 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE
[2024-11-08 16:09:00,668 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2024-11-08 16:09:00,669 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE
[2024-11-08 16:09:00,672 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true
[2024-11-08 16:09:00,673 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true
[2024-11-08 16:09:00,673 INFO L153 SettingsManager]: * Allow undefined functions=false
[2024-11-08 16:09:00,674 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution
[2024-11-08 16:09:00,674 INFO L153 SettingsManager]: * Check if freed pointer was valid=false
[2024-11-08 16:09:00,675 INFO L153 SettingsManager]: * Use constant arrays=true
[2024-11-08 16:09:00,675 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-08 16:09:00,675 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements
[2024-11-08 16:09:00,676 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true
[2024-11-08 16:09:00,676 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode
[2024-11-08 16:09:00,676 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 16:09:00,677 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-08 16:09:00,677 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2024-11-08 16:09:00,678 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads
[2024-11-08 16:09:00,678 INFO L153 SettingsManager]: * Trace refinement strategy=FOX
[2024-11-08 16:09:00,680 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt
[2024-11-08 16:09:00,682 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false
[2024-11-08 16:09:00,682 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET
[2024-11-08 16:09:00,682 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO
[2024-11-08 16:09:00,683 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode
[2024-11-08 16:09:00,683 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa
[2024-11-08 16:09:01,192 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-08 16:09:01,228 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-08 16:09:01,232 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-08 16:09:01,234 INFO L270 PluginConnector]: Initializing CDTParser...
[2024-11-08 16:09:01,235 INFO L274 PluginConnector]: CDTParser initialized
[2024-11-08 16:09:01,237 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c
Unable to find full path for "g++"
[2024-11-08 16:09:03,931 INFO L533 CDTParser]: Created temporary CDT project at NULL
[2024-11-08 16:09:04,264 INFO L384 CDTParser]: Found 1 translation units.
[2024-11-08 16:09:04,265 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c
[2024-11-08 16:09:04,279 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data/bb8c05ffe/d11d27e2cd194725b61af6ae50dd2fd2/FLAGe10fe50bd
[2024-11-08 16:09:04,505 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/data/bb8c05ffe/d11d27e2cd194725b61af6ae50dd2fd2
[2024-11-08 16:09:04,508 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-08 16:09:04,510 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-08 16:09:04,511 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-08 16:09:04,512 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-08 16:09:04,521 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-08 16:09:04,522 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:09:04" (1/1) ...
[2024-11-08 16:09:04,524 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@70af7396 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:04, skipping insertion in model container
[2024-11-08 16:09:04,524 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:09:04" (1/1) ...
[2024-11-08 16:09:04,583 INFO L175 MainTranslator]: Built tables and reachable declarations
[2024-11-08 16:09:04,968 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292]
[2024-11-08 16:09:05,251 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-08 16:09:05,276 INFO L200 MainTranslator]: Completed pre-run
[2024-11-08 16:09:05,297 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292]
[2024-11-08 16:09:05,485 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-08 16:09:05,532 INFO L204 MainTranslator]: Completed translation
[2024-11-08 16:09:05,533 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05 WrapperNode
[2024-11-08 16:09:05,534 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-08 16:09:05,535 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-08 16:09:05,536 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-08 16:09:05,537 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-08 16:09:05,548 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,582 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,676 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 640
[2024-11-08 16:09:05,677 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-08 16:09:05,678 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-08 16:09:05,678 INFO L270 PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-08 16:09:05,678 INFO L274 PluginConnector]: Boogie Preprocessor initialized
[2024-11-08 16:09:05,694 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,695 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,711 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,754 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-08 16:09:05,755 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,755 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,773 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,785 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,792 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,796 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,805 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-08 16:09:05,806 INFO L112 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-08 16:09:05,806 INFO L270 PluginConnector]: Initializing RCFGBuilder...
[2024-11-08 16:09:05,807 INFO L274 PluginConnector]: RCFGBuilder initialized
[2024-11-08 16:09:05,808 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (1/1) ...
[2024-11-08 16:09:05,816 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 16:09:05,846 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:09:05,870 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null)
[2024-11-08 16:09:05,875 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process
[2024-11-08 16:09:05,911 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-08 16:09:05,911 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0
[2024-11-08 16:09:05,912 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not
[2024-11-08 16:09:05,912 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not
[2024-11-08 16:09:05,912 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-08 16:09:05,912 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-08 16:09:06,206 INFO L238 CfgBuilder]: Building ICFG
[2024-11-08 16:09:06,209 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-08 16:09:07,103 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live.
[2024-11-08 16:09:07,103 INFO L287 CfgBuilder]: Performing block encoding
[2024-11-08 16:09:07,122 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-08 16:09:07,122 INFO L316 CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-08 16:09:07,123 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:09:07 BoogieIcfgContainer
[2024-11-08 16:09:07,123 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-08 16:09:07,126 INFO L112 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2024-11-08 16:09:07,127 INFO L270 PluginConnector]: Initializing TraceAbstraction...
[2024-11-08 16:09:07,131 INFO L274 PluginConnector]: TraceAbstraction initialized
[2024-11-08 16:09:07,132 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 04:09:04" (1/3) ...
[2024-11-08 16:09:07,134 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22587c14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:09:07, skipping insertion in model container
[2024-11-08 16:09:07,134 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:09:05" (2/3) ...
[2024-11-08 16:09:07,136 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22587c14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:09:07, skipping insertion in model container
[2024-11-08 16:09:07,137 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:09:07" (3/3) ...
[2024-11-08 16:09:07,139 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c
[2024-11-08 16:09:07,166 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2024-11-08 16:09:07,166 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations.
[2024-11-08 16:09:07,262 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2024-11-08 16:09:07,275 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2ba3d963, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms]
[2024-11-08 16:09:07,276 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations.
[2024-11-08 16:09:07,283 INFO L276 IsEmpty]: Start isEmpty. Operand has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:09:07,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2024-11-08 16:09:07,293 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:09:07,294 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:09:07,295 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:09:07,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:09:07,301 INFO L85 PathProgramCache]: Analyzing trace with hash -1169761190, now seen corresponding path program 1 times
[2024-11-08 16:09:07,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 16:09:07,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [923969592]
[2024-11-08 16:09:07,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:09:07,320 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:09:07,320 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:09:07,323 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:09:07,327 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-08 16:09:07,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:09:07,781 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 1 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:07,798 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:07,862 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked.
[2024-11-08 16:09:07,863 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 16:09:07,865 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 16:09:07,865 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [923969592]
[2024-11-08 16:09:07,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [923969592] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:09:07,867 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 16:09:07,867 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2024-11-08 16:09:07,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462309100]
[2024-11-08 16:09:07,872 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:09:07,878 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states
[2024-11-08 16:09:07,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 16:09:07,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-08 16:09:07,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 16:09:07,921 INFO L87 Difference]: Start difference. First operand has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 16:09:07,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:09:07,949 INFO L93 Difference]: Finished difference Result 36 states and 50 transitions.
[2024-11-08 16:09:07,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states.
[2024-11-08 16:09:07,954 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 23
[2024-11-08 16:09:07,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:09:07,964 INFO L225 Difference]: With dead ends: 36
[2024-11-08 16:09:07,965 INFO L226 Difference]: Without dead ends: 17
[2024-11-08 16:09:07,970 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 16:09:07,978 INFO L432 NwaCegarLoop]: 19 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 16:09:07,980 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 16:09:08,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states.
[2024-11-08 16:09:08,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17.
[2024-11-08 16:09:08,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 16:09:08,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions.
[2024-11-08 16:09:08,037 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 23
[2024-11-08 16:09:08,038 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:09:08,038 INFO L471 AbstractCegarLoop]: Abstraction has 17 states and 19 transitions.
[2024-11-08 16:09:08,039 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 16:09:08,041 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions.
[2024-11-08 16:09:08,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2024-11-08 16:09:08,043 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:09:08,044 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:09:08,075 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0
[2024-11-08 16:09:08,245 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:09:08,246 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:09:08,247 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:09:08,247 INFO L85 PathProgramCache]: Analyzing trace with hash 1446485140, now seen corresponding path program 1 times
[2024-11-08 16:09:08,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 16:09:08,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1014187114]
[2024-11-08 16:09:08,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:09:08,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:09:08,254 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:09:08,256 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:09:08,260 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-08 16:09:08,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:09:08,761 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 20 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:08,775 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:09,206 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked.
[2024-11-08 16:09:09,207 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:09:09,492 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 16:09:09,492 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1014187114]
[2024-11-08 16:09:09,492 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1014187114] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:09:09,494 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [384393170]
[2024-11-08 16:09:09,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:09:09,495 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 16:09:09,495 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 16:09:09,512 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 16:09:09,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process
[2024-11-08 16:09:10,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:09:10,082 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:10,106 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:10,245 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 16:09:10,245 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 16:09:10,245 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [384393170] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 16:09:10,246 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 16:09:10,246 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7
[2024-11-08 16:09:10,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [165099890]
[2024-11-08 16:09:10,247 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 16:09:10,249 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 16:09:10,250 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 16:09:10,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 16:09:10,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:09:10,252 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:09:10,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:09:10,363 INFO L93 Difference]: Finished difference Result 27 states and 32 transitions.
[2024-11-08 16:09:10,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-08 16:09:10,365 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23
[2024-11-08 16:09:10,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:09:10,366 INFO L225 Difference]: With dead ends: 27
[2024-11-08 16:09:10,366 INFO L226 Difference]: Without dead ends: 25
[2024-11-08 16:09:10,367 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2024-11-08 16:09:10,368 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 16:09:10,369 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 16:09:10,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states.
[2024-11-08 16:09:10,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25.
[2024-11-08 16:09:10,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 16:09:10,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions.
[2024-11-08 16:09:10,387 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23
[2024-11-08 16:09:10,389 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:09:10,390 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions.
[2024-11-08 16:09:10,390 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 16:09:10,390 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions.
[2024-11-08 16:09:10,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2024-11-08 16:09:10,393 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:09:10,393 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1]
[2024-11-08 16:09:10,416 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0
[2024-11-08 16:09:10,602 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (4)] Forceful destruction successful, exit code 0
[2024-11-08 16:09:10,798 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt
[2024-11-08 16:09:10,798 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:09:10,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:09:10,799 INFO L85 PathProgramCache]: Analyzing trace with hash 636552131, now seen corresponding path program 1 times
[2024-11-08 16:09:10,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 16:09:10,802 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [580299009]
[2024-11-08 16:09:10,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:09:10,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:09:10,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:09:10,807 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:09:10,812 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-08 16:09:11,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:09:11,416 INFO L255 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:11,433 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:12,244 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 16:09:12,244 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:09:12,510 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 16:09:12,510 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [580299009]
[2024-11-08 16:09:12,511 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [580299009] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:09:12,511 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [906022632]
[2024-11-08 16:09:12,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 16:09:12,511 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 16:09:12,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 16:09:12,515 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 16:09:12,516 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process
[2024-11-08 16:09:13,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 16:09:13,670 INFO L255 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:13,682 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:14,264 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 16:09:14,265 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:09:14,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [906022632] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:09:14,484 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences.
[2024-11-08 16:09:14,484 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10
[2024-11-08 16:09:14,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [982445158]
[2024-11-08 16:09:14,486 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton
[2024-11-08 16:09:14,487 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states
[2024-11-08 16:09:14,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 16:09:14,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-08 16:09:14,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132
[2024-11-08 16:09:14,488 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:09:15,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:09:15,100 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions.
[2024-11-08 16:09:15,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states.
[2024-11-08 16:09:15,101 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44
[2024-11-08 16:09:15,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:09:15,103 INFO L225 Difference]: With dead ends: 36
[2024-11-08 16:09:15,103 INFO L226 Difference]: Without dead ends: 34
[2024-11-08 16:09:15,104 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240
[2024-11-08 16:09:15,105 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 16:09:15,106 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 86 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 16:09:15,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states.
[2024-11-08 16:09:15,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34.
[2024-11-08 16:09:15,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 16:09:15,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions.
[2024-11-08 16:09:15,118 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44
[2024-11-08 16:09:15,118 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:09:15,119 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions.
[2024-11-08 16:09:15,119 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 16:09:15,119 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions.
[2024-11-08 16:09:15,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66
[2024-11-08 16:09:15,121 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:09:15,122 INFO L215 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1]
[2024-11-08 16:09:15,153 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0
[2024-11-08 16:09:15,332 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (6)] Ended with exit code 0
[2024-11-08 16:09:15,526 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt
[2024-11-08 16:09:15,526 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:09:15,527 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:09:15,527 INFO L85 PathProgramCache]: Analyzing trace with hash 343621620, now seen corresponding path program 2 times
[2024-11-08 16:09:15,529 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 16:09:15,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [842102652]
[2024-11-08 16:09:15,530 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-08 16:09:15,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:09:15,530 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:09:15,533 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:09:15,535 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-08 16:09:16,320 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-08 16:09:16,322 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 16:09:16,336 INFO L255 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:16,368 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:23,131 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked.
[2024-11-08 16:09:23,131 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:09:29,809 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse8 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|)) (.cse15 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse5 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) (.cse13 (not .cse15)) (.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse14 (or (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_18| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_20|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_18|))))))))))) (_ bv0 8))) .cse15))) (let ((.cse4 (and (or .cse13 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_18| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_20|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_18|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_18|) .cse12))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_18|)))))))))))))))))))))))))) .cse14)) (.cse1 (not .cse5)) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_16| (_ BitVec 32))) (not (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_16|) |c_ULTIMATE.start_main_~state_87~0#1|)))) (.cse6 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_16| (_ BitVec 32))) (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_16|) |c_ULTIMATE.start_main_~state_87~0#1|))) (.cse7 (and (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_18| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_20|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_18|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_18|) .cse12))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_18|))))))))))))))))))))) .cse8)))) .cse13) .cse14)) (.cse9 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse8 (_ bv254 32))) (_ bv0 8)))) (let ((.cse3 (not .cse0))) (and (or (and (or .cse0 .cse1) (or .cse2 .cse3)) .cse4) (or (and (or .cse0 .cse5) (or .cse6 .cse3)) .cse7)))) .cse9) (or (let ((.cse10 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse8 (_ bv255 32)))))) (let ((.cse11 (not .cse10))) (and (or .cse4 (and (or .cse10 .cse1) (or .cse2 .cse11))) (or (and (or .cse6 .cse11) (or .cse10 .cse5)) .cse7)))) (not .cse9)))))) is different from false
[2024-11-08 16:09:30,179 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 16:09:30,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [842102652]
[2024-11-08 16:09:30,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [842102652] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:09:30,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1799053578]
[2024-11-08 16:09:30,180 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-08 16:09:30,180 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 16:09:30,181 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 16:09:30,184 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 16:09:30,187 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process
[2024-11-08 16:09:31,659 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-08 16:09:31,659 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 16:09:31,707 INFO L255 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core
[2024-11-08 16:09:31,733 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:09:36,698 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked.
[2024-11-08 16:09:36,698 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:09:42,626 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse4 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse7 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_110_arg_1~0#1_22| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_111~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_22|))))))))) .cse4)))))) (let ((.cse1 (and (forall ((|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_22| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_22|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_22|) .cse7)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_22|)))))))))))))))))))))) .cse2))) (let ((.cse5 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse3 (let ((.cse6 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|)))) (and (or .cse1 .cse6) (or (not .cse6) (and (forall ((|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_22| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_22|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_22|) .cse7)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_22|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))) .cse4)))) .cse2)))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse4 (_ bv254 32))) (_ bv0 8)))) (and (or (not .cse0) (and (or .cse1 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_20| (_ BitVec 32))) (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_20|) |c_ULTIMATE.start_main_~state_87~0#1|))) (or .cse2 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_20| (_ BitVec 32))) (not (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_20|) |c_ULTIMATE.start_main_~state_87~0#1|)))))) (or .cse0 .cse3))) .cse5) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 (_ bv255 32)))) (not .cse5) .cse3)))))) is different from false
[2024-11-08 16:09:43,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1799053578] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 16:09:43,193 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences.
[2024-11-08 16:09:43,193 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 14
[2024-11-08 16:09:43,193 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901530912]
[2024-11-08 16:09:43,194 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton
[2024-11-08 16:09:43,194 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states
[2024-11-08 16:09:43,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 16:09:43,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants.
[2024-11-08 16:09:43,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=180, Unknown=2, NotChecked=54, Total=272
[2024-11-08 16:09:43,197 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 14 states, 12 states have (on average 2.75) internal successors, (33), 14 states have internal predecessors, (33), 6 states have call successors, (12), 1 states have call predecessors, (12), 2 states have return successors, (12), 5 states have call predecessors, (12), 6 states have call successors, (12)
[2024-11-08 16:10:22,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 16:10:22,870 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions.
[2024-11-08 16:10:22,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states.
[2024-11-08 16:10:22,871 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 12 states have (on average 2.75) internal successors, (33), 14 states have internal predecessors, (33), 6 states have call successors, (12), 1 states have call predecessors, (12), 2 states have return successors, (12), 5 states have call predecessors, (12), 6 states have call successors, (12) Word has length 65
[2024-11-08 16:10:22,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 16:10:22,873 INFO L225 Difference]: With dead ends: 46
[2024-11-08 16:10:22,873 INFO L226 Difference]: Without dead ends: 44
[2024-11-08 16:10:22,874 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 48.4s TimeCoverageRelationStatistics Valid=103, Invalid=547, Unknown=8, NotChecked=98, Total=756
[2024-11-08 16:10:22,875 INFO L432 NwaCegarLoop]: 15 mSDtfsCounter, 14 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 279 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 289 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 279 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.5s IncrementalHoareTripleChecker+Time
[2024-11-08 16:10:22,876 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [14 Valid, 150 Invalid, 289 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 279 Invalid, 0 Unknown, 0 Unchecked, 3.5s Time]
[2024-11-08 16:10:22,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states.
[2024-11-08 16:10:22,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43.
[2024-11-08 16:10:22,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 16:10:22,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions.
[2024-11-08 16:10:22,902 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65
[2024-11-08 16:10:22,902 INFO L84 Accepts]: Finished accepts. word is rejected.
[2024-11-08 16:10:22,903 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions.
[2024-11-08 16:10:22,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 12 states have (on average 2.75) internal successors, (33), 14 states have internal predecessors, (33), 6 states have call successors, (12), 1 states have call predecessors, (12), 2 states have return successors, (12), 5 states have call predecessors, (12), 6 states have call successors, (12)
[2024-11-08 16:10:22,903 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions.
[2024-11-08 16:10:22,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87
[2024-11-08 16:10:22,906 INFO L207 NwaCegarLoop]: Found error trace
[2024-11-08 16:10:22,907 INFO L215 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1]
[2024-11-08 16:10:22,931 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0
[2024-11-08 16:10:23,121 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0
[2024-11-08 16:10:23,311 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt
[2024-11-08 16:10:23,311 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 16:10:23,312 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 16:10:23,312 INFO L85 PathProgramCache]: Analyzing trace with hash -1752744861, now seen corresponding path program 3 times
[2024-11-08 16:10:23,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 16:10:23,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1099910211]
[2024-11-08 16:10:23,314 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2024-11-08 16:10:23,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:10:23,315 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 16:10:23,317 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 16:10:23,320 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process
[2024-11-08 16:10:24,398 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s)
[2024-11-08 16:10:24,398 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 16:10:24,411 INFO L255 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 216 conjuncts are in the unsatisfiable core
[2024-11-08 16:10:24,443 INFO L278 TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 16:13:08,022 WARN L286 SmtUtils]: Spent 13.89s on a formula simplification. DAG size of input: 358 DAG size of output: 354 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 16:13:30,058 WARN L286 SmtUtils]: Spent 9.16s on a formula simplification that was a NOOP. DAG size: 364 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 16:13:52,071 WARN L286 SmtUtils]: Spent 8.79s on a formula simplification that was a NOOP. DAG size: 357 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 16:15:03,828 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 111 refuted. 0 times theorem prover too weak. 159 trivial. 0 not checked.
[2024-11-08 16:15:03,828 INFO L311 TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 16:15:48,244 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory")
[2024-11-08 16:15:48,245 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 16:15:48,246 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1099910211]
[2024-11-08 16:15:48,244 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 101
[2024-11-08 16:15:48,249 WARN L320 FreeRefinementEngine]: Global settings require throwing the following exception
[2024-11-08 16:15:48,296 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0
[2024-11-08 16:15:48,450 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 16:15:48,451 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver:
de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")
at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262)
at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:277)
at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:140)
at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99)
at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117)
at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.pop(ManagedScript.java:138)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:86)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:912)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.<init>(PredicateUnifier.java:786)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:553)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:395)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:324)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:180)
at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.<init>(TraceCheckSpWp.java:159)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.isCorrect(IpTcStrategyModuleBase.java:57)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:210)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:121)
at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.<init>(AutomatonFreeRefinementEngine.java:85)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.<init>(TraceAbstractionRefinementEngine.java:82)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:302)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:426)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:312)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:273)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.<init>(TraceAbstractionStarter.java:143)
at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319)
at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145)
at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63)
Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF
at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518)
at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701)
at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383)
at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258)
... 46 more
[2024-11-08 16:15:48,456 INFO L158 Benchmark]: Toolchain (without parser) took 403946.03ms. Allocated memory was 65.0MB in the beginning and 513.8MB in the end (delta: 448.8MB). Free memory was 35.4MB in the beginning and 402.3MB in the end (delta: -366.9MB). Peak memory consumption was 80.6MB. Max. memory is 16.1GB.
[2024-11-08 16:15:48,456 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 65.0MB. Free memory was 41.7MB in the beginning and 41.6MB in the end (delta: 81.6kB). There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 16:15:48,458 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1022.98ms. Allocated memory was 65.0MB in the beginning and 94.4MB in the end (delta: 29.4MB). Free memory was 35.2MB in the beginning and 53.6MB in the end (delta: -18.4MB). Peak memory consumption was 9.7MB. Max. memory is 16.1GB.
[2024-11-08 16:15:48,461 INFO L158 Benchmark]: Boogie Procedure Inliner took 141.77ms. Allocated memory is still 94.4MB. Free memory was 53.3MB in the beginning and 48.0MB in the end (delta: 5.2MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB.
[2024-11-08 16:15:48,462 INFO L158 Benchmark]: Boogie Preprocessor took 127.25ms. Allocated memory is still 94.4MB. Free memory was 48.0MB in the beginning and 65.8MB in the end (delta: -17.7MB). Peak memory consumption was 5.5MB. Max. memory is 16.1GB.
[2024-11-08 16:15:48,462 INFO L158 Benchmark]: RCFGBuilder took 1317.30ms. Allocated memory is still 94.4MB. Free memory was 65.8MB in the beginning and 55.3MB in the end (delta: 10.4MB). Peak memory consumption was 31.3MB. Max. memory is 16.1GB.
[2024-11-08 16:15:48,463 INFO L158 Benchmark]: TraceAbstraction took 401328.41ms. Allocated memory was 94.4MB in the beginning and 513.8MB in the end (delta: 419.4MB). Free memory was 54.3MB in the beginning and 402.3MB in the end (delta: -348.0MB). Peak memory consumption was 71.9MB. Max. memory is 16.1GB.
[2024-11-08 16:15:48,466 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.32ms. Allocated memory is still 65.0MB. Free memory was 41.7MB in the beginning and 41.6MB in the end (delta: 81.6kB). There was no memory consumed. Max. memory is 16.1GB.
* CACSL2BoogieTranslator took 1022.98ms. Allocated memory was 65.0MB in the beginning and 94.4MB in the end (delta: 29.4MB). Free memory was 35.2MB in the beginning and 53.6MB in the end (delta: -18.4MB). Peak memory consumption was 9.7MB. Max. memory is 16.1GB.
* Boogie Procedure Inliner took 141.77ms. Allocated memory is still 94.4MB. Free memory was 53.3MB in the beginning and 48.0MB in the end (delta: 5.2MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB.
* Boogie Preprocessor took 127.25ms. Allocated memory is still 94.4MB. Free memory was 48.0MB in the beginning and 65.8MB in the end (delta: -17.7MB). Peak memory consumption was 5.5MB. Max. memory is 16.1GB.
* RCFGBuilder took 1317.30ms. Allocated memory is still 94.4MB. Free memory was 65.8MB in the beginning and 55.3MB in the end (delta: 10.4MB). Peak memory consumption was 31.3MB. Max. memory is 16.1GB.
* TraceAbstraction took 401328.41ms. Allocated memory was 94.4MB in the beginning and 513.8MB in the end (delta: 419.4MB). Free memory was 54.3MB in the beginning and 402.3MB in the end (delta: -348.0MB). Peak memory consumption was 71.9MB. Max. memory is 16.1GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")
de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")
: de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262)
RESULT: Ultimate could not prove your program: Toolchain returned no result.
Received shutdown request...
--- End real Ultimate output ---
Execution finished normally
Writing output log to file Ultimate.log
Result:
ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_c02d7f22-14c1-4882-972e-6b5791f4827f/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")