./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c --full-output --architecture 64bit


--------------------------------------------------------------------------------


Checking for ERROR reachability
Using default analysis
Version a0165632
Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-a016563
[2024-11-08 11:17:43,091 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-11-08 11:17:43,196 INFO  L114        SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf
[2024-11-08 11:17:43,202 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-11-08 11:17:43,205 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-08 11:17:43,246 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-08 11:17:43,247 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-08 11:17:43,247 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-08 11:17:43,251 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-08 11:17:43,251 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-11-08 11:17:43,251 INFO  L151        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2024-11-08 11:17:43,252 INFO  L153        SettingsManager]:  * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2024-11-08 11:17:43,252 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-08 11:17:43,253 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-11-08 11:17:43,253 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-11-08 11:17:43,253 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-08 11:17:43,254 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2024-11-08 11:17:43,254 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2024-11-08 11:17:43,254 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-11-08 11:17:43,255 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2024-11-08 11:17:43,255 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2024-11-08 11:17:43,256 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2024-11-08 11:17:43,256 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-11-08 11:17:43,257 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-11-08 11:17:43,257 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-11-08 11:17:43,258 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-08 11:17:43,258 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-11-08 11:17:43,259 INFO  L153        SettingsManager]:  * Only consider context switches at boundaries of atomic blocks=true
[2024-11-08 11:17:43,259 INFO  L153        SettingsManager]:  * SMT solver=External_DefaultMode
[2024-11-08 11:17:43,259 INFO  L153        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 11:17:43,260 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-08 11:17:43,260 INFO  L153        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2024-11-08 11:17:43,260 INFO  L153        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopHeads
[2024-11-08 11:17:43,261 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2024-11-08 11:17:43,261 INFO  L153        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2024-11-08 11:17:43,261 INFO  L153        SettingsManager]:  * Apply one-shot large block encoding in concurrent analysis=false
[2024-11-08 11:17:43,262 INFO  L153        SettingsManager]:  * Automaton type used in concurrency analysis=PETRI_NET
[2024-11-08 11:17:43,262 INFO  L153        SettingsManager]:  * Order on configurations for Petri net unfoldings=DBO
[2024-11-08 11:17:43,262 INFO  L153        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2024-11-08 11:17:43,263 INFO  L153        SettingsManager]:  * Looper check in Petri net analysis=SEMANTIC
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119
[2024-11-08 11:17:43,654 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-08 11:17:43,692 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-08 11:17:43,695 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-08 11:17:43,696 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-11-08 11:17:43,697 INFO  L274        PluginConnector]: CDTParser initialized
[2024-11-08 11:17:43,699 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c
Unable to find full path for "g++"
[2024-11-08 11:17:46,067 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-11-08 11:17:46,328 INFO  L384              CDTParser]: Found 1 translation units.
[2024-11-08 11:17:46,329 INFO  L180              CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c
[2024-11-08 11:17:46,346 INFO  L427              CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data/0065c769e/4ca260b83f664bac8adc44df209515d8/FLAGdb98d2290
[2024-11-08 11:17:46,361 INFO  L435              CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data/0065c769e/4ca260b83f664bac8adc44df209515d8
[2024-11-08 11:17:46,363 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-08 11:17:46,365 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-08 11:17:46,366 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-08 11:17:46,366 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-08 11:17:46,373 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-08 11:17:46,374 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 11:17:46" (1/1) ...
[2024-11-08 11:17:46,375 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@54b12d71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:46, skipping insertion in model container
[2024-11-08 11:17:46,376 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 11:17:46" (1/1) ...
[2024-11-08 11:17:46,455 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-11-08 11:17:46,665 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293]
[2024-11-08 11:17:47,019 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 11:17:47,036 INFO  L200         MainTranslator]: Completed pre-run
[2024-11-08 11:17:47,049 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293]
[2024-11-08 11:17:47,207 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 11:17:47,226 INFO  L204         MainTranslator]: Completed translation
[2024-11-08 11:17:47,226 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47 WrapperNode
[2024-11-08 11:17:47,226 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-08 11:17:47,227 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-08 11:17:47,227 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-08 11:17:47,227 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-08 11:17:47,234 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,285 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,537 INFO  L138                Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1978
[2024-11-08 11:17:47,537 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-08 11:17:47,538 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-08 11:17:47,538 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-08 11:17:47,538 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-11-08 11:17:47,552 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,553 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,610 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,708 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-08 11:17:47,708 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,709 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,784 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,853 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,880 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,893 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,933 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-08 11:17:47,934 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-08 11:17:47,935 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2024-11-08 11:17:47,935 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2024-11-08 11:17:47,936 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (1/1) ...
[2024-11-08 11:17:47,942 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 11:17:47,954 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:17:47,974 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null)
[2024-11-08 11:17:47,977 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process
[2024-11-08 11:17:48,013 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-08 11:17:48,015 INFO  L130     BoogieDeclarations]: Found specification of procedure assume_abort_if_not
[2024-11-08 11:17:48,015 INFO  L138     BoogieDeclarations]: Found implementation of procedure assume_abort_if_not
[2024-11-08 11:17:48,015 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-11-08 11:17:48,016 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-08 11:17:48,016 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-08 11:17:48,334 INFO  L238             CfgBuilder]: Building ICFG
[2024-11-08 11:17:48,336 INFO  L264             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-08 11:17:51,339 INFO  L?                        ?]: Removed 1091 outVars from TransFormulas that were not future-live.
[2024-11-08 11:17:51,339 INFO  L287             CfgBuilder]: Performing block encoding
[2024-11-08 11:17:51,368 INFO  L311             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-08 11:17:51,368 INFO  L316             CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-08 11:17:51,369 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 11:17:51 BoogieIcfgContainer
[2024-11-08 11:17:51,369 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-08 11:17:51,371 INFO  L112        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2024-11-08 11:17:51,371 INFO  L270        PluginConnector]: Initializing TraceAbstraction...
[2024-11-08 11:17:51,376 INFO  L274        PluginConnector]: TraceAbstraction initialized
[2024-11-08 11:17:51,377 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 11:17:46" (1/3) ...
[2024-11-08 11:17:51,378 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38d32ae5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 11:17:51, skipping insertion in model container
[2024-11-08 11:17:51,379 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:17:47" (2/3) ...
[2024-11-08 11:17:51,379 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@38d32ae5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 11:17:51, skipping insertion in model container
[2024-11-08 11:17:51,380 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 11:17:51" (3/3) ...
[2024-11-08 11:17:51,381 INFO  L112   eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c
[2024-11-08 11:17:51,399 INFO  L214   ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2024-11-08 11:17:51,400 INFO  L154   ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations.
[2024-11-08 11:17:51,502 INFO  L332      AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2024-11-08 11:17:51,513 INFO  L333      AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@18e5ac3c, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms]
[2024-11-08 11:17:51,513 INFO  L334      AbstractCegarLoop]: Starting to check reachability of 1 error locations.
[2024-11-08 11:17:51,520 INFO  L276                IsEmpty]: Start isEmpty. Operand  has 553 states, 547 states have (on average 1.4954296160877514) internal successors, (818), 548 states have internal predecessors, (818), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:51,540 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 150
[2024-11-08 11:17:51,542 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:51,543 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:51,544 INFO  L396      AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:51,549 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:51,550 INFO  L85        PathProgramCache]: Analyzing trace with hash -514989775, now seen corresponding path program 1 times
[2024-11-08 11:17:51,561 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:51,562 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448733955]
[2024-11-08 11:17:51,562 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:51,563 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:51,811 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:52,213 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:52,215 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:52,219 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:52,225 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:52,227 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:52,230 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:52,234 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:52,237 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:52,237 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448733955]
[2024-11-08 11:17:52,238 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448733955] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:52,238 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:52,238 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2024-11-08 11:17:52,241 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011132244]
[2024-11-08 11:17:52,242 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:52,248 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 2 states
[2024-11-08 11:17:52,248 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:52,280 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-08 11:17:52,281 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 11:17:52,286 INFO  L87              Difference]: Start difference. First operand  has 553 states, 547 states have (on average 1.4954296160877514) internal successors, (818), 548 states have internal predecessors, (818), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 2 states, 2 states have (on average 68.5) internal successors, (137), 2 states have internal predecessors, (137), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:17:52,362 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:52,369 INFO  L93              Difference]: Finished difference Result 1000 states and 1496 transitions.
[2024-11-08 11:17:52,370 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2024-11-08 11:17:52,371 INFO  L78                 Accepts]: Start accepts. Automaton has  has 2 states, 2 states have (on average 68.5) internal successors, (137), 2 states have internal predecessors, (137), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 149
[2024-11-08 11:17:52,372 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:52,388 INFO  L225             Difference]: With dead ends: 1000
[2024-11-08 11:17:52,390 INFO  L226             Difference]: Without dead ends: 549
[2024-11-08 11:17:52,397 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 11:17:52,402 INFO  L432           NwaCegarLoop]: 817 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 817 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:52,403 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 817 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:17:52,426 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 549 states.
[2024-11-08 11:17:52,481 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 549 to 549.
[2024-11-08 11:17:52,484 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 549 states, 544 states have (on average 1.4908088235294117) internal successors, (811), 544 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:52,487 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 817 transitions.
[2024-11-08 11:17:52,489 INFO  L78                 Accepts]: Start accepts. Automaton has 549 states and 817 transitions. Word has length 149
[2024-11-08 11:17:52,490 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:52,490 INFO  L471      AbstractCegarLoop]: Abstraction has 549 states and 817 transitions.
[2024-11-08 11:17:52,491 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 2 states, 2 states have (on average 68.5) internal successors, (137), 2 states have internal predecessors, (137), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:17:52,491 INFO  L276                IsEmpty]: Start isEmpty. Operand 549 states and 817 transitions.
[2024-11-08 11:17:52,495 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 150
[2024-11-08 11:17:52,495 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:52,496 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:52,496 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0
[2024-11-08 11:17:52,497 INFO  L396      AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:52,497 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:52,497 INFO  L85        PathProgramCache]: Analyzing trace with hash 56811627, now seen corresponding path program 1 times
[2024-11-08 11:17:52,498 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:52,498 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [480307385]
[2024-11-08 11:17:52,498 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:52,499 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:52,758 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,041 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:54,043 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,046 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:54,047 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,049 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:54,050 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,053 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:54,053 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:54,054 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [480307385]
[2024-11-08 11:17:54,054 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [480307385] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:54,054 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:54,055 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:17:54,055 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [127665655]
[2024-11-08 11:17:54,055 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:54,057 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:17:54,057 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:54,058 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:17:54,059 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:17:54,059 INFO  L87              Difference]: Start difference. First operand 549 states and 817 transitions. Second operand  has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:54,119 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:54,119 INFO  L93              Difference]: Finished difference Result 553 states and 821 transitions.
[2024-11-08 11:17:54,120 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:17:54,120 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 149
[2024-11-08 11:17:54,121 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:54,124 INFO  L225             Difference]: With dead ends: 553
[2024-11-08 11:17:54,124 INFO  L226             Difference]: Without dead ends: 551
[2024-11-08 11:17:54,125 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:17:54,126 INFO  L432           NwaCegarLoop]: 815 mSDtfsCounter, 0 mSDsluCounter, 1624 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2439 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:54,127 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2439 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:17:54,128 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 551 states.
[2024-11-08 11:17:54,147 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551.
[2024-11-08 11:17:54,148 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 551 states, 546 states have (on average 1.489010989010989) internal successors, (813), 546 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:54,150 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 819 transitions.
[2024-11-08 11:17:54,151 INFO  L78                 Accepts]: Start accepts. Automaton has 551 states and 819 transitions. Word has length 149
[2024-11-08 11:17:54,153 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:54,153 INFO  L471      AbstractCegarLoop]: Abstraction has 551 states and 819 transitions.
[2024-11-08 11:17:54,154 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:54,158 INFO  L276                IsEmpty]: Start isEmpty. Operand 551 states and 819 transitions.
[2024-11-08 11:17:54,161 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 151
[2024-11-08 11:17:54,161 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:54,161 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:54,162 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1
[2024-11-08 11:17:54,162 INFO  L396      AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:54,162 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:54,166 INFO  L85        PathProgramCache]: Analyzing trace with hash 1762856419, now seen corresponding path program 1 times
[2024-11-08 11:17:54,166 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:54,166 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117919769]
[2024-11-08 11:17:54,166 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:54,167 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:54,376 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,910 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:54,912 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,915 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:54,917 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,921 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:54,923 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:54,927 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:54,930 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:54,930 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117919769]
[2024-11-08 11:17:54,931 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117919769] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:54,931 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:54,931 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:17:54,931 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098150827]
[2024-11-08 11:17:54,931 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:54,932 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:17:54,932 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:54,933 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:17:54,935 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:17:54,935 INFO  L87              Difference]: Start difference. First operand 551 states and 819 transitions. Second operand  has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:55,580 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:55,580 INFO  L93              Difference]: Finished difference Result 1371 states and 2041 transitions.
[2024-11-08 11:17:55,581 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:17:55,581 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 150
[2024-11-08 11:17:55,582 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:55,584 INFO  L225             Difference]: With dead ends: 1371
[2024-11-08 11:17:55,584 INFO  L226             Difference]: Without dead ends: 551
[2024-11-08 11:17:55,587 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56
[2024-11-08 11:17:55,588 INFO  L432           NwaCegarLoop]: 861 mSDtfsCounter, 1618 mSDsluCounter, 1490 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1618 SdHoareTripleChecker+Valid, 2351 SdHoareTripleChecker+Invalid, 339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:55,588 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1618 Valid, 2351 Invalid, 339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 11:17:55,590 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 551 states.
[2024-11-08 11:17:55,603 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551.
[2024-11-08 11:17:55,605 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 551 states, 546 states have (on average 1.4871794871794872) internal successors, (812), 546 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:55,607 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 818 transitions.
[2024-11-08 11:17:55,607 INFO  L78                 Accepts]: Start accepts. Automaton has 551 states and 818 transitions. Word has length 150
[2024-11-08 11:17:55,608 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:55,608 INFO  L471      AbstractCegarLoop]: Abstraction has 551 states and 818 transitions.
[2024-11-08 11:17:55,609 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:55,609 INFO  L276                IsEmpty]: Start isEmpty. Operand 551 states and 818 transitions.
[2024-11-08 11:17:55,611 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 152
[2024-11-08 11:17:55,611 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:55,611 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:55,611 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2
[2024-11-08 11:17:55,612 INFO  L396      AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:55,612 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:55,613 INFO  L85        PathProgramCache]: Analyzing trace with hash -672467347, now seen corresponding path program 1 times
[2024-11-08 11:17:55,613 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:55,613 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125563455]
[2024-11-08 11:17:55,613 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:55,613 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:55,764 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:56,324 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:56,325 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:56,327 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:56,328 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:56,330 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:56,331 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:56,334 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:56,334 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:56,334 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125563455]
[2024-11-08 11:17:56,335 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1125563455] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:56,335 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:56,335 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:17:56,335 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [427997787]
[2024-11-08 11:17:56,336 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:56,336 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:17:56,337 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:56,337 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:17:56,338 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:17:56,338 INFO  L87              Difference]: Start difference. First operand 551 states and 818 transitions. Second operand  has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:56,386 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:56,386 INFO  L93              Difference]: Finished difference Result 1002 states and 1487 transitions.
[2024-11-08 11:17:56,387 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:17:56,387 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 151
[2024-11-08 11:17:56,388 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:56,391 INFO  L225             Difference]: With dead ends: 1002
[2024-11-08 11:17:56,392 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:17:56,393 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:17:56,394 INFO  L432           NwaCegarLoop]: 814 mSDtfsCounter, 0 mSDsluCounter, 1618 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2432 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:56,398 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2432 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:17:56,400 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:17:56,412 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:17:56,413 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4854014598540146) internal successors, (814), 548 states have internal predecessors, (814), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:56,415 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions.
[2024-11-08 11:17:56,416 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 151
[2024-11-08 11:17:56,416 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:56,417 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 820 transitions.
[2024-11-08 11:17:56,417 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:56,417 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions.
[2024-11-08 11:17:56,421 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 153
[2024-11-08 11:17:56,422 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:56,422 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:56,422 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3
[2024-11-08 11:17:56,423 INFO  L396      AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:56,423 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:56,423 INFO  L85        PathProgramCache]: Analyzing trace with hash -469616390, now seen corresponding path program 1 times
[2024-11-08 11:17:56,423 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:56,424 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283747447]
[2024-11-08 11:17:56,424 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:56,424 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:56,593 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:57,379 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:57,382 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:57,391 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:57,392 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:57,398 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:57,400 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:57,406 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:57,406 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:57,406 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283747447]
[2024-11-08 11:17:57,408 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [283747447] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:57,408 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:57,408 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:17:57,409 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [90521896]
[2024-11-08 11:17:57,409 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:57,409 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:17:57,410 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:57,410 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:17:57,411 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:17:57,411 INFO  L87              Difference]: Start difference. First operand 553 states and 820 transitions. Second operand  has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:57,702 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:57,702 INFO  L93              Difference]: Finished difference Result 1004 states and 1488 transitions.
[2024-11-08 11:17:57,703 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:17:57,703 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 152
[2024-11-08 11:17:57,704 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:57,706 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:17:57,707 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:17:57,708 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:17:57,712 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 694 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 694 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:57,713 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [694 Valid, 1470 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:17:57,715 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:17:57,728 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:17:57,730 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4835766423357664) internal successors, (813), 548 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:57,732 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 819 transitions.
[2024-11-08 11:17:57,732 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 819 transitions. Word has length 152
[2024-11-08 11:17:57,733 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:57,734 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 819 transitions.
[2024-11-08 11:17:57,734 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:57,734 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 819 transitions.
[2024-11-08 11:17:57,736 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 154
[2024-11-08 11:17:57,736 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:57,736 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:57,738 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4
[2024-11-08 11:17:57,739 INFO  L396      AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:57,739 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:57,740 INFO  L85        PathProgramCache]: Analyzing trace with hash 354164478, now seen corresponding path program 1 times
[2024-11-08 11:17:57,741 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:57,741 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074421458]
[2024-11-08 11:17:57,742 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:57,742 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:57,911 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:58,363 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:58,365 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:58,371 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:58,373 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:58,376 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:58,378 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:58,380 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:58,381 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:58,381 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074421458]
[2024-11-08 11:17:58,381 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1074421458] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:58,382 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:58,382 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:17:58,382 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1028326965]
[2024-11-08 11:17:58,383 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:58,383 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:17:58,383 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:58,384 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:17:58,384 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:17:58,385 INFO  L87              Difference]: Start difference. First operand 553 states and 819 transitions. Second operand  has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:58,605 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:58,606 INFO  L93              Difference]: Finished difference Result 1010 states and 1494 transitions.
[2024-11-08 11:17:58,606 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 11:17:58,607 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 153
[2024-11-08 11:17:58,607 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:58,610 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:17:58,610 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:17:58,611 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:17:58,612 INFO  L432           NwaCegarLoop]: 806 mSDtfsCounter, 705 mSDsluCounter, 1544 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 705 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:58,613 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [705 Valid, 2350 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:17:58,614 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:17:58,626 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:17:58,627 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4817518248175183) internal successors, (812), 548 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:58,629 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 818 transitions.
[2024-11-08 11:17:58,630 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 818 transitions. Word has length 153
[2024-11-08 11:17:58,630 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:58,631 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 818 transitions.
[2024-11-08 11:17:58,631 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:58,631 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 818 transitions.
[2024-11-08 11:17:58,633 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 155
[2024-11-08 11:17:58,633 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:58,633 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:58,634 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5
[2024-11-08 11:17:58,634 INFO  L396      AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:58,635 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:58,635 INFO  L85        PathProgramCache]: Analyzing trace with hash -1677961083, now seen corresponding path program 1 times
[2024-11-08 11:17:58,635 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:58,635 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701495211]
[2024-11-08 11:17:58,636 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:58,636 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:58,780 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:59,212 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:17:59,214 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:59,217 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:17:59,218 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:59,221 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:17:59,222 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:17:59,224 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:17:59,225 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:17:59,225 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701495211]
[2024-11-08 11:17:59,225 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [701495211] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:17:59,225 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:17:59,226 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:17:59,226 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286249609]
[2024-11-08 11:17:59,226 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:17:59,226 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:17:59,227 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:17:59,227 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:17:59,227 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:17:59,228 INFO  L87              Difference]: Start difference. First operand 553 states and 818 transitions. Second operand  has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:59,481 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:17:59,482 INFO  L93              Difference]: Finished difference Result 1004 states and 1484 transitions.
[2024-11-08 11:17:59,482 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:17:59,482 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 154
[2024-11-08 11:17:59,483 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:17:59,484 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:17:59,485 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:17:59,486 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:17:59,489 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 1495 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1498 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:17:59,489 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1498 Valid, 1470 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:17:59,491 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:17:59,503 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:17:59,504 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.47992700729927) internal successors, (811), 548 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:17:59,506 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 817 transitions.
[2024-11-08 11:17:59,508 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 817 transitions. Word has length 154
[2024-11-08 11:17:59,509 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:17:59,509 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 817 transitions.
[2024-11-08 11:17:59,509 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:17:59,509 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 817 transitions.
[2024-11-08 11:17:59,511 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 156
[2024-11-08 11:17:59,511 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:17:59,511 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:17:59,512 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6
[2024-11-08 11:17:59,512 INFO  L396      AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:17:59,512 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:17:59,512 INFO  L85        PathProgramCache]: Analyzing trace with hash -1862015035, now seen corresponding path program 1 times
[2024-11-08 11:17:59,513 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:17:59,513 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071305645]
[2024-11-08 11:17:59,513 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:17:59,513 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:17:59,649 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:00,085 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:00,086 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:00,088 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:00,090 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:00,092 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:00,093 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:00,097 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:00,097 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:00,098 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2071305645]
[2024-11-08 11:18:00,098 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2071305645] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:00,098 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:00,098 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:00,098 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822290495]
[2024-11-08 11:18:00,099 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:00,099 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:00,099 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:00,100 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:00,100 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:00,100 INFO  L87              Difference]: Start difference. First operand 553 states and 817 transitions. Second operand  has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:00,364 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:00,365 INFO  L93              Difference]: Finished difference Result 1004 states and 1482 transitions.
[2024-11-08 11:18:00,365 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:00,366 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 155
[2024-11-08 11:18:00,366 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:00,368 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:00,368 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:00,369 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:00,371 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 798 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 801 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:00,371 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [801 Valid, 1477 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:00,372 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:00,384 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:00,386 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4781021897810218) internal successors, (810), 548 states have internal predecessors, (810), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:00,388 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 816 transitions.
[2024-11-08 11:18:00,389 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 816 transitions. Word has length 155
[2024-11-08 11:18:00,389 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:00,389 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 816 transitions.
[2024-11-08 11:18:00,390 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:00,390 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 816 transitions.
[2024-11-08 11:18:00,392 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 157
[2024-11-08 11:18:00,393 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:00,393 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:00,393 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7
[2024-11-08 11:18:00,393 INFO  L396      AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:00,394 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:00,394 INFO  L85        PathProgramCache]: Analyzing trace with hash 403809836, now seen corresponding path program 1 times
[2024-11-08 11:18:00,394 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:00,394 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543852633]
[2024-11-08 11:18:00,395 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:00,395 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:00,544 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:00,990 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:00,992 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:00,995 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:00,996 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:01,000 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:01,002 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:01,005 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:01,005 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:01,005 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543852633]
[2024-11-08 11:18:01,005 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [543852633] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:01,006 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:01,006 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:01,006 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897871611]
[2024-11-08 11:18:01,006 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:01,007 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:01,008 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:01,008 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:01,009 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:01,009 INFO  L87              Difference]: Start difference. First operand 553 states and 816 transitions. Second operand  has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:01,291 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:01,291 INFO  L93              Difference]: Finished difference Result 1004 states and 1480 transitions.
[2024-11-08 11:18:01,292 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:01,292 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 156
[2024-11-08 11:18:01,293 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:01,295 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:01,296 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:01,297 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:01,298 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 1473 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1476 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:01,298 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1476 Valid, 1470 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:01,300 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:01,314 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:01,315 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4762773722627738) internal successors, (809), 548 states have internal predecessors, (809), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:01,318 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 815 transitions.
[2024-11-08 11:18:01,319 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 815 transitions. Word has length 156
[2024-11-08 11:18:01,319 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:01,319 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 815 transitions.
[2024-11-08 11:18:01,320 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:01,320 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 815 transitions.
[2024-11-08 11:18:01,322 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 158
[2024-11-08 11:18:01,322 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:01,323 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:01,323 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8
[2024-11-08 11:18:01,323 INFO  L396      AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:01,324 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:01,324 INFO  L85        PathProgramCache]: Analyzing trace with hash 878298629, now seen corresponding path program 1 times
[2024-11-08 11:18:01,324 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:01,325 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605490276]
[2024-11-08 11:18:01,325 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:01,325 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:01,494 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:01,978 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:01,980 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:01,983 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:01,985 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:01,987 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:01,989 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:01,991 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:01,992 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:01,992 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [605490276]
[2024-11-08 11:18:01,992 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [605490276] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:01,992 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:01,992 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:01,993 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18004236]
[2024-11-08 11:18:01,993 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:01,993 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:01,993 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:01,994 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:01,994 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:01,995 INFO  L87              Difference]: Start difference. First operand 553 states and 815 transitions. Second operand  has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:02,224 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:02,224 INFO  L93              Difference]: Finished difference Result 1004 states and 1478 transitions.
[2024-11-08 11:18:02,225 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:02,225 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 157
[2024-11-08 11:18:02,226 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:02,228 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:02,228 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:02,229 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:02,230 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 1465 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1468 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:02,231 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1468 Valid, 1470 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:02,232 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:02,243 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:02,244 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4744525547445255) internal successors, (808), 548 states have internal predecessors, (808), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:02,246 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 814 transitions.
[2024-11-08 11:18:02,247 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 814 transitions. Word has length 157
[2024-11-08 11:18:02,247 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:02,248 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 814 transitions.
[2024-11-08 11:18:02,248 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:02,248 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 814 transitions.
[2024-11-08 11:18:02,250 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 159
[2024-11-08 11:18:02,250 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:02,250 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:02,251 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9
[2024-11-08 11:18:02,251 INFO  L396      AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:02,251 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:02,252 INFO  L85        PathProgramCache]: Analyzing trace with hash -382060155, now seen corresponding path program 1 times
[2024-11-08 11:18:02,253 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:02,253 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620477003]
[2024-11-08 11:18:02,256 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:02,256 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:02,400 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:02,797 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:02,799 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:02,801 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:02,802 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:02,804 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:02,806 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:02,808 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:02,809 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:02,809 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620477003]
[2024-11-08 11:18:02,809 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1620477003] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:02,809 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:02,809 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:02,809 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975432950]
[2024-11-08 11:18:02,810 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:02,810 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:02,810 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:02,811 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:02,811 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:02,811 INFO  L87              Difference]: Start difference. First operand 553 states and 814 transitions. Second operand  has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:03,042 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:03,042 INFO  L93              Difference]: Finished difference Result 1004 states and 1476 transitions.
[2024-11-08 11:18:03,043 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:03,043 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 158
[2024-11-08 11:18:03,044 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:03,046 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:03,046 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:03,047 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:03,047 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 783 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 786 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:03,048 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [786 Valid, 1477 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:03,049 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:03,060 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:03,061 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4726277372262773) internal successors, (807), 548 states have internal predecessors, (807), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:03,063 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 813 transitions.
[2024-11-08 11:18:03,063 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 813 transitions. Word has length 158
[2024-11-08 11:18:03,064 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:03,064 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 813 transitions.
[2024-11-08 11:18:03,064 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:03,064 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 813 transitions.
[2024-11-08 11:18:03,066 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 160
[2024-11-08 11:18:03,066 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:03,066 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:03,067 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10
[2024-11-08 11:18:03,067 INFO  L396      AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:03,067 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:03,067 INFO  L85        PathProgramCache]: Analyzing trace with hash 118982782, now seen corresponding path program 1 times
[2024-11-08 11:18:03,068 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:03,068 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552353727]
[2024-11-08 11:18:03,068 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:03,068 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:03,209 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:03,551 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:03,552 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:03,555 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:03,557 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:03,559 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:03,560 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:03,562 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:03,564 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:03,564 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552353727]
[2024-11-08 11:18:03,564 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [552353727] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:03,565 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:03,565 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:03,565 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1114164156]
[2024-11-08 11:18:03,565 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:03,565 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:03,566 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:03,566 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:03,566 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:03,567 INFO  L87              Difference]: Start difference. First operand 553 states and 813 transitions. Second operand  has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:03,780 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:03,780 INFO  L93              Difference]: Finished difference Result 1004 states and 1474 transitions.
[2024-11-08 11:18:03,781 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:03,781 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 159
[2024-11-08 11:18:03,782 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:03,784 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:03,784 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:03,785 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:03,785 INFO  L432           NwaCegarLoop]: 734 mSDtfsCounter, 779 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 782 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:03,786 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [782 Valid, 1477 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:03,787 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:03,797 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:03,799 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4708029197080292) internal successors, (806), 548 states have internal predecessors, (806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:03,801 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 812 transitions.
[2024-11-08 11:18:03,801 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 812 transitions. Word has length 159
[2024-11-08 11:18:03,802 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:03,802 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 812 transitions.
[2024-11-08 11:18:03,804 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:03,804 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 812 transitions.
[2024-11-08 11:18:03,806 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 161
[2024-11-08 11:18:03,806 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:03,806 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:03,806 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11
[2024-11-08 11:18:03,807 INFO  L396      AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:03,807 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:03,807 INFO  L85        PathProgramCache]: Analyzing trace with hash -1777879714, now seen corresponding path program 1 times
[2024-11-08 11:18:03,807 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:03,807 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245944151]
[2024-11-08 11:18:03,808 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:03,809 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:03,963 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:04,474 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:04,475 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:04,479 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:04,481 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:04,485 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:04,487 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:04,491 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:04,491 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:04,492 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245944151]
[2024-11-08 11:18:04,492 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245944151] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:04,492 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:04,492 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:04,492 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [261722069]
[2024-11-08 11:18:04,492 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:04,493 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:04,493 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:04,494 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:04,494 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:04,495 INFO  L87              Difference]: Start difference. First operand 553 states and 812 transitions. Second operand  has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:04,637 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:04,637 INFO  L93              Difference]: Finished difference Result 1004 states and 1472 transitions.
[2024-11-08 11:18:04,638 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:04,638 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 160
[2024-11-08 11:18:04,639 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:04,641 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:04,641 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:04,642 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:04,643 INFO  L432           NwaCegarLoop]: 766 mSDtfsCounter, 700 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 700 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:04,644 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [700 Valid, 1534 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:04,645 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:04,656 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:04,657 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.468978102189781) internal successors, (805), 548 states have internal predecessors, (805), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:04,659 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 811 transitions.
[2024-11-08 11:18:04,659 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 811 transitions. Word has length 160
[2024-11-08 11:18:04,660 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:04,660 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 811 transitions.
[2024-11-08 11:18:04,660 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:04,660 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 811 transitions.
[2024-11-08 11:18:04,662 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 162
[2024-11-08 11:18:04,662 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:04,662 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:04,662 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12
[2024-11-08 11:18:04,662 INFO  L396      AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:04,663 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:04,663 INFO  L85        PathProgramCache]: Analyzing trace with hash 235074451, now seen corresponding path program 1 times
[2024-11-08 11:18:04,664 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:04,664 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941419097]
[2024-11-08 11:18:04,664 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:04,664 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:04,804 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,145 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:05,146 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,149 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:05,150 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,153 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:05,154 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,156 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:05,156 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:05,157 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941419097]
[2024-11-08 11:18:05,157 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1941419097] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:05,157 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:05,157 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:05,157 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429808480]
[2024-11-08 11:18:05,157 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:05,157 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:05,158 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:05,158 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:05,158 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:05,159 INFO  L87              Difference]: Start difference. First operand 553 states and 811 transitions. Second operand  has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:05,304 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:05,304 INFO  L93              Difference]: Finished difference Result 1004 states and 1470 transitions.
[2024-11-08 11:18:05,306 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:05,306 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 161
[2024-11-08 11:18:05,306 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:05,308 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:05,309 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:05,309 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:05,310 INFO  L432           NwaCegarLoop]: 766 mSDtfsCounter, 1489 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1492 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:05,310 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1492 Valid, 1534 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:05,311 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:05,323 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:05,324 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.467153284671533) internal successors, (804), 548 states have internal predecessors, (804), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:05,326 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 810 transitions.
[2024-11-08 11:18:05,327 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 810 transitions. Word has length 161
[2024-11-08 11:18:05,327 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:05,327 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 810 transitions.
[2024-11-08 11:18:05,327 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:05,328 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 810 transitions.
[2024-11-08 11:18:05,329 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 163
[2024-11-08 11:18:05,329 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:05,329 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:05,330 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13
[2024-11-08 11:18:05,330 INFO  L396      AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:05,330 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:05,330 INFO  L85        PathProgramCache]: Analyzing trace with hash -837994185, now seen corresponding path program 1 times
[2024-11-08 11:18:05,331 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:05,331 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884563446]
[2024-11-08 11:18:05,331 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:05,331 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:05,455 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,747 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:05,748 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,754 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:05,755 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,757 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:05,758 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:05,761 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:05,761 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:05,762 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884563446]
[2024-11-08 11:18:05,762 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [884563446] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:05,762 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:05,762 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:05,762 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722914696]
[2024-11-08 11:18:05,762 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:05,763 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:05,763 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:05,764 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:05,764 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:05,764 INFO  L87              Difference]: Start difference. First operand 553 states and 810 transitions. Second operand  has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:05,909 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:05,909 INFO  L93              Difference]: Finished difference Result 1004 states and 1468 transitions.
[2024-11-08 11:18:05,910 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:05,910 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 162
[2024-11-08 11:18:05,911 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:05,913 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:05,913 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:05,915 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:05,916 INFO  L432           NwaCegarLoop]: 766 mSDtfsCounter, 791 mSDsluCounter, 775 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 794 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:05,916 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [794 Valid, 1541 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:05,917 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:05,928 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:05,930 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4653284671532847) internal successors, (803), 548 states have internal predecessors, (803), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:05,932 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 809 transitions.
[2024-11-08 11:18:05,932 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 809 transitions. Word has length 162
[2024-11-08 11:18:05,932 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:05,932 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 809 transitions.
[2024-11-08 11:18:05,933 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:05,933 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 809 transitions.
[2024-11-08 11:18:05,935 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 164
[2024-11-08 11:18:05,935 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:05,935 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:05,935 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14
[2024-11-08 11:18:05,936 INFO  L396      AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:05,936 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:05,936 INFO  L85        PathProgramCache]: Analyzing trace with hash -596025460, now seen corresponding path program 1 times
[2024-11-08 11:18:05,936 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:05,936 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741771888]
[2024-11-08 11:18:05,936 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:05,937 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:06,075 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:06,515 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:06,517 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:06,520 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:06,523 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:06,525 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:06,527 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:06,532 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:06,532 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:06,532 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1741771888]
[2024-11-08 11:18:06,533 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1741771888] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:06,533 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:06,534 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:06,534 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471044476]
[2024-11-08 11:18:06,534 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:06,535 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:06,535 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:06,538 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:06,538 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:06,539 INFO  L87              Difference]: Start difference. First operand 553 states and 809 transitions. Second operand  has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:06,694 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:06,694 INFO  L93              Difference]: Finished difference Result 1004 states and 1466 transitions.
[2024-11-08 11:18:06,695 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:06,695 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 163
[2024-11-08 11:18:06,696 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:06,698 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:06,698 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:06,699 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:06,700 INFO  L432           NwaCegarLoop]: 766 mSDtfsCounter, 787 mSDsluCounter, 775 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 790 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:06,701 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [790 Valid, 1541 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:06,703 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:06,719 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:06,721 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4635036496350364) internal successors, (802), 548 states have internal predecessors, (802), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:06,723 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 808 transitions.
[2024-11-08 11:18:06,724 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 808 transitions. Word has length 163
[2024-11-08 11:18:06,725 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:06,725 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 808 transitions.
[2024-11-08 11:18:06,725 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:06,726 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 808 transitions.
[2024-11-08 11:18:06,728 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 165
[2024-11-08 11:18:06,728 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:06,729 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:06,729 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15
[2024-11-08 11:18:06,729 INFO  L396      AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:06,730 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:06,730 INFO  L85        PathProgramCache]: Analyzing trace with hash 159991184, now seen corresponding path program 1 times
[2024-11-08 11:18:06,730 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:06,730 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529890031]
[2024-11-08 11:18:06,731 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:06,731 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:06,896 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:07,387 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:07,389 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:07,392 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:07,393 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:07,398 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:07,399 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:07,403 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:07,403 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:07,403 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529890031]
[2024-11-08 11:18:07,403 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529890031] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:07,404 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:07,404 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:07,404 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [373636374]
[2024-11-08 11:18:07,404 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:07,405 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:07,405 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:07,406 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:07,408 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:07,408 INFO  L87              Difference]: Start difference. First operand 553 states and 808 transitions. Second operand  has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:07,508 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:07,508 INFO  L93              Difference]: Finished difference Result 1004 states and 1464 transitions.
[2024-11-08 11:18:07,509 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:07,510 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 164
[2024-11-08 11:18:07,510 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:07,512 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:07,512 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:07,513 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:07,514 INFO  L432           NwaCegarLoop]: 782 mSDtfsCounter, 699 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 699 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:07,514 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [699 Valid, 1566 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:07,516 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:07,530 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:07,532 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4598540145985401) internal successors, (800), 548 states have internal predecessors, (800), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:07,535 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 806 transitions.
[2024-11-08 11:18:07,536 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 806 transitions. Word has length 164
[2024-11-08 11:18:07,536 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:07,536 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 806 transitions.
[2024-11-08 11:18:07,537 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:07,537 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 806 transitions.
[2024-11-08 11:18:07,539 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 167
[2024-11-08 11:18:07,539 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:07,539 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:07,539 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16
[2024-11-08 11:18:07,540 INFO  L396      AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:07,540 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:07,540 INFO  L85        PathProgramCache]: Analyzing trace with hash -530434803, now seen corresponding path program 1 times
[2024-11-08 11:18:07,540 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:07,541 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492756538]
[2024-11-08 11:18:07,541 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:07,541 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:07,719 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,059 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:08,061 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,063 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:08,064 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,066 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:08,068 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,071 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:08,071 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:08,071 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492756538]
[2024-11-08 11:18:08,071 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1492756538] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:08,072 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:08,072 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:08,072 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9047368]
[2024-11-08 11:18:08,072 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:08,073 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:08,074 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:08,074 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:08,075 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:08,075 INFO  L87              Difference]: Start difference. First operand 553 states and 806 transitions. Second operand  has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:08,190 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:08,190 INFO  L93              Difference]: Finished difference Result 1004 states and 1460 transitions.
[2024-11-08 11:18:08,191 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:08,191 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 166
[2024-11-08 11:18:08,192 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:08,194 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:08,195 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:08,196 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:08,196 INFO  L432           NwaCegarLoop]: 782 mSDtfsCounter, 789 mSDsluCounter, 791 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 792 SdHoareTripleChecker+Valid, 1573 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:08,197 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [792 Valid, 1573 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:08,198 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:08,211 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:08,212 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4580291970802919) internal successors, (799), 548 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:08,214 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 805 transitions.
[2024-11-08 11:18:08,215 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 805 transitions. Word has length 166
[2024-11-08 11:18:08,215 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:08,215 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 805 transitions.
[2024-11-08 11:18:08,216 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:08,216 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 805 transitions.
[2024-11-08 11:18:08,218 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 168
[2024-11-08 11:18:08,219 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:08,219 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:08,219 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17
[2024-11-08 11:18:08,219 INFO  L396      AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:08,220 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:08,220 INFO  L85        PathProgramCache]: Analyzing trace with hash 755380975, now seen corresponding path program 1 times
[2024-11-08 11:18:08,220 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:08,220 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261974514]
[2024-11-08 11:18:08,220 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:08,221 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:08,439 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,948 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:08,950 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,953 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73
[2024-11-08 11:18:08,954 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,955 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85
[2024-11-08 11:18:08,956 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:08,958 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:08,958 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:08,959 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261974514]
[2024-11-08 11:18:08,959 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1261974514] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:08,959 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:08,959 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:08,959 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956960914]
[2024-11-08 11:18:08,959 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:08,960 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:08,960 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:08,961 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:08,961 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:08,961 INFO  L87              Difference]: Start difference. First operand 553 states and 805 transitions. Second operand  has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:18:09,051 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:09,051 INFO  L93              Difference]: Finished difference Result 1004 states and 1458 transitions.
[2024-11-08 11:18:09,051 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:09,052 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 167
[2024-11-08 11:18:09,052 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:09,054 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:09,054 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:09,055 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:09,056 INFO  L432           NwaCegarLoop]: 785 mSDtfsCounter, 734 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 736 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:09,056 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [736 Valid, 1572 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:09,057 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:09,069 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:09,070 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4562043795620438) internal successors, (798), 548 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:09,073 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 804 transitions.
[2024-11-08 11:18:09,073 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 804 transitions. Word has length 167
[2024-11-08 11:18:09,073 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:09,073 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 804 transitions.
[2024-11-08 11:18:09,074 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:18:09,074 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 804 transitions.
[2024-11-08 11:18:09,076 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 169
[2024-11-08 11:18:09,076 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:09,076 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:09,076 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18
[2024-11-08 11:18:09,077 INFO  L396      AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:09,077 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:09,077 INFO  L85        PathProgramCache]: Analyzing trace with hash 1252450459, now seen corresponding path program 1 times
[2024-11-08 11:18:09,078 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:09,078 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378324019]
[2024-11-08 11:18:09,078 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:09,078 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:09,385 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:09,835 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:09,837 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:09,841 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74
[2024-11-08 11:18:09,842 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:09,849 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86
[2024-11-08 11:18:09,850 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:09,858 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:09,858 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:09,858 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378324019]
[2024-11-08 11:18:09,858 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378324019] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:09,859 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:09,859 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:09,859 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167081388]
[2024-11-08 11:18:09,859 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:09,863 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:09,863 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:09,864 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:09,864 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:09,864 INFO  L87              Difference]: Start difference. First operand 553 states and 804 transitions. Second operand  has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:18:10,006 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:10,006 INFO  L93              Difference]: Finished difference Result 1004 states and 1456 transitions.
[2024-11-08 11:18:10,007 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:10,007 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 168
[2024-11-08 11:18:10,008 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:10,009 INFO  L225             Difference]: With dead ends: 1004
[2024-11-08 11:18:10,010 INFO  L226             Difference]: Without dead ends: 553
[2024-11-08 11:18:10,010 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:10,012 INFO  L432           NwaCegarLoop]: 785 mSDtfsCounter, 732 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 734 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:10,013 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [734 Valid, 1572 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:10,018 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 553 states.
[2024-11-08 11:18:10,030 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553.
[2024-11-08 11:18:10,031 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 553 states, 548 states have (on average 1.4543795620437956) internal successors, (797), 548 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:10,033 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 803 transitions.
[2024-11-08 11:18:10,033 INFO  L78                 Accepts]: Start accepts. Automaton has 553 states and 803 transitions. Word has length 168
[2024-11-08 11:18:10,034 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:10,034 INFO  L471      AbstractCegarLoop]: Abstraction has 553 states and 803 transitions.
[2024-11-08 11:18:10,034 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:18:10,034 INFO  L276                IsEmpty]: Start isEmpty. Operand 553 states and 803 transitions.
[2024-11-08 11:18:10,036 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 170
[2024-11-08 11:18:10,036 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:10,036 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:10,037 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19
[2024-11-08 11:18:10,037 INFO  L396      AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:10,037 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:10,038 INFO  L85        PathProgramCache]: Analyzing trace with hash 976639564, now seen corresponding path program 1 times
[2024-11-08 11:18:10,038 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:10,038 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473080208]
[2024-11-08 11:18:10,038 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:10,038 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:10,421 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:11,149 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:11,150 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:11,155 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:11,156 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:11,158 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:11,159 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:11,164 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:11,165 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:11,165 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473080208]
[2024-11-08 11:18:11,165 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [473080208] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:11,165 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:11,168 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:11,168 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309752682]
[2024-11-08 11:18:11,168 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:11,169 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:11,169 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:11,170 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:11,170 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:11,170 INFO  L87              Difference]: Start difference. First operand 553 states and 803 transitions. Second operand  has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:11,533 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:11,534 INFO  L93              Difference]: Finished difference Result 1010 states and 1462 transitions.
[2024-11-08 11:18:11,534 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 11:18:11,535 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 169
[2024-11-08 11:18:11,535 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:11,538 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:11,538 INFO  L226             Difference]: Without dead ends: 557
[2024-11-08 11:18:11,539 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:11,540 INFO  L432           NwaCegarLoop]: 793 mSDtfsCounter, 2 mSDsluCounter, 2186 mSDsCounter, 0 mSdLazyCounter, 216 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2979 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 216 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:11,540 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2979 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 216 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 11:18:11,541 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 557 states.
[2024-11-08 11:18:11,557 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 555.
[2024-11-08 11:18:11,558 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 555 states, 550 states have (on average 1.4527272727272726) internal successors, (799), 550 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:11,560 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 805 transitions.
[2024-11-08 11:18:11,560 INFO  L78                 Accepts]: Start accepts. Automaton has 555 states and 805 transitions. Word has length 169
[2024-11-08 11:18:11,561 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:11,561 INFO  L471      AbstractCegarLoop]: Abstraction has 555 states and 805 transitions.
[2024-11-08 11:18:11,561 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:11,561 INFO  L276                IsEmpty]: Start isEmpty. Operand 555 states and 805 transitions.
[2024-11-08 11:18:11,563 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 171
[2024-11-08 11:18:11,563 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:11,564 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:11,564 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20
[2024-11-08 11:18:11,564 INFO  L396      AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:11,565 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:11,565 INFO  L85        PathProgramCache]: Analyzing trace with hash 1847413935, now seen corresponding path program 1 times
[2024-11-08 11:18:11,565 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:11,565 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161951056]
[2024-11-08 11:18:11,566 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:11,566 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:11,940 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:12,364 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:12,365 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:12,371 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:12,373 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:12,375 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:12,376 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:12,378 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:12,378 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:12,379 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161951056]
[2024-11-08 11:18:12,379 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [161951056] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:12,379 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:12,379 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:12,379 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209498102]
[2024-11-08 11:18:12,381 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:12,381 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:12,382 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:12,382 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:12,383 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:12,384 INFO  L87              Difference]: Start difference. First operand 555 states and 805 transitions. Second operand  has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:12,550 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:12,550 INFO  L93              Difference]: Finished difference Result 1008 states and 1458 transitions.
[2024-11-08 11:18:12,553 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:12,553 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 170
[2024-11-08 11:18:12,554 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:12,556 INFO  L225             Difference]: With dead ends: 1008
[2024-11-08 11:18:12,556 INFO  L226             Difference]: Without dead ends: 555
[2024-11-08 11:18:12,557 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:12,558 INFO  L432           NwaCegarLoop]: 761 mSDtfsCounter, 684 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 684 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:12,558 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [684 Valid, 1524 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:12,561 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 555 states.
[2024-11-08 11:18:12,578 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555.
[2024-11-08 11:18:12,580 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 555 states, 550 states have (on average 1.450909090909091) internal successors, (798), 550 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:12,581 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 804 transitions.
[2024-11-08 11:18:12,582 INFO  L78                 Accepts]: Start accepts. Automaton has 555 states and 804 transitions. Word has length 170
[2024-11-08 11:18:12,582 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:12,582 INFO  L471      AbstractCegarLoop]: Abstraction has 555 states and 804 transitions.
[2024-11-08 11:18:12,583 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:12,583 INFO  L276                IsEmpty]: Start isEmpty. Operand 555 states and 804 transitions.
[2024-11-08 11:18:12,585 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 172
[2024-11-08 11:18:12,585 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:12,585 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:12,585 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21
[2024-11-08 11:18:12,586 INFO  L396      AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:12,586 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:12,586 INFO  L85        PathProgramCache]: Analyzing trace with hash 117158089, now seen corresponding path program 1 times
[2024-11-08 11:18:12,586 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:12,587 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179975005]
[2024-11-08 11:18:12,587 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:12,587 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:12,851 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:13,340 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:13,342 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:13,347 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:13,349 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:13,354 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:13,355 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:13,359 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:13,360 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:13,360 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179975005]
[2024-11-08 11:18:13,360 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1179975005] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:13,360 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:13,360 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:13,360 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297826127]
[2024-11-08 11:18:13,361 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:13,361 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:13,362 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:13,362 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:13,363 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:13,363 INFO  L87              Difference]: Start difference. First operand 555 states and 804 transitions. Second operand  has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:13,535 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:13,535 INFO  L93              Difference]: Finished difference Result 1008 states and 1456 transitions.
[2024-11-08 11:18:13,536 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:13,537 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 171
[2024-11-08 11:18:13,537 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:13,540 INFO  L225             Difference]: With dead ends: 1008
[2024-11-08 11:18:13,541 INFO  L226             Difference]: Without dead ends: 555
[2024-11-08 11:18:13,542 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:13,543 INFO  L432           NwaCegarLoop]: 761 mSDtfsCounter, 1360 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1360 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:13,543 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1360 Valid, 1524 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:13,544 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 555 states.
[2024-11-08 11:18:13,557 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555.
[2024-11-08 11:18:13,559 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 555 states, 550 states have (on average 1.449090909090909) internal successors, (797), 550 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:13,562 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 803 transitions.
[2024-11-08 11:18:13,562 INFO  L78                 Accepts]: Start accepts. Automaton has 555 states and 803 transitions. Word has length 171
[2024-11-08 11:18:13,563 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:13,563 INFO  L471      AbstractCegarLoop]: Abstraction has 555 states and 803 transitions.
[2024-11-08 11:18:13,564 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:13,564 INFO  L276                IsEmpty]: Start isEmpty. Operand 555 states and 803 transitions.
[2024-11-08 11:18:13,566 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 173
[2024-11-08 11:18:13,566 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:13,566 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:13,567 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22
[2024-11-08 11:18:13,567 INFO  L396      AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:13,567 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:13,567 INFO  L85        PathProgramCache]: Analyzing trace with hash -293100176, now seen corresponding path program 1 times
[2024-11-08 11:18:13,567 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:13,568 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156365579]
[2024-11-08 11:18:13,568 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:13,568 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:13,819 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:14,280 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:14,282 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:14,287 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:14,288 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:14,292 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:14,293 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:14,297 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:14,297 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:14,297 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156365579]
[2024-11-08 11:18:14,297 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156365579] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:14,297 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:14,298 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:14,298 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751570336]
[2024-11-08 11:18:14,298 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:14,298 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:14,298 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:14,299 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:14,300 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:14,300 INFO  L87              Difference]: Start difference. First operand 555 states and 803 transitions. Second operand  has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:14,463 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:14,463 INFO  L93              Difference]: Finished difference Result 1008 states and 1454 transitions.
[2024-11-08 11:18:14,464 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:14,465 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 172
[2024-11-08 11:18:14,465 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:14,467 INFO  L225             Difference]: With dead ends: 1008
[2024-11-08 11:18:14,467 INFO  L226             Difference]: Without dead ends: 555
[2024-11-08 11:18:14,468 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:14,470 INFO  L432           NwaCegarLoop]: 761 mSDtfsCounter, 681 mSDsluCounter, 770 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 681 SdHoareTripleChecker+Valid, 1531 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:14,470 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [681 Valid, 1531 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:14,471 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 555 states.
[2024-11-08 11:18:14,485 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555.
[2024-11-08 11:18:14,486 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 555 states, 550 states have (on average 1.4472727272727273) internal successors, (796), 550 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:14,488 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 802 transitions.
[2024-11-08 11:18:14,488 INFO  L78                 Accepts]: Start accepts. Automaton has 555 states and 802 transitions. Word has length 172
[2024-11-08 11:18:14,489 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:14,489 INFO  L471      AbstractCegarLoop]: Abstraction has 555 states and 802 transitions.
[2024-11-08 11:18:14,489 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:14,489 INFO  L276                IsEmpty]: Start isEmpty. Operand 555 states and 802 transitions.
[2024-11-08 11:18:14,491 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 174
[2024-11-08 11:18:14,491 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:14,492 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:14,492 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23
[2024-11-08 11:18:14,492 INFO  L396      AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:14,492 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:14,493 INFO  L85        PathProgramCache]: Analyzing trace with hash -1909241912, now seen corresponding path program 1 times
[2024-11-08 11:18:14,493 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:14,493 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491578479]
[2024-11-08 11:18:14,493 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:14,494 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:14,802 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:15,790 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:15,791 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:15,793 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:15,794 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:15,800 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:15,801 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:15,803 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:15,808 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:15,808 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491578479]
[2024-11-08 11:18:15,808 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491578479] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:15,808 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:15,808 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:15,808 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339371002]
[2024-11-08 11:18:15,809 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:15,809 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:15,809 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:15,810 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:15,810 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:15,810 INFO  L87              Difference]: Start difference. First operand 555 states and 802 transitions. Second operand  has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:16,493 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:16,494 INFO  L93              Difference]: Finished difference Result 1010 states and 1455 transitions.
[2024-11-08 11:18:16,494 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 11:18:16,495 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173
[2024-11-08 11:18:16,495 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:16,497 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:16,498 INFO  L226             Difference]: Without dead ends: 557
[2024-11-08 11:18:16,499 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:16,499 INFO  L432           NwaCegarLoop]: 606 mSDtfsCounter, 697 mSDsluCounter, 1198 mSDsCounter, 0 mSdLazyCounter, 583 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 697 SdHoareTripleChecker+Valid, 1804 SdHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 583 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:16,500 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [697 Valid, 1804 Invalid, 583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 583 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 11:18:16,501 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 557 states.
[2024-11-08 11:18:16,515 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 556.
[2024-11-08 11:18:16,520 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4464609800362977) internal successors, (797), 551 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:16,522 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 803 transitions.
[2024-11-08 11:18:16,524 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 803 transitions. Word has length 173
[2024-11-08 11:18:16,525 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:16,525 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 803 transitions.
[2024-11-08 11:18:16,526 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:16,526 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 803 transitions.
[2024-11-08 11:18:16,531 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 174
[2024-11-08 11:18:16,532 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:16,532 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:16,532 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24
[2024-11-08 11:18:16,532 INFO  L396      AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:16,533 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:16,533 INFO  L85        PathProgramCache]: Analyzing trace with hash -1541253279, now seen corresponding path program 1 times
[2024-11-08 11:18:16,533 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:16,533 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307390946]
[2024-11-08 11:18:16,533 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:16,534 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:16,896 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:17,377 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:17,378 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:17,381 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:17,382 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:17,384 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:17,385 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:17,387 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:17,387 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:17,388 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307390946]
[2024-11-08 11:18:17,388 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307390946] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:17,388 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:17,388 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:17,388 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002153100]
[2024-11-08 11:18:17,389 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:17,389 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:17,390 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:17,390 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:17,391 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:17,391 INFO  L87              Difference]: Start difference. First operand 556 states and 803 transitions. Second operand  has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:17,744 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:17,744 INFO  L93              Difference]: Finished difference Result 1012 states and 1456 transitions.
[2024-11-08 11:18:17,744 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:17,745 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173
[2024-11-08 11:18:17,745 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:17,747 INFO  L225             Difference]: With dead ends: 1012
[2024-11-08 11:18:17,747 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:17,748 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:17,749 INFO  L432           NwaCegarLoop]: 791 mSDtfsCounter, 2 mSDsluCounter, 1392 mSDsCounter, 0 mSdLazyCounter, 201 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2183 SdHoareTripleChecker+Invalid, 201 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:17,751 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2183 Invalid, 201 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 201 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 11:18:17,752 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:17,765 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:17,767 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4446460980036298) internal successors, (796), 551 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:17,768 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 802 transitions.
[2024-11-08 11:18:17,770 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 802 transitions. Word has length 173
[2024-11-08 11:18:17,770 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:17,770 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 802 transitions.
[2024-11-08 11:18:17,771 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:17,771 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 802 transitions.
[2024-11-08 11:18:17,773 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 175
[2024-11-08 11:18:17,773 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:17,773 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:17,773 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25
[2024-11-08 11:18:17,774 INFO  L396      AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:17,774 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:17,774 INFO  L85        PathProgramCache]: Analyzing trace with hash -909057682, now seen corresponding path program 1 times
[2024-11-08 11:18:17,774 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:17,775 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [18847344]
[2024-11-08 11:18:17,775 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:17,775 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:18,121 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:18,444 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:18,445 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:18,448 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:18,449 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:18,451 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:18,455 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:18,459 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:18,460 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:18,460 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [18847344]
[2024-11-08 11:18:18,460 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [18847344] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:18,460 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:18,461 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:18,461 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1379633822]
[2024-11-08 11:18:18,461 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:18,462 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:18,463 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:18,463 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:18,464 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:18,464 INFO  L87              Difference]: Start difference. First operand 556 states and 802 transitions. Second operand  has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:18,738 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:18,738 INFO  L93              Difference]: Finished difference Result 1010 states and 1452 transitions.
[2024-11-08 11:18:18,738 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:18,739 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 174
[2024-11-08 11:18:18,739 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:18,741 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:18,742 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:18,742 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:18,743 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 664 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 664 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:18,743 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [664 Valid, 1444 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:18,744 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:18,759 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:18,760 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.442831215970962) internal successors, (795), 551 states have internal predecessors, (795), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:18,762 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 801 transitions.
[2024-11-08 11:18:18,763 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 801 transitions. Word has length 174
[2024-11-08 11:18:18,763 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:18,764 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 801 transitions.
[2024-11-08 11:18:18,764 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:18,764 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 801 transitions.
[2024-11-08 11:18:18,766 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 176
[2024-11-08 11:18:18,766 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:18,766 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:18,767 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26
[2024-11-08 11:18:18,767 INFO  L396      AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:18,767 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:18,767 INFO  L85        PathProgramCache]: Analyzing trace with hash -137716950, now seen corresponding path program 1 times
[2024-11-08 11:18:18,768 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:18,768 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121793798]
[2024-11-08 11:18:18,768 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:18,768 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:19,025 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:19,752 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:19,754 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:19,760 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:19,761 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:19,768 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:19,770 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:19,776 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:19,776 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:19,778 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121793798]
[2024-11-08 11:18:19,778 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [121793798] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:19,778 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:19,778 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:19,779 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549254060]
[2024-11-08 11:18:19,779 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:19,780 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:19,780 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:19,781 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:19,781 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:19,781 INFO  L87              Difference]: Start difference. First operand 556 states and 801 transitions. Second operand  has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:20,092 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:20,092 INFO  L93              Difference]: Finished difference Result 1010 states and 1450 transitions.
[2024-11-08 11:18:20,093 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:20,094 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 175
[2024-11-08 11:18:20,094 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:20,097 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:20,097 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:20,098 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:20,099 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 662 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 662 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:20,100 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [662 Valid, 1451 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:20,101 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:20,119 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:20,121 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.441016333938294) internal successors, (794), 551 states have internal predecessors, (794), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:20,123 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 800 transitions.
[2024-11-08 11:18:20,123 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 800 transitions. Word has length 175
[2024-11-08 11:18:20,124 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:20,124 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 800 transitions.
[2024-11-08 11:18:20,124 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:20,124 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 800 transitions.
[2024-11-08 11:18:20,126 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 177
[2024-11-08 11:18:20,127 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:20,127 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:20,127 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27
[2024-11-08 11:18:20,127 INFO  L396      AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:20,128 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:20,128 INFO  L85        PathProgramCache]: Analyzing trace with hash -1381931025, now seen corresponding path program 1 times
[2024-11-08 11:18:20,128 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:20,129 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409642002]
[2024-11-08 11:18:20,129 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:20,129 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:20,366 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:20,871 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:20,873 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:20,876 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:20,877 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:20,880 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:20,883 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:20,888 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:20,889 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:20,889 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [409642002]
[2024-11-08 11:18:20,890 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [409642002] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:20,890 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:20,890 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:20,890 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774967492]
[2024-11-08 11:18:20,890 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:20,891 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:20,891 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:20,891 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:20,892 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:20,892 INFO  L87              Difference]: Start difference. First operand 556 states and 800 transitions. Second operand  has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:21,160 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:21,160 INFO  L93              Difference]: Finished difference Result 1010 states and 1448 transitions.
[2024-11-08 11:18:21,161 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:21,161 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 176
[2024-11-08 11:18:21,162 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:21,164 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:21,164 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:21,165 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:21,166 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 661 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 661 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:21,166 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [661 Valid, 1451 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:21,167 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:21,182 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:21,183 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4392014519056262) internal successors, (793), 551 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:21,185 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 799 transitions.
[2024-11-08 11:18:21,185 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 799 transitions. Word has length 176
[2024-11-08 11:18:21,185 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:21,186 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 799 transitions.
[2024-11-08 11:18:21,186 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:21,186 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 799 transitions.
[2024-11-08 11:18:21,188 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 178
[2024-11-08 11:18:21,188 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:21,189 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:21,189 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28
[2024-11-08 11:18:21,190 INFO  L396      AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:21,190 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:21,190 INFO  L85        PathProgramCache]: Analyzing trace with hash -1355797399, now seen corresponding path program 1 times
[2024-11-08 11:18:21,191 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:21,191 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988152714]
[2024-11-08 11:18:21,191 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:21,191 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:21,422 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:21,954 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:21,955 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:21,958 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:21,960 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:21,964 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:21,966 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:21,970 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:21,970 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:21,970 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988152714]
[2024-11-08 11:18:21,970 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [988152714] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:21,971 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:21,971 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:21,971 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137978671]
[2024-11-08 11:18:21,971 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:21,972 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:21,972 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:21,972 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:21,973 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:21,973 INFO  L87              Difference]: Start difference. First operand 556 states and 799 transitions. Second operand  has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:22,260 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:22,260 INFO  L93              Difference]: Finished difference Result 1010 states and 1446 transitions.
[2024-11-08 11:18:22,261 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:22,261 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 177
[2024-11-08 11:18:22,262 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:22,265 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:22,265 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:22,266 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:22,267 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 660 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 660 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:22,268 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [660 Valid, 1451 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:22,269 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:22,285 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:22,286 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4373865698729582) internal successors, (792), 551 states have internal predecessors, (792), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:22,288 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 798 transitions.
[2024-11-08 11:18:22,288 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 798 transitions. Word has length 177
[2024-11-08 11:18:22,289 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:22,289 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 798 transitions.
[2024-11-08 11:18:22,289 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:22,290 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 798 transitions.
[2024-11-08 11:18:22,292 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 179
[2024-11-08 11:18:22,292 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:22,292 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:22,292 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29
[2024-11-08 11:18:22,293 INFO  L396      AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:22,293 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:22,293 INFO  L85        PathProgramCache]: Analyzing trace with hash 150395632, now seen corresponding path program 1 times
[2024-11-08 11:18:22,293 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:22,294 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25407832]
[2024-11-08 11:18:22,294 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:22,294 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:22,512 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:23,033 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:23,035 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:23,038 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:23,039 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:23,042 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:23,043 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:23,048 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:23,048 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:23,048 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25407832]
[2024-11-08 11:18:23,048 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [25407832] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:23,049 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:23,049 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:23,049 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2115035910]
[2024-11-08 11:18:23,049 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:23,049 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:23,050 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:23,050 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:23,050 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:23,051 INFO  L87              Difference]: Start difference. First operand 556 states and 798 transitions. Second operand  has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:23,246 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:23,246 INFO  L93              Difference]: Finished difference Result 1010 states and 1444 transitions.
[2024-11-08 11:18:23,246 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:23,247 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 178
[2024-11-08 11:18:23,247 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:23,249 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:23,249 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:23,250 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:23,251 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 644 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 644 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:23,251 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [644 Valid, 1444 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:23,252 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:23,269 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:23,270 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4355716878402904) internal successors, (791), 551 states have internal predecessors, (791), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:23,271 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 797 transitions.
[2024-11-08 11:18:23,272 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 797 transitions. Word has length 178
[2024-11-08 11:18:23,272 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:23,272 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 797 transitions.
[2024-11-08 11:18:23,273 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:23,273 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 797 transitions.
[2024-11-08 11:18:23,275 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 180
[2024-11-08 11:18:23,275 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:23,275 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:23,276 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30
[2024-11-08 11:18:23,276 INFO  L396      AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:23,276 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:23,276 INFO  L85        PathProgramCache]: Analyzing trace with hash -660301528, now seen corresponding path program 1 times
[2024-11-08 11:18:23,277 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:23,277 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809404567]
[2024-11-08 11:18:23,277 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:23,277 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:23,489 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:24,014 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:24,015 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:24,019 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:24,020 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:24,023 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:24,025 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:24,031 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:24,032 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:24,032 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809404567]
[2024-11-08 11:18:24,032 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1809404567] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:24,033 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:24,033 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:24,033 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872086035]
[2024-11-08 11:18:24,033 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:24,034 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:24,034 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:24,035 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:24,035 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:24,036 INFO  L87              Difference]: Start difference. First operand 556 states and 797 transitions. Second operand  has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:24,279 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:24,280 INFO  L93              Difference]: Finished difference Result 1010 states and 1442 transitions.
[2024-11-08 11:18:24,280 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:24,281 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 179
[2024-11-08 11:18:24,281 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:24,283 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:24,283 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:24,284 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:24,285 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 658 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 658 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:24,287 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [658 Valid, 1451 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:24,288 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:24,302 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:24,303 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4337568058076224) internal successors, (790), 551 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:24,305 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 796 transitions.
[2024-11-08 11:18:24,306 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 796 transitions. Word has length 179
[2024-11-08 11:18:24,306 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:24,307 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 796 transitions.
[2024-11-08 11:18:24,307 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:24,307 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 796 transitions.
[2024-11-08 11:18:24,309 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 181
[2024-11-08 11:18:24,309 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:24,310 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:24,310 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31
[2024-11-08 11:18:24,310 INFO  L396      AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:24,310 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:24,311 INFO  L85        PathProgramCache]: Analyzing trace with hash 831367793, now seen corresponding path program 1 times
[2024-11-08 11:18:24,311 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:24,311 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324799353]
[2024-11-08 11:18:24,311 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:24,311 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:24,513 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:25,021 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:25,023 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:25,026 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:25,027 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:25,030 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:25,032 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:25,036 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:25,037 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:25,037 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324799353]
[2024-11-08 11:18:25,037 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [324799353] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:25,037 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:25,037 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:25,038 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [412792608]
[2024-11-08 11:18:25,038 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:25,038 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:25,038 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:25,039 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:25,040 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:25,040 INFO  L87              Difference]: Start difference. First operand 556 states and 796 transitions. Second operand  has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:25,289 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:25,289 INFO  L93              Difference]: Finished difference Result 1010 states and 1440 transitions.
[2024-11-08 11:18:25,290 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:25,291 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180
[2024-11-08 11:18:25,291 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:25,293 INFO  L225             Difference]: With dead ends: 1010
[2024-11-08 11:18:25,293 INFO  L226             Difference]: Without dead ends: 556
[2024-11-08 11:18:25,294 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:25,295 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 657 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 657 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:25,295 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [657 Valid, 1451 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:25,297 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 556 states.
[2024-11-08 11:18:25,311 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556.
[2024-11-08 11:18:25,312 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 556 states, 551 states have (on average 1.4319419237749547) internal successors, (789), 551 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:25,313 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 795 transitions.
[2024-11-08 11:18:25,314 INFO  L78                 Accepts]: Start accepts. Automaton has 556 states and 795 transitions. Word has length 180
[2024-11-08 11:18:25,314 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:25,314 INFO  L471      AbstractCegarLoop]: Abstraction has 556 states and 795 transitions.
[2024-11-08 11:18:25,315 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:25,315 INFO  L276                IsEmpty]: Start isEmpty. Operand 556 states and 795 transitions.
[2024-11-08 11:18:25,317 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 182
[2024-11-08 11:18:25,317 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:25,318 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:25,318 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32
[2024-11-08 11:18:25,318 INFO  L396      AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:25,318 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:25,319 INFO  L85        PathProgramCache]: Analyzing trace with hash 2030268775, now seen corresponding path program 1 times
[2024-11-08 11:18:25,319 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:25,319 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23145183]
[2024-11-08 11:18:25,319 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:25,320 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:25,630 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:26,601 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:26,602 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:26,603 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:26,604 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:26,605 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:26,606 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:26,607 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:26,609 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:26,609 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23145183]
[2024-11-08 11:18:26,609 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [23145183] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:26,609 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:26,609 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:26,610 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [954129722]
[2024-11-08 11:18:26,610 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:26,611 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:26,611 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:26,611 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:26,612 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:26,612 INFO  L87              Difference]: Start difference. First operand 556 states and 795 transitions. Second operand  has 5 states, 5 states have (on average 33.8) internal successors, (169), 5 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:26,679 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:26,680 INFO  L93              Difference]: Finished difference Result 1089 states and 1528 transitions.
[2024-11-08 11:18:26,680 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 11:18:26,680 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 33.8) internal successors, (169), 5 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 181
[2024-11-08 11:18:26,681 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:26,683 INFO  L225             Difference]: With dead ends: 1089
[2024-11-08 11:18:26,683 INFO  L226             Difference]: Without dead ends: 635
[2024-11-08 11:18:26,684 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:26,684 INFO  L432           NwaCegarLoop]: 782 mSDtfsCounter, 19 mSDsluCounter, 2337 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 3119 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:26,685 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 3119 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:18:26,686 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 635 states.
[2024-11-08 11:18:26,699 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 635 to 633.
[2024-11-08 11:18:26,704 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 633 states, 628 states have (on average 1.393312101910828) internal successors, (875), 628 states have internal predecessors, (875), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:18:26,706 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 881 transitions.
[2024-11-08 11:18:26,706 INFO  L78                 Accepts]: Start accepts. Automaton has 633 states and 881 transitions. Word has length 181
[2024-11-08 11:18:26,707 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:26,707 INFO  L471      AbstractCegarLoop]: Abstraction has 633 states and 881 transitions.
[2024-11-08 11:18:26,707 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 33.8) internal successors, (169), 5 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:26,707 INFO  L276                IsEmpty]: Start isEmpty. Operand 633 states and 881 transitions.
[2024-11-08 11:18:26,709 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 183
[2024-11-08 11:18:26,710 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:26,710 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:26,710 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33
[2024-11-08 11:18:26,710 INFO  L396      AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:26,711 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:26,711 INFO  L85        PathProgramCache]: Analyzing trace with hash -577289785, now seen corresponding path program 1 times
[2024-11-08 11:18:26,711 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:26,711 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565823261]
[2024-11-08 11:18:26,711 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:26,712 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:26,965 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:28,199 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:28,201 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:28,204 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:28,205 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:28,207 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:28,208 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:28,211 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:18:28,213 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:28,213 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565823261]
[2024-11-08 11:18:28,214 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [565823261] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:28,214 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:28,214 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:18:28,214 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942482351]
[2024-11-08 11:18:28,214 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:28,215 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:18:28,215 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:28,216 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:18:28,217 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:28,217 INFO  L87              Difference]: Start difference. First operand 633 states and 881 transitions. Second operand  has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:28,397 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:28,397 INFO  L93              Difference]: Finished difference Result 1396 states and 1898 transitions.
[2024-11-08 11:18:28,397 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:18:28,398 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 182
[2024-11-08 11:18:28,398 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:28,402 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:28,402 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:28,403 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:18:28,403 INFO  L432           NwaCegarLoop]: 776 mSDtfsCounter, 1133 mSDsluCounter, 2322 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1136 SdHoareTripleChecker+Valid, 3098 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:28,404 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1136 Valid, 3098 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:28,407 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:28,431 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:28,433 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3488914819136524) internal successors, (1156), 857 states have internal predecessors, (1156), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:28,437 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1168 transitions.
[2024-11-08 11:18:28,438 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1168 transitions. Word has length 182
[2024-11-08 11:18:28,439 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:28,439 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1168 transitions.
[2024-11-08 11:18:28,439 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:18:28,440 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1168 transitions.
[2024-11-08 11:18:28,449 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 451
[2024-11-08 11:18:28,450 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:28,450 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:28,450 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34
[2024-11-08 11:18:28,451 INFO  L396      AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:28,451 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:28,451 INFO  L85        PathProgramCache]: Analyzing trace with hash -876051628, now seen corresponding path program 1 times
[2024-11-08 11:18:28,451 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:28,452 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207352232]
[2024-11-08 11:18:28,452 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:28,452 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:28,918 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,795 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:29,796 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,798 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:29,799 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,801 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:29,802 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,804 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 327
[2024-11-08 11:18:29,804 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,806 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 343
[2024-11-08 11:18:29,806 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,807 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 355
[2024-11-08 11:18:29,808 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:29,810 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:29,811 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:29,811 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207352232]
[2024-11-08 11:18:29,811 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [207352232] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:29,811 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:29,811 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:29,811 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1174087247]
[2024-11-08 11:18:29,812 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:29,812 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:29,812 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:29,813 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:29,813 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:29,813 INFO  L87              Difference]: Start difference. First operand 865 states and 1168 transitions. Second operand  has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:30,037 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:30,038 INFO  L93              Difference]: Finished difference Result 1396 states and 1897 transitions.
[2024-11-08 11:18:30,039 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:30,039 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 450
[2024-11-08 11:18:30,040 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:30,042 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:30,042 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:30,044 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:30,044 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 723 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 726 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:30,045 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [726 Valid, 1451 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:30,048 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:30,070 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:30,072 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3477246207701283) internal successors, (1155), 857 states have internal predecessors, (1155), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:30,074 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1167 transitions.
[2024-11-08 11:18:30,074 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1167 transitions. Word has length 450
[2024-11-08 11:18:30,075 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:30,075 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1167 transitions.
[2024-11-08 11:18:30,076 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:30,076 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1167 transitions.
[2024-11-08 11:18:30,079 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 452
[2024-11-08 11:18:30,079 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:30,080 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:30,080 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35
[2024-11-08 11:18:30,081 INFO  L396      AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:30,081 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:30,082 INFO  L85        PathProgramCache]: Analyzing trace with hash 465851252, now seen corresponding path program 1 times
[2024-11-08 11:18:30,082 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:30,082 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52722280]
[2024-11-08 11:18:30,082 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:30,083 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:30,544 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,468 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:31,469 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,471 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:31,473 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,475 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:31,476 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,478 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 328
[2024-11-08 11:18:31,479 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,481 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 344
[2024-11-08 11:18:31,482 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,483 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 356
[2024-11-08 11:18:31,484 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:31,487 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:31,487 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:31,487 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52722280]
[2024-11-08 11:18:31,487 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [52722280] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:31,487 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:31,488 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:31,488 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080780120]
[2024-11-08 11:18:31,488 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:31,490 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:31,490 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:31,491 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:31,491 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:31,491 INFO  L87              Difference]: Start difference. First operand 865 states and 1167 transitions. Second operand  has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:31,701 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:31,701 INFO  L93              Difference]: Finished difference Result 1396 states and 1895 transitions.
[2024-11-08 11:18:31,702 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:31,702 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 451
[2024-11-08 11:18:31,703 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:31,706 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:31,706 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:31,707 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:31,708 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 715 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 718 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:31,710 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [718 Valid, 1451 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:31,711 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:31,733 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:31,735 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3465577596266045) internal successors, (1154), 857 states have internal predecessors, (1154), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:31,737 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1166 transitions.
[2024-11-08 11:18:31,737 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1166 transitions. Word has length 451
[2024-11-08 11:18:31,738 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:31,738 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1166 transitions.
[2024-11-08 11:18:31,738 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:31,738 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1166 transitions.
[2024-11-08 11:18:31,744 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 453
[2024-11-08 11:18:31,745 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:31,745 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:31,745 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36
[2024-11-08 11:18:31,745 INFO  L396      AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:31,746 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:31,746 INFO  L85        PathProgramCache]: Analyzing trace with hash -296332737, now seen corresponding path program 1 times
[2024-11-08 11:18:31,746 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:31,746 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460386426]
[2024-11-08 11:18:31,746 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:31,746 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:32,297 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,156 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:33,157 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,159 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:33,160 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,162 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:33,163 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,164 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 329
[2024-11-08 11:18:33,165 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,166 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 345
[2024-11-08 11:18:33,167 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,168 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357
[2024-11-08 11:18:33,169 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:33,172 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:33,172 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:33,173 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460386426]
[2024-11-08 11:18:33,173 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460386426] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:33,173 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:33,173 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:33,173 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501208573]
[2024-11-08 11:18:33,174 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:33,175 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:33,176 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:33,177 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:33,177 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:33,178 INFO  L87              Difference]: Start difference. First operand 865 states and 1166 transitions. Second operand  has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:33,397 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:33,397 INFO  L93              Difference]: Finished difference Result 1396 states and 1893 transitions.
[2024-11-08 11:18:33,397 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:33,398 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 452
[2024-11-08 11:18:33,398 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:33,401 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:33,402 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:33,403 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:33,403 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 707 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 710 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:33,404 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [710 Valid, 1451 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:33,405 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:33,429 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:33,431 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3453908984830805) internal successors, (1153), 857 states have internal predecessors, (1153), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:33,434 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1165 transitions.
[2024-11-08 11:18:33,435 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1165 transitions. Word has length 452
[2024-11-08 11:18:33,435 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:33,435 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1165 transitions.
[2024-11-08 11:18:33,436 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:33,436 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1165 transitions.
[2024-11-08 11:18:33,440 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 454
[2024-11-08 11:18:33,440 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:33,441 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:33,441 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37
[2024-11-08 11:18:33,441 INFO  L396      AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:33,442 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:33,442 INFO  L85        PathProgramCache]: Analyzing trace with hash -1294384129, now seen corresponding path program 1 times
[2024-11-08 11:18:33,442 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:33,442 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022153246]
[2024-11-08 11:18:33,442 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:33,443 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:33,968 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,960 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:34,962 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,968 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:34,970 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,973 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:34,974 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,976 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 330
[2024-11-08 11:18:34,977 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,979 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 346
[2024-11-08 11:18:34,980 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,981 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 358
[2024-11-08 11:18:34,982 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:34,984 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:34,985 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:34,985 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022153246]
[2024-11-08 11:18:34,985 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022153246] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:34,985 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:34,985 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:34,985 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441854579]
[2024-11-08 11:18:34,986 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:34,986 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:34,987 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:34,987 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:34,988 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:34,988 INFO  L87              Difference]: Start difference. First operand 865 states and 1165 transitions. Second operand  has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:35,171 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:35,172 INFO  L93              Difference]: Finished difference Result 1396 states and 1891 transitions.
[2024-11-08 11:18:35,172 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:35,173 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 453
[2024-11-08 11:18:35,173 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:35,176 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:35,176 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:35,177 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:35,178 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 699 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 702 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:35,178 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [702 Valid, 1451 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:35,180 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:35,202 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:35,207 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3442240373395566) internal successors, (1152), 857 states have internal predecessors, (1152), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:35,209 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1164 transitions.
[2024-11-08 11:18:35,209 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1164 transitions. Word has length 453
[2024-11-08 11:18:35,210 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:35,210 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1164 transitions.
[2024-11-08 11:18:35,210 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:35,210 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1164 transitions.
[2024-11-08 11:18:35,217 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 455
[2024-11-08 11:18:35,217 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:35,218 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:35,218 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38
[2024-11-08 11:18:35,218 INFO  L396      AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:35,218 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:35,219 INFO  L85        PathProgramCache]: Analyzing trace with hash 1917394346, now seen corresponding path program 1 times
[2024-11-08 11:18:35,219 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:35,219 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116627675]
[2024-11-08 11:18:35,219 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:35,219 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:35,656 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,753 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:36,754 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,759 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:36,760 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,762 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:36,763 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,765 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 331
[2024-11-08 11:18:36,765 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,767 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 347
[2024-11-08 11:18:36,767 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,769 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359
[2024-11-08 11:18:36,770 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:36,773 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:36,774 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:36,774 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116627675]
[2024-11-08 11:18:36,774 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1116627675] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:36,774 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:36,775 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:36,775 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [242742634]
[2024-11-08 11:18:36,775 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:36,777 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:36,777 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:36,778 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:36,779 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:36,779 INFO  L87              Difference]: Start difference. First operand 865 states and 1164 transitions. Second operand  has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:36,975 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:36,976 INFO  L93              Difference]: Finished difference Result 1396 states and 1889 transitions.
[2024-11-08 11:18:36,977 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:36,977 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 454
[2024-11-08 11:18:36,978 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:36,980 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:36,981 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:36,983 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:36,983 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 1259 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1262 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:36,984 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1262 Valid, 1444 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:36,985 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:37,011 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:37,012 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3430571761960326) internal successors, (1151), 857 states have internal predecessors, (1151), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:37,014 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1163 transitions.
[2024-11-08 11:18:37,015 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1163 transitions. Word has length 454
[2024-11-08 11:18:37,015 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:37,015 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1163 transitions.
[2024-11-08 11:18:37,016 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:37,016 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1163 transitions.
[2024-11-08 11:18:37,019 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 456
[2024-11-08 11:18:37,019 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:37,020 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:37,020 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39
[2024-11-08 11:18:37,020 INFO  L396      AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:37,021 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:37,021 INFO  L85        PathProgramCache]: Analyzing trace with hash 915061002, now seen corresponding path program 1 times
[2024-11-08 11:18:37,021 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:37,021 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773688881]
[2024-11-08 11:18:37,022 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:37,022 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:37,404 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,229 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:38,231 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,233 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:38,234 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,235 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:38,236 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,238 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 332
[2024-11-08 11:18:38,239 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,240 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 348
[2024-11-08 11:18:38,241 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,242 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 360
[2024-11-08 11:18:38,242 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:38,244 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:38,245 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:38,245 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773688881]
[2024-11-08 11:18:38,245 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773688881] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:38,245 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:38,245 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:38,246 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790149635]
[2024-11-08 11:18:38,246 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:38,246 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:38,247 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:38,247 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:38,248 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:38,248 INFO  L87              Difference]: Start difference. First operand 865 states and 1163 transitions. Second operand  has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:38,425 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:38,426 INFO  L93              Difference]: Finished difference Result 1396 states and 1887 transitions.
[2024-11-08 11:18:38,426 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:38,427 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 455
[2024-11-08 11:18:38,427 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:38,430 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:38,430 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:38,431 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:38,432 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 683 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 686 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:38,432 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [686 Valid, 1451 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:38,433 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:38,452 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:38,453 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3418903150525088) internal successors, (1150), 857 states have internal predecessors, (1150), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:38,455 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1162 transitions.
[2024-11-08 11:18:38,455 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1162 transitions. Word has length 455
[2024-11-08 11:18:38,456 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:38,456 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1162 transitions.
[2024-11-08 11:18:38,456 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:38,456 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1162 transitions.
[2024-11-08 11:18:38,460 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 457
[2024-11-08 11:18:38,460 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:38,460 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:38,461 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40
[2024-11-08 11:18:38,461 INFO  L396      AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:38,461 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:38,461 INFO  L85        PathProgramCache]: Analyzing trace with hash 656057749, now seen corresponding path program 1 times
[2024-11-08 11:18:38,462 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:38,462 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990020734]
[2024-11-08 11:18:38,462 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:38,462 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:38,883 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,647 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:39,649 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,651 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:39,652 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,654 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:39,655 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,656 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 333
[2024-11-08 11:18:39,657 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,658 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 349
[2024-11-08 11:18:39,659 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,660 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361
[2024-11-08 11:18:39,660 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:39,663 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:39,663 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:39,663 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990020734]
[2024-11-08 11:18:39,663 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1990020734] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:39,664 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:39,664 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:39,664 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [819480475]
[2024-11-08 11:18:39,664 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:39,665 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:39,665 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:39,666 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:39,666 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:39,666 INFO  L87              Difference]: Start difference. First operand 865 states and 1162 transitions. Second operand  has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:39,860 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:39,860 INFO  L93              Difference]: Finished difference Result 1396 states and 1885 transitions.
[2024-11-08 11:18:39,861 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:39,861 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 456
[2024-11-08 11:18:39,862 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:39,864 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:39,864 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:39,866 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:39,866 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 1227 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1230 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:39,867 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1230 Valid, 1444 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:39,868 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:39,889 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:39,890 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3407234539089847) internal successors, (1149), 857 states have internal predecessors, (1149), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:39,892 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1161 transitions.
[2024-11-08 11:18:39,893 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1161 transitions. Word has length 456
[2024-11-08 11:18:39,894 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:39,894 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1161 transitions.
[2024-11-08 11:18:39,894 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:39,894 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1161 transitions.
[2024-11-08 11:18:39,898 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 458
[2024-11-08 11:18:39,898 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:39,899 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:39,899 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41
[2024-11-08 11:18:39,899 INFO  L396      AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:39,899 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:39,900 INFO  L85        PathProgramCache]: Analyzing trace with hash -583503211, now seen corresponding path program 1 times
[2024-11-08 11:18:39,900 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:39,900 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240957577]
[2024-11-08 11:18:39,900 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:39,900 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:40,323 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,044 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:41,046 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,048 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:41,049 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,050 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:41,051 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,055 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 334
[2024-11-08 11:18:41,056 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,057 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 350
[2024-11-08 11:18:41,058 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,059 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 362
[2024-11-08 11:18:41,060 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:41,062 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:41,062 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:41,064 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240957577]
[2024-11-08 11:18:41,064 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [240957577] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:41,064 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:41,064 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:41,064 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222399602]
[2024-11-08 11:18:41,064 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:41,065 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:41,065 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:41,067 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:41,068 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:41,069 INFO  L87              Difference]: Start difference. First operand 865 states and 1161 transitions. Second operand  has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:41,277 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:41,277 INFO  L93              Difference]: Finished difference Result 1396 states and 1883 transitions.
[2024-11-08 11:18:41,278 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:41,278 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 457
[2024-11-08 11:18:41,279 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:41,286 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:41,290 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:41,291 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:41,291 INFO  L432           NwaCegarLoop]: 721 mSDtfsCounter, 667 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 670 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:41,291 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [670 Valid, 1451 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:18:41,293 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:41,315 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:41,317 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.339556592765461) internal successors, (1148), 857 states have internal predecessors, (1148), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:41,319 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1160 transitions.
[2024-11-08 11:18:41,320 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1160 transitions. Word has length 457
[2024-11-08 11:18:41,320 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:41,321 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1160 transitions.
[2024-11-08 11:18:41,321 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:41,321 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1160 transitions.
[2024-11-08 11:18:41,325 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 459
[2024-11-08 11:18:41,325 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:41,326 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:41,326 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42
[2024-11-08 11:18:41,326 INFO  L396      AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:41,326 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:41,327 INFO  L85        PathProgramCache]: Analyzing trace with hash -1339774464, now seen corresponding path program 1 times
[2024-11-08 11:18:41,327 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:41,327 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [980491710]
[2024-11-08 11:18:41,327 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:41,328 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:41,676 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,386 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:42,387 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,388 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:42,391 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,393 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:42,394 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,395 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 335
[2024-11-08 11:18:42,396 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,397 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 351
[2024-11-08 11:18:42,398 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,399 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:18:42,400 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:42,402 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:42,402 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:42,402 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [980491710]
[2024-11-08 11:18:42,402 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [980491710] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:42,402 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:42,403 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:42,403 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073941255]
[2024-11-08 11:18:42,403 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:42,404 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:42,404 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:42,404 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:42,405 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:42,405 INFO  L87              Difference]: Start difference. First operand 865 states and 1160 transitions. Second operand  has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:42,530 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:42,531 INFO  L93              Difference]: Finished difference Result 1396 states and 1881 transitions.
[2024-11-08 11:18:42,531 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:42,532 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 458
[2024-11-08 11:18:42,532 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:42,534 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:42,534 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:42,539 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:42,540 INFO  L432           NwaCegarLoop]: 745 mSDtfsCounter, 644 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 647 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:42,540 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [647 Valid, 1499 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:42,542 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:42,563 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:42,568 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.338389731621937) internal successors, (1147), 857 states have internal predecessors, (1147), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:42,570 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1159 transitions.
[2024-11-08 11:18:42,573 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1159 transitions. Word has length 458
[2024-11-08 11:18:42,574 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:42,574 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1159 transitions.
[2024-11-08 11:18:42,574 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:42,574 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1159 transitions.
[2024-11-08 11:18:42,580 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 460
[2024-11-08 11:18:42,580 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:42,581 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:42,581 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43
[2024-11-08 11:18:42,581 INFO  L396      AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:42,582 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:42,582 INFO  L85        PathProgramCache]: Analyzing trace with hash 1268920480, now seen corresponding path program 1 times
[2024-11-08 11:18:42,582 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:42,582 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641737417]
[2024-11-08 11:18:42,583 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:42,583 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:43,041 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,626 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:43,627 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,629 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:43,630 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,631 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:43,632 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,634 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 336
[2024-11-08 11:18:43,634 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,635 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 352
[2024-11-08 11:18:43,636 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,637 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364
[2024-11-08 11:18:43,638 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:43,640 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:43,641 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:43,641 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641737417]
[2024-11-08 11:18:43,641 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641737417] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:43,641 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:43,641 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:43,641 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827073891]
[2024-11-08 11:18:43,642 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:43,642 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:43,642 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:43,643 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:43,643 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:43,644 INFO  L87              Difference]: Start difference. First operand 865 states and 1159 transitions. Second operand  has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:43,779 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:43,780 INFO  L93              Difference]: Finished difference Result 1396 states and 1879 transitions.
[2024-11-08 11:18:43,780 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:43,781 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 459
[2024-11-08 11:18:43,781 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:43,783 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:43,784 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:43,784 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:43,785 INFO  L432           NwaCegarLoop]: 745 mSDtfsCounter, 636 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 639 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:43,785 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [639 Valid, 1499 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:43,786 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:43,805 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:43,807 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.337222870478413) internal successors, (1146), 857 states have internal predecessors, (1146), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:43,809 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1158 transitions.
[2024-11-08 11:18:43,809 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1158 transitions. Word has length 459
[2024-11-08 11:18:43,810 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:43,810 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1158 transitions.
[2024-11-08 11:18:43,811 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:43,811 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1158 transitions.
[2024-11-08 11:18:43,814 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 461
[2024-11-08 11:18:43,814 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:43,815 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:43,815 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44
[2024-11-08 11:18:43,815 INFO  L396      AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:43,815 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:43,816 INFO  L85        PathProgramCache]: Analyzing trace with hash -2069828885, now seen corresponding path program 1 times
[2024-11-08 11:18:43,816 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:43,816 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962318478]
[2024-11-08 11:18:43,816 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:43,817 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:44,233 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,252 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:45,254 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,256 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:45,257 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,259 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:45,260 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,262 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 337
[2024-11-08 11:18:45,266 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,267 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 353
[2024-11-08 11:18:45,268 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,270 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365
[2024-11-08 11:18:45,273 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:45,276 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:45,280 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:45,280 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962318478]
[2024-11-08 11:18:45,280 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [962318478] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:45,280 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:45,280 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:45,281 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [197020172]
[2024-11-08 11:18:45,281 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:45,284 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:45,284 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:45,285 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:45,285 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:45,286 INFO  L87              Difference]: Start difference. First operand 865 states and 1158 transitions. Second operand  has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:45,440 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:45,440 INFO  L93              Difference]: Finished difference Result 1396 states and 1877 transitions.
[2024-11-08 11:18:45,441 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:45,441 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 460
[2024-11-08 11:18:45,442 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:45,444 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:45,444 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:45,445 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:45,445 INFO  L432           NwaCegarLoop]: 745 mSDtfsCounter, 1148 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1151 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:45,446 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1151 Valid, 1492 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:45,447 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:45,466 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:45,467 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3360560093348892) internal successors, (1145), 857 states have internal predecessors, (1145), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:45,469 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1157 transitions.
[2024-11-08 11:18:45,469 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1157 transitions. Word has length 460
[2024-11-08 11:18:45,470 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:45,470 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1157 transitions.
[2024-11-08 11:18:45,470 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:45,470 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1157 transitions.
[2024-11-08 11:18:45,474 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 462
[2024-11-08 11:18:45,474 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:45,475 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:45,475 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45
[2024-11-08 11:18:45,475 INFO  L396      AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:45,475 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:45,476 INFO  L85        PathProgramCache]: Analyzing trace with hash -186141909, now seen corresponding path program 1 times
[2024-11-08 11:18:45,476 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:45,476 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41870242]
[2024-11-08 11:18:45,476 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:45,476 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:45,948 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,685 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:46,687 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,689 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:46,690 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,692 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:46,693 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,694 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 338
[2024-11-08 11:18:46,698 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,699 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 354
[2024-11-08 11:18:46,700 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,701 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366
[2024-11-08 11:18:46,702 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:46,705 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:46,705 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:46,705 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41870242]
[2024-11-08 11:18:46,705 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [41870242] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:46,706 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:46,706 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:46,706 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1848147421]
[2024-11-08 11:18:46,706 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:46,707 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:46,707 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:46,708 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:46,708 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:46,709 INFO  L87              Difference]: Start difference. First operand 865 states and 1157 transitions. Second operand  has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:46,843 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:46,843 INFO  L93              Difference]: Finished difference Result 1396 states and 1875 transitions.
[2024-11-08 11:18:46,844 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:46,844 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 461
[2024-11-08 11:18:46,845 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:46,847 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:46,847 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:46,848 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:46,848 INFO  L432           NwaCegarLoop]: 745 mSDtfsCounter, 620 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 623 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:46,849 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [623 Valid, 1499 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:46,850 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:46,868 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:46,870 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3348891481913652) internal successors, (1144), 857 states have internal predecessors, (1144), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:46,871 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1156 transitions.
[2024-11-08 11:18:46,872 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1156 transitions. Word has length 461
[2024-11-08 11:18:46,872 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:46,873 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1156 transitions.
[2024-11-08 11:18:46,873 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:46,873 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1156 transitions.
[2024-11-08 11:18:46,876 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 463
[2024-11-08 11:18:46,877 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:46,877 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:46,877 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46
[2024-11-08 11:18:46,877 INFO  L396      AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:46,878 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:46,878 INFO  L85        PathProgramCache]: Analyzing trace with hash -274126762, now seen corresponding path program 1 times
[2024-11-08 11:18:46,878 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:46,878 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117252644]
[2024-11-08 11:18:46,879 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:46,879 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:47,376 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,013 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:48,014 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,016 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:48,018 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,020 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:48,021 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,026 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 339
[2024-11-08 11:18:48,027 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,028 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 355
[2024-11-08 11:18:48,032 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,033 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367
[2024-11-08 11:18:48,034 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:48,036 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:48,039 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:48,039 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117252644]
[2024-11-08 11:18:48,040 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117252644] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:48,040 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:48,040 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:48,040 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071165525]
[2024-11-08 11:18:48,040 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:48,042 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:48,042 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:48,043 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:48,044 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:48,044 INFO  L87              Difference]: Start difference. First operand 865 states and 1156 transitions. Second operand  has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:48,141 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:48,141 INFO  L93              Difference]: Finished difference Result 1396 states and 1873 transitions.
[2024-11-08 11:18:48,142 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:48,142 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 462
[2024-11-08 11:18:48,143 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:48,144 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:48,145 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:48,146 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:48,146 INFO  L432           NwaCegarLoop]: 757 mSDtfsCounter, 1109 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1112 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:48,146 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1112 Valid, 1516 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:48,149 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:48,171 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:48,173 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3337222870478413) internal successors, (1143), 857 states have internal predecessors, (1143), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:48,175 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1155 transitions.
[2024-11-08 11:18:48,175 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1155 transitions. Word has length 462
[2024-11-08 11:18:48,176 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:48,176 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1155 transitions.
[2024-11-08 11:18:48,176 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:48,176 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1155 transitions.
[2024-11-08 11:18:48,179 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 464
[2024-11-08 11:18:48,180 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:48,180 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:48,180 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47
[2024-11-08 11:18:48,180 INFO  L396      AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:48,181 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:48,181 INFO  L85        PathProgramCache]: Analyzing trace with hash 2055780918, now seen corresponding path program 1 times
[2024-11-08 11:18:48,181 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:48,181 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686149439]
[2024-11-08 11:18:48,181 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:48,182 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:48,690 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,381 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:49,382 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,384 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:49,385 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,386 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:49,386 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,387 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 340
[2024-11-08 11:18:49,388 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,389 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 356
[2024-11-08 11:18:49,390 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,391 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 368
[2024-11-08 11:18:49,392 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:49,394 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:49,394 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:49,394 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686149439]
[2024-11-08 11:18:49,395 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1686149439] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:49,395 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:49,395 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:49,395 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171015659]
[2024-11-08 11:18:49,395 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:49,396 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:49,396 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:49,397 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:49,397 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:49,397 INFO  L87              Difference]: Start difference. First operand 865 states and 1155 transitions. Second operand  has 5 states, 5 states have (on average 87.2) internal successors, (436), 5 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:49,497 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:49,497 INFO  L93              Difference]: Finished difference Result 1396 states and 1871 transitions.
[2024-11-08 11:18:49,498 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:49,498 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 87.2) internal successors, (436), 5 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 463
[2024-11-08 11:18:49,499 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:49,501 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:49,501 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:49,502 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:49,502 INFO  L432           NwaCegarLoop]: 757 mSDtfsCounter, 1093 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1096 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:49,502 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1096 Valid, 1516 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:49,504 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:49,522 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:49,523 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3325554259043173) internal successors, (1142), 857 states have internal predecessors, (1142), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:49,525 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1154 transitions.
[2024-11-08 11:18:49,526 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1154 transitions. Word has length 463
[2024-11-08 11:18:49,526 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:49,526 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1154 transitions.
[2024-11-08 11:18:49,527 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 87.2) internal successors, (436), 5 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:49,527 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1154 transitions.
[2024-11-08 11:18:49,530 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 465
[2024-11-08 11:18:49,530 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:49,531 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:49,531 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48
[2024-11-08 11:18:49,531 INFO  L396      AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:49,532 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:49,532 INFO  L85        PathProgramCache]: Analyzing trace with hash 272048705, now seen corresponding path program 1 times
[2024-11-08 11:18:49,532 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:49,532 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395509698]
[2024-11-08 11:18:49,532 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:49,533 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:49,864 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,453 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:50,454 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,456 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:50,457 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,458 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:50,459 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,461 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 341
[2024-11-08 11:18:50,462 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,463 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357
[2024-11-08 11:18:50,464 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,465 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 369
[2024-11-08 11:18:50,466 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:50,469 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:50,469 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:50,470 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395509698]
[2024-11-08 11:18:50,470 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395509698] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:50,470 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:50,470 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:50,470 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385793481]
[2024-11-08 11:18:50,471 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:50,471 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:50,472 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:50,472 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:50,473 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:50,473 INFO  L87              Difference]: Start difference. First operand 865 states and 1154 transitions. Second operand  has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:50,942 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:50,942 INFO  L93              Difference]: Finished difference Result 1396 states and 1869 transitions.
[2024-11-08 11:18:50,942 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:50,943 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 464
[2024-11-08 11:18:50,943 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:50,946 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:50,946 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:50,949 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:50,950 INFO  L432           NwaCegarLoop]: 578 mSDtfsCounter, 582 mSDsluCounter, 587 mSDsCounter, 0 mSdLazyCounter, 392 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 585 SdHoareTripleChecker+Valid, 1165 SdHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 392 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:50,950 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [585 Valid, 1165 Invalid, 393 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 392 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 11:18:50,952 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:50,973 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:50,974 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3313885647607935) internal successors, (1141), 857 states have internal predecessors, (1141), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:50,976 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1153 transitions.
[2024-11-08 11:18:50,979 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1153 transitions. Word has length 464
[2024-11-08 11:18:50,980 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:50,980 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1153 transitions.
[2024-11-08 11:18:50,980 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:50,983 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1153 transitions.
[2024-11-08 11:18:50,987 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 466
[2024-11-08 11:18:50,987 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:50,988 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:50,988 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49
[2024-11-08 11:18:50,988 INFO  L396      AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:50,989 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:50,989 INFO  L85        PathProgramCache]: Analyzing trace with hash 207947201, now seen corresponding path program 1 times
[2024-11-08 11:18:50,989 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:50,989 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662041849]
[2024-11-08 11:18:50,989 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:50,990 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:52,236 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,182 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:53,183 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,185 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:53,186 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,188 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:53,189 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,191 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 342
[2024-11-08 11:18:53,191 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,193 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 358
[2024-11-08 11:18:53,193 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,194 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 370
[2024-11-08 11:18:53,195 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:53,198 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:53,198 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:53,198 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662041849]
[2024-11-08 11:18:53,198 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1662041849] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:53,199 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:53,199 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:53,199 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347405955]
[2024-11-08 11:18:53,199 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:53,200 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:53,200 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:53,201 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:53,201 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:53,202 INFO  L87              Difference]: Start difference. First operand 865 states and 1153 transitions. Second operand  has 4 states, 4 states have (on average 109.5) internal successors, (438), 4 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:53,287 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:53,287 INFO  L93              Difference]: Finished difference Result 1396 states and 1867 transitions.
[2024-11-08 11:18:53,287 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:53,288 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 109.5) internal successors, (438), 4 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 465
[2024-11-08 11:18:53,289 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:53,291 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:53,291 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:53,292 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:53,292 INFO  L432           NwaCegarLoop]: 756 mSDtfsCounter, 495 mSDsluCounter, 758 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 495 SdHoareTripleChecker+Valid, 1514 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:53,293 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [495 Valid, 1514 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:53,294 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:53,313 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:53,315 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3302217036172694) internal successors, (1140), 857 states have internal predecessors, (1140), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:53,317 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1152 transitions.
[2024-11-08 11:18:53,317 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1152 transitions. Word has length 465
[2024-11-08 11:18:53,318 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:53,318 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1152 transitions.
[2024-11-08 11:18:53,318 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 109.5) internal successors, (438), 4 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:53,319 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1152 transitions.
[2024-11-08 11:18:53,322 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 467
[2024-11-08 11:18:53,323 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:53,323 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:53,323 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50
[2024-11-08 11:18:53,323 INFO  L396      AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:53,324 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:53,324 INFO  L85        PathProgramCache]: Analyzing trace with hash -1490829233, now seen corresponding path program 1 times
[2024-11-08 11:18:53,324 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:53,324 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055451970]
[2024-11-08 11:18:53,325 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:53,325 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:54,454 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,358 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:55,360 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,362 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:55,362 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,364 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:55,365 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,368 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 343
[2024-11-08 11:18:55,369 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,370 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359
[2024-11-08 11:18:55,371 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,372 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 371
[2024-11-08 11:18:55,373 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:55,377 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:55,377 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:55,378 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1055451970]
[2024-11-08 11:18:55,378 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1055451970] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:55,378 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:55,378 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:55,378 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804791458]
[2024-11-08 11:18:55,379 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:55,379 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:55,379 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:55,380 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:55,381 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:55,381 INFO  L87              Difference]: Start difference. First operand 865 states and 1152 transitions. Second operand  has 5 states, 5 states have (on average 87.8) internal successors, (439), 5 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:55,512 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:55,513 INFO  L93              Difference]: Finished difference Result 1396 states and 1865 transitions.
[2024-11-08 11:18:55,513 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:55,514 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 87.8) internal successors, (439), 5 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 466
[2024-11-08 11:18:55,514 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:55,516 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:55,516 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:55,517 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:55,518 INFO  L432           NwaCegarLoop]: 741 mSDtfsCounter, 1176 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1176 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:55,518 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1176 Valid, 1484 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:55,520 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:55,538 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:55,539 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3290548424737456) internal successors, (1139), 857 states have internal predecessors, (1139), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:55,541 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1151 transitions.
[2024-11-08 11:18:55,541 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1151 transitions. Word has length 466
[2024-11-08 11:18:55,542 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:55,542 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1151 transitions.
[2024-11-08 11:18:55,542 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 87.8) internal successors, (439), 5 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:55,543 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1151 transitions.
[2024-11-08 11:18:55,546 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 468
[2024-11-08 11:18:55,546 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:55,547 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:55,547 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51
[2024-11-08 11:18:55,547 INFO  L396      AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:55,548 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:55,548 INFO  L85        PathProgramCache]: Analyzing trace with hash 802901313, now seen corresponding path program 1 times
[2024-11-08 11:18:55,548 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:55,548 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1089387826]
[2024-11-08 11:18:55,549 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:55,549 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:56,761 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,534 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:57,536 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,538 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:57,540 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,542 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:57,544 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,546 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 344
[2024-11-08 11:18:57,547 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,548 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 360
[2024-11-08 11:18:57,549 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,550 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 372
[2024-11-08 11:18:57,552 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:57,556 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:57,557 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:57,557 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1089387826]
[2024-11-08 11:18:57,557 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1089387826] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:57,557 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:57,557 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:18:57,558 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615613596]
[2024-11-08 11:18:57,558 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:57,558 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:18:57,559 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:57,560 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:18:57,560 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:57,560 INFO  L87              Difference]: Start difference. First operand 865 states and 1151 transitions. Second operand  has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:57,694 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:57,695 INFO  L93              Difference]: Finished difference Result 1396 states and 1863 transitions.
[2024-11-08 11:18:57,695 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:57,696 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 467
[2024-11-08 11:18:57,698 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:57,700 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:57,700 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:57,701 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:18:57,702 INFO  L432           NwaCegarLoop]: 741 mSDtfsCounter, 1166 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1166 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:57,702 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1166 Valid, 1484 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:57,705 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:57,725 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:57,728 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3278879813302218) internal successors, (1138), 857 states have internal predecessors, (1138), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:57,729 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1150 transitions.
[2024-11-08 11:18:57,730 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1150 transitions. Word has length 467
[2024-11-08 11:18:57,731 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:57,731 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1150 transitions.
[2024-11-08 11:18:57,731 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:57,731 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1150 transitions.
[2024-11-08 11:18:57,735 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 469
[2024-11-08 11:18:57,735 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:57,736 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:57,736 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52
[2024-11-08 11:18:57,736 INFO  L396      AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:57,736 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:57,737 INFO  L85        PathProgramCache]: Analyzing trace with hash -1056051488, now seen corresponding path program 1 times
[2024-11-08 11:18:57,737 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:57,737 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722495792]
[2024-11-08 11:18:57,737 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:57,737 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:18:58,670 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,413 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:18:59,414 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,417 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:18:59,418 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,421 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:18:59,422 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,425 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 345
[2024-11-08 11:18:59,426 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,427 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361
[2024-11-08 11:18:59,428 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,429 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 373
[2024-11-08 11:18:59,430 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:18:59,432 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:18:59,433 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:18:59,433 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722495792]
[2024-11-08 11:18:59,433 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722495792] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:18:59,433 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:18:59,434 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:18:59,434 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276216005]
[2024-11-08 11:18:59,434 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:18:59,435 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:18:59,435 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:18:59,436 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:18:59,436 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:18:59,436 INFO  L87              Difference]: Start difference. First operand 865 states and 1150 transitions. Second operand  has 4 states, 4 states have (on average 110.25) internal successors, (441), 4 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:59,575 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:18:59,576 INFO  L93              Difference]: Finished difference Result 1396 states and 1861 transitions.
[2024-11-08 11:18:59,576 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:18:59,577 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 110.25) internal successors, (441), 4 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 468
[2024-11-08 11:18:59,577 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:18:59,579 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:18:59,579 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:18:59,581 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:18:59,581 INFO  L432           NwaCegarLoop]: 741 mSDtfsCounter, 504 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 504 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:18:59,581 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [504 Valid, 1484 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:18:59,583 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:18:59,603 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:18:59,604 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3267211201866977) internal successors, (1137), 857 states have internal predecessors, (1137), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:18:59,606 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1149 transitions.
[2024-11-08 11:18:59,607 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1149 transitions. Word has length 468
[2024-11-08 11:18:59,607 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:18:59,607 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1149 transitions.
[2024-11-08 11:18:59,608 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 110.25) internal successors, (441), 4 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:18:59,608 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1149 transitions.
[2024-11-08 11:18:59,611 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 470
[2024-11-08 11:18:59,612 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:18:59,612 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:18:59,612 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53
[2024-11-08 11:18:59,612 INFO  L396      AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:18:59,613 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:18:59,613 INFO  L85        PathProgramCache]: Analyzing trace with hash -903136784, now seen corresponding path program 1 times
[2024-11-08 11:18:59,613 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:18:59,613 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683690332]
[2024-11-08 11:18:59,614 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:18:59,614 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:00,473 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,132 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:01,133 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,134 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:01,136 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,137 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:01,138 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,140 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 346
[2024-11-08 11:19:01,140 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,141 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 362
[2024-11-08 11:19:01,142 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,143 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 374
[2024-11-08 11:19:01,143 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:01,146 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:01,147 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:01,147 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683690332]
[2024-11-08 11:19:01,147 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683690332] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:01,147 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:01,147 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:19:01,147 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959344122]
[2024-11-08 11:19:01,148 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:01,148 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:19:01,148 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:01,149 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:19:01,150 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:01,150 INFO  L87              Difference]: Start difference. First operand 865 states and 1149 transitions. Second operand  has 5 states, 5 states have (on average 88.4) internal successors, (442), 5 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:01,378 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:01,378 INFO  L93              Difference]: Finished difference Result 1396 states and 1859 transitions.
[2024-11-08 11:19:01,379 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:01,379 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 88.4) internal successors, (442), 5 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 469
[2024-11-08 11:19:01,380 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:01,381 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:01,382 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:01,383 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:01,383 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 1211 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1211 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:01,384 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1211 Valid, 1422 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:19:01,385 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:01,404 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:01,405 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.325554259043174) internal successors, (1136), 857 states have internal predecessors, (1136), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:01,407 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1148 transitions.
[2024-11-08 11:19:01,408 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1148 transitions. Word has length 469
[2024-11-08 11:19:01,408 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:01,409 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1148 transitions.
[2024-11-08 11:19:01,409 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 88.4) internal successors, (442), 5 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:01,409 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1148 transitions.
[2024-11-08 11:19:01,412 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 471
[2024-11-08 11:19:01,413 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:01,413 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:01,414 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54
[2024-11-08 11:19:01,414 INFO  L396      AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:01,414 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:01,414 INFO  L85        PathProgramCache]: Analyzing trace with hash 1110766654, now seen corresponding path program 1 times
[2024-11-08 11:19:01,415 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:01,415 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599950769]
[2024-11-08 11:19:01,415 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:01,415 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:02,429 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,167 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:03,168 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,171 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:03,172 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,175 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:03,176 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,179 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 347
[2024-11-08 11:19:03,179 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,180 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:19:03,181 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,182 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 375
[2024-11-08 11:19:03,183 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:03,185 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:03,185 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:03,185 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1599950769]
[2024-11-08 11:19:03,186 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1599950769] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:03,186 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:03,186 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:19:03,186 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942294404]
[2024-11-08 11:19:03,186 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:03,187 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:19:03,187 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:03,188 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:19:03,188 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:03,188 INFO  L87              Difference]: Start difference. First operand 865 states and 1148 transitions. Second operand  has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:03,382 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:03,382 INFO  L93              Difference]: Finished difference Result 1396 states and 1857 transitions.
[2024-11-08 11:19:03,383 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:03,383 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 470
[2024-11-08 11:19:03,383 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:03,385 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:03,385 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:03,387 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:03,387 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 1201 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1201 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:03,387 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1201 Valid, 1422 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:19:03,389 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:03,408 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:03,409 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3243873978996499) internal successors, (1135), 857 states have internal predecessors, (1135), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:03,411 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1147 transitions.
[2024-11-08 11:19:03,412 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1147 transitions. Word has length 470
[2024-11-08 11:19:03,412 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:03,413 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1147 transitions.
[2024-11-08 11:19:03,413 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:03,413 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1147 transitions.
[2024-11-08 11:19:03,416 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 472
[2024-11-08 11:19:03,417 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:03,417 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:03,417 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55
[2024-11-08 11:19:03,418 INFO  L396      AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:03,418 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:03,418 INFO  L85        PathProgramCache]: Analyzing trace with hash -1761391425, now seen corresponding path program 1 times
[2024-11-08 11:19:03,419 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:03,419 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373684465]
[2024-11-08 11:19:03,419 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:03,419 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:04,748 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,701 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:05,703 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,706 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:05,707 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,709 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:05,710 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,713 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 348
[2024-11-08 11:19:05,714 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,716 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364
[2024-11-08 11:19:05,717 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,718 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 376
[2024-11-08 11:19:05,719 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:05,723 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:05,724 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:05,724 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373684465]
[2024-11-08 11:19:05,724 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373684465] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:05,724 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:05,725 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:19:05,725 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1713594018]
[2024-11-08 11:19:05,725 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:05,726 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:19:05,726 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:05,727 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:19:05,727 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:19:05,728 INFO  L87              Difference]: Start difference. First operand 865 states and 1147 transitions. Second operand  has 4 states, 4 states have (on average 111.0) internal successors, (444), 4 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:05,898 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:05,898 INFO  L93              Difference]: Finished difference Result 1396 states and 1855 transitions.
[2024-11-08 11:19:05,898 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:05,899 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 111.0) internal successors, (444), 4 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 471
[2024-11-08 11:19:05,899 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:05,901 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:05,901 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:05,903 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:05,903 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 557 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 557 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:05,904 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [557 Valid, 1422 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:19:05,905 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:05,934 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:05,935 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.323220536756126) internal successors, (1134), 857 states have internal predecessors, (1134), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:05,938 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1146 transitions.
[2024-11-08 11:19:05,938 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1146 transitions. Word has length 471
[2024-11-08 11:19:05,939 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:05,939 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1146 transitions.
[2024-11-08 11:19:05,940 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 111.0) internal successors, (444), 4 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:05,940 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1146 transitions.
[2024-11-08 11:19:05,946 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 473
[2024-11-08 11:19:05,946 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:05,947 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:05,947 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56
[2024-11-08 11:19:05,947 INFO  L396      AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:05,948 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:05,948 INFO  L85        PathProgramCache]: Analyzing trace with hash -2040349137, now seen corresponding path program 1 times
[2024-11-08 11:19:05,948 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:05,949 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025366778]
[2024-11-08 11:19:05,949 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:05,949 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:07,040 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,705 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:07,706 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,708 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:07,709 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,711 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:07,711 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,714 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 349
[2024-11-08 11:19:07,715 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,716 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365
[2024-11-08 11:19:07,717 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,718 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 377
[2024-11-08 11:19:07,719 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:07,722 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:07,722 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:07,723 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025366778]
[2024-11-08 11:19:07,723 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1025366778] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:07,723 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:07,723 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:19:07,723 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505555265]
[2024-11-08 11:19:07,724 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:07,724 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:19:07,724 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:07,725 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:19:07,725 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:07,726 INFO  L87              Difference]: Start difference. First operand 865 states and 1146 transitions. Second operand  has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:07,946 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:07,947 INFO  L93              Difference]: Finished difference Result 1396 states and 1853 transitions.
[2024-11-08 11:19:07,947 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:07,948 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 472
[2024-11-08 11:19:07,948 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:07,950 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:07,950 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:07,951 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:07,952 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 1181 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1181 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:07,952 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1181 Valid, 1422 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:19:07,954 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:07,974 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:07,975 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.322053675612602) internal successors, (1133), 857 states have internal predecessors, (1133), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:07,976 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1145 transitions.
[2024-11-08 11:19:07,977 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1145 transitions. Word has length 472
[2024-11-08 11:19:07,977 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:07,977 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1145 transitions.
[2024-11-08 11:19:07,978 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:07,978 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1145 transitions.
[2024-11-08 11:19:07,981 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 474
[2024-11-08 11:19:07,982 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:07,982 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:07,982 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57
[2024-11-08 11:19:07,983 INFO  L396      AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:07,983 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:07,983 INFO  L85        PathProgramCache]: Analyzing trace with hash -512312818, now seen corresponding path program 1 times
[2024-11-08 11:19:07,984 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:07,984 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370483094]
[2024-11-08 11:19:07,984 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:07,984 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:09,293 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,036 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:10,037 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,039 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:10,039 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,041 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:10,042 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,044 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 350
[2024-11-08 11:19:10,044 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,045 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366
[2024-11-08 11:19:10,045 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,046 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 378
[2024-11-08 11:19:10,046 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:10,048 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:10,049 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:10,049 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1370483094]
[2024-11-08 11:19:10,049 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1370483094] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:10,049 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:10,049 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:19:10,049 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404085051]
[2024-11-08 11:19:10,049 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:10,050 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:19:10,050 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:10,051 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:19:10,051 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:10,051 INFO  L87              Difference]: Start difference. First operand 865 states and 1145 transitions. Second operand  has 5 states, 5 states have (on average 89.2) internal successors, (446), 5 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:10,234 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:10,234 INFO  L93              Difference]: Finished difference Result 1396 states and 1851 transitions.
[2024-11-08 11:19:10,234 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:10,235 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 89.2) internal successors, (446), 5 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 473
[2024-11-08 11:19:10,235 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:10,237 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:10,237 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:10,238 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:10,239 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 1171 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1171 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:10,239 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1171 Valid, 1422 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:19:10,240 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:10,261 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:10,262 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3208868144690782) internal successors, (1132), 857 states have internal predecessors, (1132), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:10,264 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1144 transitions.
[2024-11-08 11:19:10,265 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1144 transitions. Word has length 473
[2024-11-08 11:19:10,265 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:10,265 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1144 transitions.
[2024-11-08 11:19:10,266 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 89.2) internal successors, (446), 5 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:10,266 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1144 transitions.
[2024-11-08 11:19:10,270 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 475
[2024-11-08 11:19:10,270 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:10,270 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:10,271 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58
[2024-11-08 11:19:10,271 INFO  L396      AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:10,271 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:10,272 INFO  L85        PathProgramCache]: Analyzing trace with hash 373097888, now seen corresponding path program 1 times
[2024-11-08 11:19:10,272 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:10,272 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071033808]
[2024-11-08 11:19:10,272 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:10,272 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:11,148 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,853 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:11,854 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,856 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:11,857 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,859 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:11,860 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,861 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 351
[2024-11-08 11:19:11,862 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,862 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367
[2024-11-08 11:19:11,863 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,864 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 379
[2024-11-08 11:19:11,864 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:11,866 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:11,866 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:11,866 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2071033808]
[2024-11-08 11:19:11,866 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2071033808] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:11,867 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:11,867 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:19:11,867 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202386233]
[2024-11-08 11:19:11,867 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:11,868 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:19:11,868 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:11,869 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:19:11,869 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:11,870 INFO  L87              Difference]: Start difference. First operand 865 states and 1144 transitions. Second operand  has 5 states, 5 states have (on average 89.4) internal successors, (447), 5 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:12,068 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:12,068 INFO  L93              Difference]: Finished difference Result 1396 states and 1849 transitions.
[2024-11-08 11:19:12,069 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:12,069 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 89.4) internal successors, (447), 5 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 474
[2024-11-08 11:19:12,070 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:12,071 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:12,071 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:12,072 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:12,072 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 632 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 632 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:12,072 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [632 Valid, 1429 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:19:12,073 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:12,092 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:12,093 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3197199533255544) internal successors, (1131), 857 states have internal predecessors, (1131), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:12,094 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1143 transitions.
[2024-11-08 11:19:12,094 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1143 transitions. Word has length 474
[2024-11-08 11:19:12,095 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:12,095 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1143 transitions.
[2024-11-08 11:19:12,095 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 89.4) internal successors, (447), 5 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:12,095 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1143 transitions.
[2024-11-08 11:19:12,099 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 476
[2024-11-08 11:19:12,099 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:12,100 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:12,100 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59
[2024-11-08 11:19:12,100 INFO  L396      AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:12,100 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:12,101 INFO  L85        PathProgramCache]: Analyzing trace with hash 1400492509, now seen corresponding path program 1 times
[2024-11-08 11:19:12,101 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:12,101 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843021920]
[2024-11-08 11:19:12,101 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:12,102 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:13,345 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,004 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:14,005 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,008 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:14,009 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,012 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:14,013 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,016 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 352
[2024-11-08 11:19:14,017 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,018 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 368
[2024-11-08 11:19:14,018 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,019 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 380
[2024-11-08 11:19:14,020 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:14,023 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:14,023 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:14,023 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843021920]
[2024-11-08 11:19:14,023 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [843021920] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:14,024 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:14,024 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-08 11:19:14,024 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [688844188]
[2024-11-08 11:19:14,024 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:14,025 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:19:14,025 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:14,026 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:19:14,026 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-08 11:19:14,027 INFO  L87              Difference]: Start difference. First operand 865 states and 1143 transitions. Second operand  has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:14,217 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:14,217 INFO  L93              Difference]: Finished difference Result 1396 states and 1847 transitions.
[2024-11-08 11:19:14,218 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:19:14,218 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 475
[2024-11-08 11:19:14,219 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:14,221 INFO  L225             Difference]: With dead ends: 1396
[2024-11-08 11:19:14,221 INFO  L226             Difference]: Without dead ends: 865
[2024-11-08 11:19:14,222 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:19:14,223 INFO  L432           NwaCegarLoop]: 710 mSDtfsCounter, 521 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 521 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:14,223 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [521 Valid, 1422 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:19:14,225 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 865 states.
[2024-11-08 11:19:14,247 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865.
[2024-11-08 11:19:14,248 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 865 states, 857 states have (on average 1.3185530921820303) internal successors, (1130), 857 states have internal predecessors, (1130), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:19:14,250 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1142 transitions.
[2024-11-08 11:19:14,250 INFO  L78                 Accepts]: Start accepts. Automaton has 865 states and 1142 transitions. Word has length 475
[2024-11-08 11:19:14,251 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:14,251 INFO  L471      AbstractCegarLoop]: Abstraction has 865 states and 1142 transitions.
[2024-11-08 11:19:14,251 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:14,251 INFO  L276                IsEmpty]: Start isEmpty. Operand 865 states and 1142 transitions.
[2024-11-08 11:19:14,255 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 477
[2024-11-08 11:19:14,257 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:14,257 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:14,257 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60
[2024-11-08 11:19:14,258 INFO  L396      AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:14,258 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:14,258 INFO  L85        PathProgramCache]: Analyzing trace with hash 1466399377, now seen corresponding path program 1 times
[2024-11-08 11:19:14,259 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:14,259 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812259627]
[2024-11-08 11:19:14,259 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:14,259 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:15,713 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,430 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:16,431 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,433 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:16,433 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,434 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:16,435 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,436 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 353
[2024-11-08 11:19:16,436 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,437 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 369
[2024-11-08 11:19:16,437 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,438 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381
[2024-11-08 11:19:16,439 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:16,442 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:16,442 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:16,442 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1812259627]
[2024-11-08 11:19:16,442 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1812259627] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:16,442 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:16,443 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:19:16,443 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908478247]
[2024-11-08 11:19:16,443 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:16,444 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:19:16,444 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:16,445 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:19:16,445 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:16,445 INFO  L87              Difference]: Start difference. First operand 865 states and 1142 transitions. Second operand  has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:17,271 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:17,272 INFO  L93              Difference]: Finished difference Result 1999 states and 2653 transitions.
[2024-11-08 11:19:17,272 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:19:17,272 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 476
[2024-11-08 11:19:17,273 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:17,276 INFO  L225             Difference]: With dead ends: 1999
[2024-11-08 11:19:17,276 INFO  L226             Difference]: Without dead ends: 1468
[2024-11-08 11:19:17,277 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:19:17,278 INFO  L432           NwaCegarLoop]: 696 mSDtfsCounter, 417 mSDsluCounter, 2661 mSDsCounter, 0 mSdLazyCounter, 765 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 420 SdHoareTripleChecker+Valid, 3357 SdHoareTripleChecker+Invalid, 773 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 765 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:17,278 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [420 Valid, 3357 Invalid, 773 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 765 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 11:19:17,280 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1468 states.
[2024-11-08 11:19:17,315 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1468 to 1352.
[2024-11-08 11:19:17,317 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1352 states, 1341 states have (on average 1.3154362416107384) internal successors, (1764), 1341 states have internal predecessors, (1764), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 11:19:17,319 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1352 states to 1352 states and 1782 transitions.
[2024-11-08 11:19:17,320 INFO  L78                 Accepts]: Start accepts. Automaton has 1352 states and 1782 transitions. Word has length 476
[2024-11-08 11:19:17,320 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:17,321 INFO  L471      AbstractCegarLoop]: Abstraction has 1352 states and 1782 transitions.
[2024-11-08 11:19:17,321 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:17,321 INFO  L276                IsEmpty]: Start isEmpty. Operand 1352 states and 1782 transitions.
[2024-11-08 11:19:17,325 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 478
[2024-11-08 11:19:17,326 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:17,326 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:17,326 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61
[2024-11-08 11:19:17,327 INFO  L396      AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:17,327 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:17,327 INFO  L85        PathProgramCache]: Analyzing trace with hash -1123549127, now seen corresponding path program 1 times
[2024-11-08 11:19:17,328 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:17,328 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643873059]
[2024-11-08 11:19:17,328 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:17,328 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:18,955 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,913 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:19,914 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,915 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:19,916 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,917 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:19,917 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,918 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 354
[2024-11-08 11:19:19,919 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,920 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 370
[2024-11-08 11:19:19,920 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,921 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382
[2024-11-08 11:19:19,921 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:19,923 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:19:19,923 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:19,924 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643873059]
[2024-11-08 11:19:19,924 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1643873059] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:19,924 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:19,924 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:19:19,924 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905868420]
[2024-11-08 11:19:19,924 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:19,925 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:19:19,925 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:19,926 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:19:19,926 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:19,927 INFO  L87              Difference]: Start difference. First operand 1352 states and 1782 transitions. Second operand  has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:20,676 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:20,676 INFO  L93              Difference]: Finished difference Result 1906 states and 2519 transitions.
[2024-11-08 11:19:20,677 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:19:20,677 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477
[2024-11-08 11:19:20,677 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:20,679 INFO  L225             Difference]: With dead ends: 1906
[2024-11-08 11:19:20,679 INFO  L226             Difference]: Without dead ends: 1375
[2024-11-08 11:19:20,680 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:19:20,681 INFO  L432           NwaCegarLoop]: 568 mSDtfsCounter, 1339 mSDsluCounter, 1681 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1342 SdHoareTripleChecker+Valid, 2249 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:20,681 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1342 Valid, 2249 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 11:19:20,683 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1375 states.
[2024-11-08 11:19:20,715 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1375 to 1353.
[2024-11-08 11:19:20,717 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1353 states, 1342 states have (on average 1.3152011922503726) internal successors, (1765), 1342 states have internal predecessors, (1765), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 11:19:20,719 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 1783 transitions.
[2024-11-08 11:19:20,720 INFO  L78                 Accepts]: Start accepts. Automaton has 1353 states and 1783 transitions. Word has length 477
[2024-11-08 11:19:20,763 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:20,767 INFO  L471      AbstractCegarLoop]: Abstraction has 1353 states and 1783 transitions.
[2024-11-08 11:19:20,767 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:20,767 INFO  L276                IsEmpty]: Start isEmpty. Operand 1353 states and 1783 transitions.
[2024-11-08 11:19:20,773 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 478
[2024-11-08 11:19:20,773 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:20,773 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:20,774 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62
[2024-11-08 11:19:20,774 INFO  L396      AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:20,775 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:20,775 INFO  L85        PathProgramCache]: Analyzing trace with hash -873949048, now seen corresponding path program 1 times
[2024-11-08 11:19:20,776 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:20,776 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944501468]
[2024-11-08 11:19:20,776 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:20,776 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:22,282 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,608 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 11:19:23,609 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,611 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76
[2024-11-08 11:19:23,611 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,613 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88
[2024-11-08 11:19:23,614 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,615 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 354
[2024-11-08 11:19:23,615 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,616 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 370
[2024-11-08 11:19:23,617 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,617 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382
[2024-11-08 11:19:23,617 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:23,619 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked.
[2024-11-08 11:19:23,619 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:23,619 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [944501468]
[2024-11-08 11:19:23,619 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [944501468] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:23,619 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:23,619 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 11:19:23,619 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045925100]
[2024-11-08 11:19:23,620 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:23,620 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 11:19:23,621 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:23,621 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 11:19:23,622 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2024-11-08 11:19:23,622 INFO  L87              Difference]: Start difference. First operand 1353 states and 1783 transitions. Second operand  has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:23,898 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:23,898 INFO  L93              Difference]: Finished difference Result 3074 states and 4032 transitions.
[2024-11-08 11:19:23,898 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2024-11-08 11:19:23,898 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477
[2024-11-08 11:19:23,899 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:23,904 INFO  L225             Difference]: With dead ends: 3074
[2024-11-08 11:19:23,904 INFO  L226             Difference]: Without dead ends: 2361
[2024-11-08 11:19:23,907 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:19:23,908 INFO  L432           NwaCegarLoop]: 1798 mSDtfsCounter, 1163 mSDsluCounter, 7731 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1166 SdHoareTripleChecker+Valid, 9529 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:23,909 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1166 Valid, 9529 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:19:23,911 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2361 states.
[2024-11-08 11:19:23,965 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2361 to 1420.
[2024-11-08 11:19:23,966 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1420 states, 1406 states have (on average 1.3200568990042674) internal successors, (1856), 1406 states have internal predecessors, (1856), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 11:19:23,970 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1420 states to 1420 states and 1880 transitions.
[2024-11-08 11:19:23,971 INFO  L78                 Accepts]: Start accepts. Automaton has 1420 states and 1880 transitions. Word has length 477
[2024-11-08 11:19:23,973 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:23,973 INFO  L471      AbstractCegarLoop]: Abstraction has 1420 states and 1880 transitions.
[2024-11-08 11:19:23,973 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:19:23,973 INFO  L276                IsEmpty]: Start isEmpty. Operand 1420 states and 1880 transitions.
[2024-11-08 11:19:23,978 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 479
[2024-11-08 11:19:23,978 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:23,978 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:23,979 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63
[2024-11-08 11:19:23,979 INFO  L396      AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:23,979 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:23,980 INFO  L85        PathProgramCache]: Analyzing trace with hash -483625554, now seen corresponding path program 1 times
[2024-11-08 11:19:23,980 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:23,980 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264067853]
[2024-11-08 11:19:23,980 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:23,980 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:25,531 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,290 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:26,291 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,293 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75
[2024-11-08 11:19:26,294 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,295 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87
[2024-11-08 11:19:26,297 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,298 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 355
[2024-11-08 11:19:26,299 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,300 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 371
[2024-11-08 11:19:26,301 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,302 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383
[2024-11-08 11:19:26,302 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:26,304 INFO  L134       CoverageAnalysis]: Checked inductivity of 175 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked.
[2024-11-08 11:19:26,304 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:26,305 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264067853]
[2024-11-08 11:19:26,305 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [264067853] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:26,305 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:26,305 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-08 11:19:26,305 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448445537]
[2024-11-08 11:19:26,305 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:26,306 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 11:19:26,306 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:26,307 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 11:19:26,307 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:19:26,308 INFO  L87              Difference]: Start difference. First operand 1420 states and 1880 transitions. Second operand  has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:19:26,789 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:26,789 INFO  L93              Difference]: Finished difference Result 2814 states and 3716 transitions.
[2024-11-08 11:19:26,790 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-08 11:19:26,790 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 478
[2024-11-08 11:19:26,791 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:26,795 INFO  L225             Difference]: With dead ends: 2814
[2024-11-08 11:19:26,795 INFO  L226             Difference]: Without dead ends: 1436
[2024-11-08 11:19:26,797 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110
[2024-11-08 11:19:26,797 INFO  L432           NwaCegarLoop]: 756 mSDtfsCounter, 771 mSDsluCounter, 2832 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 773 SdHoareTripleChecker+Valid, 3588 SdHoareTripleChecker+Invalid, 295 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:26,798 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [773 Valid, 3588 Invalid, 295 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 11:19:26,799 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1436 states.
[2024-11-08 11:19:26,839 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 1428.
[2024-11-08 11:19:26,841 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1428 states, 1414 states have (on average 1.3154172560113153) internal successors, (1860), 1414 states have internal predecessors, (1860), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 11:19:26,844 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1428 states and 1884 transitions.
[2024-11-08 11:19:26,844 INFO  L78                 Accepts]: Start accepts. Automaton has 1428 states and 1884 transitions. Word has length 478
[2024-11-08 11:19:26,845 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:26,845 INFO  L471      AbstractCegarLoop]: Abstraction has 1428 states and 1884 transitions.
[2024-11-08 11:19:26,845 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:19:26,845 INFO  L276                IsEmpty]: Start isEmpty. Operand 1428 states and 1884 transitions.
[2024-11-08 11:19:26,850 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 481
[2024-11-08 11:19:26,850 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:26,850 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:26,851 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64
[2024-11-08 11:19:26,851 INFO  L396      AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:26,851 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:26,852 INFO  L85        PathProgramCache]: Analyzing trace with hash 568305184, now seen corresponding path program 1 times
[2024-11-08 11:19:26,852 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:26,852 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359467224]
[2024-11-08 11:19:26,852 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:26,852 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:28,697 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,660 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:29,661 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,663 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76
[2024-11-08 11:19:29,664 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,666 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88
[2024-11-08 11:19:29,667 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,668 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 356
[2024-11-08 11:19:29,668 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,669 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 373
[2024-11-08 11:19:29,670 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,671 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 385
[2024-11-08 11:19:29,671 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:29,673 INFO  L134       CoverageAnalysis]: Checked inductivity of 176 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked.
[2024-11-08 11:19:29,673 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:29,674 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359467224]
[2024-11-08 11:19:29,674 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1359467224] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:29,674 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:29,674 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-08 11:19:29,674 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622988059]
[2024-11-08 11:19:29,674 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:29,675 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 11:19:29,675 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:29,676 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 11:19:29,676 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:19:29,676 INFO  L87              Difference]: Start difference. First operand 1428 states and 1884 transitions. Second operand  has 7 states, 7 states have (on average 52.57142857142857) internal successors, (368), 7 states have internal predecessors, (368), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 11:19:30,516 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:30,517 INFO  L93              Difference]: Finished difference Result 2604 states and 3404 transitions.
[2024-11-08 11:19:30,517 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:19:30,517 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 52.57142857142857) internal successors, (368), 7 states have internal predecessors, (368), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) Word has length 480
[2024-11-08 11:19:30,518 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:30,521 INFO  L225             Difference]: With dead ends: 2604
[2024-11-08 11:19:30,521 INFO  L226             Difference]: Without dead ends: 1444
[2024-11-08 11:19:30,523 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90
[2024-11-08 11:19:30,524 INFO  L432           NwaCegarLoop]: 560 mSDtfsCounter, 753 mSDsluCounter, 1680 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 755 SdHoareTripleChecker+Valid, 2240 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:30,524 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [755 Valid, 2240 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 11:19:30,526 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1444 states.
[2024-11-08 11:19:30,566 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1436.
[2024-11-08 11:19:30,568 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1436 states, 1422 states have (on average 1.310829817158931) internal successors, (1864), 1422 states have internal predecessors, (1864), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 11:19:30,571 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1436 states to 1436 states and 1888 transitions.
[2024-11-08 11:19:30,571 INFO  L78                 Accepts]: Start accepts. Automaton has 1436 states and 1888 transitions. Word has length 480
[2024-11-08 11:19:30,572 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:30,572 INFO  L471      AbstractCegarLoop]: Abstraction has 1436 states and 1888 transitions.
[2024-11-08 11:19:30,572 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 52.57142857142857) internal successors, (368), 7 states have internal predecessors, (368), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 11:19:30,572 INFO  L276                IsEmpty]: Start isEmpty. Operand 1436 states and 1888 transitions.
[2024-11-08 11:19:30,577 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 483
[2024-11-08 11:19:30,577 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:30,577 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:30,578 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65
[2024-11-08 11:19:30,578 INFO  L396      AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:30,578 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:30,578 INFO  L85        PathProgramCache]: Analyzing trace with hash -1595044684, now seen corresponding path program 1 times
[2024-11-08 11:19:30,579 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:30,579 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177955850]
[2024-11-08 11:19:30,579 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:30,579 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:32,247 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,641 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:33,642 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,644 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76
[2024-11-08 11:19:33,645 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,646 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89
[2024-11-08 11:19:33,647 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,648 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357
[2024-11-08 11:19:33,648 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,649 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 374
[2024-11-08 11:19:33,650 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,651 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 387
[2024-11-08 11:19:33,652 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:33,653 INFO  L134       CoverageAnalysis]: Checked inductivity of 177 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 158 trivial. 0 not checked.
[2024-11-08 11:19:33,654 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:33,654 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177955850]
[2024-11-08 11:19:33,654 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1177955850] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:33,654 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:33,654 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:19:33,655 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302532062]
[2024-11-08 11:19:33,655 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:33,655 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:19:33,656 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:33,656 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:19:33,657 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:33,657 INFO  L87              Difference]: Start difference. First operand 1436 states and 1888 transitions. Second operand  has 6 states, 6 states have (on average 60.333333333333336) internal successors, (362), 6 states have internal predecessors, (362), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 11:19:34,427 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:34,428 INFO  L93              Difference]: Finished difference Result 2642 states and 3445 transitions.
[2024-11-08 11:19:34,428 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:19:34,429 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 60.333333333333336) internal successors, (362), 6 states have internal predecessors, (362), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 482
[2024-11-08 11:19:34,429 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:34,432 INFO  L225             Difference]: With dead ends: 2642
[2024-11-08 11:19:34,432 INFO  L226             Difference]: Without dead ends: 1444
[2024-11-08 11:19:34,434 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:19:34,435 INFO  L432           NwaCegarLoop]: 560 mSDtfsCounter, 693 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 695 SdHoareTripleChecker+Valid, 2233 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:34,435 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [695 Valid, 2233 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 11:19:34,437 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1444 states.
[2024-11-08 11:19:34,474 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1440.
[2024-11-08 11:19:34,475 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1440 states, 1426 states have (on average 1.3099579242636745) internal successors, (1868), 1426 states have internal predecessors, (1868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 11:19:34,478 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1440 states to 1440 states and 1892 transitions.
[2024-11-08 11:19:34,479 INFO  L78                 Accepts]: Start accepts. Automaton has 1440 states and 1892 transitions. Word has length 482
[2024-11-08 11:19:34,479 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:34,479 INFO  L471      AbstractCegarLoop]: Abstraction has 1440 states and 1892 transitions.
[2024-11-08 11:19:34,479 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 60.333333333333336) internal successors, (362), 6 states have internal predecessors, (362), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 11:19:34,480 INFO  L276                IsEmpty]: Start isEmpty. Operand 1440 states and 1892 transitions.
[2024-11-08 11:19:34,484 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 485
[2024-11-08 11:19:34,484 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:34,485 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:34,485 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66
[2024-11-08 11:19:34,485 INFO  L396      AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:34,486 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:34,486 INFO  L85        PathProgramCache]: Analyzing trace with hash 258958496, now seen corresponding path program 1 times
[2024-11-08 11:19:34,486 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:34,486 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42549998]
[2024-11-08 11:19:34,487 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:34,487 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:36,071 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,301 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:37,302 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,304 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 11:19:37,304 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,306 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90
[2024-11-08 11:19:37,307 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,309 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 358
[2024-11-08 11:19:37,310 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,311 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 376
[2024-11-08 11:19:37,312 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,313 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 389
[2024-11-08 11:19:37,314 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:37,315 INFO  L134       CoverageAnalysis]: Checked inductivity of 178 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked.
[2024-11-08 11:19:37,316 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:37,316 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42549998]
[2024-11-08 11:19:37,316 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [42549998] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:37,316 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:37,316 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-08 11:19:37,317 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [137555562]
[2024-11-08 11:19:37,317 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:37,317 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 11:19:37,318 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:37,318 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 11:19:37,319 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2024-11-08 11:19:37,319 INFO  L87              Difference]: Start difference. First operand 1440 states and 1892 transitions. Second operand  has 8 states, 8 states have (on average 49.5) internal successors, (396), 8 states have internal predecessors, (396), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:19:38,626 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:38,626 INFO  L93              Difference]: Finished difference Result 3624 states and 4693 transitions.
[2024-11-08 11:19:38,626 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2024-11-08 11:19:38,627 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 49.5) internal successors, (396), 8 states have internal predecessors, (396), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 484
[2024-11-08 11:19:38,627 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:38,632 INFO  L225             Difference]: With dead ends: 3624
[2024-11-08 11:19:38,632 INFO  L226             Difference]: Without dead ends: 2597
[2024-11-08 11:19:38,634 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132
[2024-11-08 11:19:38,635 INFO  L432           NwaCegarLoop]: 1162 mSDtfsCounter, 1260 mSDsluCounter, 4973 mSDsCounter, 0 mSdLazyCounter, 1408 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1263 SdHoareTripleChecker+Valid, 6135 SdHoareTripleChecker+Invalid, 1408 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1408 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:38,635 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1263 Valid, 6135 Invalid, 1408 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1408 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time]
[2024-11-08 11:19:38,638 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2597 states.
[2024-11-08 11:19:38,700 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2597 to 2589.
[2024-11-08 11:19:38,703 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2589 states, 2569 states have (on average 1.2977812378357338) internal successors, (3334), 2569 states have internal predecessors, (3334), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18)
[2024-11-08 11:19:38,708 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2589 states to 2589 states and 3370 transitions.
[2024-11-08 11:19:38,708 INFO  L78                 Accepts]: Start accepts. Automaton has 2589 states and 3370 transitions. Word has length 484
[2024-11-08 11:19:38,709 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:38,709 INFO  L471      AbstractCegarLoop]: Abstraction has 2589 states and 3370 transitions.
[2024-11-08 11:19:38,709 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 49.5) internal successors, (396), 8 states have internal predecessors, (396), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:19:38,709 INFO  L276                IsEmpty]: Start isEmpty. Operand 2589 states and 3370 transitions.
[2024-11-08 11:19:38,715 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 487
[2024-11-08 11:19:38,716 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:38,716 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:38,717 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67
[2024-11-08 11:19:38,717 INFO  L396      AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:38,717 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:38,717 INFO  L85        PathProgramCache]: Analyzing trace with hash -1572295238, now seen corresponding path program 1 times
[2024-11-08 11:19:38,718 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:38,718 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1106352915]
[2024-11-08 11:19:38,718 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:38,718 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:40,126 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,030 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59
[2024-11-08 11:19:41,032 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,033 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77
[2024-11-08 11:19:41,034 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,035 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 91
[2024-11-08 11:19:41,036 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,037 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359
[2024-11-08 11:19:41,038 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,039 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 377
[2024-11-08 11:19:41,039 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,040 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 391
[2024-11-08 11:19:41,041 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:41,043 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 161 trivial. 0 not checked.
[2024-11-08 11:19:41,043 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:41,043 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1106352915]
[2024-11-08 11:19:41,043 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1106352915] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:41,044 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:41,044 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-08 11:19:41,044 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371858073]
[2024-11-08 11:19:41,044 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:41,045 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 11:19:41,045 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:41,046 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 11:19:41,046 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:19:41,046 INFO  L87              Difference]: Start difference. First operand 2589 states and 3370 transitions. Second operand  has 7 states, 7 states have (on average 51.857142857142854) internal successors, (363), 7 states have internal predecessors, (363), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 11:19:41,433 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:41,433 INFO  L93              Difference]: Finished difference Result 5364 states and 6974 transitions.
[2024-11-08 11:19:41,434 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-08 11:19:41,434 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 51.857142857142854) internal successors, (363), 7 states have internal predecessors, (363), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 486
[2024-11-08 11:19:41,434 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:41,438 INFO  L225             Difference]: With dead ends: 5364
[2024-11-08 11:19:41,439 INFO  L226             Difference]: Without dead ends: 2609
[2024-11-08 11:19:41,442 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110
[2024-11-08 11:19:41,442 INFO  L432           NwaCegarLoop]: 737 mSDtfsCounter, 844 mSDsluCounter, 2771 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 847 SdHoareTripleChecker+Valid, 3508 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:41,443 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [847 Valid, 3508 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time]
[2024-11-08 11:19:41,445 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2609 states.
[2024-11-08 11:19:41,504 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2609 to 2599.
[2024-11-08 11:19:41,507 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2599 states, 2579 states have (on average 1.2946878635129895) internal successors, (3339), 2579 states have internal predecessors, (3339), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18)
[2024-11-08 11:19:41,511 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2599 states to 2599 states and 3375 transitions.
[2024-11-08 11:19:41,512 INFO  L78                 Accepts]: Start accepts. Automaton has 2599 states and 3375 transitions. Word has length 486
[2024-11-08 11:19:41,512 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:41,513 INFO  L471      AbstractCegarLoop]: Abstraction has 2599 states and 3375 transitions.
[2024-11-08 11:19:41,513 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 51.857142857142854) internal successors, (363), 7 states have internal predecessors, (363), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4)
[2024-11-08 11:19:41,513 INFO  L276                IsEmpty]: Start isEmpty. Operand 2599 states and 3375 transitions.
[2024-11-08 11:19:41,519 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 489
[2024-11-08 11:19:41,519 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:41,520 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:41,520 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68
[2024-11-08 11:19:41,520 INFO  L396      AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:41,521 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:41,521 INFO  L85        PathProgramCache]: Analyzing trace with hash -1694843680, now seen corresponding path program 1 times
[2024-11-08 11:19:41,521 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:41,521 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196340143]
[2024-11-08 11:19:41,521 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:41,522 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:43,606 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,638 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60
[2024-11-08 11:19:44,638 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,639 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78
[2024-11-08 11:19:44,640 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,641 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92
[2024-11-08 11:19:44,642 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,643 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361
[2024-11-08 11:19:44,644 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,645 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 379
[2024-11-08 11:19:44,646 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,647 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 393
[2024-11-08 11:19:44,648 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:44,649 INFO  L134       CoverageAnalysis]: Checked inductivity of 180 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 173 trivial. 0 not checked.
[2024-11-08 11:19:44,650 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:44,650 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196340143]
[2024-11-08 11:19:44,650 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [196340143] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:44,650 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:44,651 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:19:44,651 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128269974]
[2024-11-08 11:19:44,651 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:44,652 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:19:44,652 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:44,653 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:19:44,653 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:44,653 INFO  L87              Difference]: Start difference. First operand 2599 states and 3375 transitions. Second operand  has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:19:45,387 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:45,387 INFO  L93              Difference]: Finished difference Result 5024 states and 6497 transitions.
[2024-11-08 11:19:45,388 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:19:45,388 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 488
[2024-11-08 11:19:45,388 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:45,391 INFO  L225             Difference]: With dead ends: 5024
[2024-11-08 11:19:45,391 INFO  L226             Difference]: Without dead ends: 2609
[2024-11-08 11:19:45,394 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:19:45,394 INFO  L432           NwaCegarLoop]: 559 mSDtfsCounter, 703 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 706 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:45,395 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [706 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 11:19:45,397 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2609 states.
[2024-11-08 11:19:45,451 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2609 to 2604.
[2024-11-08 11:19:45,453 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2604 states, 2584 states have (on average 1.2941176470588236) internal successors, (3344), 2584 states have internal predecessors, (3344), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18)
[2024-11-08 11:19:45,458 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2604 states to 2604 states and 3380 transitions.
[2024-11-08 11:19:45,458 INFO  L78                 Accepts]: Start accepts. Automaton has 2604 states and 3380 transitions. Word has length 488
[2024-11-08 11:19:45,458 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:45,459 INFO  L471      AbstractCegarLoop]: Abstraction has 2604 states and 3380 transitions.
[2024-11-08 11:19:45,459 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 59.0) internal successors, (354), 6 states have internal predecessors, (354), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:19:45,459 INFO  L276                IsEmpty]: Start isEmpty. Operand 2604 states and 3380 transitions.
[2024-11-08 11:19:45,464 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 491
[2024-11-08 11:19:45,465 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:45,465 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:45,465 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69
[2024-11-08 11:19:45,466 INFO  L396      AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:45,466 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:45,466 INFO  L85        PathProgramCache]: Analyzing trace with hash -432140608, now seen corresponding path program 1 times
[2024-11-08 11:19:45,466 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:45,466 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204587304]
[2024-11-08 11:19:45,467 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:45,467 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:46,751 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,044 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:19:48,045 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,046 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 11:19:48,046 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,047 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93
[2024-11-08 11:19:48,047 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,048 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:19:48,049 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,049 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381
[2024-11-08 11:19:48,050 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,051 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395
[2024-11-08 11:19:48,051 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:48,052 INFO  L134       CoverageAnalysis]: Checked inductivity of 181 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 177 trivial. 0 not checked.
[2024-11-08 11:19:48,053 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:48,053 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204587304]
[2024-11-08 11:19:48,053 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1204587304] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:48,053 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:48,053 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:19:48,053 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744644524]
[2024-11-08 11:19:48,053 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:48,054 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:19:48,054 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:48,055 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:19:48,055 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:19:48,055 INFO  L87              Difference]: Start difference. First operand 2604 states and 3380 transitions. Second operand  has 6 states, 6 states have (on average 58.666666666666664) internal successors, (352), 6 states have internal predecessors, (352), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:19:48,204 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:48,204 INFO  L93              Difference]: Finished difference Result 5045 states and 6522 transitions.
[2024-11-08 11:19:48,204 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:19:48,205 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 58.666666666666664) internal successors, (352), 6 states have internal predecessors, (352), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 490
[2024-11-08 11:19:48,205 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:48,207 INFO  L225             Difference]: With dead ends: 5045
[2024-11-08 11:19:48,207 INFO  L226             Difference]: Without dead ends: 2610
[2024-11-08 11:19:48,209 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:19:48,210 INFO  L432           NwaCegarLoop]: 749 mSDtfsCounter, 1076 mSDsluCounter, 2241 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1079 SdHoareTripleChecker+Valid, 2990 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:48,210 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1079 Valid, 2990 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:19:48,212 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2610 states.
[2024-11-08 11:19:48,269 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2610 to 2610.
[2024-11-08 11:19:48,272 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2610 states, 2590 states have (on average 1.2934362934362935) internal successors, (3350), 2590 states have internal predecessors, (3350), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18)
[2024-11-08 11:19:48,276 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2610 states to 2610 states and 3386 transitions.
[2024-11-08 11:19:48,277 INFO  L78                 Accepts]: Start accepts. Automaton has 2610 states and 3386 transitions. Word has length 490
[2024-11-08 11:19:48,277 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:48,277 INFO  L471      AbstractCegarLoop]: Abstraction has 2610 states and 3386 transitions.
[2024-11-08 11:19:48,277 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 58.666666666666664) internal successors, (352), 6 states have internal predecessors, (352), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:19:48,278 INFO  L276                IsEmpty]: Start isEmpty. Operand 2610 states and 3386 transitions.
[2024-11-08 11:19:48,284 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 491
[2024-11-08 11:19:48,284 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:48,285 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:48,285 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70
[2024-11-08 11:19:48,285 INFO  L396      AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:48,285 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:48,286 INFO  L85        PathProgramCache]: Analyzing trace with hash -327843744, now seen corresponding path program 1 times
[2024-11-08 11:19:48,286 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:48,286 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514382187]
[2024-11-08 11:19:48,286 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:48,286 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:49,925 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,317 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:19:52,318 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,320 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 11:19:52,322 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,324 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93
[2024-11-08 11:19:52,325 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,327 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:19:52,328 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,329 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381
[2024-11-08 11:19:52,330 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,331 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395
[2024-11-08 11:19:52,332 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:19:52,333 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked.
[2024-11-08 11:19:52,334 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:19:52,334 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514382187]
[2024-11-08 11:19:52,334 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [514382187] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:19:52,334 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:19:52,335 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2024-11-08 11:19:52,335 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518747731]
[2024-11-08 11:19:52,335 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:19:52,336 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 10 states
[2024-11-08 11:19:52,336 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:19:52,337 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-08 11:19:52,337 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90
[2024-11-08 11:19:52,337 INFO  L87              Difference]: Start difference. First operand 2610 states and 3386 transitions. Second operand  has 10 states, 10 states have (on average 38.5) internal successors, (385), 10 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:19:53,101 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:19:53,101 INFO  L93              Difference]: Finished difference Result 5467 states and 7107 transitions.
[2024-11-08 11:19:53,101 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. 
[2024-11-08 11:19:53,102 INFO  L78                 Accepts]: Start accepts. Automaton has  has 10 states, 10 states have (on average 38.5) internal successors, (385), 10 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 490
[2024-11-08 11:19:53,102 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:19:53,106 INFO  L225             Difference]: With dead ends: 5467
[2024-11-08 11:19:53,106 INFO  L226             Difference]: Without dead ends: 3576
[2024-11-08 11:19:53,109 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210
[2024-11-08 11:19:53,110 INFO  L432           NwaCegarLoop]: 1194 mSDtfsCounter, 2355 mSDsluCounter, 7316 mSDsCounter, 0 mSdLazyCounter, 524 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2360 SdHoareTripleChecker+Valid, 8510 SdHoareTripleChecker+Invalid, 530 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 524 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time
[2024-11-08 11:19:53,110 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [2360 Valid, 8510 Invalid, 530 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 524 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time]
[2024-11-08 11:19:53,113 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3576 states.
[2024-11-08 11:19:53,179 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3576 to 2664.
[2024-11-08 11:19:53,182 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2664 states, 2641 states have (on average 1.2945853843241197) internal successors, (3419), 2641 states have internal predecessors, (3419), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21)
[2024-11-08 11:19:53,186 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2664 states to 2664 states and 3461 transitions.
[2024-11-08 11:19:53,187 INFO  L78                 Accepts]: Start accepts. Automaton has 2664 states and 3461 transitions. Word has length 490
[2024-11-08 11:19:53,187 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:19:53,187 INFO  L471      AbstractCegarLoop]: Abstraction has 2664 states and 3461 transitions.
[2024-11-08 11:19:53,187 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 10 states, 10 states have (on average 38.5) internal successors, (385), 10 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:19:53,187 INFO  L276                IsEmpty]: Start isEmpty. Operand 2664 states and 3461 transitions.
[2024-11-08 11:19:53,194 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 491
[2024-11-08 11:19:53,194 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:19:53,194 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:19:53,195 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71
[2024-11-08 11:19:53,195 INFO  L396      AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:19:53,195 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:19:53,196 INFO  L85        PathProgramCache]: Analyzing trace with hash 1839654592, now seen corresponding path program 1 times
[2024-11-08 11:19:53,196 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:19:53,196 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1378925499]
[2024-11-08 11:19:53,196 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:19:53,196 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:19:56,223 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,794 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:02,795 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,799 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 11:20:02,800 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,802 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93
[2024-11-08 11:20:02,803 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,806 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:20:02,807 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,809 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381
[2024-11-08 11:20:02,810 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,812 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395
[2024-11-08 11:20:02,814 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:02,818 INFO  L134       CoverageAnalysis]: Checked inductivity of 177 backedges. 81 proven. 36 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:02,818 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:02,819 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1378925499]
[2024-11-08 11:20:02,819 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1378925499] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:02,819 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1356178719]
[2024-11-08 11:20:02,819 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:02,820 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:02,820 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:20:02,822 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:20:02,825 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-08 11:20:05,865 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:05,889 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2976 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 11:20:05,936 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:20:06,083 INFO  L134       CoverageAnalysis]: Checked inductivity of 177 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 122 trivial. 0 not checked.
[2024-11-08 11:20:06,083 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:20:06,084 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1356178719] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:06,084 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 11:20:06,084 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22
[2024-11-08 11:20:06,085 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [527965517]
[2024-11-08 11:20:06,085 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:06,086 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:20:06,086 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:06,086 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:20:06,087 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462
[2024-11-08 11:20:06,087 INFO  L87              Difference]: Start difference. First operand 2664 states and 3461 transitions. Second operand  has 6 states, 5 states have (on average 75.2) internal successors, (376), 6 states have internal predecessors, (376), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 11:20:06,213 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:06,213 INFO  L93              Difference]: Finished difference Result 5063 states and 6553 transitions.
[2024-11-08 11:20:06,214 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:20:06,214 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 5 states have (on average 75.2) internal successors, (376), 6 states have internal predecessors, (376), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 490
[2024-11-08 11:20:06,214 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:06,217 INFO  L225             Difference]: With dead ends: 5063
[2024-11-08 11:20:06,218 INFO  L226             Difference]: Without dead ends: 2664
[2024-11-08 11:20:06,221 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 519 GetRequests, 499 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462
[2024-11-08 11:20:06,221 INFO  L432           NwaCegarLoop]: 756 mSDtfsCounter, 0 mSDsluCounter, 3005 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3761 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:06,222 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3761 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:20:06,224 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2664 states.
[2024-11-08 11:20:06,285 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2664 to 2664.
[2024-11-08 11:20:06,288 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2664 states, 2641 states have (on average 1.292313517606967) internal successors, (3413), 2641 states have internal predecessors, (3413), 21 states have call successors, (21), 1 states have call predecessors, (21), 1 states have return successors, (21), 21 states have call predecessors, (21), 21 states have call successors, (21)
[2024-11-08 11:20:06,292 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2664 states to 2664 states and 3455 transitions.
[2024-11-08 11:20:06,293 INFO  L78                 Accepts]: Start accepts. Automaton has 2664 states and 3455 transitions. Word has length 490
[2024-11-08 11:20:06,293 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:06,293 INFO  L471      AbstractCegarLoop]: Abstraction has 2664 states and 3455 transitions.
[2024-11-08 11:20:06,293 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 5 states have (on average 75.2) internal successors, (376), 6 states have internal predecessors, (376), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5)
[2024-11-08 11:20:06,294 INFO  L276                IsEmpty]: Start isEmpty. Operand 2664 states and 3455 transitions.
[2024-11-08 11:20:06,299 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 491
[2024-11-08 11:20:06,300 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:06,300 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:06,346 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0
[2024-11-08 11:20:06,501 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:06,502 INFO  L396      AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:06,502 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:06,503 INFO  L85        PathProgramCache]: Analyzing trace with hash -403927489, now seen corresponding path program 1 times
[2024-11-08 11:20:06,503 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:06,503 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647907473]
[2024-11-08 11:20:06,503 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:06,504 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:08,316 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,223 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62
[2024-11-08 11:20:09,224 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,227 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:09,228 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,230 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:20:09,231 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,233 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:20:09,234 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,235 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381
[2024-11-08 11:20:09,236 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,237 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395
[2024-11-08 11:20:09,238 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:09,240 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:09,241 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:09,241 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647907473]
[2024-11-08 11:20:09,241 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [647907473] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:09,241 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:20:09,241 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:20:09,242 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045732643]
[2024-11-08 11:20:09,242 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:09,243 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:20:09,243 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:09,244 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:20:09,244 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:20:09,244 INFO  L87              Difference]: Start difference. First operand 2664 states and 3455 transitions. Second operand  has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:10,464 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:10,464 INFO  L93              Difference]: Finished difference Result 4701 states and 6123 transitions.
[2024-11-08 11:20:10,464 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:20:10,465 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 490
[2024-11-08 11:20:10,465 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:10,468 INFO  L225             Difference]: With dead ends: 4701
[2024-11-08 11:20:10,468 INFO  L226             Difference]: Without dead ends: 3628
[2024-11-08 11:20:10,470 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:20:10,470 INFO  L432           NwaCegarLoop]: 985 mSDtfsCounter, 1012 mSDsluCounter, 2502 mSDsCounter, 0 mSdLazyCounter, 1275 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1015 SdHoareTripleChecker+Valid, 3487 SdHoareTripleChecker+Invalid, 1276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1275 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:10,471 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1015 Valid, 3487 Invalid, 1276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1275 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time]
[2024-11-08 11:20:10,474 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3628 states.
[2024-11-08 11:20:10,545 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3628 to 2709.
[2024-11-08 11:20:10,548 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2709 states, 2685 states have (on average 1.2934823091247671) internal successors, (3473), 2685 states have internal predecessors, (3473), 22 states have call successors, (22), 1 states have call predecessors, (22), 1 states have return successors, (22), 22 states have call predecessors, (22), 22 states have call successors, (22)
[2024-11-08 11:20:10,552 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2709 states to 2709 states and 3517 transitions.
[2024-11-08 11:20:10,553 INFO  L78                 Accepts]: Start accepts. Automaton has 2709 states and 3517 transitions. Word has length 490
[2024-11-08 11:20:10,553 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:10,554 INFO  L471      AbstractCegarLoop]: Abstraction has 2709 states and 3517 transitions.
[2024-11-08 11:20:10,554 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:10,554 INFO  L276                IsEmpty]: Start isEmpty. Operand 2709 states and 3517 transitions.
[2024-11-08 11:20:10,559 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 491
[2024-11-08 11:20:10,559 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:10,559 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:10,559 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73
[2024-11-08 11:20:10,560 INFO  L396      AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:10,560 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:10,560 INFO  L85        PathProgramCache]: Analyzing trace with hash 1961607104, now seen corresponding path program 1 times
[2024-11-08 11:20:10,560 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:10,560 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265561915]
[2024-11-08 11:20:10,560 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:10,561 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:11,869 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,042 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63
[2024-11-08 11:20:13,044 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,046 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81
[2024-11-08 11:20:13,047 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,050 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95
[2024-11-08 11:20:13,051 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,053 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363
[2024-11-08 11:20:13,054 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,055 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381
[2024-11-08 11:20:13,056 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,057 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395
[2024-11-08 11:20:13,058 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:13,060 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:13,061 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:13,061 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1265561915]
[2024-11-08 11:20:13,061 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1265561915] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:13,061 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:20:13,061 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:20:13,062 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1996543447]
[2024-11-08 11:20:13,062 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:13,063 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:20:13,063 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:13,064 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:20:13,064 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:20:13,065 INFO  L87              Difference]: Start difference. First operand 2709 states and 3517 transitions. Second operand  has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:13,886 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:13,886 INFO  L93              Difference]: Finished difference Result 4296 states and 5641 transitions.
[2024-11-08 11:20:13,887 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:20:13,887 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 490
[2024-11-08 11:20:13,887 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:13,890 INFO  L225             Difference]: With dead ends: 4296
[2024-11-08 11:20:13,890 INFO  L226             Difference]: Without dead ends: 3223
[2024-11-08 11:20:13,892 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:20:13,892 INFO  L432           NwaCegarLoop]: 565 mSDtfsCounter, 980 mSDsluCounter, 1666 mSDsCounter, 0 mSdLazyCounter, 774 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 983 SdHoareTripleChecker+Valid, 2231 SdHoareTripleChecker+Invalid, 777 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 774 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:13,892 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [983 Valid, 2231 Invalid, 777 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 774 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time]
[2024-11-08 11:20:13,894 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3223 states.
[2024-11-08 11:20:13,954 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3223 to 2259.
[2024-11-08 11:20:13,956 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2259 states, 2239 states have (on average 1.311746315319339) internal successors, (2937), 2239 states have internal predecessors, (2937), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18)
[2024-11-08 11:20:13,960 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2259 states to 2259 states and 2973 transitions.
[2024-11-08 11:20:13,961 INFO  L78                 Accepts]: Start accepts. Automaton has 2259 states and 2973 transitions. Word has length 490
[2024-11-08 11:20:13,962 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:13,962 INFO  L471      AbstractCegarLoop]: Abstraction has 2259 states and 2973 transitions.
[2024-11-08 11:20:13,962 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:13,962 INFO  L276                IsEmpty]: Start isEmpty. Operand 2259 states and 2973 transitions.
[2024-11-08 11:20:13,967 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 492
[2024-11-08 11:20:13,968 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:13,968 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:13,968 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74
[2024-11-08 11:20:13,969 INFO  L396      AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:13,969 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:13,969 INFO  L85        PathProgramCache]: Analyzing trace with hash 1235136833, now seen corresponding path program 1 times
[2024-11-08 11:20:13,970 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:13,970 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147787426]
[2024-11-08 11:20:13,970 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:13,970 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:14,356 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,261 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:15,263 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,265 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79
[2024-11-08 11:20:15,266 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,268 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93
[2024-11-08 11:20:15,269 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,271 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364
[2024-11-08 11:20:15,271 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,273 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382
[2024-11-08 11:20:15,273 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,274 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396
[2024-11-08 11:20:15,275 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:15,277 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked.
[2024-11-08 11:20:15,277 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:15,277 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147787426]
[2024-11-08 11:20:15,277 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147787426] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:15,278 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:20:15,278 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:20:15,278 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2085689434]
[2024-11-08 11:20:15,278 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:15,278 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:20:15,278 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:15,279 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:20:15,279 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:20:15,280 INFO  L87              Difference]: Start difference. First operand 2259 states and 2973 transitions. Second operand  has 6 states, 6 states have (on average 64.66666666666667) internal successors, (388), 6 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:15,900 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:15,901 INFO  L93              Difference]: Finished difference Result 4158 states and 5443 transitions.
[2024-11-08 11:20:15,901 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:20:15,901 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 64.66666666666667) internal successors, (388), 6 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 491
[2024-11-08 11:20:15,901 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:15,904 INFO  L225             Difference]: With dead ends: 4158
[2024-11-08 11:20:15,904 INFO  L226             Difference]: Without dead ends: 2275
[2024-11-08 11:20:15,905 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:20:15,906 INFO  L432           NwaCegarLoop]: 569 mSDtfsCounter, 717 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 717 SdHoareTripleChecker+Valid, 2242 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:15,906 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [717 Valid, 2242 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 790 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 11:20:15,907 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2275 states.
[2024-11-08 11:20:15,938 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2275 to 2267.
[2024-11-08 11:20:15,939 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2267 states, 2247 states have (on average 1.3106364040943481) internal successors, (2945), 2247 states have internal predecessors, (2945), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18)
[2024-11-08 11:20:15,942 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2267 states to 2267 states and 2981 transitions.
[2024-11-08 11:20:15,942 INFO  L78                 Accepts]: Start accepts. Automaton has 2267 states and 2981 transitions. Word has length 491
[2024-11-08 11:20:15,943 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:15,943 INFO  L471      AbstractCegarLoop]: Abstraction has 2267 states and 2981 transitions.
[2024-11-08 11:20:15,943 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 64.66666666666667) internal successors, (388), 6 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:15,943 INFO  L276                IsEmpty]: Start isEmpty. Operand 2267 states and 2981 transitions.
[2024-11-08 11:20:15,948 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 492
[2024-11-08 11:20:15,948 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:15,949 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:15,949 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75
[2024-11-08 11:20:15,949 INFO  L396      AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:15,949 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:15,950 INFO  L85        PathProgramCache]: Analyzing trace with hash 1655328919, now seen corresponding path program 1 times
[2024-11-08 11:20:15,950 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:15,950 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2080462665]
[2024-11-08 11:20:15,950 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:15,951 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:19,091 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,055 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:21,056 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,057 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:21,058 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,059 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:20:21,060 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,061 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364
[2024-11-08 11:20:21,062 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,063 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382
[2024-11-08 11:20:21,064 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,064 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396
[2024-11-08 11:20:21,065 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:21,068 INFO  L134       CoverageAnalysis]: Checked inductivity of 178 backedges. 115 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:21,068 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:21,069 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2080462665]
[2024-11-08 11:20:21,069 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2080462665] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:21,069 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [300728789]
[2024-11-08 11:20:21,069 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:21,070 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:21,070 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:20:21,072 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:20:21,077 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-08 11:20:24,586 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:24,603 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2979 conjuncts, 24 conjuncts are in the unsatisfiable core
[2024-11-08 11:20:24,619 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:20:24,996 INFO  L134       CoverageAnalysis]: Checked inductivity of 178 backedges. 112 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:24,996 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:20:25,504 INFO  L134       CoverageAnalysis]: Checked inductivity of 178 backedges. 118 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:25,505 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [300728789] provided 1 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:25,505 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences.
[2024-11-08 11:20:25,505 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [8, 8] total 19
[2024-11-08 11:20:25,505 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696463561]
[2024-11-08 11:20:25,505 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:25,506 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 7 states
[2024-11-08 11:20:25,506 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:25,507 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-08 11:20:25,507 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=298, Unknown=0, NotChecked=0, Total=342
[2024-11-08 11:20:25,508 INFO  L87              Difference]: Start difference. First operand 2267 states and 2981 transitions. Second operand  has 7 states, 7 states have (on average 66.28571428571429) internal successors, (464), 7 states have internal predecessors, (464), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:25,724 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:25,725 INFO  L93              Difference]: Finished difference Result 4421 states and 5810 transitions.
[2024-11-08 11:20:25,725 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2024-11-08 11:20:25,726 INFO  L78                 Accepts]: Start accepts. Automaton has  has 7 states, 7 states have (on average 66.28571428571429) internal successors, (464), 7 states have internal predecessors, (464), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 491
[2024-11-08 11:20:25,726 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:25,730 INFO  L225             Difference]: With dead ends: 4421
[2024-11-08 11:20:25,730 INFO  L226             Difference]: Without dead ends: 3344
[2024-11-08 11:20:25,733 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 1003 GetRequests, 984 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=53, Invalid=367, Unknown=0, NotChecked=0, Total=420
[2024-11-08 11:20:25,733 INFO  L432           NwaCegarLoop]: 1328 mSDtfsCounter, 484 mSDsluCounter, 6041 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 484 SdHoareTripleChecker+Valid, 7369 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:25,734 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [484 Valid, 7369 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time]
[2024-11-08 11:20:25,736 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3344 states.
[2024-11-08 11:20:25,807 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3344 to 2748.
[2024-11-08 11:20:25,810 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2748 states, 2722 states have (on average 1.2905951506245408) internal successors, (3513), 2722 states have internal predecessors, (3513), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24)
[2024-11-08 11:20:25,814 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2748 states to 2748 states and 3561 transitions.
[2024-11-08 11:20:25,814 INFO  L78                 Accepts]: Start accepts. Automaton has 2748 states and 3561 transitions. Word has length 491
[2024-11-08 11:20:25,815 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:25,815 INFO  L471      AbstractCegarLoop]: Abstraction has 2748 states and 3561 transitions.
[2024-11-08 11:20:25,815 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 7 states, 7 states have (on average 66.28571428571429) internal successors, (464), 7 states have internal predecessors, (464), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:25,815 INFO  L276                IsEmpty]: Start isEmpty. Operand 2748 states and 3561 transitions.
[2024-11-08 11:20:25,820 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 492
[2024-11-08 11:20:25,820 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:25,821 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:25,859 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0
[2024-11-08 11:20:26,021 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:26,022 INFO  L396      AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:26,022 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:26,022 INFO  L85        PathProgramCache]: Analyzing trace with hash 1391185256, now seen corresponding path program 1 times
[2024-11-08 11:20:26,022 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:26,022 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288076181]
[2024-11-08 11:20:26,023 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:26,023 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:26,414 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,462 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:27,463 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,464 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:27,465 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,466 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:20:27,466 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,467 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364
[2024-11-08 11:20:27,467 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,468 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382
[2024-11-08 11:20:27,469 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,470 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396
[2024-11-08 11:20:27,471 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:27,473 INFO  L134       CoverageAnalysis]: Checked inductivity of 177 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked.
[2024-11-08 11:20:27,473 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:27,473 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288076181]
[2024-11-08 11:20:27,473 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [288076181] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:27,473 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:20:27,474 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-08 11:20:27,474 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585018016]
[2024-11-08 11:20:27,474 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:27,475 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:20:27,475 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:27,476 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:20:27,476 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:20:27,476 INFO  L87              Difference]: Start difference. First operand 2748 states and 3561 transitions. Second operand  has 6 states, 6 states have (on average 72.83333333333333) internal successors, (437), 6 states have internal predecessors, (437), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:20:27,591 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:27,591 INFO  L93              Difference]: Finished difference Result 5066 states and 6568 transitions.
[2024-11-08 11:20:27,592 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 11:20:27,592 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 6 states have (on average 72.83333333333333) internal successors, (437), 6 states have internal predecessors, (437), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 491
[2024-11-08 11:20:27,592 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:27,596 INFO  L225             Difference]: With dead ends: 5066
[2024-11-08 11:20:27,596 INFO  L226             Difference]: Without dead ends: 2872
[2024-11-08 11:20:27,599 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:20:27,600 INFO  L432           NwaCegarLoop]: 755 mSDtfsCounter, 16 mSDsluCounter, 2253 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 3008 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:27,600 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 3008 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:20:27,603 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2872 states.
[2024-11-08 11:20:27,675 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2872 to 2872.
[2024-11-08 11:20:27,678 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2872 states, 2846 states have (on average 1.2947997189037246) internal successors, (3685), 2846 states have internal predecessors, (3685), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24)
[2024-11-08 11:20:27,684 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2872 states to 2872 states and 3733 transitions.
[2024-11-08 11:20:27,684 INFO  L78                 Accepts]: Start accepts. Automaton has 2872 states and 3733 transitions. Word has length 491
[2024-11-08 11:20:27,685 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:27,685 INFO  L471      AbstractCegarLoop]: Abstraction has 2872 states and 3733 transitions.
[2024-11-08 11:20:27,685 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 6 states have (on average 72.83333333333333) internal successors, (437), 6 states have internal predecessors, (437), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:20:27,686 INFO  L276                IsEmpty]: Start isEmpty. Operand 2872 states and 3733 transitions.
[2024-11-08 11:20:27,691 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 493
[2024-11-08 11:20:27,692 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:27,692 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:27,692 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77
[2024-11-08 11:20:27,693 INFO  L396      AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:27,693 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:27,693 INFO  L85        PathProgramCache]: Analyzing trace with hash 94936052, now seen corresponding path program 1 times
[2024-11-08 11:20:27,694 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:27,694 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399028937]
[2024-11-08 11:20:27,694 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:27,694 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:29,978 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,707 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:31,708 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,710 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:31,711 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,713 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:20:31,714 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,717 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364
[2024-11-08 11:20:31,717 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,718 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382
[2024-11-08 11:20:31,719 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,720 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396
[2024-11-08 11:20:31,721 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:31,724 INFO  L134       CoverageAnalysis]: Checked inductivity of 178 backedges. 115 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:31,724 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:31,724 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399028937]
[2024-11-08 11:20:31,724 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399028937] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:31,725 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [65551146]
[2024-11-08 11:20:31,725 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:31,725 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:31,725 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:20:31,727 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:20:31,729 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2024-11-08 11:20:35,322 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:35,339 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2980 conjuncts, 20 conjuncts are in the unsatisfiable core
[2024-11-08 11:20:35,350 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:20:35,678 INFO  L134       CoverageAnalysis]: Checked inductivity of 178 backedges. 148 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked.
[2024-11-08 11:20:35,678 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:20:35,678 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [65551146] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:35,678 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 11:20:35,679 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [8] total 14
[2024-11-08 11:20:35,679 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1888002807]
[2024-11-08 11:20:35,679 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:35,680 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 8 states
[2024-11-08 11:20:35,680 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:35,681 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-08 11:20:35,681 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182
[2024-11-08 11:20:35,682 INFO  L87              Difference]: Start difference. First operand 2872 states and 3733 transitions. Second operand  has 8 states, 8 states have (on average 58.125) internal successors, (465), 8 states have internal predecessors, (465), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:36,577 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:36,577 INFO  L93              Difference]: Finished difference Result 6199 states and 8084 transitions.
[2024-11-08 11:20:36,577 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-08 11:20:36,578 INFO  L78                 Accepts]: Start accepts. Automaton has  has 8 states, 8 states have (on average 58.125) internal successors, (465), 8 states have internal predecessors, (465), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 492
[2024-11-08 11:20:36,578 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:36,582 INFO  L225             Difference]: With dead ends: 6199
[2024-11-08 11:20:36,582 INFO  L226             Difference]: Without dead ends: 4087
[2024-11-08 11:20:36,585 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 499 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240
[2024-11-08 11:20:36,585 INFO  L432           NwaCegarLoop]: 565 mSDtfsCounter, 1759 mSDsluCounter, 2105 mSDsCounter, 0 mSdLazyCounter, 955 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1765 SdHoareTripleChecker+Valid, 2670 SdHoareTripleChecker+Invalid, 955 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 955 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:36,585 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1765 Valid, 2670 Invalid, 955 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 955 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time]
[2024-11-08 11:20:36,589 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 4087 states.
[2024-11-08 11:20:36,698 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 4087 to 3507.
[2024-11-08 11:20:36,702 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 3507 states, 3469 states have (on average 1.2827904295185932) internal successors, (4450), 3469 states have internal predecessors, (4450), 36 states have call successors, (36), 1 states have call predecessors, (36), 1 states have return successors, (36), 36 states have call predecessors, (36), 36 states have call successors, (36)
[2024-11-08 11:20:36,708 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 3507 states to 3507 states and 4522 transitions.
[2024-11-08 11:20:36,709 INFO  L78                 Accepts]: Start accepts. Automaton has 3507 states and 4522 transitions. Word has length 492
[2024-11-08 11:20:36,709 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:36,709 INFO  L471      AbstractCegarLoop]: Abstraction has 3507 states and 4522 transitions.
[2024-11-08 11:20:36,710 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 8 states, 8 states have (on average 58.125) internal successors, (465), 8 states have internal predecessors, (465), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:36,710 INFO  L276                IsEmpty]: Start isEmpty. Operand 3507 states and 4522 transitions.
[2024-11-08 11:20:36,716 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 494
[2024-11-08 11:20:36,717 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:36,717 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:36,763 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0
[2024-11-08 11:20:36,918 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable78
[2024-11-08 11:20:36,918 INFO  L396      AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:36,919 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:36,919 INFO  L85        PathProgramCache]: Analyzing trace with hash 1783830935, now seen corresponding path program 1 times
[2024-11-08 11:20:36,919 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:36,919 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546933548]
[2024-11-08 11:20:36,919 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:36,919 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:40,417 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,794 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:41,795 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,796 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:41,797 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,798 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:20:41,799 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,801 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365
[2024-11-08 11:20:41,802 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,803 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383
[2024-11-08 11:20:41,803 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,804 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 397
[2024-11-08 11:20:41,804 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:41,806 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 116 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:20:41,806 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:41,806 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546933548]
[2024-11-08 11:20:41,806 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [546933548] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:41,806 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1478758549]
[2024-11-08 11:20:41,806 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:41,806 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:41,807 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:20:41,808 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:20:41,809 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-08 11:20:45,376 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:45,397 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2981 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 11:20:45,408 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:20:45,510 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 73 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked.
[2024-11-08 11:20:45,512 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:20:45,512 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1478758549] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:45,512 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 11:20:45,512 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11
[2024-11-08 11:20:45,513 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702882261]
[2024-11-08 11:20:45,513 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:45,513 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:20:45,514 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:45,514 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:20:45,514 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110
[2024-11-08 11:20:45,515 INFO  L87              Difference]: Start difference. First operand 3507 states and 4522 transitions. Second operand  has 6 states, 5 states have (on average 77.4) internal successors, (387), 6 states have internal predecessors, (387), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:20:45,661 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:45,661 INFO  L93              Difference]: Finished difference Result 5837 states and 7507 transitions.
[2024-11-08 11:20:45,661 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:20:45,662 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 5 states have (on average 77.4) internal successors, (387), 6 states have internal predecessors, (387), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 493
[2024-11-08 11:20:45,662 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:45,666 INFO  L225             Difference]: With dead ends: 5837
[2024-11-08 11:20:45,667 INFO  L226             Difference]: Without dead ends: 3507
[2024-11-08 11:20:45,672 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 512 GetRequests, 503 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110
[2024-11-08 11:20:45,673 INFO  L432           NwaCegarLoop]: 755 mSDtfsCounter, 0 mSDsluCounter, 3001 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3756 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:45,676 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3756 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:20:45,679 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3507 states.
[2024-11-08 11:20:45,775 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3507 to 3503.
[2024-11-08 11:20:45,779 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 3503 states, 3465 states have (on average 1.2802308802308802) internal successors, (4436), 3465 states have internal predecessors, (4436), 36 states have call successors, (36), 1 states have call predecessors, (36), 1 states have return successors, (36), 36 states have call predecessors, (36), 36 states have call successors, (36)
[2024-11-08 11:20:45,784 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 3503 states to 3503 states and 4508 transitions.
[2024-11-08 11:20:45,785 INFO  L78                 Accepts]: Start accepts. Automaton has 3503 states and 4508 transitions. Word has length 493
[2024-11-08 11:20:45,786 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:45,786 INFO  L471      AbstractCegarLoop]: Abstraction has 3503 states and 4508 transitions.
[2024-11-08 11:20:45,786 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 5 states have (on average 77.4) internal successors, (387), 6 states have internal predecessors, (387), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:20:45,786 INFO  L276                IsEmpty]: Start isEmpty. Operand 3503 states and 4508 transitions.
[2024-11-08 11:20:45,792 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 494
[2024-11-08 11:20:45,793 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:45,793 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:45,839 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0
[2024-11-08 11:20:45,994 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable79
[2024-11-08 11:20:45,994 INFO  L396      AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:45,994 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:45,994 INFO  L85        PathProgramCache]: Analyzing trace with hash -1879843881, now seen corresponding path program 1 times
[2024-11-08 11:20:45,995 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:45,995 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725794351]
[2024-11-08 11:20:45,995 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:45,995 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:47,557 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,644 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:48,645 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,647 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:48,648 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,650 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93
[2024-11-08 11:20:48,651 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,652 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365
[2024-11-08 11:20:48,653 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,655 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383
[2024-11-08 11:20:48,656 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,658 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396
[2024-11-08 11:20:48,659 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:48,661 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 91 proven. 4 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked.
[2024-11-08 11:20:48,662 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:48,662 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725794351]
[2024-11-08 11:20:48,662 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725794351] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:48,662 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [123485538]
[2024-11-08 11:20:48,663 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:48,663 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:48,663 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:20:48,665 INFO  L229       MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:20:48,667 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2024-11-08 11:20:51,855 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:51,870 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2981 conjuncts, 7 conjuncts are in the unsatisfiable core
[2024-11-08 11:20:51,882 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:20:52,352 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked.
[2024-11-08 11:20:52,353 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:20:52,353 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [123485538] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:20:52,353 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 11:20:52,354 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7
[2024-11-08 11:20:52,354 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1974775883]
[2024-11-08 11:20:52,354 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:20:52,355 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:20:52,355 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:20:52,356 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:20:52,356 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-08 11:20:52,356 INFO  L87              Difference]: Start difference. First operand 3503 states and 4508 transitions. Second operand  has 4 states, 4 states have (on average 101.5) internal successors, (406), 4 states have internal predecessors, (406), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:52,835 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:20:52,835 INFO  L93              Difference]: Finished difference Result 4966 states and 6372 transitions.
[2024-11-08 11:20:52,835 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:20:52,836 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 101.5) internal successors, (406), 4 states have internal predecessors, (406), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 493
[2024-11-08 11:20:52,836 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:20:52,839 INFO  L225             Difference]: With dead ends: 4966
[2024-11-08 11:20:52,839 INFO  L226             Difference]: Without dead ends: 2000
[2024-11-08 11:20:52,841 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 514 GetRequests, 508 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56
[2024-11-08 11:20:52,842 INFO  L432           NwaCegarLoop]: 564 mSDtfsCounter, 643 mSDsluCounter, 566 mSDsCounter, 0 mSdLazyCounter, 385 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 643 SdHoareTripleChecker+Valid, 1130 SdHoareTripleChecker+Invalid, 385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 385 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time
[2024-11-08 11:20:52,842 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [643 Valid, 1130 Invalid, 385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 385 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time]
[2024-11-08 11:20:52,844 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2000 states.
[2024-11-08 11:20:52,883 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2000 to 2000.
[2024-11-08 11:20:52,885 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2000 states, 1974 states have (on average 1.2826747720364742) internal successors, (2532), 1974 states have internal predecessors, (2532), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24)
[2024-11-08 11:20:52,889 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2000 states to 2000 states and 2580 transitions.
[2024-11-08 11:20:52,889 INFO  L78                 Accepts]: Start accepts. Automaton has 2000 states and 2580 transitions. Word has length 493
[2024-11-08 11:20:52,890 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:20:52,890 INFO  L471      AbstractCegarLoop]: Abstraction has 2000 states and 2580 transitions.
[2024-11-08 11:20:52,890 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 101.5) internal successors, (406), 4 states have internal predecessors, (406), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:20:52,890 INFO  L276                IsEmpty]: Start isEmpty. Operand 2000 states and 2580 transitions.
[2024-11-08 11:20:52,895 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 494
[2024-11-08 11:20:52,896 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:20:52,896 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:20:52,937 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0
[2024-11-08 11:20:53,097 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:53,097 INFO  L396      AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:20:53,097 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:20:53,098 INFO  L85        PathProgramCache]: Analyzing trace with hash 922914199, now seen corresponding path program 1 times
[2024-11-08 11:20:53,098 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:20:53,098 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715549331]
[2024-11-08 11:20:53,098 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:53,098 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:20:55,006 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,711 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:20:57,712 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,714 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:20:57,715 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,718 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:20:57,719 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,721 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365
[2024-11-08 11:20:57,722 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,724 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383
[2024-11-08 11:20:57,725 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,727 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 397
[2024-11-08 11:20:57,728 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:20:57,733 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 86 proven. 17 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked.
[2024-11-08 11:20:57,733 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:20:57,733 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715549331]
[2024-11-08 11:20:57,733 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1715549331] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:20:57,733 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [932699684]
[2024-11-08 11:20:57,734 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:20:57,734 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:20:57,734 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:20:57,736 INFO  L229       MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:20:57,738 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-08 11:21:04,522 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:04,553 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2981 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-08 11:21:04,564 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:21:04,658 INFO  L134       CoverageAnalysis]: Checked inductivity of 179 backedges. 154 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked.
[2024-11-08 11:21:04,658 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:21:04,658 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [932699684] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:21:04,658 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 11:21:04,659 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [9] total 13
[2024-11-08 11:21:04,659 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613265221]
[2024-11-08 11:21:04,659 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:21:04,660 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 6 states
[2024-11-08 11:21:04,660 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:21:04,661 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-08 11:21:04,662 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156
[2024-11-08 11:21:04,662 INFO  L87              Difference]: Start difference. First operand 2000 states and 2580 transitions. Second operand  has 6 states, 5 states have (on average 93.6) internal successors, (468), 6 states have internal predecessors, (468), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:21:04,801 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:21:04,801 INFO  L93              Difference]: Finished difference Result 3733 states and 4784 transitions.
[2024-11-08 11:21:04,802 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-08 11:21:04,802 INFO  L78                 Accepts]: Start accepts. Automaton has  has 6 states, 5 states have (on average 93.6) internal successors, (468), 6 states have internal predecessors, (468), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 493
[2024-11-08 11:21:04,803 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:21:04,806 INFO  L225             Difference]: With dead ends: 3733
[2024-11-08 11:21:04,806 INFO  L226             Difference]: Without dead ends: 2000
[2024-11-08 11:21:04,808 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 502 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156
[2024-11-08 11:21:04,808 INFO  L432           NwaCegarLoop]: 752 mSDtfsCounter, 0 mSDsluCounter, 2989 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3741 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:21:04,809 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3741 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:21:04,811 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2000 states.
[2024-11-08 11:21:04,869 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2000 to 2000.
[2024-11-08 11:21:04,871 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2000 states, 1974 states have (on average 1.2786220871327254) internal successors, (2524), 1974 states have internal predecessors, (2524), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24)
[2024-11-08 11:21:04,874 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2000 states to 2000 states and 2572 transitions.
[2024-11-08 11:21:04,875 INFO  L78                 Accepts]: Start accepts. Automaton has 2000 states and 2572 transitions. Word has length 493
[2024-11-08 11:21:04,875 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:21:04,875 INFO  L471      AbstractCegarLoop]: Abstraction has 2000 states and 2572 transitions.
[2024-11-08 11:21:04,875 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 6 states, 5 states have (on average 93.6) internal successors, (468), 6 states have internal predecessors, (468), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:21:04,876 INFO  L276                IsEmpty]: Start isEmpty. Operand 2000 states and 2572 transitions.
[2024-11-08 11:21:04,880 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 494
[2024-11-08 11:21:04,880 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:21:04,881 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:21:04,927 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0
[2024-11-08 11:21:05,085 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:21:05,085 INFO  L396      AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:21:05,086 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:21:05,086 INFO  L85        PathProgramCache]: Analyzing trace with hash -222267401, now seen corresponding path program 1 times
[2024-11-08 11:21:05,086 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:21:05,086 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452644387]
[2024-11-08 11:21:05,086 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:21:05,086 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:21:07,353 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,201 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:21:09,202 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,203 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:21:09,204 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,205 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94
[2024-11-08 11:21:09,206 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,208 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365
[2024-11-08 11:21:09,208 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,209 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383
[2024-11-08 11:21:09,209 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,210 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 397
[2024-11-08 11:21:09,210 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:09,212 INFO  L134       CoverageAnalysis]: Checked inductivity of 181 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked.
[2024-11-08 11:21:09,212 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:21:09,212 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452644387]
[2024-11-08 11:21:09,212 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452644387] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:21:09,212 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:21:09,212 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-08 11:21:09,212 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1778151087]
[2024-11-08 11:21:09,212 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:21:09,213 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 9 states
[2024-11-08 11:21:09,213 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:21:09,214 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-08 11:21:09,214 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:21:09,214 INFO  L87              Difference]: Start difference. First operand 2000 states and 2572 transitions. Second operand  has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:21:11,005 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:21:11,005 INFO  L93              Difference]: Finished difference Result 4855 states and 6168 transitions.
[2024-11-08 11:21:11,006 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2024-11-08 11:21:11,006 INFO  L78                 Accepts]: Start accepts. Automaton has  has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 493
[2024-11-08 11:21:11,006 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:21:11,009 INFO  L225             Difference]: With dead ends: 4855
[2024-11-08 11:21:11,010 INFO  L226             Difference]: Without dead ends: 3468
[2024-11-08 11:21:11,011 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210
[2024-11-08 11:21:11,011 INFO  L432           NwaCegarLoop]: 877 mSDtfsCounter, 1951 mSDsluCounter, 4020 mSDsCounter, 0 mSdLazyCounter, 1917 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1952 SdHoareTripleChecker+Valid, 4897 SdHoareTripleChecker+Invalid, 1924 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1917 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time
[2024-11-08 11:21:11,012 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [1952 Valid, 4897 Invalid, 1924 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1917 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time]
[2024-11-08 11:21:11,014 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 3468 states.
[2024-11-08 11:21:11,068 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 3468 to 2276.
[2024-11-08 11:21:11,070 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2276 states, 2242 states have (on average 1.28099910793934) internal successors, (2872), 2242 states have internal predecessors, (2872), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32)
[2024-11-08 11:21:11,072 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2276 states to 2276 states and 2936 transitions.
[2024-11-08 11:21:11,073 INFO  L78                 Accepts]: Start accepts. Automaton has 2276 states and 2936 transitions. Word has length 493
[2024-11-08 11:21:11,073 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:21:11,073 INFO  L471      AbstractCegarLoop]: Abstraction has 2276 states and 2936 transitions.
[2024-11-08 11:21:11,074 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 9 states, 9 states have (on average 43.44444444444444) internal successors, (391), 9 states have internal predecessors, (391), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:21:11,074 INFO  L276                IsEmpty]: Start isEmpty. Operand 2276 states and 2936 transitions.
[2024-11-08 11:21:11,077 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 496
[2024-11-08 11:21:11,077 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:21:11,078 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:21:11,078 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82
[2024-11-08 11:21:11,078 INFO  L396      AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:21:11,078 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:21:11,079 INFO  L85        PathProgramCache]: Analyzing trace with hash 887734309, now seen corresponding path program 1 times
[2024-11-08 11:21:11,079 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:21:11,079 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653035589]
[2024-11-08 11:21:11,079 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:21:11,079 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:21:14,848 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,140 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:21:21,141 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,143 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:21:21,143 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,145 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95
[2024-11-08 11:21:21,145 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,147 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366
[2024-11-08 11:21:21,147 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,148 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 384
[2024-11-08 11:21:21,149 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,151 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 399
[2024-11-08 11:21:21,152 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:21,154 INFO  L134       CoverageAnalysis]: Checked inductivity of 182 backedges. 82 proven. 38 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked.
[2024-11-08 11:21:21,154 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:21:21,155 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653035589]
[2024-11-08 11:21:21,155 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [653035589] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:21:21,155 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1948101955]
[2024-11-08 11:21:21,155 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:21:21,155 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:21:21,155 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:21:21,156 INFO  L229       MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:21:21,158 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process
[2024-11-08 11:21:28,316 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:28,334 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2987 conjuncts, 36 conjuncts are in the unsatisfiable core
[2024-11-08 11:21:28,347 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:21:29,965 INFO  L134       CoverageAnalysis]: Checked inductivity of 182 backedges. 154 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 11:21:29,966 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:21:33,109 INFO  L134       CoverageAnalysis]: Checked inductivity of 182 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:21:33,109 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1948101955] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 11:21:33,109 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 11:21:33,110 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 8, 8] total 29
[2024-11-08 11:21:33,110 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259365046]
[2024-11-08 11:21:33,110 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 11:21:33,112 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 29 states
[2024-11-08 11:21:33,112 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:21:33,113 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants.
[2024-11-08 11:21:33,113 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=719, Unknown=0, NotChecked=0, Total=812
[2024-11-08 11:21:33,114 INFO  L87              Difference]: Start difference. First operand 2276 states and 2936 transitions. Second operand  has 29 states, 29 states have (on average 41.172413793103445) internal successors, (1194), 29 states have internal predecessors, (1194), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 11:21:43,083 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:21:43,083 INFO  L93              Difference]: Finished difference Result 10632 states and 13557 transitions.
[2024-11-08 11:21:43,083 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. 
[2024-11-08 11:21:43,084 INFO  L78                 Accepts]: Start accepts. Automaton has  has 29 states, 29 states have (on average 41.172413793103445) internal successors, (1194), 29 states have internal predecessors, (1194), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 495
[2024-11-08 11:21:43,084 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:21:43,092 INFO  L225             Difference]: With dead ends: 10632
[2024-11-08 11:21:43,092 INFO  L226             Difference]: Without dead ends: 9023
[2024-11-08 11:21:43,097 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 1068 GetRequests, 991 SyntacticMatches, 0 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1499 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=797, Invalid=5365, Unknown=0, NotChecked=0, Total=6162
[2024-11-08 11:21:43,097 INFO  L432           NwaCegarLoop]: 1230 mSDtfsCounter, 5475 mSDsluCounter, 21406 mSDsCounter, 0 mSdLazyCounter, 11057 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 6.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5478 SdHoareTripleChecker+Valid, 22636 SdHoareTripleChecker+Invalid, 11081 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 11057 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 7.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:21:43,097 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [5478 Valid, 22636 Invalid, 11081 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [24 Valid, 11057 Invalid, 0 Unknown, 0 Unchecked, 7.7s Time]
[2024-11-08 11:21:43,103 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 9023 states.
[2024-11-08 11:21:43,221 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 9023 to 4588.
[2024-11-08 11:21:43,224 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 4588 states, 4506 states have (on average 1.2678650687971593) internal successors, (5713), 4506 states have internal predecessors, (5713), 80 states have call successors, (80), 1 states have call predecessors, (80), 1 states have return successors, (80), 80 states have call predecessors, (80), 80 states have call successors, (80)
[2024-11-08 11:21:43,229 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4588 states to 4588 states and 5873 transitions.
[2024-11-08 11:21:43,230 INFO  L78                 Accepts]: Start accepts. Automaton has 4588 states and 5873 transitions. Word has length 495
[2024-11-08 11:21:43,230 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:21:43,231 INFO  L471      AbstractCegarLoop]: Abstraction has 4588 states and 5873 transitions.
[2024-11-08 11:21:43,231 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 29 states, 29 states have (on average 41.172413793103445) internal successors, (1194), 29 states have internal predecessors, (1194), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18)
[2024-11-08 11:21:43,231 INFO  L276                IsEmpty]: Start isEmpty. Operand 4588 states and 5873 transitions.
[2024-11-08 11:21:43,236 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 498
[2024-11-08 11:21:43,236 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:21:43,236 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:21:43,270 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0
[2024-11-08 11:21:43,437 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable83
[2024-11-08 11:21:43,438 INFO  L396      AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:21:43,438 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:21:43,438 INFO  L85        PathProgramCache]: Analyzing trace with hash -144769324, now seen corresponding path program 1 times
[2024-11-08 11:21:43,438 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:21:43,438 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689662500]
[2024-11-08 11:21:43,439 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:21:43,439 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:21:43,840 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,620 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:21:44,621 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,622 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:21:44,622 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,623 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95
[2024-11-08 11:21:44,624 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,625 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 368
[2024-11-08 11:21:44,625 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,626 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386
[2024-11-08 11:21:44,627 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,628 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 401
[2024-11-08 11:21:44,629 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:44,630 INFO  L134       CoverageAnalysis]: Checked inductivity of 181 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:21:44,630 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:21:44,630 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1689662500]
[2024-11-08 11:21:44,630 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1689662500] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:21:44,630 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:21:44,630 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:21:44,630 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429776618]
[2024-11-08 11:21:44,631 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:21:44,631 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:21:44,632 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:21:44,633 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:21:44,633 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:21:44,633 INFO  L87              Difference]: Start difference. First operand 4588 states and 5873 transitions. Second operand  has 5 states, 5 states have (on average 94.0) internal successors, (470), 5 states have internal predecessors, (470), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:21:44,790 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:21:44,790 INFO  L93              Difference]: Finished difference Result 6340 states and 8113 transitions.
[2024-11-08 11:21:44,791 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2024-11-08 11:21:44,791 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 94.0) internal successors, (470), 5 states have internal predecessors, (470), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 497
[2024-11-08 11:21:44,792 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:21:44,798 INFO  L225             Difference]: With dead ends: 6340
[2024-11-08 11:21:44,799 INFO  L226             Difference]: Without dead ends: 5422
[2024-11-08 11:21:44,802 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30
[2024-11-08 11:21:44,802 INFO  L432           NwaCegarLoop]: 746 mSDtfsCounter, 287 mSDsluCounter, 2228 mSDsCounter, 0 mSdLazyCounter, 41 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 287 SdHoareTripleChecker+Valid, 2974 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 41 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:21:44,802 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [287 Valid, 2974 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 41 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:21:44,807 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 5422 states.
[2024-11-08 11:21:44,951 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 5422 to 5396.
[2024-11-08 11:21:44,956 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 5396 states, 5308 states have (on average 1.2669555388093443) internal successors, (6725), 5308 states have internal predecessors, (6725), 86 states have call successors, (86), 1 states have call predecessors, (86), 1 states have return successors, (86), 86 states have call predecessors, (86), 86 states have call successors, (86)
[2024-11-08 11:21:44,965 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5396 states to 5396 states and 6897 transitions.
[2024-11-08 11:21:44,967 INFO  L78                 Accepts]: Start accepts. Automaton has 5396 states and 6897 transitions. Word has length 497
[2024-11-08 11:21:44,967 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:21:44,967 INFO  L471      AbstractCegarLoop]: Abstraction has 5396 states and 6897 transitions.
[2024-11-08 11:21:44,968 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 94.0) internal successors, (470), 5 states have internal predecessors, (470), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6)
[2024-11-08 11:21:44,968 INFO  L276                IsEmpty]: Start isEmpty. Operand 5396 states and 6897 transitions.
[2024-11-08 11:21:44,977 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 498
[2024-11-08 11:21:44,977 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:21:44,977 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:21:44,978 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84
[2024-11-08 11:21:44,978 INFO  L396      AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:21:44,978 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:21:44,979 INFO  L85        PathProgramCache]: Analyzing trace with hash -1469773345, now seen corresponding path program 1 times
[2024-11-08 11:21:44,979 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:21:44,979 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9165752]
[2024-11-08 11:21:44,979 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:21:44,979 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:21:49,028 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,588 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:21:50,589 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,590 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:21:50,591 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,592 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95
[2024-11-08 11:21:50,593 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,594 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367
[2024-11-08 11:21:50,595 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,595 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386
[2024-11-08 11:21:50,596 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,596 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 401
[2024-11-08 11:21:50,597 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:50,599 INFO  L134       CoverageAnalysis]: Checked inductivity of 183 backedges. 116 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked.
[2024-11-08 11:21:50,599 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:21:50,600 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9165752]
[2024-11-08 11:21:50,600 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [9165752] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:21:50,600 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [401448476]
[2024-11-08 11:21:50,600 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:21:50,600 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:21:50,600 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:21:50,601 INFO  L229       MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:21:50,603 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process
[2024-11-08 11:21:57,096 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:21:57,116 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2993 conjuncts, 275 conjuncts are in the unsatisfiable core
[2024-11-08 11:21:57,141 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:22:09,368 INFO  L134       CoverageAnalysis]: Checked inductivity of 183 backedges. 152 proven. 7 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2024-11-08 11:22:09,368 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:22:25,257 INFO  L134       CoverageAnalysis]: Checked inductivity of 183 backedges. 43 proven. 95 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 11:22:25,257 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [401448476] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 11:22:25,258 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 11:22:25,258 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 40, 37] total 79
[2024-11-08 11:22:25,258 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99939456]
[2024-11-08 11:22:25,258 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 11:22:25,260 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 79 states
[2024-11-08 11:22:25,260 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:22:25,263 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants.
[2024-11-08 11:22:25,264 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=983, Invalid=5179, Unknown=0, NotChecked=0, Total=6162
[2024-11-08 11:22:25,264 INFO  L87              Difference]: Start difference. First operand 5396 states and 6897 transitions. Second operand  has 79 states, 77 states have (on average 16.675324675324674) internal successors, (1284), 79 states have internal predecessors, (1284), 9 states have call successors, (18), 2 states have call predecessors, (18), 3 states have return successors, (18), 8 states have call predecessors, (18), 9 states have call successors, (18)
[2024-11-08 11:22:51,912 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:22:51,912 INFO  L93              Difference]: Finished difference Result 19133 states and 24183 transitions.
[2024-11-08 11:22:51,913 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. 
[2024-11-08 11:22:51,913 INFO  L78                 Accepts]: Start accepts. Automaton has  has 79 states, 77 states have (on average 16.675324675324674) internal successors, (1284), 79 states have internal predecessors, (1284), 9 states have call successors, (18), 2 states have call predecessors, (18), 3 states have return successors, (18), 8 states have call predecessors, (18), 9 states have call successors, (18) Word has length 497
[2024-11-08 11:22:51,914 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:22:51,926 INFO  L225             Difference]: With dead ends: 19133
[2024-11-08 11:22:51,927 INFO  L226             Difference]: Without dead ends: 15061
[2024-11-08 11:22:51,935 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 1088 GetRequests, 935 SyntacticMatches, 0 SemanticMatches, 153 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6858 ImplicationChecksByTransitivity, 11.8s TimeCoverageRelationStatistics Valid=3078, Invalid=20792, Unknown=0, NotChecked=0, Total=23870
[2024-11-08 11:22:51,936 INFO  L432           NwaCegarLoop]: 767 mSDtfsCounter, 12974 mSDsluCounter, 25292 mSDsCounter, 0 mSdLazyCounter, 18174 mSolverCounterSat, 65 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 15.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12991 SdHoareTripleChecker+Valid, 26059 SdHoareTripleChecker+Invalid, 18239 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 65 IncrementalHoareTripleChecker+Valid, 18174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 17.7s IncrementalHoareTripleChecker+Time
[2024-11-08 11:22:51,936 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [12991 Valid, 26059 Invalid, 18239 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [65 Valid, 18174 Invalid, 0 Unknown, 0 Unchecked, 17.7s Time]
[2024-11-08 11:22:51,947 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 15061 states.
[2024-11-08 11:22:52,144 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 15061 to 6359.
[2024-11-08 11:22:52,151 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 6359 states, 6257 states have (on average 1.265143039795429) internal successors, (7916), 6257 states have internal predecessors, (7916), 100 states have call successors, (100), 1 states have call predecessors, (100), 1 states have return successors, (100), 100 states have call predecessors, (100), 100 states have call successors, (100)
[2024-11-08 11:22:52,163 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 6359 states to 6359 states and 8116 transitions.
[2024-11-08 11:22:52,164 INFO  L78                 Accepts]: Start accepts. Automaton has 6359 states and 8116 transitions. Word has length 497
[2024-11-08 11:22:52,165 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:22:52,165 INFO  L471      AbstractCegarLoop]: Abstraction has 6359 states and 8116 transitions.
[2024-11-08 11:22:52,166 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 79 states, 77 states have (on average 16.675324675324674) internal successors, (1284), 79 states have internal predecessors, (1284), 9 states have call successors, (18), 2 states have call predecessors, (18), 3 states have return successors, (18), 8 states have call predecessors, (18), 9 states have call successors, (18)
[2024-11-08 11:22:52,166 INFO  L276                IsEmpty]: Start isEmpty. Operand 6359 states and 8116 transitions.
[2024-11-08 11:22:52,174 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 498
[2024-11-08 11:22:52,174 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:22:52,174 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:22:52,212 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0
[2024-11-08 11:22:52,375 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable85
[2024-11-08 11:22:52,375 INFO  L396      AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:22:52,376 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:22:52,376 INFO  L85        PathProgramCache]: Analyzing trace with hash 1290066151, now seen corresponding path program 1 times
[2024-11-08 11:22:52,376 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:22:52,376 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203128859]
[2024-11-08 11:22:52,377 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:22:52,377 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:22:56,411 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,327 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:23:00,328 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,329 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:23:00,330 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,332 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95
[2024-11-08 11:23:00,332 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,334 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367
[2024-11-08 11:23:00,334 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,336 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386
[2024-11-08 11:23:00,336 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,338 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 401
[2024-11-08 11:23:00,338 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:00,341 INFO  L134       CoverageAnalysis]: Checked inductivity of 184 backedges. 2 proven. 122 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:23:00,341 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:23:00,341 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203128859]
[2024-11-08 11:23:00,341 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [203128859] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:23:00,342 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1803977210]
[2024-11-08 11:23:00,342 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:00,342 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:23:00,342 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:23:00,343 INFO  L229       MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:23:00,345 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process
[2024-11-08 11:23:07,423 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:07,444 INFO  L255         TraceCheckSpWp]: Trace formula consists of 2993 conjuncts, 182 conjuncts are in the unsatisfiable core
[2024-11-08 11:23:07,463 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:23:12,176 INFO  L134       CoverageAnalysis]: Checked inductivity of 184 backedges. 4 proven. 120 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:23:12,176 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:23:18,701 INFO  L134       CoverageAnalysis]: Checked inductivity of 184 backedges. 4 proven. 120 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked.
[2024-11-08 11:23:18,701 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1803977210] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-08 11:23:18,701 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-08 11:23:18,701 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 33, 24] total 66
[2024-11-08 11:23:18,701 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517725015]
[2024-11-08 11:23:18,702 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-08 11:23:18,702 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 66 states
[2024-11-08 11:23:18,703 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:23:18,704 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants.
[2024-11-08 11:23:18,704 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=471, Invalid=3819, Unknown=0, NotChecked=0, Total=4290
[2024-11-08 11:23:18,704 INFO  L87              Difference]: Start difference. First operand 6359 states and 8116 transitions. Second operand  has 66 states, 66 states have (on average 21.106060606060606) internal successors, (1393), 66 states have internal predecessors, (1393), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18)
[2024-11-08 11:23:29,494 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:23:29,494 INFO  L93              Difference]: Finished difference Result 12389 states and 15853 transitions.
[2024-11-08 11:23:29,495 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. 
[2024-11-08 11:23:29,495 INFO  L78                 Accepts]: Start accepts. Automaton has  has 66 states, 66 states have (on average 21.106060606060606) internal successors, (1393), 66 states have internal predecessors, (1393), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 497
[2024-11-08 11:23:29,496 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:23:29,502 INFO  L225             Difference]: With dead ends: 12389
[2024-11-08 11:23:29,503 INFO  L226             Difference]: Without dead ends: 7831
[2024-11-08 11:23:29,509 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 1057 GetRequests, 953 SyntacticMatches, 1 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2577 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=1360, Invalid=9560, Unknown=0, NotChecked=0, Total=10920
[2024-11-08 11:23:29,509 INFO  L432           NwaCegarLoop]: 640 mSDtfsCounter, 4446 mSDsluCounter, 25015 mSDsCounter, 0 mSdLazyCounter, 12630 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4446 SdHoareTripleChecker+Valid, 25655 SdHoareTripleChecker+Invalid, 12640 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 12630 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:23:29,509 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [4446 Valid, 25655 Invalid, 12640 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [10 Valid, 12630 Invalid, 0 Unknown, 0 Unchecked, 8.2s Time]
[2024-11-08 11:23:29,515 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 7831 states.
[2024-11-08 11:23:29,746 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 7831 to 6467.
[2024-11-08 11:23:29,752 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 6467 states, 6365 states have (on average 1.26127258444619) internal successors, (8028), 6365 states have internal predecessors, (8028), 100 states have call successors, (100), 1 states have call predecessors, (100), 1 states have return successors, (100), 100 states have call predecessors, (100), 100 states have call successors, (100)
[2024-11-08 11:23:29,763 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 6467 states to 6467 states and 8228 transitions.
[2024-11-08 11:23:29,764 INFO  L78                 Accepts]: Start accepts. Automaton has 6467 states and 8228 transitions. Word has length 497
[2024-11-08 11:23:29,764 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:23:29,765 INFO  L471      AbstractCegarLoop]: Abstraction has 6467 states and 8228 transitions.
[2024-11-08 11:23:29,765 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 66 states, 66 states have (on average 21.106060606060606) internal successors, (1393), 66 states have internal predecessors, (1393), 7 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18)
[2024-11-08 11:23:29,765 INFO  L276                IsEmpty]: Start isEmpty. Operand 6467 states and 8228 transitions.
[2024-11-08 11:23:29,775 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 498
[2024-11-08 11:23:29,775 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:23:29,776 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:23:29,826 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0
[2024-11-08 11:23:29,976 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable86
[2024-11-08 11:23:29,977 INFO  L396      AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:23:29,977 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:23:29,978 INFO  L85        PathProgramCache]: Analyzing trace with hash -33384345, now seen corresponding path program 1 times
[2024-11-08 11:23:29,978 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:23:29,978 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823139212]
[2024-11-08 11:23:29,978 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:29,978 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:23:30,338 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,057 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61
[2024-11-08 11:23:31,058 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,058 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80
[2024-11-08 11:23:31,059 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,059 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95
[2024-11-08 11:23:31,060 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,060 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367
[2024-11-08 11:23:31,061 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,061 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386
[2024-11-08 11:23:31,062 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,062 INFO  L368   atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 401
[2024-11-08 11:23:31,063 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:31,064 INFO  L134       CoverageAnalysis]: Checked inductivity of 182 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked.
[2024-11-08 11:23:31,065 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-08 11:23:31,065 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823139212]
[2024-11-08 11:23:31,065 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [823139212] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:23:31,065 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:23:31,065 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2024-11-08 11:23:31,065 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077615733]
[2024-11-08 11:23:31,066 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:23:31,066 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 5 states
[2024-11-08 11:23:31,066 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-08 11:23:31,067 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-08 11:23:31,067 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:23:31,068 INFO  L87              Difference]: Start difference. First operand 6467 states and 8228 transitions. Second operand  has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:23:31,211 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:23:31,211 INFO  L93              Difference]: Finished difference Result 11197 states and 14195 transitions.
[2024-11-08 11:23:31,212 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:23:31,212 INFO  L78                 Accepts]: Start accepts. Automaton has  has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 497
[2024-11-08 11:23:31,213 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:23:31,219 INFO  L225             Difference]: With dead ends: 11197
[2024-11-08 11:23:31,219 INFO  L226             Difference]: Without dead ends: 6483
[2024-11-08 11:23:31,223 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20
[2024-11-08 11:23:31,223 INFO  L432           NwaCegarLoop]: 751 mSDtfsCounter, 0 mSDsluCounter, 1492 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2243 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:23:31,223 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2243 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:23:31,227 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 6483 states.
[2024-11-08 11:23:31,368 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 6483 to 6483.
[2024-11-08 11:23:31,372 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 6483 states, 6381 states have (on average 1.256856292117223) internal successors, (8020), 6381 states have internal predecessors, (8020), 100 states have call successors, (100), 1 states have call predecessors, (100), 1 states have return successors, (100), 100 states have call predecessors, (100), 100 states have call successors, (100)
[2024-11-08 11:23:31,379 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 6483 states to 6483 states and 8220 transitions.
[2024-11-08 11:23:31,380 INFO  L78                 Accepts]: Start accepts. Automaton has 6483 states and 8220 transitions. Word has length 497
[2024-11-08 11:23:31,381 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:23:31,381 INFO  L471      AbstractCegarLoop]: Abstraction has 6483 states and 8220 transitions.
[2024-11-08 11:23:31,381 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:23:31,381 INFO  L276                IsEmpty]: Start isEmpty. Operand 6483 states and 8220 transitions.
[2024-11-08 11:23:31,391 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 499
[2024-11-08 11:23:31,391 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:23:31,391 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:23:31,392 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87
[2024-11-08 11:23:31,392 INFO  L396      AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:23:31,392 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:23:31,393 INFO  L85        PathProgramCache]: Analyzing trace with hash -1393076349, now seen corresponding path program 1 times
[2024-11-08 11:23:31,393 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-08 11:23:31,393 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751212234]
[2024-11-08 11:23:31,393 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:31,393 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-08 11:23:36,330 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-08 11:23:36,330 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-08 11:23:41,850 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-08 11:23:42,292 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-08 11:23:42,292 INFO  L325         BasicCegarLoop]: Counterexample is feasible
[2024-11-08 11:23:42,293 INFO  L782   garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining)
[2024-11-08 11:23:42,296 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable88
[2024-11-08 11:23:42,299 INFO  L407         BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:23:42,616 WARN  L290   BoogieBacktranslator]: Removing null node from list of ATEs: ATE  program state null
[2024-11-08 11:23:42,617 WARN  L290   BoogieBacktranslator]: Removing null node from list of ATEs: ATE  program state null
[2024-11-08 11:23:42,710 INFO  L170   ceAbstractionStarter]: Computing trace abstraction results
[2024-11-08 11:23:42,713 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.11 11:23:42 BoogieIcfgContainer
[2024-11-08 11:23:42,714 INFO  L131        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2024-11-08 11:23:42,714 INFO  L112        PluginConnector]: ------------------------Witness Printer----------------------------
[2024-11-08 11:23:42,714 INFO  L270        PluginConnector]: Initializing Witness Printer...
[2024-11-08 11:23:42,715 INFO  L274        PluginConnector]: Witness Printer initialized
[2024-11-08 11:23:42,715 INFO  L184        PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 11:17:51" (3/4) ...
[2024-11-08 11:23:42,720 INFO  L145         WitnessPrinter]: No result that supports witness generation found
[2024-11-08 11:23:42,722 INFO  L131        PluginConnector]: ------------------------ END Witness Printer----------------------------
[2024-11-08 11:23:42,723 INFO  L158              Benchmark]: Toolchain (without parser) took 356358.21ms. Allocated memory was 125.8MB in the beginning and 2.4GB in the end (delta: 2.3GB). Free memory was 88.8MB in the beginning and 1.8GB in the end (delta: -1.7GB). Peak memory consumption was 579.8MB. Max. memory is 16.1GB.
[2024-11-08 11:23:42,723 INFO  L158              Benchmark]: CDTParser took 0.74ms. Allocated memory is still 125.8MB. Free memory is still 94.4MB. There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 11:23:42,723 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 860.49ms. Allocated memory is still 125.8MB. Free memory was 88.8MB in the beginning and 48.5MB in the end (delta: 40.3MB). Peak memory consumption was 39.8MB. Max. memory is 16.1GB.
[2024-11-08 11:23:42,723 INFO  L158              Benchmark]: Boogie Procedure Inliner took 310.09ms. Allocated memory is still 125.8MB. Free memory was 48.5MB in the beginning and 60.5MB in the end (delta: -12.0MB). Peak memory consumption was 28.9MB. Max. memory is 16.1GB.
[2024-11-08 11:23:42,724 INFO  L158              Benchmark]: Boogie Preprocessor took 395.89ms. Allocated memory was 125.8MB in the beginning and 174.1MB in the end (delta: 48.2MB). Free memory was 60.5MB in the beginning and 113.1MB in the end (delta: -52.6MB). Peak memory consumption was 40.4MB. Max. memory is 16.1GB.
[2024-11-08 11:23:42,724 INFO  L158              Benchmark]: RCFGBuilder took 3434.31ms. Allocated memory was 174.1MB in the beginning and 232.8MB in the end (delta: 58.7MB). Free memory was 113.1MB in the beginning and 118.1MB in the end (delta: -5.0MB). Peak memory consumption was 83.6MB. Max. memory is 16.1GB.
[2024-11-08 11:23:42,724 INFO  L158              Benchmark]: TraceAbstraction took 351343.13ms. Allocated memory was 232.8MB in the beginning and 2.4GB in the end (delta: 2.2GB). Free memory was 117.0MB in the beginning and 1.8GB in the end (delta: -1.7GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB.
[2024-11-08 11:23:42,724 INFO  L158              Benchmark]: Witness Printer took 7.95ms. Allocated memory is still 2.4GB. Free memory was 1.8GB in the beginning and 1.8GB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 11:23:42,725 INFO  L338   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.74ms. Allocated memory is still 125.8MB. Free memory is still 94.4MB. There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 860.49ms. Allocated memory is still 125.8MB. Free memory was 88.8MB in the beginning and 48.5MB in the end (delta: 40.3MB). Peak memory consumption was 39.8MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 310.09ms. Allocated memory is still 125.8MB. Free memory was 48.5MB in the beginning and 60.5MB in the end (delta: -12.0MB). Peak memory consumption was 28.9MB. Max. memory is 16.1GB.
 * Boogie Preprocessor took 395.89ms. Allocated memory was 125.8MB in the beginning and 174.1MB in the end (delta: 48.2MB). Free memory was 60.5MB in the beginning and 113.1MB in the end (delta: -52.6MB). Peak memory consumption was 40.4MB. Max. memory is 16.1GB.
 * RCFGBuilder took 3434.31ms. Allocated memory was 174.1MB in the beginning and 232.8MB in the end (delta: 58.7MB). Free memory was 113.1MB in the beginning and 118.1MB in the end (delta: -5.0MB). Peak memory consumption was 83.6MB. Max. memory is 16.1GB.
 * TraceAbstraction took 351343.13ms. Allocated memory was 232.8MB in the beginning and 2.4GB in the end (delta: 2.2GB). Free memory was 117.0MB in the beginning and 1.8GB in the end (delta: -1.7GB). Peak memory consumption was 1.5GB. Max. memory is 16.1GB.
 * Witness Printer took 7.95ms. Allocated memory is still 2.4GB. Free memory was 1.8GB in the beginning and 1.8GB in the end (delta: 1.0MB). There was no memory consumed. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - StatisticsResult: ErrorAutomatonStatistics
    NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0
  - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable
    Unable to prove that a call to reach_error is unreachable
 Reason: overapproximation of bitwiseOr at line 389, overapproximation of bitwiseAnd at line 398. 
Possible FailurePath: 
[L26]               const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1);
[L27]               const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1);
[L29]               const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 64);
[L30]               const SORT_3 msb_SORT_3 = (SORT_3)1 << (64 - 1);
[L32]               const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 6);
[L33]               const SORT_11 msb_SORT_11 = (SORT_11)1 << (6 - 1);
[L35]               const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 5);
[L36]               const SORT_13 msb_SORT_13 = (SORT_13)1 << (5 - 1);
[L38]               const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 4);
[L39]               const SORT_19 msb_SORT_19 = (SORT_19)1 << (4 - 1);
[L41]               const SORT_60 mask_SORT_60 = (SORT_60)-1 >> (sizeof(SORT_60) * 8 - 3);
[L42]               const SORT_60 msb_SORT_60 = (SORT_60)1 << (3 - 1);
[L44]               const SORT_81 mask_SORT_81 = (SORT_81)-1 >> (sizeof(SORT_81) * 8 - 2);
[L45]               const SORT_81 msb_SORT_81 = (SORT_81)1 << (2 - 1);
[L47]               const SORT_13 var_15 = 16;
[L48]               const SORT_19 var_20 = 15;
[L49]               const SORT_19 var_25 = 14;
[L50]               const SORT_19 var_30 = 13;
[L51]               const SORT_19 var_35 = 12;
[L52]               const SORT_19 var_40 = 11;
[L53]               const SORT_19 var_45 = 10;
[L54]               const SORT_19 var_50 = 9;
[L55]               const SORT_19 var_55 = 8;
[L56]               const SORT_60 var_61 = 7;
[L57]               const SORT_60 var_66 = 6;
[L58]               const SORT_60 var_71 = 5;
[L59]               const SORT_60 var_76 = 4;
[L60]               const SORT_81 var_82 = 3;
[L61]               const SORT_81 var_87 = 2;
[L62]               const SORT_1 var_92 = 1;
[L63]               const SORT_13 var_105 = 17;
[L64]               const SORT_11 var_122 = 0;
[L65]               const SORT_1 var_152 = 0;
[L66]               const SORT_3 var_373 = 0;
[L68]               SORT_1 input_2;
[L69]               SORT_3 input_4;
[L70]               SORT_1 input_5;
[L71]               SORT_1 input_6;
[L72]               SORT_1 input_7;
[L73]               SORT_1 input_8;
[L74]               SORT_3 input_9;
[L75]               SORT_1 input_150;
[L77]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L77]               SORT_3 state_10 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L78]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L78]               SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L79]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L79]               SORT_3 state_18 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L80]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L80]               SORT_3 state_24 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L81]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L81]               SORT_3 state_29 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L82]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L82]               SORT_3 state_34 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L83]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L83]               SORT_3 state_39 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L84]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L84]               SORT_3 state_44 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L85]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L85]               SORT_3 state_49 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L86]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L86]               SORT_3 state_54 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L87]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L87]               SORT_3 state_59 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L88]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L88]               SORT_3 state_65 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L89]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L89]               SORT_3 state_70 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L90]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L90]               SORT_3 state_75 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L91]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L91]               SORT_3 state_80 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L92]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L92]               SORT_3 state_86 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L93]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L93]               SORT_3 state_91 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L94]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L94]               SORT_3 state_96 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L95]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L95]               SORT_11 state_101 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L96]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_1
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L96]               SORT_1 state_109 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L97]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_1
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L97]               SORT_1 state_110 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L98]   EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L98]               SORT_11 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L99]   EXPR        __VERIFIER_nondet_ulong() & mask_SORT_3
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L99]               SORT_3 state_128 = __VERIFIER_nondet_ulong() & mask_SORT_3;
[L100]  EXPR        __VERIFIER_nondet_uchar() & mask_SORT_1
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L100]              SORT_1 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_1;
[L101]  EXPR        __VERIFIER_nondet_uchar() & mask_SORT_11
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L101]              SORT_11 state_185 = __VERIFIER_nondet_uchar() & mask_SORT_11;
[L103]              SORT_1 init_133_arg_1 = var_92;
[L104]              state_132 = init_133_arg_1
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L107]              input_2 = __VERIFIER_nondet_uchar()
[L108]              input_4 = __VERIFIER_nondet_ulong()
[L109]              input_5 = __VERIFIER_nondet_uchar()
[L110]              input_6 = __VERIFIER_nondet_uchar()
[L111]              input_7 = __VERIFIER_nondet_uchar()
[L112]  EXPR        input_7 & mask_SORT_1
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L112]              input_7 = input_7 & mask_SORT_1
[L113]              input_8 = __VERIFIER_nondet_uchar()
[L114]              input_9 = __VERIFIER_nondet_ulong()
[L115]              input_150 = __VERIFIER_nondet_uchar()
[L117]              SORT_1 var_134_arg_0 = input_7;
[L118]              SORT_1 var_134_arg_1 = state_132;
[L119]              SORT_1 var_134 = var_134_arg_0 == var_134_arg_1;
[L120]              SORT_1 var_135_arg_0 = var_92;
[L121]              SORT_1 var_135 = ~var_135_arg_0;
[L122]              SORT_1 var_136_arg_0 = var_134;
[L123]              SORT_1 var_136_arg_1 = var_135;
        VAL         [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L124]  EXPR        var_136_arg_0 | var_136_arg_1
        VAL         [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L124]              SORT_1 var_136 = var_136_arg_0 | var_136_arg_1;
[L125]  EXPR        var_136 & mask_SORT_1
        VAL         [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L125]              var_136 = var_136 & mask_SORT_1
[L126]              SORT_1 constr_137_arg_0 = var_136;
        VAL         [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L127]  CALL        assume_abort_if_not(constr_137_arg_0)
        VAL         [\old(cond)=1]
[L22]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L127]  RET         assume_abort_if_not(constr_137_arg_0)
        VAL         [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L128]              SORT_13 var_106_arg_0 = var_105;
        VAL         [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L129]  EXPR        var_106_arg_0 & mask_SORT_13
        VAL         [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L129]              var_106_arg_0 = var_106_arg_0 & mask_SORT_13
[L130]              SORT_11 var_106 = var_106_arg_0;
[L131]              SORT_11 var_107_arg_0 = state_101;
[L132]              SORT_11 var_107_arg_1 = var_106;
[L133]              SORT_1 var_107 = var_107_arg_0 == var_107_arg_1;
[L134]              SORT_1 var_138_arg_0 = var_107;
[L135]              SORT_1 var_138 = ~var_138_arg_0;
[L136]              SORT_1 var_139_arg_0 = input_6;
[L137]              SORT_1 var_139 = ~var_139_arg_0;
[L138]              SORT_1 var_140_arg_0 = var_138;
[L139]              SORT_1 var_140_arg_1 = var_139;
        VAL         [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L140]  EXPR        var_140_arg_0 | var_140_arg_1
        VAL         [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L140]              SORT_1 var_140 = var_140_arg_0 | var_140_arg_1;
[L141]              SORT_1 var_141_arg_0 = var_92;
[L142]              SORT_1 var_141 = ~var_141_arg_0;
[L143]              SORT_1 var_142_arg_0 = var_140;
[L144]              SORT_1 var_142_arg_1 = var_141;
        VAL         [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L145]  EXPR        var_142_arg_0 | var_142_arg_1
        VAL         [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L145]              SORT_1 var_142 = var_142_arg_0 | var_142_arg_1;
[L146]  EXPR        var_142 & mask_SORT_1
        VAL         [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L146]              var_142 = var_142 & mask_SORT_1
[L147]              SORT_1 constr_143_arg_0 = var_142;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L148]  CALL        assume_abort_if_not(constr_143_arg_0)
        VAL         [\old(cond)=1]
[L22]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L148]  RET         assume_abort_if_not(constr_143_arg_0)
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L149]              SORT_11 var_102_arg_0 = state_101;
[L150]              SORT_1 var_102 = var_102_arg_0 != 0;
[L151]              SORT_1 var_103_arg_0 = var_102;
[L152]              SORT_1 var_103 = ~var_103_arg_0;
[L153]              SORT_1 var_144_arg_0 = var_103;
[L154]              SORT_1 var_144 = ~var_144_arg_0;
[L155]              SORT_1 var_145_arg_0 = input_5;
[L156]              SORT_1 var_145 = ~var_145_arg_0;
[L157]              SORT_1 var_146_arg_0 = var_144;
[L158]              SORT_1 var_146_arg_1 = var_145;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L159]  EXPR        var_146_arg_0 | var_146_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L159]              SORT_1 var_146 = var_146_arg_0 | var_146_arg_1;
[L160]              SORT_1 var_147_arg_0 = var_92;
[L161]              SORT_1 var_147 = ~var_147_arg_0;
[L162]              SORT_1 var_148_arg_0 = var_146;
[L163]              SORT_1 var_148_arg_1 = var_147;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=255, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L164]  EXPR        var_148_arg_0 | var_148_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L164]              SORT_1 var_148 = var_148_arg_0 | var_148_arg_1;
[L165]  EXPR        var_148 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L165]              var_148 = var_148 & mask_SORT_1
[L166]              SORT_1 constr_149_arg_0 = var_148;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L167]  CALL        assume_abort_if_not(constr_149_arg_0)
        VAL         [\old(cond)=1]
[L22]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L167]  RET         assume_abort_if_not(constr_149_arg_0)
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L169]              SORT_1 var_153_arg_0 = state_132;
[L170]              SORT_1 var_153_arg_1 = var_152;
[L171]              SORT_1 var_153_arg_2 = var_92;
[L172]              SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2;
[L173]              SORT_1 var_111_arg_0 = state_110;
[L174]              SORT_1 var_111 = ~var_111_arg_0;
[L175]              SORT_1 var_112_arg_0 = state_109;
[L176]              SORT_1 var_112_arg_1 = var_111;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L177]  EXPR        var_112_arg_0 & var_112_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L177]              SORT_1 var_112 = var_112_arg_0 & var_112_arg_1;
[L178]              SORT_11 var_114_arg_0 = state_113;
[L179]              SORT_1 var_114 = var_114_arg_0 != 0;
[L180]              SORT_1 var_115_arg_0 = var_112;
[L181]              SORT_1 var_115_arg_1 = var_114;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L182]  EXPR        var_115_arg_0 & var_115_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L182]              SORT_1 var_115 = var_115_arg_0 & var_115_arg_1;
[L183]              SORT_1 var_116_arg_0 = state_109;
[L184]              SORT_1 var_116 = ~var_116_arg_0;
[L185]              SORT_1 var_117_arg_0 = input_6;
[L186]              SORT_1 var_117_arg_1 = var_116;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L187]  EXPR        var_117_arg_0 & var_117_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L187]              SORT_1 var_117 = var_117_arg_0 & var_117_arg_1;
[L188]              SORT_1 var_118_arg_0 = var_117;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L189]  EXPR        var_118_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L189]              var_118_arg_0 = var_118_arg_0 & mask_SORT_1
[L190]              SORT_11 var_118 = var_118_arg_0;
[L191]              SORT_11 var_119_arg_0 = state_113;
[L192]              SORT_11 var_119_arg_1 = var_118;
[L193]              SORT_11 var_119 = var_119_arg_0 + var_119_arg_1;
[L194]              SORT_1 var_120_arg_0 = input_5;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L195]  EXPR        var_120_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L195]              var_120_arg_0 = var_120_arg_0 & mask_SORT_1
[L196]              SORT_11 var_120 = var_120_arg_0;
[L197]              SORT_11 var_121_arg_0 = var_119;
[L198]              SORT_11 var_121_arg_1 = var_120;
[L199]              SORT_11 var_121 = var_121_arg_0 - var_121_arg_1;
[L200]              SORT_1 var_123_arg_0 = input_7;
[L201]              SORT_11 var_123_arg_1 = var_122;
[L202]              SORT_11 var_123_arg_2 = var_121;
[L203]              SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L204]  EXPR        var_123 & mask_SORT_11
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L204]              var_123 = var_123 & mask_SORT_11
[L205]              SORT_11 var_124_arg_0 = var_123;
[L206]              SORT_1 var_124 = var_124_arg_0 != 0;
[L207]              SORT_1 var_125_arg_0 = var_124;
[L208]              SORT_1 var_125 = ~var_125_arg_0;
[L209]              SORT_1 var_126_arg_0 = var_115;
[L210]              SORT_1 var_126_arg_1 = var_125;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L211]  EXPR        var_126_arg_0 & var_126_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L211]              SORT_1 var_126 = var_126_arg_0 & var_126_arg_1;
[L212]              SORT_1 var_127_arg_0 = var_126;
[L213]              SORT_1 var_127 = ~var_127_arg_0;
[L214]              SORT_11 var_14_arg_0 = state_12;
[L215]              SORT_13 var_14 = var_14_arg_0 >> 0;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L216]  EXPR        var_14 & mask_SORT_13
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L216]              var_14 = var_14 & mask_SORT_13
[L217]              SORT_13 var_97_arg_0 = var_14;
[L218]              SORT_1 var_97 = var_97_arg_0 != 0;
[L219]              SORT_1 var_98_arg_0 = var_97;
[L220]              SORT_1 var_98 = ~var_98_arg_0;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1]
[L221]  EXPR        var_98 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L221]              var_98 = var_98 & mask_SORT_1
[L222]              SORT_1 var_93_arg_0 = var_92;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=1]
[L223]  EXPR        var_93_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=1]
[L223]              var_93_arg_0 = var_93_arg_0 & mask_SORT_1
[L224]              SORT_13 var_93 = var_93_arg_0;
[L225]              SORT_13 var_94_arg_0 = var_14;
[L226]              SORT_13 var_94_arg_1 = var_93;
[L227]              SORT_1 var_94 = var_94_arg_0 == var_94_arg_1;
[L228]              SORT_81 var_88_arg_0 = var_87;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=1]
[L229]  EXPR        var_88_arg_0 & mask_SORT_81
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=1]
[L229]              var_88_arg_0 = var_88_arg_0 & mask_SORT_81
[L230]              SORT_13 var_88 = var_88_arg_0;
[L231]              SORT_13 var_89_arg_0 = var_14;
[L232]              SORT_13 var_89_arg_1 = var_88;
[L233]              SORT_1 var_89 = var_89_arg_0 == var_89_arg_1;
[L234]              SORT_81 var_83_arg_0 = var_82;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L235]  EXPR        var_83_arg_0 & mask_SORT_81
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L235]              var_83_arg_0 = var_83_arg_0 & mask_SORT_81
[L236]              SORT_13 var_83 = var_83_arg_0;
[L237]              SORT_13 var_84_arg_0 = var_14;
[L238]              SORT_13 var_84_arg_1 = var_83;
[L239]              SORT_1 var_84 = var_84_arg_0 == var_84_arg_1;
[L240]              SORT_60 var_77_arg_0 = var_76;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L241]  EXPR        var_77_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L241]              var_77_arg_0 = var_77_arg_0 & mask_SORT_60
[L242]              SORT_13 var_77 = var_77_arg_0;
[L243]              SORT_13 var_78_arg_0 = var_14;
[L244]              SORT_13 var_78_arg_1 = var_77;
[L245]              SORT_1 var_78 = var_78_arg_0 == var_78_arg_1;
[L246]              SORT_60 var_72_arg_0 = var_71;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L247]  EXPR        var_72_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L247]              var_72_arg_0 = var_72_arg_0 & mask_SORT_60
[L248]              SORT_13 var_72 = var_72_arg_0;
[L249]              SORT_13 var_73_arg_0 = var_14;
[L250]              SORT_13 var_73_arg_1 = var_72;
[L251]              SORT_1 var_73 = var_73_arg_0 == var_73_arg_1;
[L252]              SORT_60 var_67_arg_0 = var_66;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L253]  EXPR        var_67_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L253]              var_67_arg_0 = var_67_arg_0 & mask_SORT_60
[L254]              SORT_13 var_67 = var_67_arg_0;
[L255]              SORT_13 var_68_arg_0 = var_14;
[L256]              SORT_13 var_68_arg_1 = var_67;
[L257]              SORT_1 var_68 = var_68_arg_0 == var_68_arg_1;
[L258]              SORT_60 var_62_arg_0 = var_61;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L259]  EXPR        var_62_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L259]              var_62_arg_0 = var_62_arg_0 & mask_SORT_60
[L260]              SORT_13 var_62 = var_62_arg_0;
[L261]              SORT_13 var_63_arg_0 = var_14;
[L262]              SORT_13 var_63_arg_1 = var_62;
[L263]              SORT_1 var_63 = var_63_arg_0 == var_63_arg_1;
[L264]              SORT_19 var_56_arg_0 = var_55;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L265]  EXPR        var_56_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L265]              var_56_arg_0 = var_56_arg_0 & mask_SORT_19
[L266]              SORT_13 var_56 = var_56_arg_0;
[L267]              SORT_13 var_57_arg_0 = var_14;
[L268]              SORT_13 var_57_arg_1 = var_56;
[L269]              SORT_1 var_57 = var_57_arg_0 == var_57_arg_1;
[L270]              SORT_19 var_51_arg_0 = var_50;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L271]  EXPR        var_51_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L271]              var_51_arg_0 = var_51_arg_0 & mask_SORT_19
[L272]              SORT_13 var_51 = var_51_arg_0;
[L273]              SORT_13 var_52_arg_0 = var_14;
[L274]              SORT_13 var_52_arg_1 = var_51;
[L275]              SORT_1 var_52 = var_52_arg_0 == var_52_arg_1;
[L276]              SORT_19 var_46_arg_0 = var_45;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L277]  EXPR        var_46_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L277]              var_46_arg_0 = var_46_arg_0 & mask_SORT_19
[L278]              SORT_13 var_46 = var_46_arg_0;
[L279]              SORT_13 var_47_arg_0 = var_14;
[L280]              SORT_13 var_47_arg_1 = var_46;
[L281]              SORT_1 var_47 = var_47_arg_0 == var_47_arg_1;
[L282]              SORT_19 var_41_arg_0 = var_40;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L283]  EXPR        var_41_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L283]              var_41_arg_0 = var_41_arg_0 & mask_SORT_19
[L284]              SORT_13 var_41 = var_41_arg_0;
[L285]              SORT_13 var_42_arg_0 = var_14;
[L286]              SORT_13 var_42_arg_1 = var_41;
[L287]              SORT_1 var_42 = var_42_arg_0 == var_42_arg_1;
[L288]              SORT_19 var_36_arg_0 = var_35;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L289]  EXPR        var_36_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L289]              var_36_arg_0 = var_36_arg_0 & mask_SORT_19
[L290]              SORT_13 var_36 = var_36_arg_0;
[L291]              SORT_13 var_37_arg_0 = var_14;
[L292]              SORT_13 var_37_arg_1 = var_36;
[L293]              SORT_1 var_37 = var_37_arg_0 == var_37_arg_1;
[L294]              SORT_19 var_31_arg_0 = var_30;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=1, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L295]  EXPR        var_31_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=1, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L295]              var_31_arg_0 = var_31_arg_0 & mask_SORT_19
[L296]              SORT_13 var_31 = var_31_arg_0;
[L297]              SORT_13 var_32_arg_0 = var_14;
[L298]              SORT_13 var_32_arg_1 = var_31;
[L299]              SORT_1 var_32 = var_32_arg_0 == var_32_arg_1;
[L300]              SORT_19 var_26_arg_0 = var_25;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L301]  EXPR        var_26_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L301]              var_26_arg_0 = var_26_arg_0 & mask_SORT_19
[L302]              SORT_13 var_26 = var_26_arg_0;
[L303]              SORT_13 var_27_arg_0 = var_14;
[L304]              SORT_13 var_27_arg_1 = var_26;
[L305]              SORT_1 var_27 = var_27_arg_0 == var_27_arg_1;
[L306]              SORT_19 var_21_arg_0 = var_20;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L307]  EXPR        var_21_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=1, var_45=10, var_47=1, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L307]              var_21_arg_0 = var_21_arg_0 & mask_SORT_19
[L308]              SORT_13 var_21 = var_21_arg_0;
[L309]              SORT_13 var_22_arg_0 = var_14;
[L310]              SORT_13 var_22_arg_1 = var_21;
[L311]              SORT_1 var_22 = var_22_arg_0 == var_22_arg_1;
[L312]              SORT_13 var_16_arg_0 = var_14;
[L313]              SORT_13 var_16_arg_1 = var_15;
[L314]              SORT_1 var_16 = var_16_arg_0 == var_16_arg_1;
[L315]              SORT_1 var_17_arg_0 = var_16;
[L316]              SORT_3 var_17_arg_1 = state_10;
[L317]              SORT_3 var_17_arg_2 = input_9;
[L318]              SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2;
[L319]              SORT_1 var_23_arg_0 = var_22;
[L320]              SORT_3 var_23_arg_1 = state_18;
[L321]              SORT_3 var_23_arg_2 = var_17;
[L322]              SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2;
[L323]              SORT_1 var_28_arg_0 = var_27;
[L324]              SORT_3 var_28_arg_1 = state_24;
[L325]              SORT_3 var_28_arg_2 = var_23;
[L326]              SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2;
[L327]              SORT_1 var_33_arg_0 = var_32;
[L328]              SORT_3 var_33_arg_1 = state_29;
[L329]              SORT_3 var_33_arg_2 = var_28;
[L330]              SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2;
[L331]              SORT_1 var_38_arg_0 = var_37;
[L332]              SORT_3 var_38_arg_1 = state_34;
[L333]              SORT_3 var_38_arg_2 = var_33;
[L334]              SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2;
[L335]              SORT_1 var_43_arg_0 = var_42;
[L336]              SORT_3 var_43_arg_1 = state_39;
[L337]              SORT_3 var_43_arg_2 = var_38;
[L338]              SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2;
[L339]              SORT_1 var_48_arg_0 = var_47;
[L340]              SORT_3 var_48_arg_1 = state_44;
[L341]              SORT_3 var_48_arg_2 = var_43;
[L342]              SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2;
[L343]              SORT_1 var_53_arg_0 = var_52;
[L344]              SORT_3 var_53_arg_1 = state_49;
[L345]              SORT_3 var_53_arg_2 = var_48;
[L346]              SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2;
[L347]              SORT_1 var_58_arg_0 = var_57;
[L348]              SORT_3 var_58_arg_1 = state_54;
[L349]              SORT_3 var_58_arg_2 = var_53;
[L350]              SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2;
[L351]              SORT_1 var_64_arg_0 = var_63;
[L352]              SORT_3 var_64_arg_1 = state_59;
[L353]              SORT_3 var_64_arg_2 = var_58;
[L354]              SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2;
[L355]              SORT_1 var_69_arg_0 = var_68;
[L356]              SORT_3 var_69_arg_1 = state_65;
[L357]              SORT_3 var_69_arg_2 = var_64;
[L358]              SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2;
[L359]              SORT_1 var_74_arg_0 = var_73;
[L360]              SORT_3 var_74_arg_1 = state_70;
[L361]              SORT_3 var_74_arg_2 = var_69;
[L362]              SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2;
[L363]              SORT_1 var_79_arg_0 = var_78;
[L364]              SORT_3 var_79_arg_1 = state_75;
[L365]              SORT_3 var_79_arg_2 = var_74;
[L366]              SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2;
[L367]              SORT_1 var_85_arg_0 = var_84;
[L368]              SORT_3 var_85_arg_1 = state_80;
[L369]              SORT_3 var_85_arg_2 = var_79;
[L370]              SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2;
[L371]              SORT_1 var_90_arg_0 = var_89;
[L372]              SORT_3 var_90_arg_1 = state_86;
[L373]              SORT_3 var_90_arg_2 = var_85;
[L374]              SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2;
[L375]              SORT_1 var_95_arg_0 = var_94;
[L376]              SORT_3 var_95_arg_1 = state_91;
[L377]              SORT_3 var_95_arg_2 = var_90;
[L378]              SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2;
[L379]              SORT_1 var_99_arg_0 = var_98;
[L380]              SORT_3 var_99_arg_1 = state_96;
[L381]              SORT_3 var_99_arg_2 = var_95;
[L382]              SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=0]
[L383]  EXPR        var_99 & mask_SORT_3
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L383]              var_99 = var_99 & mask_SORT_3
[L384]              SORT_3 var_129_arg_0 = state_128;
[L385]              SORT_3 var_129_arg_1 = var_99;
[L386]              SORT_1 var_129 = var_129_arg_0 == var_129_arg_1;
[L387]              SORT_1 var_130_arg_0 = var_127;
[L388]              SORT_1 var_130_arg_1 = var_129;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L389]  EXPR        var_130_arg_0 | var_130_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L389]              SORT_1 var_130 = var_130_arg_0 | var_130_arg_1;
[L390]              SORT_1 var_151_arg_0 = state_132;
[L391]              SORT_1 var_151_arg_1 = input_150;
[L392]              SORT_1 var_151_arg_2 = var_130;
[L393]              SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2;
[L394]              SORT_1 var_154_arg_0 = var_151;
[L395]              SORT_1 var_154 = ~var_154_arg_0;
[L396]              SORT_1 var_155_arg_0 = var_153;
[L397]              SORT_1 var_155_arg_1 = var_154;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=0, var_155_arg_1=-256, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L398]  EXPR        var_155_arg_0 & var_155_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L398]              SORT_1 var_155 = var_155_arg_0 & var_155_arg_1;
[L399]  EXPR        var_155 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L399]              var_155 = var_155 & mask_SORT_1
[L400]              SORT_1 bad_156_arg_0 = var_155;
[L401]  CALL        __VERIFIER_assert(!(bad_156_arg_0))
[L21]   COND FALSE  !(!(cond))
[L401]  RET         __VERIFIER_assert(!(bad_156_arg_0))
[L403]              SORT_11 var_186_arg_0 = state_185;
[L404]              SORT_13 var_186 = var_186_arg_0 >> 0;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L405]  EXPR        var_186 & mask_SORT_13
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L405]              var_186 = var_186 & mask_SORT_13
[L406]              SORT_13 var_236_arg_0 = var_186;
[L407]              SORT_13 var_236_arg_1 = var_15;
[L408]              SORT_1 var_236 = var_236_arg_0 == var_236_arg_1;
[L409]              SORT_1 var_237_arg_0 = input_6;
[L410]              SORT_1 var_237_arg_1 = var_236;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_237_arg_0=0, var_237_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L411]  EXPR        var_237_arg_0 & var_237_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L411]              SORT_1 var_237 = var_237_arg_0 & var_237_arg_1;
[L412]  EXPR        var_237 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L412]              var_237 = var_237 & mask_SORT_1
[L413]              SORT_1 var_372_arg_0 = var_237;
[L414]              SORT_3 var_372_arg_1 = input_4;
[L415]              SORT_3 var_372_arg_2 = state_10;
[L416]              SORT_3 var_372 = var_372_arg_0 ? var_372_arg_1 : var_372_arg_2;
[L417]              SORT_1 var_374_arg_0 = input_7;
[L418]              SORT_3 var_374_arg_1 = var_373;
[L419]              SORT_3 var_374_arg_2 = var_372;
[L420]              SORT_3 var_374 = var_374_arg_0 ? var_374_arg_1 : var_374_arg_2;
[L421]              SORT_3 next_375_arg_1 = var_374;
[L422]              SORT_1 var_160_arg_0 = input_6;
[L423]              SORT_1 var_160_arg_1 = input_5;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_160_arg_0=0, var_160_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L424]  EXPR        var_160_arg_0 | var_160_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L424]              SORT_1 var_160 = var_160_arg_0 | var_160_arg_1;
[L425]              SORT_1 var_161_arg_0 = var_160;
[L426]              SORT_1 var_161_arg_1 = input_7;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161_arg_0=0, var_161_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L427]  EXPR        var_161_arg_0 | var_161_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L427]              SORT_1 var_161 = var_161_arg_0 | var_161_arg_1;
[L428]  EXPR        var_161 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L428]              var_161 = var_161 & mask_SORT_1
[L429]              SORT_1 var_303_arg_0 = input_5;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_303_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L430]  EXPR        var_303_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L430]              var_303_arg_0 = var_303_arg_0 & mask_SORT_1
[L431]              SORT_11 var_303 = var_303_arg_0;
[L432]              SORT_11 var_304_arg_0 = state_12;
[L433]              SORT_11 var_304_arg_1 = var_303;
[L434]              SORT_11 var_304 = var_304_arg_0 + var_304_arg_1;
[L435]              SORT_1 var_376_arg_0 = var_161;
[L436]              SORT_11 var_376_arg_1 = var_304;
[L437]              SORT_11 var_376_arg_2 = state_12;
[L438]              SORT_11 var_376 = var_376_arg_0 ? var_376_arg_1 : var_376_arg_2;
[L439]              SORT_1 var_377_arg_0 = input_7;
[L440]              SORT_11 var_377_arg_1 = var_122;
[L441]              SORT_11 var_377_arg_2 = var_376;
[L442]              SORT_11 var_377 = var_377_arg_0 ? var_377_arg_1 : var_377_arg_2;
[L443]              SORT_11 next_378_arg_1 = var_377;
[L444]              SORT_19 var_229_arg_0 = var_20;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_229_arg_0=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L445]  EXPR        var_229_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L445]              var_229_arg_0 = var_229_arg_0 & mask_SORT_19
[L446]              SORT_13 var_229 = var_229_arg_0;
[L447]              SORT_13 var_230_arg_0 = var_186;
[L448]              SORT_13 var_230_arg_1 = var_229;
[L449]              SORT_1 var_230 = var_230_arg_0 == var_230_arg_1;
[L450]              SORT_1 var_231_arg_0 = input_6;
[L451]              SORT_1 var_231_arg_1 = var_230;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_231_arg_0=0, var_231_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L452]  EXPR        var_231_arg_0 & var_231_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L452]              SORT_1 var_231 = var_231_arg_0 & var_231_arg_1;
[L453]  EXPR        var_231 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L453]              var_231 = var_231 & mask_SORT_1
[L454]              SORT_1 var_379_arg_0 = var_231;
[L455]              SORT_3 var_379_arg_1 = input_4;
[L456]              SORT_3 var_379_arg_2 = state_18;
[L457]              SORT_3 var_379 = var_379_arg_0 ? var_379_arg_1 : var_379_arg_2;
[L458]              SORT_1 var_380_arg_0 = input_7;
[L459]              SORT_3 var_380_arg_1 = var_373;
[L460]              SORT_3 var_380_arg_2 = var_379;
[L461]              SORT_3 var_380 = var_380_arg_0 ? var_380_arg_1 : var_380_arg_2;
[L462]              SORT_3 next_381_arg_1 = var_380;
[L463]              SORT_19 var_222_arg_0 = var_25;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_222_arg_0=14, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L464]  EXPR        var_222_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L464]              var_222_arg_0 = var_222_arg_0 & mask_SORT_19
[L465]              SORT_13 var_222 = var_222_arg_0;
[L466]              SORT_13 var_223_arg_0 = var_186;
[L467]              SORT_13 var_223_arg_1 = var_222;
[L468]              SORT_1 var_223 = var_223_arg_0 == var_223_arg_1;
[L469]              SORT_1 var_224_arg_0 = input_6;
[L470]              SORT_1 var_224_arg_1 = var_223;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_224_arg_0=0, var_224_arg_1=1, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L471]  EXPR        var_224_arg_0 & var_224_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L471]              SORT_1 var_224 = var_224_arg_0 & var_224_arg_1;
[L472]  EXPR        var_224 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L472]              var_224 = var_224 & mask_SORT_1
[L473]              SORT_1 var_382_arg_0 = var_224;
[L474]              SORT_3 var_382_arg_1 = input_4;
[L475]              SORT_3 var_382_arg_2 = state_24;
[L476]              SORT_3 var_382 = var_382_arg_0 ? var_382_arg_1 : var_382_arg_2;
[L477]              SORT_1 var_383_arg_0 = input_7;
[L478]              SORT_3 var_383_arg_1 = var_373;
[L479]              SORT_3 var_383_arg_2 = var_382;
[L480]              SORT_3 var_383 = var_383_arg_0 ? var_383_arg_1 : var_383_arg_2;
[L481]              SORT_3 next_384_arg_1 = var_383;
[L482]              SORT_19 var_215_arg_0 = var_30;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_215_arg_0=13, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L483]  EXPR        var_215_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L483]              var_215_arg_0 = var_215_arg_0 & mask_SORT_19
[L484]              SORT_13 var_215 = var_215_arg_0;
[L485]              SORT_13 var_216_arg_0 = var_186;
[L486]              SORT_13 var_216_arg_1 = var_215;
[L487]              SORT_1 var_216 = var_216_arg_0 == var_216_arg_1;
[L488]              SORT_1 var_217_arg_0 = input_6;
[L489]              SORT_1 var_217_arg_1 = var_216;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_217_arg_0=0, var_217_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L490]  EXPR        var_217_arg_0 & var_217_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L490]              SORT_1 var_217 = var_217_arg_0 & var_217_arg_1;
[L491]  EXPR        var_217 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L491]              var_217 = var_217 & mask_SORT_1
[L492]              SORT_1 var_385_arg_0 = var_217;
[L493]              SORT_3 var_385_arg_1 = input_4;
[L494]              SORT_3 var_385_arg_2 = state_29;
[L495]              SORT_3 var_385 = var_385_arg_0 ? var_385_arg_1 : var_385_arg_2;
[L496]              SORT_1 var_386_arg_0 = input_7;
[L497]              SORT_3 var_386_arg_1 = var_373;
[L498]              SORT_3 var_386_arg_2 = var_385;
[L499]              SORT_3 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2;
[L500]              SORT_3 next_387_arg_1 = var_386;
[L501]              SORT_19 var_208_arg_0 = var_35;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_208_arg_0=12, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L502]  EXPR        var_208_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L502]              var_208_arg_0 = var_208_arg_0 & mask_SORT_19
[L503]              SORT_13 var_208 = var_208_arg_0;
[L504]              SORT_13 var_209_arg_0 = var_186;
[L505]              SORT_13 var_209_arg_1 = var_208;
[L506]              SORT_1 var_209 = var_209_arg_0 == var_209_arg_1;
[L507]              SORT_1 var_210_arg_0 = input_6;
[L508]              SORT_1 var_210_arg_1 = var_209;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_210_arg_0=0, var_210_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L509]  EXPR        var_210_arg_0 & var_210_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L509]              SORT_1 var_210 = var_210_arg_0 & var_210_arg_1;
[L510]  EXPR        var_210 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L510]              var_210 = var_210 & mask_SORT_1
[L511]              SORT_1 var_388_arg_0 = var_210;
[L512]              SORT_3 var_388_arg_1 = input_4;
[L513]              SORT_3 var_388_arg_2 = state_34;
[L514]              SORT_3 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2;
[L515]              SORT_1 var_389_arg_0 = input_7;
[L516]              SORT_3 var_389_arg_1 = var_373;
[L517]              SORT_3 var_389_arg_2 = var_388;
[L518]              SORT_3 var_389 = var_389_arg_0 ? var_389_arg_1 : var_389_arg_2;
[L519]              SORT_3 next_390_arg_1 = var_389;
[L520]              SORT_19 var_201_arg_0 = var_40;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_201_arg_0=11, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L521]  EXPR        var_201_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L521]              var_201_arg_0 = var_201_arg_0 & mask_SORT_19
[L522]              SORT_13 var_201 = var_201_arg_0;
[L523]              SORT_13 var_202_arg_0 = var_186;
[L524]              SORT_13 var_202_arg_1 = var_201;
[L525]              SORT_1 var_202 = var_202_arg_0 == var_202_arg_1;
[L526]              SORT_1 var_203_arg_0 = input_6;
[L527]              SORT_1 var_203_arg_1 = var_202;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_203_arg_0=0, var_203_arg_1=1, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L528]  EXPR        var_203_arg_0 & var_203_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L528]              SORT_1 var_203 = var_203_arg_0 & var_203_arg_1;
[L529]  EXPR        var_203 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L529]              var_203 = var_203 & mask_SORT_1
[L530]              SORT_1 var_391_arg_0 = var_203;
[L531]              SORT_3 var_391_arg_1 = input_4;
[L532]              SORT_3 var_391_arg_2 = state_39;
[L533]              SORT_3 var_391 = var_391_arg_0 ? var_391_arg_1 : var_391_arg_2;
[L534]              SORT_1 var_392_arg_0 = input_7;
[L535]              SORT_3 var_392_arg_1 = var_373;
[L536]              SORT_3 var_392_arg_2 = var_391;
[L537]              SORT_3 var_392 = var_392_arg_0 ? var_392_arg_1 : var_392_arg_2;
[L538]              SORT_3 next_393_arg_1 = var_392;
[L539]              SORT_19 var_194_arg_0 = var_45;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_194_arg_0=10, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L540]  EXPR        var_194_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L540]              var_194_arg_0 = var_194_arg_0 & mask_SORT_19
[L541]              SORT_13 var_194 = var_194_arg_0;
[L542]              SORT_13 var_195_arg_0 = var_186;
[L543]              SORT_13 var_195_arg_1 = var_194;
[L544]              SORT_1 var_195 = var_195_arg_0 == var_195_arg_1;
[L545]              SORT_1 var_196_arg_0 = input_6;
[L546]              SORT_1 var_196_arg_1 = var_195;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_196_arg_0=0, var_196_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L547]  EXPR        var_196_arg_0 & var_196_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L547]              SORT_1 var_196 = var_196_arg_0 & var_196_arg_1;
[L548]  EXPR        var_196 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L548]              var_196 = var_196 & mask_SORT_1
[L549]              SORT_1 var_394_arg_0 = var_196;
[L550]              SORT_3 var_394_arg_1 = input_4;
[L551]              SORT_3 var_394_arg_2 = state_44;
[L552]              SORT_3 var_394 = var_394_arg_0 ? var_394_arg_1 : var_394_arg_2;
[L553]              SORT_1 var_395_arg_0 = input_7;
[L554]              SORT_3 var_395_arg_1 = var_373;
[L555]              SORT_3 var_395_arg_2 = var_394;
[L556]              SORT_3 var_395 = var_395_arg_0 ? var_395_arg_1 : var_395_arg_2;
[L557]              SORT_3 next_396_arg_1 = var_395;
[L558]              SORT_19 var_298_arg_0 = var_50;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_298_arg_0=9, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L559]  EXPR        var_298_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L559]              var_298_arg_0 = var_298_arg_0 & mask_SORT_19
[L560]              SORT_13 var_298 = var_298_arg_0;
[L561]              SORT_13 var_299_arg_0 = var_186;
[L562]              SORT_13 var_299_arg_1 = var_298;
[L563]              SORT_1 var_299 = var_299_arg_0 == var_299_arg_1;
[L564]              SORT_1 var_300_arg_0 = input_6;
[L565]              SORT_1 var_300_arg_1 = var_299;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_300_arg_0=0, var_300_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L566]  EXPR        var_300_arg_0 & var_300_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L566]              SORT_1 var_300 = var_300_arg_0 & var_300_arg_1;
[L567]  EXPR        var_300 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L567]              var_300 = var_300 & mask_SORT_1
[L568]              SORT_1 var_397_arg_0 = var_300;
[L569]              SORT_3 var_397_arg_1 = input_4;
[L570]              SORT_3 var_397_arg_2 = state_49;
[L571]              SORT_3 var_397 = var_397_arg_0 ? var_397_arg_1 : var_397_arg_2;
[L572]              SORT_1 var_398_arg_0 = input_7;
[L573]              SORT_3 var_398_arg_1 = var_373;
[L574]              SORT_3 var_398_arg_2 = var_397;
[L575]              SORT_3 var_398 = var_398_arg_0 ? var_398_arg_1 : var_398_arg_2;
[L576]              SORT_3 next_399_arg_1 = var_398;
[L577]              SORT_19 var_291_arg_0 = var_55;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_291_arg_0=8, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L578]  EXPR        var_291_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L578]              var_291_arg_0 = var_291_arg_0 & mask_SORT_19
[L579]              SORT_13 var_291 = var_291_arg_0;
[L580]              SORT_13 var_292_arg_0 = var_186;
[L581]              SORT_13 var_292_arg_1 = var_291;
[L582]              SORT_1 var_292 = var_292_arg_0 == var_292_arg_1;
[L583]              SORT_1 var_293_arg_0 = input_6;
[L584]              SORT_1 var_293_arg_1 = var_292;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_293_arg_0=0, var_293_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L585]  EXPR        var_293_arg_0 & var_293_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L585]              SORT_1 var_293 = var_293_arg_0 & var_293_arg_1;
[L586]  EXPR        var_293 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L586]              var_293 = var_293 & mask_SORT_1
[L587]              SORT_1 var_400_arg_0 = var_293;
[L588]              SORT_3 var_400_arg_1 = input_4;
[L589]              SORT_3 var_400_arg_2 = state_54;
[L590]              SORT_3 var_400 = var_400_arg_0 ? var_400_arg_1 : var_400_arg_2;
[L591]              SORT_1 var_401_arg_0 = input_7;
[L592]              SORT_3 var_401_arg_1 = var_373;
[L593]              SORT_3 var_401_arg_2 = var_400;
[L594]              SORT_3 var_401 = var_401_arg_0 ? var_401_arg_1 : var_401_arg_2;
[L595]              SORT_3 next_402_arg_1 = var_401;
[L596]              SORT_60 var_284_arg_0 = var_61;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_284_arg_0=7, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L597]  EXPR        var_284_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L597]              var_284_arg_0 = var_284_arg_0 & mask_SORT_60
[L598]              SORT_13 var_284 = var_284_arg_0;
[L599]              SORT_13 var_285_arg_0 = var_186;
[L600]              SORT_13 var_285_arg_1 = var_284;
[L601]              SORT_1 var_285 = var_285_arg_0 == var_285_arg_1;
[L602]              SORT_1 var_286_arg_0 = input_6;
[L603]              SORT_1 var_286_arg_1 = var_285;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_286_arg_0=0, var_286_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L604]  EXPR        var_286_arg_0 & var_286_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L604]              SORT_1 var_286 = var_286_arg_0 & var_286_arg_1;
[L605]  EXPR        var_286 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L605]              var_286 = var_286 & mask_SORT_1
[L606]              SORT_1 var_403_arg_0 = var_286;
[L607]              SORT_3 var_403_arg_1 = input_4;
[L608]              SORT_3 var_403_arg_2 = state_59;
[L609]              SORT_3 var_403 = var_403_arg_0 ? var_403_arg_1 : var_403_arg_2;
[L610]              SORT_1 var_404_arg_0 = input_7;
[L611]              SORT_3 var_404_arg_1 = var_373;
[L612]              SORT_3 var_404_arg_2 = var_403;
[L613]              SORT_3 var_404 = var_404_arg_0 ? var_404_arg_1 : var_404_arg_2;
[L614]              SORT_3 next_405_arg_1 = var_404;
[L615]              SORT_60 var_277_arg_0 = var_66;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_277_arg_0=6, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L616]  EXPR        var_277_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L616]              var_277_arg_0 = var_277_arg_0 & mask_SORT_60
[L617]              SORT_13 var_277 = var_277_arg_0;
[L618]              SORT_13 var_278_arg_0 = var_186;
[L619]              SORT_13 var_278_arg_1 = var_277;
[L620]              SORT_1 var_278 = var_278_arg_0 == var_278_arg_1;
[L621]              SORT_1 var_279_arg_0 = input_6;
[L622]              SORT_1 var_279_arg_1 = var_278;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_279_arg_0=0, var_279_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L623]  EXPR        var_279_arg_0 & var_279_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L623]              SORT_1 var_279 = var_279_arg_0 & var_279_arg_1;
[L624]  EXPR        var_279 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L624]              var_279 = var_279 & mask_SORT_1
[L625]              SORT_1 var_406_arg_0 = var_279;
[L626]              SORT_3 var_406_arg_1 = input_4;
[L627]              SORT_3 var_406_arg_2 = state_65;
[L628]              SORT_3 var_406 = var_406_arg_0 ? var_406_arg_1 : var_406_arg_2;
[L629]              SORT_1 var_407_arg_0 = input_7;
[L630]              SORT_3 var_407_arg_1 = var_373;
[L631]              SORT_3 var_407_arg_2 = var_406;
[L632]              SORT_3 var_407 = var_407_arg_0 ? var_407_arg_1 : var_407_arg_2;
[L633]              SORT_3 next_408_arg_1 = var_407;
[L634]              SORT_60 var_270_arg_0 = var_71;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_270_arg_0=5, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L635]  EXPR        var_270_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L635]              var_270_arg_0 = var_270_arg_0 & mask_SORT_60
[L636]              SORT_13 var_270 = var_270_arg_0;
[L637]              SORT_13 var_271_arg_0 = var_186;
[L638]              SORT_13 var_271_arg_1 = var_270;
[L639]              SORT_1 var_271 = var_271_arg_0 == var_271_arg_1;
[L640]              SORT_1 var_272_arg_0 = input_6;
[L641]              SORT_1 var_272_arg_1 = var_271;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_272_arg_0=0, var_272_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L642]  EXPR        var_272_arg_0 & var_272_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L642]              SORT_1 var_272 = var_272_arg_0 & var_272_arg_1;
[L643]  EXPR        var_272 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L643]              var_272 = var_272 & mask_SORT_1
[L644]              SORT_1 var_409_arg_0 = var_272;
[L645]              SORT_3 var_409_arg_1 = input_4;
[L646]              SORT_3 var_409_arg_2 = state_70;
[L647]              SORT_3 var_409 = var_409_arg_0 ? var_409_arg_1 : var_409_arg_2;
[L648]              SORT_1 var_410_arg_0 = input_7;
[L649]              SORT_3 var_410_arg_1 = var_373;
[L650]              SORT_3 var_410_arg_2 = var_409;
[L651]              SORT_3 var_410 = var_410_arg_0 ? var_410_arg_1 : var_410_arg_2;
[L652]              SORT_3 next_411_arg_1 = var_410;
[L653]              SORT_60 var_263_arg_0 = var_76;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_263_arg_0=4, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L654]  EXPR        var_263_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L654]              var_263_arg_0 = var_263_arg_0 & mask_SORT_60
[L655]              SORT_13 var_263 = var_263_arg_0;
[L656]              SORT_13 var_264_arg_0 = var_186;
[L657]              SORT_13 var_264_arg_1 = var_263;
[L658]              SORT_1 var_264 = var_264_arg_0 == var_264_arg_1;
[L659]              SORT_1 var_265_arg_0 = input_6;
[L660]              SORT_1 var_265_arg_1 = var_264;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_265_arg_0=0, var_265_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L661]  EXPR        var_265_arg_0 & var_265_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L661]              SORT_1 var_265 = var_265_arg_0 & var_265_arg_1;
[L662]  EXPR        var_265 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L662]              var_265 = var_265 & mask_SORT_1
[L663]              SORT_1 var_412_arg_0 = var_265;
[L664]              SORT_3 var_412_arg_1 = input_4;
[L665]              SORT_3 var_412_arg_2 = state_75;
[L666]              SORT_3 var_412 = var_412_arg_0 ? var_412_arg_1 : var_412_arg_2;
[L667]              SORT_1 var_413_arg_0 = input_7;
[L668]              SORT_3 var_413_arg_1 = var_373;
[L669]              SORT_3 var_413_arg_2 = var_412;
[L670]              SORT_3 var_413 = var_413_arg_0 ? var_413_arg_1 : var_413_arg_2;
[L671]              SORT_3 next_414_arg_1 = var_413;
[L672]              SORT_81 var_256_arg_0 = var_82;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_256_arg_0=3, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L673]  EXPR        var_256_arg_0 & mask_SORT_81
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L673]              var_256_arg_0 = var_256_arg_0 & mask_SORT_81
[L674]              SORT_13 var_256 = var_256_arg_0;
[L675]              SORT_13 var_257_arg_0 = var_186;
[L676]              SORT_13 var_257_arg_1 = var_256;
[L677]              SORT_1 var_257 = var_257_arg_0 == var_257_arg_1;
[L678]              SORT_1 var_258_arg_0 = input_6;
[L679]              SORT_1 var_258_arg_1 = var_257;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_258_arg_0=0, var_258_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L680]  EXPR        var_258_arg_0 & var_258_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L680]              SORT_1 var_258 = var_258_arg_0 & var_258_arg_1;
[L681]  EXPR        var_258 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L681]              var_258 = var_258 & mask_SORT_1
[L682]              SORT_1 var_415_arg_0 = var_258;
[L683]              SORT_3 var_415_arg_1 = input_4;
[L684]              SORT_3 var_415_arg_2 = state_80;
[L685]              SORT_3 var_415 = var_415_arg_0 ? var_415_arg_1 : var_415_arg_2;
[L686]              SORT_1 var_416_arg_0 = input_7;
[L687]              SORT_3 var_416_arg_1 = var_373;
[L688]              SORT_3 var_416_arg_2 = var_415;
[L689]              SORT_3 var_416 = var_416_arg_0 ? var_416_arg_1 : var_416_arg_2;
[L690]              SORT_3 next_417_arg_1 = var_416;
[L691]              SORT_81 var_249_arg_0 = var_87;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_249_arg_0=2, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L692]  EXPR        var_249_arg_0 & mask_SORT_81
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L692]              var_249_arg_0 = var_249_arg_0 & mask_SORT_81
[L693]              SORT_13 var_249 = var_249_arg_0;
[L694]              SORT_13 var_250_arg_0 = var_186;
[L695]              SORT_13 var_250_arg_1 = var_249;
[L696]              SORT_1 var_250 = var_250_arg_0 == var_250_arg_1;
[L697]              SORT_1 var_251_arg_0 = input_6;
[L698]              SORT_1 var_251_arg_1 = var_250;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_251_arg_0=0, var_251_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L699]  EXPR        var_251_arg_0 & var_251_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L699]              SORT_1 var_251 = var_251_arg_0 & var_251_arg_1;
[L700]  EXPR        var_251 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L700]              var_251 = var_251 & mask_SORT_1
[L701]              SORT_1 var_418_arg_0 = var_251;
[L702]              SORT_3 var_418_arg_1 = input_4;
[L703]              SORT_3 var_418_arg_2 = state_86;
[L704]              SORT_3 var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2;
[L705]              SORT_1 var_419_arg_0 = input_7;
[L706]              SORT_3 var_419_arg_1 = var_373;
[L707]              SORT_3 var_419_arg_2 = var_418;
[L708]              SORT_3 var_419 = var_419_arg_0 ? var_419_arg_1 : var_419_arg_2;
[L709]              SORT_3 next_420_arg_1 = var_419;
[L710]              SORT_1 var_242_arg_0 = var_92;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_242_arg_0=1, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L711]  EXPR        var_242_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L711]              var_242_arg_0 = var_242_arg_0 & mask_SORT_1
[L712]              SORT_13 var_242 = var_242_arg_0;
[L713]              SORT_13 var_243_arg_0 = var_186;
[L714]              SORT_13 var_243_arg_1 = var_242;
[L715]              SORT_1 var_243 = var_243_arg_0 == var_243_arg_1;
[L716]              SORT_1 var_244_arg_0 = input_6;
[L717]              SORT_1 var_244_arg_1 = var_243;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_244_arg_0=0, var_244_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L718]  EXPR        var_244_arg_0 & var_244_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L718]              SORT_1 var_244 = var_244_arg_0 & var_244_arg_1;
[L719]  EXPR        var_244 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L719]              var_244 = var_244 & mask_SORT_1
[L720]              SORT_1 var_421_arg_0 = var_244;
[L721]              SORT_3 var_421_arg_1 = input_4;
[L722]              SORT_3 var_421_arg_2 = state_91;
[L723]              SORT_3 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2;
[L724]              SORT_1 var_422_arg_0 = input_7;
[L725]              SORT_3 var_422_arg_1 = var_373;
[L726]              SORT_3 var_422_arg_2 = var_421;
[L727]              SORT_3 var_422 = var_422_arg_0 ? var_422_arg_1 : var_422_arg_2;
[L728]              SORT_3 next_423_arg_1 = var_422;
[L729]              SORT_13 var_187_arg_0 = var_186;
[L730]              SORT_1 var_187 = var_187_arg_0 != 0;
[L731]              SORT_1 var_188_arg_0 = var_187;
[L732]              SORT_1 var_188 = ~var_188_arg_0;
[L733]              SORT_1 var_189_arg_0 = input_6;
[L734]              SORT_1 var_189_arg_1 = var_188;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_189_arg_0=0, var_189_arg_1=-1, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L735]  EXPR        var_189_arg_0 & var_189_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L735]              SORT_1 var_189 = var_189_arg_0 & var_189_arg_1;
[L736]  EXPR        var_189 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L736]              var_189 = var_189 & mask_SORT_1
[L737]              SORT_1 var_424_arg_0 = var_189;
[L738]              SORT_3 var_424_arg_1 = input_4;
[L739]              SORT_3 var_424_arg_2 = state_96;
[L740]              SORT_3 var_424 = var_424_arg_0 ? var_424_arg_1 : var_424_arg_2;
[L741]              SORT_1 var_425_arg_0 = input_7;
[L742]              SORT_3 var_425_arg_1 = var_373;
[L743]              SORT_3 var_425_arg_2 = var_424;
[L744]              SORT_3 var_425 = var_425_arg_0 ? var_425_arg_1 : var_425_arg_2;
[L745]              SORT_3 next_426_arg_1 = var_425;
[L746]              SORT_1 var_427_arg_0 = input_6;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_427_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L747]  EXPR        var_427_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L747]              var_427_arg_0 = var_427_arg_0 & mask_SORT_1
[L748]              SORT_11 var_427 = var_427_arg_0;
[L749]              SORT_11 var_428_arg_0 = state_101;
[L750]              SORT_11 var_428_arg_1 = var_427;
[L751]              SORT_11 var_428 = var_428_arg_0 + var_428_arg_1;
[L752]              SORT_1 var_429_arg_0 = input_5;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_429_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L753]  EXPR        var_429_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L753]              var_429_arg_0 = var_429_arg_0 & mask_SORT_1
[L754]              SORT_11 var_429 = var_429_arg_0;
[L755]              SORT_11 var_430_arg_0 = var_428;
[L756]              SORT_11 var_430_arg_1 = var_429;
[L757]              SORT_11 var_430 = var_430_arg_0 - var_430_arg_1;
[L758]              SORT_1 var_431_arg_0 = input_7;
[L759]              SORT_11 var_431_arg_1 = var_122;
[L760]              SORT_11 var_431_arg_2 = var_430;
[L761]              SORT_11 var_431 = var_431_arg_0 ? var_431_arg_1 : var_431_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_431=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L762]  EXPR        var_431 & mask_SORT_11
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L762]              var_431 = var_431 & mask_SORT_11
[L763]              SORT_11 next_432_arg_1 = var_431;
[L764]              SORT_1 var_333_arg_0 = state_109;
[L765]              SORT_1 var_333 = ~var_333_arg_0;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=-1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L766]  EXPR        var_333 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L766]              var_333 = var_333 & mask_SORT_1
[L767]              SORT_1 var_329_arg_0 = input_8;
[L768]              SORT_1 var_329_arg_1 = input_6;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329_arg_0=0, var_329_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L769]  EXPR        var_329_arg_0 & var_329_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L769]              SORT_1 var_329 = var_329_arg_0 & var_329_arg_1;
[L770]              SORT_1 var_330_arg_0 = state_109;
[L771]              SORT_1 var_330_arg_1 = var_329;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_330_arg_0=0, var_330_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L772]  EXPR        var_330_arg_0 | var_330_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L772]              SORT_1 var_330 = var_330_arg_0 | var_330_arg_1;
[L773]              SORT_1 var_433_arg_0 = var_333;
[L774]              SORT_1 var_433_arg_1 = var_330;
[L775]              SORT_1 var_433_arg_2 = state_109;
[L776]              SORT_1 var_433 = var_433_arg_0 ? var_433_arg_1 : var_433_arg_2;
[L777]              SORT_1 var_434_arg_0 = input_7;
[L778]              SORT_1 var_434_arg_1 = var_152;
[L779]              SORT_1 var_434_arg_2 = var_433;
[L780]              SORT_1 var_434 = var_434_arg_0 ? var_434_arg_1 : var_434_arg_2;
[L781]              SORT_1 next_435_arg_1 = var_434;
[L782]              SORT_1 var_341_arg_0 = var_126;
[L783]              SORT_1 var_341_arg_1 = state_110;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_341_arg_0=0, var_341_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L784]  EXPR        var_341_arg_0 | var_341_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L784]              SORT_1 var_341 = var_341_arg_0 | var_341_arg_1;
[L785]              SORT_1 var_436_arg_0 = var_92;
[L786]              SORT_1 var_436_arg_1 = var_341;
[L787]              SORT_1 var_436_arg_2 = state_110;
[L788]              SORT_1 var_436 = var_436_arg_0 ? var_436_arg_1 : var_436_arg_2;
[L789]              SORT_1 var_437_arg_0 = input_7;
[L790]              SORT_1 var_437_arg_1 = var_152;
[L791]              SORT_1 var_437_arg_2 = var_436;
[L792]              SORT_1 var_437 = var_437_arg_0 ? var_437_arg_1 : var_437_arg_2;
[L793]              SORT_1 next_438_arg_1 = var_437;
[L794]              SORT_1 var_353_arg_0 = input_6;
[L795]              SORT_1 var_353_arg_1 = input_5;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_353_arg_0=0, var_353_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L796]  EXPR        var_353_arg_0 | var_353_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L796]              SORT_1 var_353 = var_353_arg_0 | var_353_arg_1;
[L797]              SORT_1 var_354_arg_0 = var_353;
[L798]              SORT_1 var_354_arg_1 = input_7;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_354_arg_0=0, var_354_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L799]  EXPR        var_354_arg_0 | var_354_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L799]              SORT_1 var_354 = var_354_arg_0 | var_354_arg_1;
[L800]              SORT_1 var_355_arg_0 = var_354;
[L801]              SORT_1 var_355_arg_1 = state_109;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_355_arg_0=0, var_355_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L802]  EXPR        var_355_arg_0 | var_355_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L802]              SORT_1 var_355 = var_355_arg_0 | var_355_arg_1;
[L803]  EXPR        var_355 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L803]              var_355 = var_355 & mask_SORT_1
[L804]              SORT_1 var_439_arg_0 = var_355;
[L805]              SORT_11 var_439_arg_1 = var_123;
[L806]              SORT_11 var_439_arg_2 = state_113;
[L807]              SORT_11 var_439 = var_439_arg_0 ? var_439_arg_1 : var_439_arg_2;
[L808]              SORT_1 var_440_arg_0 = input_7;
[L809]              SORT_11 var_440_arg_1 = var_122;
[L810]              SORT_11 var_440_arg_2 = var_439;
[L811]              SORT_11 var_440 = var_440_arg_0 ? var_440_arg_1 : var_440_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_440=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L812]  EXPR        var_440 & mask_SORT_11
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L812]              var_440 = var_440 & mask_SORT_11
[L813]              SORT_11 next_441_arg_1 = var_440;
[L814]              SORT_1 var_338_arg_0 = var_329;
[L815]              SORT_1 var_338_arg_1 = var_333;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_338_arg_0=0, var_338_arg_1=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L816]  EXPR        var_338_arg_0 & var_338_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L816]              SORT_1 var_338 = var_338_arg_0 & var_338_arg_1;
[L817]  EXPR        var_338 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L817]              var_338 = var_338 & mask_SORT_1
[L818]              SORT_1 var_442_arg_0 = var_338;
[L819]              SORT_3 var_442_arg_1 = input_4;
[L820]              SORT_3 var_442_arg_2 = state_128;
[L821]              SORT_3 var_442 = var_442_arg_0 ? var_442_arg_1 : var_442_arg_2;
[L822]              SORT_1 var_443_arg_0 = input_7;
[L823]              SORT_3 var_443_arg_1 = var_373;
[L824]              SORT_3 var_443_arg_2 = var_442;
[L825]              SORT_3 var_443 = var_443_arg_0 ? var_443_arg_1 : var_443_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_443=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L826]  EXPR        var_443 & mask_SORT_3
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L826]              var_443 = var_443 & mask_SORT_3
[L827]              SORT_3 next_444_arg_1 = var_443;
[L828]              SORT_1 next_445_arg_1 = var_152;
[L829]              SORT_1 var_309_arg_0 = input_6;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_309_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L830]  EXPR        var_309_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L830]              var_309_arg_0 = var_309_arg_0 & mask_SORT_1
[L831]              SORT_11 var_309 = var_309_arg_0;
[L832]              SORT_11 var_310_arg_0 = state_185;
[L833]              SORT_11 var_310_arg_1 = var_309;
[L834]              SORT_11 var_310 = var_310_arg_0 + var_310_arg_1;
[L835]              SORT_1 var_446_arg_0 = var_161;
[L836]              SORT_11 var_446_arg_1 = var_310;
[L837]              SORT_11 var_446_arg_2 = state_185;
[L838]              SORT_11 var_446 = var_446_arg_0 ? var_446_arg_1 : var_446_arg_2;
[L839]              SORT_1 var_447_arg_0 = input_7;
[L840]              SORT_11 var_447_arg_1 = var_122;
[L841]              SORT_11 var_447_arg_2 = var_446;
[L842]              SORT_11 var_447 = var_447_arg_0 ? var_447_arg_1 : var_447_arg_2;
[L843]              SORT_11 next_448_arg_1 = var_447;
[L845]              state_10 = next_375_arg_1
[L846]              state_12 = next_378_arg_1
[L847]              state_18 = next_381_arg_1
[L848]              state_24 = next_384_arg_1
[L849]              state_29 = next_387_arg_1
[L850]              state_34 = next_390_arg_1
[L851]              state_39 = next_393_arg_1
[L852]              state_44 = next_396_arg_1
[L853]              state_49 = next_399_arg_1
[L854]              state_54 = next_402_arg_1
[L855]              state_59 = next_405_arg_1
[L856]              state_65 = next_408_arg_1
[L857]              state_70 = next_411_arg_1
[L858]              state_75 = next_414_arg_1
[L859]              state_80 = next_417_arg_1
[L860]              state_86 = next_420_arg_1
[L861]              state_91 = next_423_arg_1
[L862]              state_96 = next_426_arg_1
[L863]              state_101 = next_432_arg_1
[L864]              state_109 = next_435_arg_1
[L865]              state_110 = next_438_arg_1
[L866]              state_113 = next_441_arg_1
[L867]              state_128 = next_444_arg_1
[L868]              state_132 = next_445_arg_1
[L869]              state_185 = next_448_arg_1
[L107]              input_2 = __VERIFIER_nondet_uchar()
[L108]              input_4 = __VERIFIER_nondet_ulong()
[L109]              input_5 = __VERIFIER_nondet_uchar()
[L110]              input_6 = __VERIFIER_nondet_uchar()
[L111]              input_7 = __VERIFIER_nondet_uchar()
[L112]  EXPR        input_7 & mask_SORT_1
        VAL         [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L112]              input_7 = input_7 & mask_SORT_1
[L113]              input_8 = __VERIFIER_nondet_uchar()
[L114]              input_9 = __VERIFIER_nondet_ulong()
[L115]              input_150 = __VERIFIER_nondet_uchar()
[L117]              SORT_1 var_134_arg_0 = input_7;
[L118]              SORT_1 var_134_arg_1 = state_132;
[L119]              SORT_1 var_134 = var_134_arg_0 == var_134_arg_1;
[L120]              SORT_1 var_135_arg_0 = var_92;
[L121]              SORT_1 var_135 = ~var_135_arg_0;
[L122]              SORT_1 var_136_arg_0 = var_134;
[L123]              SORT_1 var_136_arg_1 = var_135;
        VAL         [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L124]  EXPR        var_136_arg_0 | var_136_arg_1
        VAL         [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L124]              SORT_1 var_136 = var_136_arg_0 | var_136_arg_1;
[L125]  EXPR        var_136 & mask_SORT_1
        VAL         [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L125]              var_136 = var_136 & mask_SORT_1
[L126]              SORT_1 constr_137_arg_0 = var_136;
        VAL         [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L127]  CALL        assume_abort_if_not(constr_137_arg_0)
        VAL         [\old(cond)=1]
[L22]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L127]  RET         assume_abort_if_not(constr_137_arg_0)
        VAL         [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L128]              SORT_13 var_106_arg_0 = var_105;
        VAL         [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L129]  EXPR        var_106_arg_0 & mask_SORT_13
        VAL         [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L129]              var_106_arg_0 = var_106_arg_0 & mask_SORT_13
[L130]              SORT_11 var_106 = var_106_arg_0;
[L131]              SORT_11 var_107_arg_0 = state_101;
[L132]              SORT_11 var_107_arg_1 = var_106;
[L133]              SORT_1 var_107 = var_107_arg_0 == var_107_arg_1;
[L134]              SORT_1 var_138_arg_0 = var_107;
[L135]              SORT_1 var_138 = ~var_138_arg_0;
[L136]              SORT_1 var_139_arg_0 = input_6;
[L137]              SORT_1 var_139 = ~var_139_arg_0;
[L138]              SORT_1 var_140_arg_0 = var_138;
[L139]              SORT_1 var_140_arg_1 = var_139;
        VAL         [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L140]  EXPR        var_140_arg_0 | var_140_arg_1
        VAL         [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L140]              SORT_1 var_140 = var_140_arg_0 | var_140_arg_1;
[L141]              SORT_1 var_141_arg_0 = var_92;
[L142]              SORT_1 var_141 = ~var_141_arg_0;
[L143]              SORT_1 var_142_arg_0 = var_140;
[L144]              SORT_1 var_142_arg_1 = var_141;
        VAL         [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L145]  EXPR        var_142_arg_0 | var_142_arg_1
        VAL         [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L145]              SORT_1 var_142 = var_142_arg_0 | var_142_arg_1;
[L146]  EXPR        var_142 & mask_SORT_1
        VAL         [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L146]              var_142 = var_142 & mask_SORT_1
[L147]              SORT_1 constr_143_arg_0 = var_142;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L148]  CALL        assume_abort_if_not(constr_143_arg_0)
        VAL         [\old(cond)=1]
[L22]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L148]  RET         assume_abort_if_not(constr_143_arg_0)
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L149]              SORT_11 var_102_arg_0 = state_101;
[L150]              SORT_1 var_102 = var_102_arg_0 != 0;
[L151]              SORT_1 var_103_arg_0 = var_102;
[L152]              SORT_1 var_103 = ~var_103_arg_0;
[L153]              SORT_1 var_144_arg_0 = var_103;
[L154]              SORT_1 var_144 = ~var_144_arg_0;
[L155]              SORT_1 var_145_arg_0 = input_5;
[L156]              SORT_1 var_145 = ~var_145_arg_0;
[L157]              SORT_1 var_146_arg_0 = var_144;
[L158]              SORT_1 var_146_arg_1 = var_145;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L159]  EXPR        var_146_arg_0 | var_146_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L159]              SORT_1 var_146 = var_146_arg_0 | var_146_arg_1;
[L160]              SORT_1 var_147_arg_0 = var_92;
[L161]              SORT_1 var_147 = ~var_147_arg_0;
[L162]              SORT_1 var_148_arg_0 = var_146;
[L163]              SORT_1 var_148_arg_1 = var_147;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=255, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L164]  EXPR        var_148_arg_0 | var_148_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L164]              SORT_1 var_148 = var_148_arg_0 | var_148_arg_1;
[L165]  EXPR        var_148 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L165]              var_148 = var_148 & mask_SORT_1
[L166]              SORT_1 constr_149_arg_0 = var_148;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L167]  CALL        assume_abort_if_not(constr_149_arg_0)
        VAL         [\old(cond)=1]
[L22]   COND FALSE  !(!cond)
        VAL         [\old(cond)=1]
[L167]  RET         assume_abort_if_not(constr_149_arg_0)
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L169]              SORT_1 var_153_arg_0 = state_132;
[L170]              SORT_1 var_153_arg_1 = var_152;
[L171]              SORT_1 var_153_arg_2 = var_92;
[L172]              SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2;
[L173]              SORT_1 var_111_arg_0 = state_110;
[L174]              SORT_1 var_111 = ~var_111_arg_0;
[L175]              SORT_1 var_112_arg_0 = state_109;
[L176]              SORT_1 var_112_arg_1 = var_111;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L177]  EXPR        var_112_arg_0 & var_112_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L177]              SORT_1 var_112 = var_112_arg_0 & var_112_arg_1;
[L178]              SORT_11 var_114_arg_0 = state_113;
[L179]              SORT_1 var_114 = var_114_arg_0 != 0;
[L180]              SORT_1 var_115_arg_0 = var_112;
[L181]              SORT_1 var_115_arg_1 = var_114;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L182]  EXPR        var_115_arg_0 & var_115_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L182]              SORT_1 var_115 = var_115_arg_0 & var_115_arg_1;
[L183]              SORT_1 var_116_arg_0 = state_109;
[L184]              SORT_1 var_116 = ~var_116_arg_0;
[L185]              SORT_1 var_117_arg_0 = input_6;
[L186]              SORT_1 var_117_arg_1 = var_116;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L187]  EXPR        var_117_arg_0 & var_117_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L187]              SORT_1 var_117 = var_117_arg_0 & var_117_arg_1;
[L188]              SORT_1 var_118_arg_0 = var_117;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L189]  EXPR        var_118_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L189]              var_118_arg_0 = var_118_arg_0 & mask_SORT_1
[L190]              SORT_11 var_118 = var_118_arg_0;
[L191]              SORT_11 var_119_arg_0 = state_113;
[L192]              SORT_11 var_119_arg_1 = var_118;
[L193]              SORT_11 var_119 = var_119_arg_0 + var_119_arg_1;
[L194]              SORT_1 var_120_arg_0 = input_5;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L195]  EXPR        var_120_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L195]              var_120_arg_0 = var_120_arg_0 & mask_SORT_1
[L196]              SORT_11 var_120 = var_120_arg_0;
[L197]              SORT_11 var_121_arg_0 = var_119;
[L198]              SORT_11 var_121_arg_1 = var_120;
[L199]              SORT_11 var_121 = var_121_arg_0 - var_121_arg_1;
[L200]              SORT_1 var_123_arg_0 = input_7;
[L201]              SORT_11 var_123_arg_1 = var_122;
[L202]              SORT_11 var_123_arg_2 = var_121;
[L203]              SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L204]  EXPR        var_123 & mask_SORT_11
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L204]              var_123 = var_123 & mask_SORT_11
[L205]              SORT_11 var_124_arg_0 = var_123;
[L206]              SORT_1 var_124 = var_124_arg_0 != 0;
[L207]              SORT_1 var_125_arg_0 = var_124;
[L208]              SORT_1 var_125 = ~var_125_arg_0;
[L209]              SORT_1 var_126_arg_0 = var_115;
[L210]              SORT_1 var_126_arg_1 = var_125;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L211]  EXPR        var_126_arg_0 & var_126_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L211]              SORT_1 var_126 = var_126_arg_0 & var_126_arg_1;
[L212]              SORT_1 var_127_arg_0 = var_126;
[L213]              SORT_1 var_127 = ~var_127_arg_0;
[L214]              SORT_11 var_14_arg_0 = state_12;
[L215]              SORT_13 var_14 = var_14_arg_0 >> 0;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L216]  EXPR        var_14 & mask_SORT_13
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L216]              var_14 = var_14 & mask_SORT_13
[L217]              SORT_13 var_97_arg_0 = var_14;
[L218]              SORT_1 var_97 = var_97_arg_0 != 0;
[L219]              SORT_1 var_98_arg_0 = var_97;
[L220]              SORT_1 var_98 = ~var_98_arg_0;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1]
[L221]  EXPR        var_98 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L221]              var_98 = var_98 & mask_SORT_1
[L222]              SORT_1 var_93_arg_0 = var_92;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=1]
[L223]  EXPR        var_93_arg_0 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=1]
[L223]              var_93_arg_0 = var_93_arg_0 & mask_SORT_1
[L224]              SORT_13 var_93 = var_93_arg_0;
[L225]              SORT_13 var_94_arg_0 = var_14;
[L226]              SORT_13 var_94_arg_1 = var_93;
[L227]              SORT_1 var_94 = var_94_arg_0 == var_94_arg_1;
[L228]              SORT_81 var_88_arg_0 = var_87;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=1]
[L229]  EXPR        var_88_arg_0 & mask_SORT_81
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=1]
[L229]              var_88_arg_0 = var_88_arg_0 & mask_SORT_81
[L230]              SORT_13 var_88 = var_88_arg_0;
[L231]              SORT_13 var_89_arg_0 = var_14;
[L232]              SORT_13 var_89_arg_1 = var_88;
[L233]              SORT_1 var_89 = var_89_arg_0 == var_89_arg_1;
[L234]              SORT_81 var_83_arg_0 = var_82;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L235]  EXPR        var_83_arg_0 & mask_SORT_81
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L235]              var_83_arg_0 = var_83_arg_0 & mask_SORT_81
[L236]              SORT_13 var_83 = var_83_arg_0;
[L237]              SORT_13 var_84_arg_0 = var_14;
[L238]              SORT_13 var_84_arg_1 = var_83;
[L239]              SORT_1 var_84 = var_84_arg_0 == var_84_arg_1;
[L240]              SORT_60 var_77_arg_0 = var_76;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L241]  EXPR        var_77_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L241]              var_77_arg_0 = var_77_arg_0 & mask_SORT_60
[L242]              SORT_13 var_77 = var_77_arg_0;
[L243]              SORT_13 var_78_arg_0 = var_14;
[L244]              SORT_13 var_78_arg_1 = var_77;
[L245]              SORT_1 var_78 = var_78_arg_0 == var_78_arg_1;
[L246]              SORT_60 var_72_arg_0 = var_71;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L247]  EXPR        var_72_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L247]              var_72_arg_0 = var_72_arg_0 & mask_SORT_60
[L248]              SORT_13 var_72 = var_72_arg_0;
[L249]              SORT_13 var_73_arg_0 = var_14;
[L250]              SORT_13 var_73_arg_1 = var_72;
[L251]              SORT_1 var_73 = var_73_arg_0 == var_73_arg_1;
[L252]              SORT_60 var_67_arg_0 = var_66;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L253]  EXPR        var_67_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L253]              var_67_arg_0 = var_67_arg_0 & mask_SORT_60
[L254]              SORT_13 var_67 = var_67_arg_0;
[L255]              SORT_13 var_68_arg_0 = var_14;
[L256]              SORT_13 var_68_arg_1 = var_67;
[L257]              SORT_1 var_68 = var_68_arg_0 == var_68_arg_1;
[L258]              SORT_60 var_62_arg_0 = var_61;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L259]  EXPR        var_62_arg_0 & mask_SORT_60
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L259]              var_62_arg_0 = var_62_arg_0 & mask_SORT_60
[L260]              SORT_13 var_62 = var_62_arg_0;
[L261]              SORT_13 var_63_arg_0 = var_14;
[L262]              SORT_13 var_63_arg_1 = var_62;
[L263]              SORT_1 var_63 = var_63_arg_0 == var_63_arg_1;
[L264]              SORT_19 var_56_arg_0 = var_55;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L265]  EXPR        var_56_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L265]              var_56_arg_0 = var_56_arg_0 & mask_SORT_19
[L266]              SORT_13 var_56 = var_56_arg_0;
[L267]              SORT_13 var_57_arg_0 = var_14;
[L268]              SORT_13 var_57_arg_1 = var_56;
[L269]              SORT_1 var_57 = var_57_arg_0 == var_57_arg_1;
[L270]              SORT_19 var_51_arg_0 = var_50;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L271]  EXPR        var_51_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L271]              var_51_arg_0 = var_51_arg_0 & mask_SORT_19
[L272]              SORT_13 var_51 = var_51_arg_0;
[L273]              SORT_13 var_52_arg_0 = var_14;
[L274]              SORT_13 var_52_arg_1 = var_51;
[L275]              SORT_1 var_52 = var_52_arg_0 == var_52_arg_1;
[L276]              SORT_19 var_46_arg_0 = var_45;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L277]  EXPR        var_46_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L277]              var_46_arg_0 = var_46_arg_0 & mask_SORT_19
[L278]              SORT_13 var_46 = var_46_arg_0;
[L279]              SORT_13 var_47_arg_0 = var_14;
[L280]              SORT_13 var_47_arg_1 = var_46;
[L281]              SORT_1 var_47 = var_47_arg_0 == var_47_arg_1;
[L282]              SORT_19 var_41_arg_0 = var_40;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L283]  EXPR        var_41_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L283]              var_41_arg_0 = var_41_arg_0 & mask_SORT_19
[L284]              SORT_13 var_41 = var_41_arg_0;
[L285]              SORT_13 var_42_arg_0 = var_14;
[L286]              SORT_13 var_42_arg_1 = var_41;
[L287]              SORT_1 var_42 = var_42_arg_0 == var_42_arg_1;
[L288]              SORT_19 var_36_arg_0 = var_35;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L289]  EXPR        var_36_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L289]              var_36_arg_0 = var_36_arg_0 & mask_SORT_19
[L290]              SORT_13 var_36 = var_36_arg_0;
[L291]              SORT_13 var_37_arg_0 = var_14;
[L292]              SORT_13 var_37_arg_1 = var_36;
[L293]              SORT_1 var_37 = var_37_arg_0 == var_37_arg_1;
[L294]              SORT_19 var_31_arg_0 = var_30;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L295]  EXPR        var_31_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L295]              var_31_arg_0 = var_31_arg_0 & mask_SORT_19
[L296]              SORT_13 var_31 = var_31_arg_0;
[L297]              SORT_13 var_32_arg_0 = var_14;
[L298]              SORT_13 var_32_arg_1 = var_31;
[L299]              SORT_1 var_32 = var_32_arg_0 == var_32_arg_1;
[L300]              SORT_19 var_26_arg_0 = var_25;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L301]  EXPR        var_26_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L301]              var_26_arg_0 = var_26_arg_0 & mask_SORT_19
[L302]              SORT_13 var_26 = var_26_arg_0;
[L303]              SORT_13 var_27_arg_0 = var_14;
[L304]              SORT_13 var_27_arg_1 = var_26;
[L305]              SORT_1 var_27 = var_27_arg_0 == var_27_arg_1;
[L306]              SORT_19 var_21_arg_0 = var_20;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L307]  EXPR        var_21_arg_0 & mask_SORT_19
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=1]
[L307]              var_21_arg_0 = var_21_arg_0 & mask_SORT_19
[L308]              SORT_13 var_21 = var_21_arg_0;
[L309]              SORT_13 var_22_arg_0 = var_14;
[L310]              SORT_13 var_22_arg_1 = var_21;
[L311]              SORT_1 var_22 = var_22_arg_0 == var_22_arg_1;
[L312]              SORT_13 var_16_arg_0 = var_14;
[L313]              SORT_13 var_16_arg_1 = var_15;
[L314]              SORT_1 var_16 = var_16_arg_0 == var_16_arg_1;
[L315]              SORT_1 var_17_arg_0 = var_16;
[L316]              SORT_3 var_17_arg_1 = state_10;
[L317]              SORT_3 var_17_arg_2 = input_9;
[L318]              SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2;
[L319]              SORT_1 var_23_arg_0 = var_22;
[L320]              SORT_3 var_23_arg_1 = state_18;
[L321]              SORT_3 var_23_arg_2 = var_17;
[L322]              SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2;
[L323]              SORT_1 var_28_arg_0 = var_27;
[L324]              SORT_3 var_28_arg_1 = state_24;
[L325]              SORT_3 var_28_arg_2 = var_23;
[L326]              SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2;
[L327]              SORT_1 var_33_arg_0 = var_32;
[L328]              SORT_3 var_33_arg_1 = state_29;
[L329]              SORT_3 var_33_arg_2 = var_28;
[L330]              SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2;
[L331]              SORT_1 var_38_arg_0 = var_37;
[L332]              SORT_3 var_38_arg_1 = state_34;
[L333]              SORT_3 var_38_arg_2 = var_33;
[L334]              SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2;
[L335]              SORT_1 var_43_arg_0 = var_42;
[L336]              SORT_3 var_43_arg_1 = state_39;
[L337]              SORT_3 var_43_arg_2 = var_38;
[L338]              SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2;
[L339]              SORT_1 var_48_arg_0 = var_47;
[L340]              SORT_3 var_48_arg_1 = state_44;
[L341]              SORT_3 var_48_arg_2 = var_43;
[L342]              SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2;
[L343]              SORT_1 var_53_arg_0 = var_52;
[L344]              SORT_3 var_53_arg_1 = state_49;
[L345]              SORT_3 var_53_arg_2 = var_48;
[L346]              SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2;
[L347]              SORT_1 var_58_arg_0 = var_57;
[L348]              SORT_3 var_58_arg_1 = state_54;
[L349]              SORT_3 var_58_arg_2 = var_53;
[L350]              SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2;
[L351]              SORT_1 var_64_arg_0 = var_63;
[L352]              SORT_3 var_64_arg_1 = state_59;
[L353]              SORT_3 var_64_arg_2 = var_58;
[L354]              SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2;
[L355]              SORT_1 var_69_arg_0 = var_68;
[L356]              SORT_3 var_69_arg_1 = state_65;
[L357]              SORT_3 var_69_arg_2 = var_64;
[L358]              SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2;
[L359]              SORT_1 var_74_arg_0 = var_73;
[L360]              SORT_3 var_74_arg_1 = state_70;
[L361]              SORT_3 var_74_arg_2 = var_69;
[L362]              SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2;
[L363]              SORT_1 var_79_arg_0 = var_78;
[L364]              SORT_3 var_79_arg_1 = state_75;
[L365]              SORT_3 var_79_arg_2 = var_74;
[L366]              SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2;
[L367]              SORT_1 var_85_arg_0 = var_84;
[L368]              SORT_3 var_85_arg_1 = state_80;
[L369]              SORT_3 var_85_arg_2 = var_79;
[L370]              SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2;
[L371]              SORT_1 var_90_arg_0 = var_89;
[L372]              SORT_3 var_90_arg_1 = state_86;
[L373]              SORT_3 var_90_arg_2 = var_85;
[L374]              SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2;
[L375]              SORT_1 var_95_arg_0 = var_94;
[L376]              SORT_3 var_95_arg_1 = state_91;
[L377]              SORT_3 var_95_arg_2 = var_90;
[L378]              SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2;
[L379]              SORT_1 var_99_arg_0 = var_98;
[L380]              SORT_3 var_99_arg_1 = state_96;
[L381]              SORT_3 var_99_arg_2 = var_95;
[L382]              SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=0]
[L383]  EXPR        var_99 & mask_SORT_3
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L383]              var_99 = var_99 & mask_SORT_3
[L384]              SORT_3 var_129_arg_0 = state_128;
[L385]              SORT_3 var_129_arg_1 = var_99;
[L386]              SORT_1 var_129 = var_129_arg_0 == var_129_arg_1;
[L387]              SORT_1 var_130_arg_0 = var_127;
[L388]              SORT_1 var_130_arg_1 = var_129;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L389]  EXPR        var_130_arg_0 | var_130_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L389]              SORT_1 var_130 = var_130_arg_0 | var_130_arg_1;
[L390]              SORT_1 var_151_arg_0 = state_132;
[L391]              SORT_1 var_151_arg_1 = input_150;
[L392]              SORT_1 var_151_arg_2 = var_130;
[L393]              SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2;
[L394]              SORT_1 var_154_arg_0 = var_151;
[L395]              SORT_1 var_154 = ~var_154_arg_0;
[L396]              SORT_1 var_155_arg_0 = var_153;
[L397]              SORT_1 var_155_arg_1 = var_154;
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=1, var_155_arg_1=-1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L398]  EXPR        var_155_arg_0 & var_155_arg_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L398]              SORT_1 var_155 = var_155_arg_0 & var_155_arg_1;
[L399]  EXPR        var_155 & mask_SORT_1
        VAL         [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1]
[L399]              var_155 = var_155 & mask_SORT_1
[L400]              SORT_1 bad_156_arg_0 = var_155;
[L401]  CALL        __VERIFIER_assert(!(bad_156_arg_0))
[L21]   COND TRUE   !(cond)
[L21]               reach_error()

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 2 procedures, 553 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 350.8s, OverallIterations: 89, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.4s, AutomataDifference: 75.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 90307 SdHoareTripleChecker+Valid, 54.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 90160 mSDsluCounter, 263172 SdHoareTripleChecker+Invalid, 46.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 195912 mSDsCounter, 220 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 61962 IncrementalHoareTripleChecker+Invalid, 62182 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 220 mSolverCounterUnsat, 67260 mSDtfsCounter, 61962 mSolverCounterSat, 1.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 8086 GetRequests, 7323 SyntacticMatches, 1 SemanticMatches, 762 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11287 ImplicationChecksByTransitivity, 23.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6483occurred in iteration=88, InterpolantAutomatonStates: 609, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.8s AutomataMinimizationTime, 88 MinimizatonAttempts, 20829 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 4.0s SsaConstructionTime, 90.4s SatisfiabilityAnalysisTime, 135.1s InterpolantComputationTime, 35946 NumberOfCodeBlocks, 35946 NumberOfCodeBlocksAsserted, 98 NumberOfCheckSat, 37327 ConstructedInterpolants, 1 QuantifiedInterpolants, 207963 SizeOfPredicates, 56 NumberOfNonLiveVariables, 26851 ConjunctsInSsa, 577 ConjunctsInUnsatCore, 101 InterpolantComputations, 85 PerfectInterpolantSequences, 11557/12143 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available
RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces
[2024-11-08 11:23:42,803 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Using bit-precise analysis
Retrying with bit-precise analysis

### Bit-precise run ###
Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119
--- Real Ultimate output ---
This is Ultimate 0.2.5-dev-a016563
[2024-11-08 11:23:45,600 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-11-08 11:23:45,718 INFO  L114        SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf
[2024-11-08 11:23:45,727 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-11-08 11:23:45,730 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-08 11:23:45,768 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-08 11:23:45,770 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-08 11:23:45,770 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-08 11:23:45,771 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-08 11:23:45,772 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-11-08 11:23:45,774 INFO  L151        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2024-11-08 11:23:45,774 INFO  L153        SettingsManager]:  * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2024-11-08 11:23:45,775 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-08 11:23:45,776 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-11-08 11:23:45,776 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-11-08 11:23:45,778 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-08 11:23:45,778 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2024-11-08 11:23:45,779 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-11-08 11:23:45,779 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2024-11-08 11:23:45,779 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2024-11-08 11:23:45,780 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2024-11-08 11:23:45,784 INFO  L153        SettingsManager]:  * Adapt memory model on pointer casts if necessary=true
[2024-11-08 11:23:45,784 INFO  L153        SettingsManager]:  * Use bitvectors instead of ints=true
[2024-11-08 11:23:45,785 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-11-08 11:23:45,785 INFO  L153        SettingsManager]:  * Memory model=HoenickeLindenmann_4ByteResolution
[2024-11-08 11:23:45,785 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-11-08 11:23:45,785 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-11-08 11:23:45,786 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-08 11:23:45,786 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-11-08 11:23:45,786 INFO  L153        SettingsManager]:  * Only consider context switches at boundaries of atomic blocks=true
[2024-11-08 11:23:45,787 INFO  L153        SettingsManager]:  * SMT solver=External_DefaultMode
[2024-11-08 11:23:45,787 INFO  L153        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 11:23:45,787 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-08 11:23:45,787 INFO  L153        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2024-11-08 11:23:45,789 INFO  L153        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopHeads
[2024-11-08 11:23:45,790 INFO  L153        SettingsManager]:  * Trace refinement strategy=FOX
[2024-11-08 11:23:45,791 INFO  L153        SettingsManager]:  * Command for external solver=cvc4 --incremental --print-success --lang smt 
[2024-11-08 11:23:45,791 INFO  L153        SettingsManager]:  * Apply one-shot large block encoding in concurrent analysis=false
[2024-11-08 11:23:45,792 INFO  L153        SettingsManager]:  * Automaton type used in concurrency analysis=PETRI_NET
[2024-11-08 11:23:45,792 INFO  L153        SettingsManager]:  * Order on configurations for Petri net unfoldings=DBO
[2024-11-08 11:23:45,793 INFO  L153        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2024-11-08 11:23:45,793 INFO  L153        SettingsManager]:  * Looper check in Petri net analysis=SEMANTIC
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119
[2024-11-08 11:23:46,282 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-08 11:23:46,322 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-08 11:23:46,325 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-08 11:23:46,327 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-11-08 11:23:46,328 INFO  L274        PluginConnector]: CDTParser initialized
[2024-11-08 11:23:46,329 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c
Unable to find full path for "g++"
[2024-11-08 11:23:48,748 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-11-08 11:23:49,094 INFO  L384              CDTParser]: Found 1 translation units.
[2024-11-08 11:23:49,094 INFO  L180              CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c
[2024-11-08 11:23:49,110 INFO  L427              CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data/913b3f2b1/4df4a13077a8414da3a2e991e1b24aaf/FLAG51ac76f99
[2024-11-08 11:23:49,342 INFO  L435              CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/data/913b3f2b1/4df4a13077a8414da3a2e991e1b24aaf
[2024-11-08 11:23:49,345 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-08 11:23:49,346 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-08 11:23:49,348 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-08 11:23:49,348 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-08 11:23:49,355 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-08 11:23:49,356 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 11:23:49" (1/1) ...
[2024-11-08 11:23:49,357 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@69ff9b83 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:49, skipping insertion in model container
[2024-11-08 11:23:49,358 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 11:23:49" (1/1) ...
[2024-11-08 11:23:49,419 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-11-08 11:23:49,668 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293]
[2024-11-08 11:23:50,038 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 11:23:50,053 INFO  L200         MainTranslator]: Completed pre-run
[2024-11-08 11:23:50,069 WARN  L250   ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293]
[2024-11-08 11:23:50,249 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-08 11:23:50,271 INFO  L204         MainTranslator]: Completed translation
[2024-11-08 11:23:50,272 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50 WrapperNode
[2024-11-08 11:23:50,272 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-08 11:23:50,273 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-08 11:23:50,273 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-08 11:23:50,274 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-08 11:23:50,283 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,316 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,386 INFO  L138                Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 914
[2024-11-08 11:23:50,386 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-08 11:23:50,387 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-08 11:23:50,387 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-08 11:23:50,387 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-11-08 11:23:50,401 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,401 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,412 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,439 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-08 11:23:50,440 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,440 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,466 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,471 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,477 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,482 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,496 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-08 11:23:50,497 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-08 11:23:50,497 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2024-11-08 11:23:50,497 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2024-11-08 11:23:50,498 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (1/1) ...
[2024-11-08 11:23:50,514 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000
[2024-11-08 11:23:50,536 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:23:50,557 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null)
[2024-11-08 11:23:50,560 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process
[2024-11-08 11:23:50,589 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-08 11:23:50,589 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0
[2024-11-08 11:23:50,589 INFO  L130     BoogieDeclarations]: Found specification of procedure assume_abort_if_not
[2024-11-08 11:23:50,590 INFO  L138     BoogieDeclarations]: Found implementation of procedure assume_abort_if_not
[2024-11-08 11:23:50,590 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-08 11:23:50,590 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-08 11:23:50,923 INFO  L238             CfgBuilder]: Building ICFG
[2024-11-08 11:23:50,930 INFO  L264             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-08 11:23:52,037 INFO  L?                        ?]: Removed 271 outVars from TransFormulas that were not future-live.
[2024-11-08 11:23:52,038 INFO  L287             CfgBuilder]: Performing block encoding
[2024-11-08 11:23:52,054 INFO  L311             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-08 11:23:52,055 INFO  L316             CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-08 11:23:52,056 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 11:23:52 BoogieIcfgContainer
[2024-11-08 11:23:52,056 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-08 11:23:52,061 INFO  L112        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2024-11-08 11:23:52,061 INFO  L270        PluginConnector]: Initializing TraceAbstraction...
[2024-11-08 11:23:52,065 INFO  L274        PluginConnector]: TraceAbstraction initialized
[2024-11-08 11:23:52,065 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 11:23:49" (1/3) ...
[2024-11-08 11:23:52,066 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@b119aa1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 11:23:52, skipping insertion in model container
[2024-11-08 11:23:52,067 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 11:23:50" (2/3) ...
[2024-11-08 11:23:52,068 INFO  L204        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@b119aa1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 11:23:52, skipping insertion in model container
[2024-11-08 11:23:52,070 INFO  L184        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 11:23:52" (3/3) ...
[2024-11-08 11:23:52,072 INFO  L112   eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c
[2024-11-08 11:23:52,096 INFO  L214   ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2024-11-08 11:23:52,097 INFO  L154   ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations.
[2024-11-08 11:23:52,188 INFO  L332      AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2024-11-08 11:23:52,199 INFO  L333      AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2d8cb3fc, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms]
[2024-11-08 11:23:52,199 INFO  L334      AbstractCegarLoop]: Starting to check reachability of 1 error locations.
[2024-11-08 11:23:52,206 INFO  L276                IsEmpty]: Start isEmpty. Operand  has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:23:52,219 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2024-11-08 11:23:52,220 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:23:52,221 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:23:52,223 INFO  L396      AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:23:52,229 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:23:52,231 INFO  L85        PathProgramCache]: Analyzing trace with hash -1169761190, now seen corresponding path program 1 times
[2024-11-08 11:23:52,252 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 11:23:52,252 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1244171434]
[2024-11-08 11:23:52,253 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:52,253 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:23:52,254 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:23:52,256 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:23:52,260 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-08 11:23:52,801 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:52,808 INFO  L255         TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 1 conjuncts are in the unsatisfiable core
[2024-11-08 11:23:52,821 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:23:52,852 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked.
[2024-11-08 11:23:52,852 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:23:52,853 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 11:23:52,853 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1244171434]
[2024-11-08 11:23:52,854 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1244171434] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:23:52,855 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-08 11:23:52,855 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2024-11-08 11:23:52,857 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [898032025]
[2024-11-08 11:23:52,858 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:23:52,863 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 2 states
[2024-11-08 11:23:52,864 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 11:23:52,897 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-08 11:23:52,897 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 11:23:52,900 INFO  L87              Difference]: Start difference. First operand  has 21 states, 15 states have (on average 1.3333333333333333) internal successors, (20), 16 states have internal predecessors, (20), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:23:52,922 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:23:52,922 INFO  L93              Difference]: Finished difference Result 36 states and 50 transitions.
[2024-11-08 11:23:52,926 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2024-11-08 11:23:52,927 INFO  L78                 Accepts]: Start accepts. Automaton has  has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 23
[2024-11-08 11:23:52,928 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:23:52,936 INFO  L225             Difference]: With dead ends: 36
[2024-11-08 11:23:52,936 INFO  L226             Difference]: Without dead ends: 17
[2024-11-08 11:23:52,940 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-08 11:23:52,946 INFO  L432           NwaCegarLoop]: 19 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 19 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:23:52,948 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time]
[2024-11-08 11:23:52,970 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 17 states.
[2024-11-08 11:23:52,995 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17.
[2024-11-08 11:23:52,997 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 17 states, 12 states have (on average 1.0833333333333333) internal successors, (13), 12 states have internal predecessors, (13), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-08 11:23:52,998 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions.
[2024-11-08 11:23:53,001 INFO  L78                 Accepts]: Start accepts. Automaton has 17 states and 19 transitions. Word has length 23
[2024-11-08 11:23:53,002 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:23:53,003 INFO  L471      AbstractCegarLoop]: Abstraction has 17 states and 19 transitions.
[2024-11-08 11:23:53,004 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 2 states, 2 states have (on average 6.5) internal successors, (13), 2 states have internal predecessors, (13), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3)
[2024-11-08 11:23:53,004 INFO  L276                IsEmpty]: Start isEmpty. Operand 17 states and 19 transitions.
[2024-11-08 11:23:53,006 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2024-11-08 11:23:53,006 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:23:53,006 INFO  L215           NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:23:53,034 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0
[2024-11-08 11:23:53,212 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:23:53,213 INFO  L396      AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:23:53,213 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:23:53,214 INFO  L85        PathProgramCache]: Analyzing trace with hash 1446485140, now seen corresponding path program 1 times
[2024-11-08 11:23:53,214 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 11:23:53,215 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2019552785]
[2024-11-08 11:23:53,215 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:53,215 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:23:53,215 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:23:53,218 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:23:53,220 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-08 11:23:53,727 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:53,734 INFO  L255         TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 19 conjuncts are in the unsatisfiable core
[2024-11-08 11:23:53,748 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:23:54,133 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked.
[2024-11-08 11:23:54,134 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:23:54,366 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 11:23:54,366 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2019552785]
[2024-11-08 11:23:54,367 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [2019552785] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:23:54,367 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1029881350]
[2024-11-08 11:23:54,367 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:54,368 INFO  L173          SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 11:23:54,368 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 11:23:54,370 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 11:23:54,372 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (4)] Waiting until timeout for monitored process
[2024-11-08 11:23:55,134 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:55,140 INFO  L255         TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 15 conjuncts are in the unsatisfiable core
[2024-11-08 11:23:55,146 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:23:55,278 INFO  L134       CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked.
[2024-11-08 11:23:55,278 INFO  L307         TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect
[2024-11-08 11:23:55,279 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1029881350] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-08 11:23:55,279 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences.
[2024-11-08 11:23:55,279 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7
[2024-11-08 11:23:55,280 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872153096]
[2024-11-08 11:23:55,280 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-08 11:23:55,281 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2024-11-08 11:23:55,282 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 11:23:55,282 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-08 11:23:55,283 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:23:55,283 INFO  L87              Difference]: Start difference. First operand 17 states and 19 transitions. Second operand  has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:23:55,470 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:23:55,470 INFO  L93              Difference]: Finished difference Result 27 states and 32 transitions.
[2024-11-08 11:23:55,471 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-08 11:23:55,471 INFO  L78                 Accepts]: Start accepts. Automaton has  has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23
[2024-11-08 11:23:55,471 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:23:55,472 INFO  L225             Difference]: With dead ends: 27
[2024-11-08 11:23:55,472 INFO  L226             Difference]: Without dead ends: 25
[2024-11-08 11:23:55,473 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2024-11-08 11:23:55,474 INFO  L432           NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time
[2024-11-08 11:23:55,475 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time]
[2024-11-08 11:23:55,476 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 25 states.
[2024-11-08 11:23:55,481 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25.
[2024-11-08 11:23:55,481 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6)
[2024-11-08 11:23:55,482 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions.
[2024-11-08 11:23:55,483 INFO  L78                 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23
[2024-11-08 11:23:55,484 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:23:55,484 INFO  L471      AbstractCegarLoop]: Abstraction has 25 states and 30 transitions.
[2024-11-08 11:23:55,485 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3)
[2024-11-08 11:23:55,485 INFO  L276                IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions.
[2024-11-08 11:23:55,486 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2024-11-08 11:23:55,486 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:23:55,486 INFO  L215           NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1]
[2024-11-08 11:23:55,495 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (4)] Ended with exit code 0
[2024-11-08 11:23:55,703 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0
[2024-11-08 11:23:55,887 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:23:55,888 INFO  L396      AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:23:55,889 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:23:55,889 INFO  L85        PathProgramCache]: Analyzing trace with hash 636552131, now seen corresponding path program 1 times
[2024-11-08 11:23:55,891 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 11:23:55,891 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [692444037]
[2024-11-08 11:23:55,894 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:55,894 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:23:55,896 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:23:55,898 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:23:55,902 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-08 11:23:56,567 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:56,580 INFO  L255         TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 43 conjuncts are in the unsatisfiable core
[2024-11-08 11:23:56,595 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:23:57,468 INFO  L134       CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 11:23:57,469 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:23:57,736 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 11:23:57,736 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [692444037]
[2024-11-08 11:23:57,737 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [692444037] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:23:57,737 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [890277797]
[2024-11-08 11:23:57,737 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-08 11:23:57,737 INFO  L173          SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 11:23:57,737 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 11:23:57,741 INFO  L229       MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 11:23:57,743 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (6)] Waiting until timeout for monitored process
[2024-11-08 11:23:59,106 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-08 11:23:59,124 INFO  L255         TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 40 conjuncts are in the unsatisfiable core
[2024-11-08 11:23:59,154 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:23:59,696 INFO  L134       CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked.
[2024-11-08 11:23:59,697 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:23:59,894 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleCvc4 [890277797] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:23:59,894 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences.
[2024-11-08 11:23:59,894 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10
[2024-11-08 11:23:59,895 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094002408]
[2024-11-08 11:23:59,895 INFO  L85    oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton
[2024-11-08 11:23:59,895 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 10 states
[2024-11-08 11:23:59,896 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 11:23:59,896 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-08 11:23:59,897 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132
[2024-11-08 11:23:59,897 INFO  L87              Difference]: Start difference. First operand 25 states and 30 transitions. Second operand  has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:24:00,686 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:24:00,686 INFO  L93              Difference]: Finished difference Result 36 states and 44 transitions.
[2024-11-08 11:24:00,687 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. 
[2024-11-08 11:24:00,687 INFO  L78                 Accepts]: Start accepts. Automaton has  has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44
[2024-11-08 11:24:00,688 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:24:00,689 INFO  L225             Difference]: With dead ends: 36
[2024-11-08 11:24:00,689 INFO  L226             Difference]: Without dead ends: 34
[2024-11-08 11:24:00,690 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240
[2024-11-08 11:24:00,691 INFO  L432           NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 86 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time
[2024-11-08 11:24:00,692 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 86 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time]
[2024-11-08 11:24:00,693 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 34 states.
[2024-11-08 11:24:00,701 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34.
[2024-11-08 11:24:00,701 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9)
[2024-11-08 11:24:00,705 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions.
[2024-11-08 11:24:00,707 INFO  L78                 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44
[2024-11-08 11:24:00,708 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:24:00,708 INFO  L471      AbstractCegarLoop]: Abstraction has 34 states and 42 transitions.
[2024-11-08 11:24:00,708 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6)
[2024-11-08 11:24:00,709 INFO  L276                IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions.
[2024-11-08 11:24:00,714 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 66
[2024-11-08 11:24:00,714 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:24:00,714 INFO  L215           NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1]
[2024-11-08 11:24:00,731 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (6)] Ended with exit code 0
[2024-11-08 11:24:00,934 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0
[2024-11-08 11:24:01,115 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:24:01,116 INFO  L396      AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:24:01,116 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:24:01,120 INFO  L85        PathProgramCache]: Analyzing trace with hash 343621620, now seen corresponding path program 2 times
[2024-11-08 11:24:01,122 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 11:24:01,122 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [910851483]
[2024-11-08 11:24:01,123 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-08 11:24:01,123 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:24:01,123 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:24:01,125 INFO  L229       MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:24:01,128 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-08 11:24:02,207 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-08 11:24:02,207 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 11:24:02,224 INFO  L255         TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 88 conjuncts are in the unsatisfiable core
[2024-11-08 11:24:02,254 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:24:08,698 INFO  L134       CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked.
[2024-11-08 11:24:08,699 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:24:15,013 WARN  L851   $PredicateComparison]: unable to prove that (let ((.cse5 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse1 (forall ((|v_ULTIMATE.start_main_~var_155_arg_0~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_151_arg_1~0#1_18| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_151_arg_1~0#1_18|)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_20|))))))))) (.cse2 (= (_ bv0 8) |c_ULTIMATE.start_main_~state_132~0#1|))) (let ((.cse8 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_109~0#1|)) (.cse9 (not .cse2)) (.cse10 (or .cse1 .cse2))) (let ((.cse3 (and (or (forall ((|v_ULTIMATE.start_main_~var_112_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_155_arg_0~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_115_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_126_arg_1~0#1_18| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_18|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_18|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_18|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_20|)))))))) .cse9) .cse10))) (let ((.cse6 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse4 (let ((.cse7 (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_96~0#1|)))) (and (or .cse7 .cse3) (or (not .cse7) (and (or (forall ((|v_ULTIMATE.start_main_~var_112_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_155_arg_0~0#1_20| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_115_arg_1~0#1_18| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_126_arg_1~0#1_18| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse5 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse8 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_18|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_18|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_18|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_155_arg_0~0#1_20|)))))))) .cse9) .cse10)))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse5 (_ bv254 32))) (_ bv0 8)))) (and (or (not .cse0) (and (or (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_16| (_ BitVec 64))) (not (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_99_arg_2~0#1_16|)))) .cse1 .cse2) (or .cse3 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_16| (_ BitVec 64))) (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_99_arg_2~0#1_16|)))))) (or .cse0 .cse4))) .cse6) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse5 (_ bv255 32)))) (not .cse6) .cse4))))))) is different from false
[2024-11-08 11:24:15,379 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 11:24:15,380 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [910851483]
[2024-11-08 11:24:15,380 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [910851483] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:24:15,380 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [2107572888]
[2024-11-08 11:24:15,380 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-08 11:24:15,380 INFO  L173          SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt
[2024-11-08 11:24:15,381 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4
[2024-11-08 11:24:15,384 INFO  L229       MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null)
[2024-11-08 11:24:15,386 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (8)] Waiting until timeout for monitored process
[2024-11-08 11:24:17,430 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-08 11:24:17,430 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 11:24:17,498 INFO  L255         TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 87 conjuncts are in the unsatisfiable core
[2024-11-08 11:24:17,517 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:24:21,722 INFO  L134       CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked.
[2024-11-08 11:24:21,722 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:24:27,644 WARN  L851   $PredicateComparison]: unable to prove that (let ((.cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse6 (= ((_ extract 7 0) (bvand .cse2 (_ bv254 32))) (_ bv0 8))) (.cse11 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse2 (_ bv255 32))))) (.cse9 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (let ((.cse12 (not .cse9)) (.cse10 (not .cse11)) (.cse7 (not .cse6)) (.cse5 (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_96~0#1|)))) (let ((.cse1 (let ((.cse14 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_20| (_ BitVec 64))) (not (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_99_arg_2~0#1_20|))))) (.cse13 (not .cse5))) (and (or .cse12 (and (or .cse11 .cse13) (or .cse14 .cse10))) (or (and (or .cse7 .cse14) (or .cse6 .cse13)) .cse9)))) (.cse0 (forall ((|v_ULTIMATE.start_main_~var_151_arg_1~0#1_22| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_152~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_151_arg_1~0#1_22|)))))))))))))) (.cse4 (let ((.cse8 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_20| (_ BitVec 64))) (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_99_arg_2~0#1_20|))))) (and (or (and (or .cse5 .cse6) (or .cse7 .cse8)) .cse9) (or (and (or .cse8 .cse10) (or .cse5 .cse11)) .cse12)))) (.cse3 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_109~0#1|))) (and (or .cse0 .cse1) (or (forall ((|v_ULTIMATE.start_main_~var_126_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_115_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_153_arg_2~0#1_22| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_22|) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_22|))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_22|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_153_arg_2~0#1_22|)))))))))) .cse1) (or .cse4 .cse0) (or .cse4 (forall ((|v_ULTIMATE.start_main_~var_126_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_115_arg_1~0#1_22| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_153_arg_2~0#1_22| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse2 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_153_arg_2~0#1_22|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_22|) ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse3 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_22|))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_22|)))))))))))))))))))))))))))) is different from false
[2024-11-08 11:24:28,417 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleCvc4 [2107572888] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-08 11:24:28,417 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences.
[2024-11-08 11:24:28,417 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15
[2024-11-08 11:24:28,418 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [502244682]
[2024-11-08 11:24:28,418 INFO  L85    oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton
[2024-11-08 11:24:28,419 INFO  L548      AbstractCegarLoop]: INTERPOLANT automaton has 15 states
[2024-11-08 11:24:28,419 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX
[2024-11-08 11:24:28,420 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants.
[2024-11-08 11:24:28,420 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=204, Unknown=2, NotChecked=58, Total=306
[2024-11-08 11:24:28,421 INFO  L87              Difference]: Start difference. First operand 34 states and 42 transitions. Second operand  has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13)
[2024-11-08 11:24:54,221 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-08 11:24:54,222 INFO  L93              Difference]: Finished difference Result 46 states and 57 transitions.
[2024-11-08 11:24:54,222 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. 
[2024-11-08 11:24:54,223 INFO  L78                 Accepts]: Start accepts. Automaton has  has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) Word has length 65
[2024-11-08 11:24:54,223 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2024-11-08 11:24:54,224 INFO  L225             Difference]: With dead ends: 46
[2024-11-08 11:24:54,224 INFO  L226             Difference]: Without dead ends: 44
[2024-11-08 11:24:54,225 INFO  L431           NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 35.7s TimeCoverageRelationStatistics Valid=111, Invalid=541, Unknown=6, NotChecked=98, Total=756
[2024-11-08 11:24:54,226 INFO  L432           NwaCegarLoop]: 12 mSDtfsCounter, 16 mSDsluCounter, 97 mSDsCounter, 0 mSdLazyCounter, 199 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 109 SdHoareTripleChecker+Invalid, 210 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 199 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.0s IncrementalHoareTripleChecker+Time
[2024-11-08 11:24:54,227 INFO  L433           NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 109 Invalid, 210 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 199 Invalid, 0 Unknown, 0 Unchecked, 2.0s Time]
[2024-11-08 11:24:54,229 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 44 states.
[2024-11-08 11:24:54,248 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43.
[2024-11-08 11:24:54,249 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12)
[2024-11-08 11:24:54,250 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions.
[2024-11-08 11:24:54,251 INFO  L78                 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65
[2024-11-08 11:24:54,251 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2024-11-08 11:24:54,251 INFO  L471      AbstractCegarLoop]: Abstraction has 43 states and 54 transitions.
[2024-11-08 11:24:54,252 INFO  L472      AbstractCegarLoop]: INTERPOLANT automaton has  has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13)
[2024-11-08 11:24:54,252 INFO  L276                IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions.
[2024-11-08 11:24:54,254 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 87
[2024-11-08 11:24:54,254 INFO  L207           NwaCegarLoop]: Found error trace
[2024-11-08 11:24:54,255 INFO  L215           NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1]
[2024-11-08 11:24:54,273 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (8)] Forceful destruction successful, exit code 0
[2024-11-08 11:24:54,484 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0
[2024-11-08 11:24:54,659 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:24:54,659 INFO  L396      AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] ===
[2024-11-08 11:24:54,660 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-08 11:24:54,660 INFO  L85        PathProgramCache]: Analyzing trace with hash -1752744861, now seen corresponding path program 3 times
[2024-11-08 11:24:54,662 INFO  L118   FreeRefinementEngine]: Executing refinement strategy FOX
[2024-11-08 11:24:54,662 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1335574426]
[2024-11-08 11:24:54,662 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2024-11-08 11:24:54,662 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:24:54,662 INFO  L189       MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3
[2024-11-08 11:24:54,667 INFO  L229       MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-08 11:24:54,668 INFO  L327       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process
[2024-11-08 11:24:57,206 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s)
[2024-11-08 11:24:57,206 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-08 11:24:57,226 INFO  L255         TraceCheckSpWp]: Trace formula consists of 1215 conjuncts, 218 conjuncts are in the unsatisfiable core
[2024-11-08 11:24:57,270 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-08 11:26:32,488 WARN  L286               SmtUtils]: Spent 6.41s on a formula simplification that was a NOOP. DAG size: 337 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 11:26:48,744 WARN  L286               SmtUtils]: Spent 6.89s on a formula simplification that was a NOOP. DAG size: 347 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 11:27:05,412 WARN  L286               SmtUtils]: Spent 6.89s on a formula simplification that was a NOOP. DAG size: 340 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 11:28:21,070 INFO  L134       CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 111 refuted. 0 times theorem prover too weak. 159 trivial. 0 not checked.
[2024-11-08 11:28:21,070 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-08 11:29:04,808 WARN  L286               SmtUtils]: Spent 17.64s on a formula simplification. DAG size of input: 256 DAG size of output: 231 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)
[2024-11-08 11:29:17,423 INFO  L552       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101
[2024-11-08 11:29:17,423 WARN  L249               Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory")

[2024-11-08 11:29:17,425 INFO  L136   FreeRefinementEngine]: Strategy FOX found an infeasible trace
[2024-11-08 11:29:17,425 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1335574426]
[2024-11-08 11:29:17,426 WARN  L320   FreeRefinementEngine]: Global settings require throwing the following exception
[2024-11-08 11:29:17,463 INFO  L540       MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0
[2024-11-08 11:29:17,626 WARN  L453      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-08 11:29:17,627 FATAL L?                        ?]: An unrecoverable error occured during an interaction with an SMT solver:
de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")

	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155)
	at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163)
	at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163)
	at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.checkSat(ManagedScript.java:148)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:85)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:912)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.<init>(PredicateUnifier.java:786)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:323)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp$UnifyPostprocessor.postprocess(TraceCheckSpWp.java:553)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:416)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:360)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:267)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:324)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:180)
	at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.TraceCheckSpWp.<init>(TraceCheckSpWp.java:159)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:108)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleSpWp.construct(IpTcStrategyModuleSpWp.java:1)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.isCorrect(IpTcStrategyModuleBase.java:57)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:210)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:121)
	at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.tracehandling.AutomatonFreeRefinementEngine.<init>(AutomatonFreeRefinementEngine.java:85)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.<init>(TraceAbstractionRefinementEngine.java:82)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:302)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:407)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:426)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:312)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:273)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:167)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.<init>(TraceAbstractionStarter.java:143)
	at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319)
	at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145)
	at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63)
Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701)
	at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383)
	at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258)
	... 45 more
[2024-11-08 11:29:17,632 INFO  L158              Benchmark]: Toolchain (without parser) took 328285.42ms. Allocated memory was 65.0MB in the beginning and 528.5MB in the end (delta: 463.5MB). Free memory was 39.5MB in the beginning and 229.9MB in the end (delta: -190.4MB). Peak memory consumption was 276.7MB. Max. memory is 16.1GB.
[2024-11-08 11:29:17,632 INFO  L158              Benchmark]: CDTParser took 0.36ms. Allocated memory is still 65.0MB. Free memory is still 40.5MB. There was no memory consumed. Max. memory is 16.1GB.
[2024-11-08 11:29:17,633 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 924.30ms. Allocated memory was 65.0MB in the beginning and 83.9MB in the end (delta: 18.9MB). Free memory was 39.1MB in the beginning and 56.3MB in the end (delta: -17.2MB). Peak memory consumption was 24.7MB. Max. memory is 16.1GB.
[2024-11-08 11:29:17,638 INFO  L158              Benchmark]: Boogie Procedure Inliner took 113.22ms. Allocated memory is still 83.9MB. Free memory was 56.0MB in the beginning and 49.0MB in the end (delta: 7.0MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB.
[2024-11-08 11:29:17,639 INFO  L158              Benchmark]: Boogie Preprocessor took 108.87ms. Allocated memory is still 83.9MB. Free memory was 49.0MB in the beginning and 40.5MB in the end (delta: 8.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2024-11-08 11:29:17,640 INFO  L158              Benchmark]: RCFGBuilder took 1559.86ms. Allocated memory was 83.9MB in the beginning and 100.7MB in the end (delta: 16.8MB). Free memory was 40.5MB in the beginning and 47.1MB in the end (delta: -6.6MB). Peak memory consumption was 20.0MB. Max. memory is 16.1GB.
[2024-11-08 11:29:17,641 INFO  L158              Benchmark]: TraceAbstraction took 325570.46ms. Allocated memory was 100.7MB in the beginning and 528.5MB in the end (delta: 427.8MB). Free memory was 46.4MB in the beginning and 229.9MB in the end (delta: -183.5MB). Peak memory consumption was 244.5MB. Max. memory is 16.1GB.
[2024-11-08 11:29:17,643 INFO  L338   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.36ms. Allocated memory is still 65.0MB. Free memory is still 40.5MB. There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 924.30ms. Allocated memory was 65.0MB in the beginning and 83.9MB in the end (delta: 18.9MB). Free memory was 39.1MB in the beginning and 56.3MB in the end (delta: -17.2MB). Peak memory consumption was 24.7MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 113.22ms. Allocated memory is still 83.9MB. Free memory was 56.0MB in the beginning and 49.0MB in the end (delta: 7.0MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB.
 * Boogie Preprocessor took 108.87ms. Allocated memory is still 83.9MB. Free memory was 49.0MB in the beginning and 40.5MB in the end (delta: 8.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * RCFGBuilder took 1559.86ms. Allocated memory was 83.9MB in the beginning and 100.7MB in the end (delta: 16.8MB). Free memory was 40.5MB in the beginning and 47.1MB in the end (delta: -6.6MB). Peak memory consumption was 20.0MB. Max. memory is 16.1GB.
 * TraceAbstraction took 325570.46ms. Allocated memory was 100.7MB in the beginning and 528.5MB in the end (delta: 427.8MB). Free memory was 46.4MB in the beginning and 229.9MB in the end (delta: -183.5MB). Peak memory consumption was 244.5MB. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")

    de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")
: de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262)
RESULT: Ultimate could not prove your program: Toolchain returned no result.
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Writing output log to file Ultimate.log
Result:
ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb3afa87-95c8-4cef-9574-d83d6b20cef7/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")