./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version a0165632 Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 1d054f79132e175b09d8c50472a4c24ca52f401c76e1d0704dd5609a369827e2 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 16:35:58,091 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 16:35:58,208 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-08 16:35:58,213 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 16:35:58,214 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 16:35:58,248 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 16:35:58,249 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 16:35:58,250 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 16:35:58,250 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 16:35:58,251 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 16:35:58,252 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-08 16:35:58,253 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-08 16:35:58,254 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 16:35:58,256 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 16:35:58,256 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 16:35:58,257 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 16:35:58,257 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-08 16:35:58,258 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-08 16:35:58,258 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 16:35:58,258 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-08 16:35:58,262 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-08 16:35:58,264 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-08 16:35:58,265 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 16:35:58,265 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 16:35:58,265 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 16:35:58,266 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 16:35:58,266 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 16:35:58,266 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-08 16:35:58,267 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-08 16:35:58,267 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-08 16:35:58,267 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 16:35:58,268 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-08 16:35:58,268 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-08 16:35:58,268 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-08 16:35:58,269 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-08 16:35:58,269 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-08 16:35:58,269 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-08 16:35:58,270 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-08 16:35:58,270 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-08 16:35:58,270 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1d054f79132e175b09d8c50472a4c24ca52f401c76e1d0704dd5609a369827e2 [2024-11-08 16:35:58,578 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 16:35:58,615 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 16:35:58,619 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 16:35:58,621 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 16:35:58,622 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 16:35:58,624 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c Unable to find full path for "g++" [2024-11-08 16:36:01,014 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 16:36:01,405 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 16:36:01,406 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c [2024-11-08 16:36:01,433 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data/4e3b593aa/9ea95e1555ba453697b0e7b1102d5475/FLAGa7d8964a4 [2024-11-08 16:36:01,461 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data/4e3b593aa/9ea95e1555ba453697b0e7b1102d5475 [2024-11-08 16:36:01,467 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 16:36:01,471 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 16:36:01,472 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 16:36:01,472 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 16:36:01,481 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 16:36:01,482 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:36:01" (1/1) ... [2024-11-08 16:36:01,485 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6862249d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:01, skipping insertion in model container [2024-11-08 16:36:01,485 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:36:01" (1/1) ... [2024-11-08 16:36:01,564 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 16:36:01,871 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c[1268,1281] [2024-11-08 16:36:02,381 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 16:36:02,392 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 16:36:02,408 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c[1268,1281] [2024-11-08 16:36:02,559 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 16:36:02,592 INFO L204 MainTranslator]: Completed translation [2024-11-08 16:36:02,599 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02 WrapperNode [2024-11-08 16:36:02,599 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 16:36:02,601 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 16:36:02,601 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 16:36:02,601 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 16:36:02,618 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:02,715 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,157 INFO L138 Inliner]: procedures = 18, calls = 41, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 2372 [2024-11-08 16:36:03,189 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 16:36:03,190 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 16:36:03,192 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 16:36:03,192 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 16:36:03,223 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,223 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,308 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,544 INFO L175 MemorySlicer]: Split 20 memory accesses to 3 slices as follows [2, 9, 9]. 45 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 8 writes are split as follows [0, 4, 4]. [2024-11-08 16:36:03,545 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,545 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,702 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,738 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,787 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,809 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,914 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 16:36:03,916 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 16:36:03,916 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 16:36:03,916 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 16:36:03,917 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (1/1) ... [2024-11-08 16:36:03,925 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-08 16:36:03,940 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:03,962 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-08 16:36:03,967 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-08 16:36:04,011 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 16:36:04,012 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-08 16:36:04,012 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-08 16:36:04,012 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-08 16:36:04,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-08 16:36:04,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2024-11-08 16:36:04,013 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-08 16:36:04,013 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-08 16:36:04,014 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-08 16:36:04,014 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2024-11-08 16:36:04,014 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 16:36:04,014 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 16:36:04,014 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-08 16:36:04,015 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-08 16:36:04,015 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2024-11-08 16:36:04,015 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-08 16:36:04,455 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 16:36:04,458 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 16:36:08,109 INFO L? ?]: Removed 1289 outVars from TransFormulas that were not future-live. [2024-11-08 16:36:08,110 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 16:36:08,166 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 16:36:08,166 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-08 16:36:08,167 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:36:08 BoogieIcfgContainer [2024-11-08 16:36:08,167 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 16:36:08,174 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-08 16:36:08,174 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-08 16:36:08,182 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-08 16:36:08,182 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 04:36:01" (1/3) ... [2024-11-08 16:36:08,184 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a9f203d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:36:08, skipping insertion in model container [2024-11-08 16:36:08,184 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:36:02" (2/3) ... [2024-11-08 16:36:08,184 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a9f203d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:36:08, skipping insertion in model container [2024-11-08 16:36:08,185 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:36:08" (3/3) ... [2024-11-08 16:36:08,186 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c [2024-11-08 16:36:08,215 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-08 16:36:08,215 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-11-08 16:36:08,324 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-08 16:36:08,333 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@246aec28, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-08 16:36:08,333 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-08 16:36:08,342 INFO L276 IsEmpty]: Start isEmpty. Operand has 753 states, 745 states have (on average 1.497986577181208) internal successors, (1116), 746 states have internal predecessors, (1116), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:36:08,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2024-11-08 16:36:08,379 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:08,380 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:08,381 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:08,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:08,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1272293616, now seen corresponding path program 1 times [2024-11-08 16:36:08,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:08,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716018742] [2024-11-08 16:36:08,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:08,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:08,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:09,163 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2024-11-08 16:36:09,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:09,180 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 67 [2024-11-08 16:36:09,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:09,187 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2024-11-08 16:36:09,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:09,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2024-11-08 16:36:09,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:09,203 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 127 [2024-11-08 16:36:09,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:09,211 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:36:09,212 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:09,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716018742] [2024-11-08 16:36:09,214 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716018742] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:09,214 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:09,214 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-08 16:36:09,216 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [758797444] [2024-11-08 16:36:09,218 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:09,224 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-08 16:36:09,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:09,259 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-08 16:36:09,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-08 16:36:09,265 INFO L87 Difference]: Start difference. First operand has 753 states, 745 states have (on average 1.497986577181208) internal successors, (1116), 746 states have internal predecessors, (1116), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Second operand has 2 states, 2 states have (on average 109.5) internal successors, (219), 2 states have internal predecessors, (219), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:09,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:09,427 INFO L93 Difference]: Finished difference Result 1406 states and 2110 transitions. [2024-11-08 16:36:09,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-08 16:36:09,433 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 109.5) internal successors, (219), 2 states have internal predecessors, (219), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) Word has length 241 [2024-11-08 16:36:09,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:09,449 INFO L225 Difference]: With dead ends: 1406 [2024-11-08 16:36:09,450 INFO L226 Difference]: Without dead ends: 749 [2024-11-08 16:36:09,455 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-08 16:36:09,460 INFO L432 NwaCegarLoop]: 1119 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1119 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:09,461 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1119 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:09,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 749 states. [2024-11-08 16:36:09,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 749 to 749. [2024-11-08 16:36:09,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 749 states, 742 states have (on average 1.494609164420485) internal successors, (1109), 742 states have internal predecessors, (1109), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:36:09,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 749 states to 749 states and 1119 transitions. [2024-11-08 16:36:09,601 INFO L78 Accepts]: Start accepts. Automaton has 749 states and 1119 transitions. Word has length 241 [2024-11-08 16:36:09,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:09,603 INFO L471 AbstractCegarLoop]: Abstraction has 749 states and 1119 transitions. [2024-11-08 16:36:09,604 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 109.5) internal successors, (219), 2 states have internal predecessors, (219), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:09,606 INFO L276 IsEmpty]: Start isEmpty. Operand 749 states and 1119 transitions. [2024-11-08 16:36:09,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 242 [2024-11-08 16:36:09,617 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:09,617 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:09,618 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-08 16:36:09,618 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:09,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:09,619 INFO L85 PathProgramCache]: Analyzing trace with hash -1474635866, now seen corresponding path program 1 times [2024-11-08 16:36:09,619 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:09,620 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213497580] [2024-11-08 16:36:09,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:09,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:09,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:10,664 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 55 [2024-11-08 16:36:10,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:10,670 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 67 [2024-11-08 16:36:10,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:10,678 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2024-11-08 16:36:10,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:10,681 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 117 [2024-11-08 16:36:10,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:10,686 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 127 [2024-11-08 16:36:10,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:10,693 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:36:10,695 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:10,695 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1213497580] [2024-11-08 16:36:10,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1213497580] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:10,696 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:10,696 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:36:10,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18780742] [2024-11-08 16:36:10,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:10,701 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:36:10,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:10,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:36:10,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:36:10,704 INFO L87 Difference]: Start difference. First operand 749 states and 1119 transitions. Second operand has 3 states, 3 states have (on average 73.0) internal successors, (219), 3 states have internal predecessors, (219), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:10,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:10,804 INFO L93 Difference]: Finished difference Result 1496 states and 2236 transitions. [2024-11-08 16:36:10,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:36:10,806 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 73.0) internal successors, (219), 3 states have internal predecessors, (219), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 241 [2024-11-08 16:36:10,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:10,809 INFO L225 Difference]: With dead ends: 1496 [2024-11-08 16:36:10,810 INFO L226 Difference]: Without dead ends: 755 [2024-11-08 16:36:10,816 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:36:10,819 INFO L432 NwaCegarLoop]: 1116 mSDtfsCounter, 7 mSDsluCounter, 1112 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 2228 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:10,820 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 2228 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:10,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 755 states. [2024-11-08 16:36:10,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 755 to 751. [2024-11-08 16:36:10,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 751 states, 744 states have (on average 1.493279569892473) internal successors, (1111), 744 states have internal predecessors, (1111), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:36:10,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 751 states to 751 states and 1121 transitions. [2024-11-08 16:36:10,859 INFO L78 Accepts]: Start accepts. Automaton has 751 states and 1121 transitions. Word has length 241 [2024-11-08 16:36:10,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:10,860 INFO L471 AbstractCegarLoop]: Abstraction has 751 states and 1121 transitions. [2024-11-08 16:36:10,861 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 73.0) internal successors, (219), 3 states have internal predecessors, (219), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:10,861 INFO L276 IsEmpty]: Start isEmpty. Operand 751 states and 1121 transitions. [2024-11-08 16:36:10,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2024-11-08 16:36:10,865 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:10,865 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:10,865 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-08 16:36:10,868 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:10,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:10,870 INFO L85 PathProgramCache]: Analyzing trace with hash -697666057, now seen corresponding path program 1 times [2024-11-08 16:36:10,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:10,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417649720] [2024-11-08 16:36:10,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:10,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:11,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:11,683 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-08 16:36:11,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:11,688 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-08 16:36:11,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:11,693 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 97 [2024-11-08 16:36:11,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:11,696 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:36:11,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:11,701 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:36:11,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:11,706 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:36:11,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:11,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417649720] [2024-11-08 16:36:11,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [417649720] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:11,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1931542841] [2024-11-08 16:36:11,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:11,715 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:11,715 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:11,722 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:11,726 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-08 16:36:12,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:12,456 INFO L255 TraceCheckSpWp]: Trace formula consists of 1112 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-08 16:36:12,475 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:12,548 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:36:12,553 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:36:12,659 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:36:12,659 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1931542841] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:12,660 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:36:12,660 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 6 [2024-11-08 16:36:12,660 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893217572] [2024-11-08 16:36:12,661 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:12,662 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:36:12,662 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:12,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:36:12,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:12,664 INFO L87 Difference]: Start difference. First operand 751 states and 1121 transitions. Second operand has 3 states, 3 states have (on average 74.33333333333333) internal successors, (223), 3 states have internal predecessors, (223), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:12,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:12,737 INFO L93 Difference]: Finished difference Result 1470 states and 2195 transitions. [2024-11-08 16:36:12,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:36:12,738 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 74.33333333333333) internal successors, (223), 3 states have internal predecessors, (223), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 245 [2024-11-08 16:36:12,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:12,742 INFO L225 Difference]: With dead ends: 1470 [2024-11-08 16:36:12,742 INFO L226 Difference]: Without dead ends: 752 [2024-11-08 16:36:12,744 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 502 GetRequests, 498 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:12,747 INFO L432 NwaCegarLoop]: 1115 mSDtfsCounter, 7 mSDsluCounter, 1106 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 2221 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:12,749 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 2221 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:12,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 752 states. [2024-11-08 16:36:12,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 752 to 752. [2024-11-08 16:36:12,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 752 states, 745 states have (on average 1.491275167785235) internal successors, (1111), 745 states have internal predecessors, (1111), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:36:12,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 1121 transitions. [2024-11-08 16:36:12,775 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 1121 transitions. Word has length 245 [2024-11-08 16:36:12,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:12,775 INFO L471 AbstractCegarLoop]: Abstraction has 752 states and 1121 transitions. [2024-11-08 16:36:12,776 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 74.33333333333333) internal successors, (223), 3 states have internal predecessors, (223), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:12,777 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 1121 transitions. [2024-11-08 16:36:12,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2024-11-08 16:36:12,782 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:12,782 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:12,813 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-08 16:36:12,987 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:12,988 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:12,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:12,993 INFO L85 PathProgramCache]: Analyzing trace with hash -1381173624, now seen corresponding path program 1 times [2024-11-08 16:36:12,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:12,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955771187] [2024-11-08 16:36:12,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:12,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:13,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:13,866 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-08 16:36:13,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:13,870 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-08 16:36:13,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:13,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 101 [2024-11-08 16:36:13,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:13,877 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 125 [2024-11-08 16:36:13,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:13,880 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2024-11-08 16:36:13,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:13,884 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:36:13,884 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:13,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955771187] [2024-11-08 16:36:13,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955771187] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:13,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [227721910] [2024-11-08 16:36:13,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:13,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:13,886 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:13,888 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:13,890 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-08 16:36:14,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:14,698 INFO L255 TraceCheckSpWp]: Trace formula consists of 1123 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-11-08 16:36:14,724 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:14,820 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:36:14,821 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:36:16,368 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:36:16,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [227721910] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:36:16,369 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:36:16,370 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 8] total 12 [2024-11-08 16:36:16,370 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853694299] [2024-11-08 16:36:16,370 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:36:16,372 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-08 16:36:16,372 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:16,373 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-08 16:36:16,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:36:16,374 INFO L87 Difference]: Start difference. First operand 752 states and 1121 transitions. Second operand has 12 states, 12 states have (on average 30.666666666666668) internal successors, (368), 12 states have internal predecessors, (368), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:36:19,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:19,855 INFO L93 Difference]: Finished difference Result 2117 states and 3159 transitions. [2024-11-08 16:36:19,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:36:19,856 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 30.666666666666668) internal successors, (368), 12 states have internal predecessors, (368), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 249 [2024-11-08 16:36:19,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:19,861 INFO L225 Difference]: With dead ends: 2117 [2024-11-08 16:36:19,862 INFO L226 Difference]: Without dead ends: 1375 [2024-11-08 16:36:19,863 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 500 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2024-11-08 16:36:19,864 INFO L432 NwaCegarLoop]: 1378 mSDtfsCounter, 3260 mSDsluCounter, 7596 mSDsCounter, 0 mSdLazyCounter, 3056 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3265 SdHoareTripleChecker+Valid, 8974 SdHoareTripleChecker+Invalid, 3064 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 3056 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:19,865 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3265 Valid, 8974 Invalid, 3064 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [8 Valid, 3056 Invalid, 0 Unknown, 0 Unchecked, 3.2s Time] [2024-11-08 16:36:19,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1375 states. [2024-11-08 16:36:19,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1375 to 987. [2024-11-08 16:36:19,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 987 states, 975 states have (on average 1.4871794871794872) internal successors, (1450), 975 states have internal predecessors, (1450), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:19,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 987 states to 987 states and 1470 transitions. [2024-11-08 16:36:19,902 INFO L78 Accepts]: Start accepts. Automaton has 987 states and 1470 transitions. Word has length 249 [2024-11-08 16:36:19,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:19,902 INFO L471 AbstractCegarLoop]: Abstraction has 987 states and 1470 transitions. [2024-11-08 16:36:19,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 30.666666666666668) internal successors, (368), 12 states have internal predecessors, (368), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:36:19,903 INFO L276 IsEmpty]: Start isEmpty. Operand 987 states and 1470 transitions. [2024-11-08 16:36:19,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2024-11-08 16:36:19,908 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:19,909 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:19,936 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-08 16:36:20,113 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:20,114 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:20,114 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:20,115 INFO L85 PathProgramCache]: Analyzing trace with hash -2028260880, now seen corresponding path program 1 times [2024-11-08 16:36:20,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:20,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60449625] [2024-11-08 16:36:20,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:20,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:20,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:20,804 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 68 [2024-11-08 16:36:20,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:20,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-08 16:36:20,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:20,810 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 106 [2024-11-08 16:36:20,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:20,813 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 130 [2024-11-08 16:36:20,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:20,815 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 140 [2024-11-08 16:36:20,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:20,819 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:36:20,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:20,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [60449625] [2024-11-08 16:36:20,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [60449625] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:20,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [774900035] [2024-11-08 16:36:20,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:20,820 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:20,820 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:20,822 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:20,824 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-08 16:36:21,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:21,499 INFO L255 TraceCheckSpWp]: Trace formula consists of 1137 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-08 16:36:21,508 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:21,566 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:36:21,566 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:36:21,643 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-11-08 16:36:21,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [774900035] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:36:21,644 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:36:21,645 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6, 4] total 9 [2024-11-08 16:36:21,645 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708470470] [2024-11-08 16:36:21,645 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:36:21,646 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:36:21,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:21,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:36:21,647 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:36:21,648 INFO L87 Difference]: Start difference. First operand 987 states and 1470 transitions. Second operand has 9 states, 9 states have (on average 29.22222222222222) internal successors, (263), 9 states have internal predecessors, (263), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:36:21,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:21,808 INFO L93 Difference]: Finished difference Result 2004 states and 2988 transitions. [2024-11-08 16:36:21,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:36:21,809 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 29.22222222222222) internal successors, (263), 9 states have internal predecessors, (263), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 254 [2024-11-08 16:36:21,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:21,813 INFO L225 Difference]: With dead ends: 2004 [2024-11-08 16:36:21,813 INFO L226 Difference]: Without dead ends: 1033 [2024-11-08 16:36:21,816 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 522 GetRequests, 514 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:36:21,817 INFO L432 NwaCegarLoop]: 1122 mSDtfsCounter, 56 mSDsluCounter, 4462 mSDsCounter, 0 mSdLazyCounter, 71 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 5584 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 71 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:21,817 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 5584 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 71 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:36:21,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1033 states. [2024-11-08 16:36:21,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1033 to 1029. [2024-11-08 16:36:21,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1029 states, 1017 states have (on average 1.480825958702065) internal successors, (1506), 1017 states have internal predecessors, (1506), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:21,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1029 states to 1029 states and 1526 transitions. [2024-11-08 16:36:21,858 INFO L78 Accepts]: Start accepts. Automaton has 1029 states and 1526 transitions. Word has length 254 [2024-11-08 16:36:21,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:21,858 INFO L471 AbstractCegarLoop]: Abstraction has 1029 states and 1526 transitions. [2024-11-08 16:36:21,859 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 29.22222222222222) internal successors, (263), 9 states have internal predecessors, (263), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:36:21,859 INFO L276 IsEmpty]: Start isEmpty. Operand 1029 states and 1526 transitions. [2024-11-08 16:36:21,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2024-11-08 16:36:21,865 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:21,866 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:21,893 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-08 16:36:22,066 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:22,067 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:22,068 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:22,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1699536014, now seen corresponding path program 2 times [2024-11-08 16:36:22,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:22,068 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21093413] [2024-11-08 16:36:22,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:22,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:22,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:22,901 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2024-11-08 16:36:22,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:22,905 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-08 16:36:22,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:22,908 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:36:22,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:22,911 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 146 [2024-11-08 16:36:22,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:22,914 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 156 [2024-11-08 16:36:22,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:22,917 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-11-08 16:36:22,918 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:22,918 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21093413] [2024-11-08 16:36:22,918 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21093413] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:22,918 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1987727457] [2024-11-08 16:36:22,919 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:36:22,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:22,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:22,921 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:22,923 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-08 16:36:23,493 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:36:23,494 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:36:23,501 INFO L255 TraceCheckSpWp]: Trace formula consists of 784 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-08 16:36:23,508 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:24,184 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 83 trivial. 0 not checked. [2024-11-08 16:36:24,184 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:36:24,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1987727457] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:24,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:36:24,185 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 8 [2024-11-08 16:36:24,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717533721] [2024-11-08 16:36:24,185 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:24,186 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:36:24,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:24,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:36:24,187 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:36:24,188 INFO L87 Difference]: Start difference. First operand 1029 states and 1526 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:24,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:24,531 INFO L93 Difference]: Finished difference Result 1688 states and 2509 transitions. [2024-11-08 16:36:24,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:36:24,532 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 270 [2024-11-08 16:36:24,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:24,538 INFO L225 Difference]: With dead ends: 1688 [2024-11-08 16:36:24,539 INFO L226 Difference]: Without dead ends: 1029 [2024-11-08 16:36:24,540 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 285 GetRequests, 279 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:36:24,541 INFO L432 NwaCegarLoop]: 1017 mSDtfsCounter, 976 mSDsluCounter, 1010 mSDsCounter, 0 mSdLazyCounter, 202 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 976 SdHoareTripleChecker+Valid, 2027 SdHoareTripleChecker+Invalid, 203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 202 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:24,544 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [976 Valid, 2027 Invalid, 203 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 202 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-08 16:36:24,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1029 states. [2024-11-08 16:36:24,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1029 to 1029. [2024-11-08 16:36:24,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1029 states, 1017 states have (on average 1.4768928220255655) internal successors, (1502), 1017 states have internal predecessors, (1502), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:24,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1029 states to 1029 states and 1522 transitions. [2024-11-08 16:36:24,582 INFO L78 Accepts]: Start accepts. Automaton has 1029 states and 1522 transitions. Word has length 270 [2024-11-08 16:36:24,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:24,586 INFO L471 AbstractCegarLoop]: Abstraction has 1029 states and 1522 transitions. [2024-11-08 16:36:24,586 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:24,586 INFO L276 IsEmpty]: Start isEmpty. Operand 1029 states and 1522 transitions. [2024-11-08 16:36:24,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 273 [2024-11-08 16:36:24,593 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:24,593 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:24,620 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-08 16:36:24,794 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:24,794 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:24,795 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:24,795 INFO L85 PathProgramCache]: Analyzing trace with hash -599389617, now seen corresponding path program 1 times [2024-11-08 16:36:24,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:24,795 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478226200] [2024-11-08 16:36:24,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:24,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:25,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:25,770 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2024-11-08 16:36:25,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:25,777 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-08 16:36:25,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:25,782 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:36:25,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:25,787 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 146 [2024-11-08 16:36:25,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:25,791 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 156 [2024-11-08 16:36:25,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:25,801 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-11-08 16:36:25,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:25,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478226200] [2024-11-08 16:36:25,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1478226200] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:25,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1727424801] [2024-11-08 16:36:25,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:25,806 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:25,806 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:25,810 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:25,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-08 16:36:26,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:26,609 INFO L255 TraceCheckSpWp]: Trace formula consists of 1185 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-08 16:36:26,618 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:27,086 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 83 trivial. 0 not checked. [2024-11-08 16:36:27,086 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:36:27,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1727424801] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:27,087 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:36:27,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 10 [2024-11-08 16:36:27,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771588966] [2024-11-08 16:36:27,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:27,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:36:27,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:27,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:36:27,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:36:27,090 INFO L87 Difference]: Start difference. First operand 1029 states and 1522 transitions. Second operand has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:27,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:27,511 INFO L93 Difference]: Finished difference Result 1682 states and 2495 transitions. [2024-11-08 16:36:27,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:36:27,513 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 272 [2024-11-08 16:36:27,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:27,521 INFO L225 Difference]: With dead ends: 1682 [2024-11-08 16:36:27,526 INFO L226 Difference]: Without dead ends: 1029 [2024-11-08 16:36:27,527 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 289 GetRequests, 279 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:36:27,528 INFO L432 NwaCegarLoop]: 1017 mSDtfsCounter, 2039 mSDsluCounter, 2029 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2044 SdHoareTripleChecker+Valid, 3046 SdHoareTripleChecker+Invalid, 303 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:27,532 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2044 Valid, 3046 Invalid, 303 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-08 16:36:27,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1029 states. [2024-11-08 16:36:27,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1029 to 1029. [2024-11-08 16:36:27,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1029 states, 1017 states have (on average 1.4759095378564404) internal successors, (1501), 1017 states have internal predecessors, (1501), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:27,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1029 states to 1029 states and 1521 transitions. [2024-11-08 16:36:27,572 INFO L78 Accepts]: Start accepts. Automaton has 1029 states and 1521 transitions. Word has length 272 [2024-11-08 16:36:27,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:27,573 INFO L471 AbstractCegarLoop]: Abstraction has 1029 states and 1521 transitions. [2024-11-08 16:36:27,573 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:27,573 INFO L276 IsEmpty]: Start isEmpty. Operand 1029 states and 1521 transitions. [2024-11-08 16:36:27,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2024-11-08 16:36:27,579 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:27,580 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:27,607 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-08 16:36:27,784 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:27,785 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:27,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:27,785 INFO L85 PathProgramCache]: Analyzing trace with hash -373141968, now seen corresponding path program 1 times [2024-11-08 16:36:27,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:27,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905415794] [2024-11-08 16:36:27,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:27,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:28,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:28,600 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 84 [2024-11-08 16:36:28,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:28,602 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-08 16:36:28,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:28,606 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:36:28,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:28,610 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 146 [2024-11-08 16:36:28,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:28,615 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 156 [2024-11-08 16:36:28,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:28,619 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-11-08 16:36:28,619 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:28,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905415794] [2024-11-08 16:36:28,620 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905415794] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:28,620 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1219229492] [2024-11-08 16:36:28,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:28,620 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:28,621 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:28,623 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:28,625 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-08 16:36:29,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:29,360 INFO L255 TraceCheckSpWp]: Trace formula consists of 1188 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-08 16:36:29,368 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:29,427 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-11-08 16:36:29,427 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:36:29,706 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 13 proven. 30 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:36:29,706 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1219229492] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:36:29,707 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:36:29,707 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 10] total 15 [2024-11-08 16:36:29,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636722568] [2024-11-08 16:36:29,707 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:36:29,709 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-08 16:36:29,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:29,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-08 16:36:29,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2024-11-08 16:36:29,711 INFO L87 Difference]: Start difference. First operand 1029 states and 1521 transitions. Second operand has 15 states, 15 states have (on average 18.133333333333333) internal successors, (272), 15 states have internal predecessors, (272), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:36:30,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:30,055 INFO L93 Difference]: Finished difference Result 2065 states and 3060 transitions. [2024-11-08 16:36:30,056 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-08 16:36:30,056 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 18.133333333333333) internal successors, (272), 15 states have internal predecessors, (272), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 273 [2024-11-08 16:36:30,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:30,061 INFO L225 Difference]: With dead ends: 2065 [2024-11-08 16:36:30,061 INFO L226 Difference]: Without dead ends: 1058 [2024-11-08 16:36:30,063 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 563 GetRequests, 547 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2024-11-08 16:36:30,064 INFO L432 NwaCegarLoop]: 1126 mSDtfsCounter, 97 mSDsluCounter, 10071 mSDsCounter, 0 mSdLazyCounter, 149 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 11197 SdHoareTripleChecker+Invalid, 156 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 149 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:30,064 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [97 Valid, 11197 Invalid, 156 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 149 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:36:30,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1058 states. [2024-11-08 16:36:30,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1058 to 1058. [2024-11-08 16:36:30,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1058 states, 1046 states have (on average 1.47131931166348) internal successors, (1539), 1046 states have internal predecessors, (1539), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:30,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1058 states to 1058 states and 1559 transitions. [2024-11-08 16:36:30,101 INFO L78 Accepts]: Start accepts. Automaton has 1058 states and 1559 transitions. Word has length 273 [2024-11-08 16:36:30,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:30,102 INFO L471 AbstractCegarLoop]: Abstraction has 1058 states and 1559 transitions. [2024-11-08 16:36:30,102 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 18.133333333333333) internal successors, (272), 15 states have internal predecessors, (272), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:36:30,103 INFO L276 IsEmpty]: Start isEmpty. Operand 1058 states and 1559 transitions. [2024-11-08 16:36:30,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2024-11-08 16:36:30,109 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:30,109 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:30,137 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-08 16:36:30,310 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:30,310 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:30,311 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:30,311 INFO L85 PathProgramCache]: Analyzing trace with hash -202134331, now seen corresponding path program 2 times [2024-11-08 16:36:30,311 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:30,311 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218644310] [2024-11-08 16:36:30,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:30,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:30,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:31,094 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 104 [2024-11-08 16:36:31,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:31,097 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2024-11-08 16:36:31,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:31,101 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 142 [2024-11-08 16:36:31,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:31,104 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:36:31,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:31,107 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 176 [2024-11-08 16:36:31,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:31,110 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2024-11-08 16:36:31,111 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:31,111 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218644310] [2024-11-08 16:36:31,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1218644310] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:31,111 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [302005862] [2024-11-08 16:36:31,112 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:36:31,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:31,112 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:31,114 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:31,116 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-08 16:36:31,828 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:36:31,829 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:36:31,835 INFO L255 TraceCheckSpWp]: Trace formula consists of 791 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-08 16:36:31,843 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:32,381 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 188 trivial. 0 not checked. [2024-11-08 16:36:32,381 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:36:32,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [302005862] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:32,382 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:36:32,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-08 16:36:32,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955644355] [2024-11-08 16:36:32,382 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:32,383 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:36:32,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:32,388 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:36:32,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:36:32,389 INFO L87 Difference]: Start difference. First operand 1058 states and 1559 transitions. Second operand has 6 states, 6 states have (on average 38.5) internal successors, (231), 6 states have internal predecessors, (231), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:32,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:32,895 INFO L93 Difference]: Finished difference Result 1711 states and 2531 transitions. [2024-11-08 16:36:32,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:36:32,896 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.5) internal successors, (231), 6 states have internal predecessors, (231), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 293 [2024-11-08 16:36:32,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:32,903 INFO L225 Difference]: With dead ends: 1711 [2024-11-08 16:36:32,903 INFO L226 Difference]: Without dead ends: 1058 [2024-11-08 16:36:32,905 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 311 GetRequests, 300 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2024-11-08 16:36:32,906 INFO L432 NwaCegarLoop]: 1016 mSDtfsCounter, 2034 mSDsluCounter, 2027 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2039 SdHoareTripleChecker+Valid, 3043 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:32,908 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2039 Valid, 3043 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 299 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-08 16:36:32,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1058 states. [2024-11-08 16:36:32,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1058 to 1058. [2024-11-08 16:36:32,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1058 states, 1046 states have (on average 1.4703632887189293) internal successors, (1538), 1046 states have internal predecessors, (1538), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:32,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1058 states to 1058 states and 1558 transitions. [2024-11-08 16:36:32,945 INFO L78 Accepts]: Start accepts. Automaton has 1058 states and 1558 transitions. Word has length 293 [2024-11-08 16:36:32,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:32,946 INFO L471 AbstractCegarLoop]: Abstraction has 1058 states and 1558 transitions. [2024-11-08 16:36:32,947 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.5) internal successors, (231), 6 states have internal predecessors, (231), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:32,947 INFO L276 IsEmpty]: Start isEmpty. Operand 1058 states and 1558 transitions. [2024-11-08 16:36:32,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 295 [2024-11-08 16:36:32,953 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:32,954 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 5, 5, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:32,982 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-08 16:36:33,154 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:33,155 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:33,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:33,157 INFO L85 PathProgramCache]: Analyzing trace with hash 315420503, now seen corresponding path program 1 times [2024-11-08 16:36:33,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:33,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1089155866] [2024-11-08 16:36:33,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:33,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:33,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:33,959 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 104 [2024-11-08 16:36:33,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:33,962 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 116 [2024-11-08 16:36:33,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:33,964 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 142 [2024-11-08 16:36:33,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:33,967 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:36:33,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:33,969 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 176 [2024-11-08 16:36:33,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:33,973 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2024-11-08 16:36:33,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:33,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1089155866] [2024-11-08 16:36:33,974 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1089155866] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:33,974 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [421943988] [2024-11-08 16:36:33,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:33,974 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:33,975 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:33,977 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:33,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-08 16:36:34,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:34,798 INFO L255 TraceCheckSpWp]: Trace formula consists of 1244 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-11-08 16:36:34,806 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:36:34,957 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 0 proven. 124 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-08 16:36:34,958 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:36:35,181 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2024-11-08 16:36:35,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [421943988] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:36:35,182 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:36:35,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 12, 7] total 18 [2024-11-08 16:36:35,183 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217237367] [2024-11-08 16:36:35,183 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:36:35,184 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-11-08 16:36:35,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:35,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-08 16:36:35,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2024-11-08 16:36:35,186 INFO L87 Difference]: Start difference. First operand 1058 states and 1558 transitions. Second operand has 18 states, 18 states have (on average 15.833333333333334) internal successors, (285), 18 states have internal predecessors, (285), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:36:35,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:35,641 INFO L93 Difference]: Finished difference Result 2045 states and 3026 transitions. [2024-11-08 16:36:35,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-08 16:36:35,642 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 15.833333333333334) internal successors, (285), 18 states have internal predecessors, (285), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 294 [2024-11-08 16:36:35,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:35,647 INFO L225 Difference]: With dead ends: 2045 [2024-11-08 16:36:35,648 INFO L226 Difference]: Without dead ends: 1106 [2024-11-08 16:36:35,650 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 605 GetRequests, 587 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:36:35,650 INFO L432 NwaCegarLoop]: 1147 mSDtfsCounter, 130 mSDsluCounter, 12523 mSDsCounter, 0 mSdLazyCounter, 364 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 13670 SdHoareTripleChecker+Invalid, 365 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 364 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:35,651 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 13670 Invalid, 365 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 364 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-08 16:36:35,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2024-11-08 16:36:35,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1106. [2024-11-08 16:36:35,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1106 states, 1094 states have (on average 1.4643510054844606) internal successors, (1602), 1094 states have internal predecessors, (1602), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:35,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1106 states to 1106 states and 1622 transitions. [2024-11-08 16:36:35,691 INFO L78 Accepts]: Start accepts. Automaton has 1106 states and 1622 transitions. Word has length 294 [2024-11-08 16:36:35,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:35,691 INFO L471 AbstractCegarLoop]: Abstraction has 1106 states and 1622 transitions. [2024-11-08 16:36:35,691 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 15.833333333333334) internal successors, (285), 18 states have internal predecessors, (285), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:36:35,692 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1622 transitions. [2024-11-08 16:36:35,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 311 [2024-11-08 16:36:35,695 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:35,695 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:35,724 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-08 16:36:35,896 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:35,897 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:35,897 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:35,898 INFO L85 PathProgramCache]: Analyzing trace with hash 287686811, now seen corresponding path program 2 times [2024-11-08 16:36:35,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:35,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419056574] [2024-11-08 16:36:35,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:35,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:36,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:37,213 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2024-11-08 16:36:37,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:37,220 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-08 16:36:37,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:37,223 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 158 [2024-11-08 16:36:37,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:37,226 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 182 [2024-11-08 16:36:37,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:37,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 192 [2024-11-08 16:36:37,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:37,232 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:37,232 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:37,232 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419056574] [2024-11-08 16:36:37,233 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [419056574] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:37,233 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:37,233 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 16:36:37,233 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553906270] [2024-11-08 16:36:37,234 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:37,234 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:36:37,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:37,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:36:37,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:36:37,236 INFO L87 Difference]: Start difference. First operand 1106 states and 1622 transitions. Second operand has 4 states, 4 states have (on average 58.0) internal successors, (232), 4 states have internal predecessors, (232), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:37,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:37,290 INFO L93 Difference]: Finished difference Result 1110 states and 1626 transitions. [2024-11-08 16:36:37,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:36:37,291 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.0) internal successors, (232), 4 states have internal predecessors, (232), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 310 [2024-11-08 16:36:37,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:37,296 INFO L225 Difference]: With dead ends: 1110 [2024-11-08 16:36:37,297 INFO L226 Difference]: Without dead ends: 1108 [2024-11-08 16:36:37,298 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:36:37,298 INFO L432 NwaCegarLoop]: 1111 mSDtfsCounter, 0 mSDsluCounter, 2216 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3327 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:37,299 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3327 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:37,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states. [2024-11-08 16:36:37,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1108. [2024-11-08 16:36:37,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1108 states, 1096 states have (on average 1.4635036496350364) internal successors, (1604), 1096 states have internal predecessors, (1604), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:37,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1108 states to 1108 states and 1624 transitions. [2024-11-08 16:36:37,337 INFO L78 Accepts]: Start accepts. Automaton has 1108 states and 1624 transitions. Word has length 310 [2024-11-08 16:36:37,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:37,338 INFO L471 AbstractCegarLoop]: Abstraction has 1108 states and 1624 transitions. [2024-11-08 16:36:37,338 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.0) internal successors, (232), 4 states have internal predecessors, (232), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:37,338 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1624 transitions. [2024-11-08 16:36:37,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 312 [2024-11-08 16:36:37,342 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:37,342 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:37,342 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-08 16:36:37,343 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:37,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:37,343 INFO L85 PathProgramCache]: Analyzing trace with hash 330053089, now seen corresponding path program 1 times [2024-11-08 16:36:37,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:37,344 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868825788] [2024-11-08 16:36:37,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:37,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:37,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:38,180 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2024-11-08 16:36:38,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:38,184 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-08 16:36:38,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:38,187 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 158 [2024-11-08 16:36:38,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:38,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 182 [2024-11-08 16:36:38,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:38,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 192 [2024-11-08 16:36:38,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:38,206 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:38,207 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:38,207 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [868825788] [2024-11-08 16:36:38,207 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [868825788] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:38,207 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:38,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 16:36:38,208 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [927742235] [2024-11-08 16:36:38,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:38,209 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:36:38,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:38,210 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:36:38,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:36:38,211 INFO L87 Difference]: Start difference. First operand 1108 states and 1624 transitions. Second operand has 4 states, 4 states have (on average 58.25) internal successors, (233), 4 states have internal predecessors, (233), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:38,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:38,291 INFO L93 Difference]: Finished difference Result 1765 states and 2600 transitions. [2024-11-08 16:36:38,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:36:38,292 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 58.25) internal successors, (233), 4 states have internal predecessors, (233), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 311 [2024-11-08 16:36:38,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:38,298 INFO L225 Difference]: With dead ends: 1765 [2024-11-08 16:36:38,298 INFO L226 Difference]: Without dead ends: 1110 [2024-11-08 16:36:38,300 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:36:38,301 INFO L432 NwaCegarLoop]: 1111 mSDtfsCounter, 0 mSDsluCounter, 2212 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3323 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:38,302 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3323 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:38,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1110 states. [2024-11-08 16:36:38,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1110 to 1110. [2024-11-08 16:36:38,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1110 states, 1098 states have (on average 1.4626593806921675) internal successors, (1606), 1098 states have internal predecessors, (1606), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:38,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1110 states to 1110 states and 1626 transitions. [2024-11-08 16:36:38,351 INFO L78 Accepts]: Start accepts. Automaton has 1110 states and 1626 transitions. Word has length 311 [2024-11-08 16:36:38,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:38,352 INFO L471 AbstractCegarLoop]: Abstraction has 1110 states and 1626 transitions. [2024-11-08 16:36:38,352 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 58.25) internal successors, (233), 4 states have internal predecessors, (233), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:38,352 INFO L276 IsEmpty]: Start isEmpty. Operand 1110 states and 1626 transitions. [2024-11-08 16:36:38,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 313 [2024-11-08 16:36:38,355 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:38,356 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:38,356 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-08 16:36:38,356 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:38,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:38,357 INFO L85 PathProgramCache]: Analyzing trace with hash 543746612, now seen corresponding path program 1 times [2024-11-08 16:36:38,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:38,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831694920] [2024-11-08 16:36:38,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:38,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:39,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:41,277 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2024-11-08 16:36:41,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:41,281 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-08 16:36:41,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:41,287 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 158 [2024-11-08 16:36:41,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:41,291 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 182 [2024-11-08 16:36:41,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:41,294 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 192 [2024-11-08 16:36:41,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:41,301 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:41,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:41,301 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831694920] [2024-11-08 16:36:41,302 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831694920] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:41,302 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:41,302 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:36:41,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649057152] [2024-11-08 16:36:41,302 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:41,303 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:36:41,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:41,304 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:36:41,304 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:36:41,305 INFO L87 Difference]: Start difference. First operand 1110 states and 1626 transitions. Second operand has 8 states, 8 states have (on average 29.25) internal successors, (234), 8 states have internal predecessors, (234), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:41,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:41,569 INFO L93 Difference]: Finished difference Result 1879 states and 2766 transitions. [2024-11-08 16:36:41,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:36:41,570 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 29.25) internal successors, (234), 8 states have internal predecessors, (234), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 312 [2024-11-08 16:36:41,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:41,576 INFO L225 Difference]: With dead ends: 1879 [2024-11-08 16:36:41,577 INFO L226 Difference]: Without dead ends: 1134 [2024-11-08 16:36:41,578 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:36:41,580 INFO L432 NwaCegarLoop]: 1092 mSDtfsCounter, 1031 mSDsluCounter, 5428 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1034 SdHoareTripleChecker+Valid, 6520 SdHoareTripleChecker+Invalid, 158 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:41,581 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1034 Valid, 6520 Invalid, 158 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 157 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:36:41,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1134 states. [2024-11-08 16:36:41,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1134 to 1128. [2024-11-08 16:36:41,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1128 states, 1116 states have (on average 1.4623655913978495) internal successors, (1632), 1116 states have internal predecessors, (1632), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:41,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1128 states to 1128 states and 1652 transitions. [2024-11-08 16:36:41,629 INFO L78 Accepts]: Start accepts. Automaton has 1128 states and 1652 transitions. Word has length 312 [2024-11-08 16:36:41,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:41,630 INFO L471 AbstractCegarLoop]: Abstraction has 1128 states and 1652 transitions. [2024-11-08 16:36:41,630 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 29.25) internal successors, (234), 8 states have internal predecessors, (234), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:41,630 INFO L276 IsEmpty]: Start isEmpty. Operand 1128 states and 1652 transitions. [2024-11-08 16:36:41,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 314 [2024-11-08 16:36:41,633 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:41,634 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:41,634 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-08 16:36:41,634 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:41,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:41,635 INFO L85 PathProgramCache]: Analyzing trace with hash -1345501505, now seen corresponding path program 1 times [2024-11-08 16:36:41,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:41,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700341833] [2024-11-08 16:36:41,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:41,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:41,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:42,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2024-11-08 16:36:42,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:42,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-08 16:36:42,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:42,816 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:36:42,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:42,824 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:36:42,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:42,827 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:36:42,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:42,832 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:42,833 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:42,833 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700341833] [2024-11-08 16:36:42,833 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [700341833] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:42,833 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:42,834 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:36:42,834 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071306633] [2024-11-08 16:36:42,834 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:42,835 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:36:42,835 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:42,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:36:42,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:42,837 INFO L87 Difference]: Start difference. First operand 1128 states and 1652 transitions. Second operand has 6 states, 6 states have (on average 39.166666666666664) internal successors, (235), 6 states have internal predecessors, (235), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:44,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:44,232 INFO L93 Difference]: Finished difference Result 1886 states and 2775 transitions. [2024-11-08 16:36:44,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:36:44,233 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 39.166666666666664) internal successors, (235), 6 states have internal predecessors, (235), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 313 [2024-11-08 16:36:44,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:44,238 INFO L225 Difference]: With dead ends: 1886 [2024-11-08 16:36:44,239 INFO L226 Difference]: Without dead ends: 1136 [2024-11-08 16:36:44,241 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:44,242 INFO L432 NwaCegarLoop]: 820 mSDtfsCounter, 1029 mSDsluCounter, 2426 mSDsCounter, 0 mSdLazyCounter, 1194 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1032 SdHoareTripleChecker+Valid, 3246 SdHoareTripleChecker+Invalid, 1195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:44,242 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1032 Valid, 3246 Invalid, 1195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1194 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2024-11-08 16:36:44,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1136 states. [2024-11-08 16:36:44,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1136 to 1132. [2024-11-08 16:36:44,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1132 states, 1120 states have (on average 1.4607142857142856) internal successors, (1636), 1120 states have internal predecessors, (1636), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:44,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1132 states to 1132 states and 1656 transitions. [2024-11-08 16:36:44,301 INFO L78 Accepts]: Start accepts. Automaton has 1132 states and 1656 transitions. Word has length 313 [2024-11-08 16:36:44,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:44,302 INFO L471 AbstractCegarLoop]: Abstraction has 1132 states and 1656 transitions. [2024-11-08 16:36:44,303 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 39.166666666666664) internal successors, (235), 6 states have internal predecessors, (235), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:44,303 INFO L276 IsEmpty]: Start isEmpty. Operand 1132 states and 1656 transitions. [2024-11-08 16:36:44,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 314 [2024-11-08 16:36:44,308 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:44,308 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:44,309 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-08 16:36:44,309 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:44,309 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:44,310 INFO L85 PathProgramCache]: Analyzing trace with hash -1207589548, now seen corresponding path program 1 times [2024-11-08 16:36:44,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:44,310 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359380867] [2024-11-08 16:36:44,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:44,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:44,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:45,249 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2024-11-08 16:36:45,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:45,253 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-08 16:36:45,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:45,257 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:36:45,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:45,259 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:36:45,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:45,261 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:36:45,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:45,265 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:45,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:45,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359380867] [2024-11-08 16:36:45,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [359380867] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:45,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:45,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:36:45,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601611375] [2024-11-08 16:36:45,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:45,268 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:36:45,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:45,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:36:45,269 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:45,269 INFO L87 Difference]: Start difference. First operand 1132 states and 1656 transitions. Second operand has 6 states, 6 states have (on average 39.166666666666664) internal successors, (235), 6 states have internal predecessors, (235), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:46,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:46,429 INFO L93 Difference]: Finished difference Result 1908 states and 2804 transitions. [2024-11-08 16:36:46,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:36:46,430 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 39.166666666666664) internal successors, (235), 6 states have internal predecessors, (235), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 313 [2024-11-08 16:36:46,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:46,437 INFO L225 Difference]: With dead ends: 1908 [2024-11-08 16:36:46,439 INFO L226 Difference]: Without dead ends: 1136 [2024-11-08 16:36:46,441 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:36:46,442 INFO L432 NwaCegarLoop]: 822 mSDtfsCounter, 1034 mSDsluCounter, 2447 mSDsCounter, 0 mSdLazyCounter, 1180 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1037 SdHoareTripleChecker+Valid, 3269 SdHoareTripleChecker+Invalid, 1182 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1180 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:46,442 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1037 Valid, 3269 Invalid, 1182 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1180 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-08 16:36:46,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1136 states. [2024-11-08 16:36:46,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1136 to 1136. [2024-11-08 16:36:46,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1136 states, 1124 states have (on average 1.4590747330960854) internal successors, (1640), 1124 states have internal predecessors, (1640), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:46,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1136 states to 1136 states and 1660 transitions. [2024-11-08 16:36:46,523 INFO L78 Accepts]: Start accepts. Automaton has 1136 states and 1660 transitions. Word has length 313 [2024-11-08 16:36:46,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:46,523 INFO L471 AbstractCegarLoop]: Abstraction has 1136 states and 1660 transitions. [2024-11-08 16:36:46,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 39.166666666666664) internal successors, (235), 6 states have internal predecessors, (235), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:46,524 INFO L276 IsEmpty]: Start isEmpty. Operand 1136 states and 1660 transitions. [2024-11-08 16:36:46,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 315 [2024-11-08 16:36:46,527 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:46,528 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:46,528 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-08 16:36:46,528 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:46,529 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:46,529 INFO L85 PathProgramCache]: Analyzing trace with hash 1671319693, now seen corresponding path program 1 times [2024-11-08 16:36:46,529 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:46,529 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325227773] [2024-11-08 16:36:46,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:46,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:47,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:48,367 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 120 [2024-11-08 16:36:48,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:48,372 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-08 16:36:48,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:48,377 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 160 [2024-11-08 16:36:48,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:48,382 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 184 [2024-11-08 16:36:48,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:48,386 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 194 [2024-11-08 16:36:48,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:48,392 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:48,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:48,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [325227773] [2024-11-08 16:36:48,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [325227773] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:48,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:48,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:36:48,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132082808] [2024-11-08 16:36:48,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:48,394 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:36:48,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:48,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:36:48,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:48,397 INFO L87 Difference]: Start difference. First operand 1136 states and 1660 transitions. Second operand has 6 states, 6 states have (on average 39.333333333333336) internal successors, (236), 6 states have internal predecessors, (236), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:49,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:49,886 INFO L93 Difference]: Finished difference Result 2363 states and 3476 transitions. [2024-11-08 16:36:49,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:36:49,887 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 39.333333333333336) internal successors, (236), 6 states have internal predecessors, (236), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 314 [2024-11-08 16:36:49,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:49,894 INFO L225 Difference]: With dead ends: 2363 [2024-11-08 16:36:49,894 INFO L226 Difference]: Without dead ends: 1693 [2024-11-08 16:36:49,896 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:36:49,897 INFO L432 NwaCegarLoop]: 813 mSDtfsCounter, 1755 mSDsluCounter, 2373 mSDsCounter, 0 mSdLazyCounter, 1165 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1760 SdHoareTripleChecker+Valid, 3186 SdHoareTripleChecker+Invalid, 1168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1165 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:49,897 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1760 Valid, 3186 Invalid, 1168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1165 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-08 16:36:49,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1693 states. [2024-11-08 16:36:49,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1693 to 1022. [2024-11-08 16:36:49,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1022 states, 1010 states have (on average 1.4623762376237623) internal successors, (1477), 1010 states have internal predecessors, (1477), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:49,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1497 transitions. [2024-11-08 16:36:49,941 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1497 transitions. Word has length 314 [2024-11-08 16:36:49,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:49,941 INFO L471 AbstractCegarLoop]: Abstraction has 1022 states and 1497 transitions. [2024-11-08 16:36:49,942 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 39.333333333333336) internal successors, (236), 6 states have internal predecessors, (236), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:49,942 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1497 transitions. [2024-11-08 16:36:49,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 316 [2024-11-08 16:36:49,945 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:49,945 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:49,945 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-08 16:36:49,946 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:49,946 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:49,946 INFO L85 PathProgramCache]: Analyzing trace with hash 533287071, now seen corresponding path program 1 times [2024-11-08 16:36:49,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:49,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057232212] [2024-11-08 16:36:49,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:49,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:50,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:51,038 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:36:51,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:51,042 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:36:51,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:51,046 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:36:51,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:51,048 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:36:51,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:51,053 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:36:51,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:51,056 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:51,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:51,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057232212] [2024-11-08 16:36:51,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1057232212] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:51,057 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:51,057 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 16:36:51,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140479616] [2024-11-08 16:36:51,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:51,059 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:36:51,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:51,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:36:51,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:36:51,061 INFO L87 Difference]: Start difference. First operand 1022 states and 1497 transitions. Second operand has 4 states, 4 states have (on average 59.25) internal successors, (237), 4 states have internal predecessors, (237), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:51,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:51,155 INFO L93 Difference]: Finished difference Result 1777 states and 2614 transitions. [2024-11-08 16:36:51,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:36:51,156 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 59.25) internal successors, (237), 4 states have internal predecessors, (237), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 315 [2024-11-08 16:36:51,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:51,160 INFO L225 Difference]: With dead ends: 1777 [2024-11-08 16:36:51,161 INFO L226 Difference]: Without dead ends: 1018 [2024-11-08 16:36:51,162 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:36:51,163 INFO L432 NwaCegarLoop]: 1097 mSDtfsCounter, 1014 mSDsluCounter, 1104 mSDsCounter, 0 mSdLazyCounter, 29 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1017 SdHoareTripleChecker+Valid, 2201 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 29 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:51,163 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1017 Valid, 2201 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:51,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1018 states. [2024-11-08 16:36:51,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1018 to 1018. [2024-11-08 16:36:51,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1018 states, 1006 states have (on average 1.4622266401590458) internal successors, (1471), 1006 states have internal predecessors, (1471), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:51,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1018 states to 1018 states and 1491 transitions. [2024-11-08 16:36:51,203 INFO L78 Accepts]: Start accepts. Automaton has 1018 states and 1491 transitions. Word has length 315 [2024-11-08 16:36:51,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:51,203 INFO L471 AbstractCegarLoop]: Abstraction has 1018 states and 1491 transitions. [2024-11-08 16:36:51,208 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 59.25) internal successors, (237), 4 states have internal predecessors, (237), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:36:51,208 INFO L276 IsEmpty]: Start isEmpty. Operand 1018 states and 1491 transitions. [2024-11-08 16:36:51,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 316 [2024-11-08 16:36:51,214 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:51,214 INFO L215 NwaCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 8, 8, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:51,214 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-08 16:36:51,215 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:51,215 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:51,215 INFO L85 PathProgramCache]: Analyzing trace with hash -2047163005, now seen corresponding path program 1 times [2024-11-08 16:36:51,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:51,216 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067439851] [2024-11-08 16:36:51,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:51,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:51,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:53,206 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:36:53,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:53,214 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:36:53,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:53,220 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:36:53,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:53,226 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:36:53,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:53,231 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:36:53,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:53,240 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 280 trivial. 0 not checked. [2024-11-08 16:36:53,240 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:53,240 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067439851] [2024-11-08 16:36:53,241 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2067439851] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:53,241 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:53,241 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:36:53,241 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [957067400] [2024-11-08 16:36:53,241 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:53,242 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:36:53,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:53,244 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:36:53,244 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:36:53,249 INFO L87 Difference]: Start difference. First operand 1018 states and 1491 transitions. Second operand has 6 states, 6 states have (on average 39.5) internal successors, (237), 6 states have internal predecessors, (237), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:53,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:53,483 INFO L93 Difference]: Finished difference Result 1857 states and 2734 transitions. [2024-11-08 16:36:53,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:36:53,483 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 39.5) internal successors, (237), 6 states have internal predecessors, (237), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 315 [2024-11-08 16:36:53,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:53,489 INFO L225 Difference]: With dead ends: 1857 [2024-11-08 16:36:53,489 INFO L226 Difference]: Without dead ends: 1189 [2024-11-08 16:36:53,491 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:36:53,491 INFO L432 NwaCegarLoop]: 1095 mSDtfsCounter, 1821 mSDsluCounter, 3279 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1826 SdHoareTripleChecker+Valid, 4374 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:53,492 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1826 Valid, 4374 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:36:53,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1189 states. [2024-11-08 16:36:53,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1189 to 1189. [2024-11-08 16:36:53,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1189 states, 1177 states have (on average 1.4647408666100254) internal successors, (1724), 1177 states have internal predecessors, (1724), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:53,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1189 states to 1189 states and 1744 transitions. [2024-11-08 16:36:53,543 INFO L78 Accepts]: Start accepts. Automaton has 1189 states and 1744 transitions. Word has length 315 [2024-11-08 16:36:53,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:53,548 INFO L471 AbstractCegarLoop]: Abstraction has 1189 states and 1744 transitions. [2024-11-08 16:36:53,549 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 39.5) internal successors, (237), 6 states have internal predecessors, (237), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:36:53,549 INFO L276 IsEmpty]: Start isEmpty. Operand 1189 states and 1744 transitions. [2024-11-08 16:36:53,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 675 [2024-11-08 16:36:53,557 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:53,558 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:53,558 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-08 16:36:53,559 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:53,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:53,560 INFO L85 PathProgramCache]: Analyzing trace with hash 1087784079, now seen corresponding path program 1 times [2024-11-08 16:36:53,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:53,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699817746] [2024-11-08 16:36:53,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:53,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:54,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,452 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:36:55,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,455 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:36:55,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,457 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:36:55,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,459 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:36:55,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,461 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:36:55,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,463 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 480 [2024-11-08 16:36:55,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,465 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 492 [2024-11-08 16:36:55,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,467 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 520 [2024-11-08 16:36:55,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,469 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 544 [2024-11-08 16:36:55,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,472 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 554 [2024-11-08 16:36:55,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:55,476 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:36:55,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:55,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1699817746] [2024-11-08 16:36:55,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1699817746] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:36:55,476 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:36:55,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:36:55,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [373731708] [2024-11-08 16:36:55,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:36:55,478 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:36:55,478 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:36:55,479 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:36:55,480 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:36:55,481 INFO L87 Difference]: Start difference. First operand 1189 states and 1744 transitions. Second operand has 3 states, 3 states have (on average 190.33333333333334) internal successors, (571), 3 states have internal predecessors, (571), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:36:55,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:36:55,528 INFO L93 Difference]: Finished difference Result 1859 states and 2737 transitions. [2024-11-08 16:36:55,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:36:55,529 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 190.33333333333334) internal successors, (571), 3 states have internal predecessors, (571), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 674 [2024-11-08 16:36:55,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:36:55,535 INFO L225 Difference]: With dead ends: 1859 [2024-11-08 16:36:55,535 INFO L226 Difference]: Without dead ends: 1191 [2024-11-08 16:36:55,536 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:36:55,537 INFO L432 NwaCegarLoop]: 1110 mSDtfsCounter, 1 mSDsluCounter, 1105 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2215 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:36:55,537 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 2215 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:36:55,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1191 states. [2024-11-08 16:36:55,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1191 to 1191. [2024-11-08 16:36:55,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1191 states, 1179 states have (on average 1.4639525021204411) internal successors, (1726), 1179 states have internal predecessors, (1726), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:36:55,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1191 states to 1191 states and 1746 transitions. [2024-11-08 16:36:55,577 INFO L78 Accepts]: Start accepts. Automaton has 1191 states and 1746 transitions. Word has length 674 [2024-11-08 16:36:55,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:36:55,578 INFO L471 AbstractCegarLoop]: Abstraction has 1191 states and 1746 transitions. [2024-11-08 16:36:55,578 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 190.33333333333334) internal successors, (571), 3 states have internal predecessors, (571), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:36:55,578 INFO L276 IsEmpty]: Start isEmpty. Operand 1191 states and 1746 transitions. [2024-11-08 16:36:55,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 677 [2024-11-08 16:36:55,585 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:36:55,586 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:36:55,586 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-08 16:36:55,586 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:36:55,587 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:36:55,587 INFO L85 PathProgramCache]: Analyzing trace with hash -28454646, now seen corresponding path program 1 times [2024-11-08 16:36:55,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:36:55,588 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451097468] [2024-11-08 16:36:55,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:55,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:36:56,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,356 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:36:57,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,360 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:36:57,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,363 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:36:57,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,365 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:36:57,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,367 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:36:57,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,369 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 482 [2024-11-08 16:36:57,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,373 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 494 [2024-11-08 16:36:57,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,375 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 522 [2024-11-08 16:36:57,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,377 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 546 [2024-11-08 16:36:57,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,380 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 556 [2024-11-08 16:36:57,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:57,384 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:36:57,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:36:57,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451097468] [2024-11-08 16:36:57,385 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451097468] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:36:57,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1308187087] [2024-11-08 16:36:57,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:36:57,387 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:36:57,388 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:36:57,390 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:36:57,392 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-08 16:36:58,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:36:58,941 INFO L255 TraceCheckSpWp]: Trace formula consists of 3363 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-08 16:36:58,960 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:00,574 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 0 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2024-11-08 16:37:00,575 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:37:00,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1308187087] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:37:00,575 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:37:00,576 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2024-11-08 16:37:00,576 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495101332] [2024-11-08 16:37:00,576 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:00,577 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:37:00,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:00,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:37:00,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:37:00,579 INFO L87 Difference]: Start difference. First operand 1191 states and 1746 transitions. Second operand has 4 states, 4 states have (on average 144.0) internal successors, (576), 4 states have internal predecessors, (576), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:01,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:01,198 INFO L93 Difference]: Finished difference Result 1860 states and 2736 transitions. [2024-11-08 16:37:01,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:01,198 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 144.0) internal successors, (576), 4 states have internal predecessors, (576), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 676 [2024-11-08 16:37:01,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:01,206 INFO L225 Difference]: With dead ends: 1860 [2024-11-08 16:37:01,206 INFO L226 Difference]: Without dead ends: 1190 [2024-11-08 16:37:01,207 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 700 GetRequests, 695 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:01,209 INFO L432 NwaCegarLoop]: 811 mSDtfsCounter, 836 mSDsluCounter, 813 mSDsCounter, 0 mSdLazyCounter, 601 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 836 SdHoareTripleChecker+Valid, 1624 SdHoareTripleChecker+Invalid, 602 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 601 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:01,209 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [836 Valid, 1624 Invalid, 602 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 601 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-08 16:37:01,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1190 states. [2024-11-08 16:37:01,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1190 to 1190. [2024-11-08 16:37:01,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1190 states, 1178 states have (on average 1.4626485568760612) internal successors, (1723), 1178 states have internal predecessors, (1723), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:01,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1190 states to 1190 states and 1743 transitions. [2024-11-08 16:37:01,259 INFO L78 Accepts]: Start accepts. Automaton has 1190 states and 1743 transitions. Word has length 676 [2024-11-08 16:37:01,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:01,260 INFO L471 AbstractCegarLoop]: Abstraction has 1190 states and 1743 transitions. [2024-11-08 16:37:01,261 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 144.0) internal successors, (576), 4 states have internal predecessors, (576), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:01,261 INFO L276 IsEmpty]: Start isEmpty. Operand 1190 states and 1743 transitions. [2024-11-08 16:37:01,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 678 [2024-11-08 16:37:01,268 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:01,270 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:01,303 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-11-08 16:37:01,471 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:01,471 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:01,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:01,472 INFO L85 PathProgramCache]: Analyzing trace with hash -877553249, now seen corresponding path program 1 times [2024-11-08 16:37:01,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:01,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892254379] [2024-11-08 16:37:01,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:01,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:02,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,173 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:03,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,176 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:03,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,180 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:03,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,182 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:03,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,184 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:03,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,186 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 483 [2024-11-08 16:37:03,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,189 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 495 [2024-11-08 16:37:03,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,191 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 523 [2024-11-08 16:37:03,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 547 [2024-11-08 16:37:03,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 557 [2024-11-08 16:37:03,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:03,200 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:03,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:03,200 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892254379] [2024-11-08 16:37:03,200 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [892254379] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:03,201 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [67259404] [2024-11-08 16:37:03,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:03,201 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:03,201 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:03,203 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:03,205 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-08 16:37:04,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:04,833 INFO L255 TraceCheckSpWp]: Trace formula consists of 3366 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-08 16:37:04,851 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:06,230 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 0 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2024-11-08 16:37:06,231 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:37:06,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [67259404] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:37:06,231 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:37:06,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2024-11-08 16:37:06,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128914638] [2024-11-08 16:37:06,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:06,233 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:37:06,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:06,234 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:37:06,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:37:06,235 INFO L87 Difference]: Start difference. First operand 1190 states and 1743 transitions. Second operand has 4 states, 4 states have (on average 144.25) internal successors, (577), 4 states have internal predecessors, (577), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:06,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:06,845 INFO L93 Difference]: Finished difference Result 1858 states and 2730 transitions. [2024-11-08 16:37:06,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:06,846 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 144.25) internal successors, (577), 4 states have internal predecessors, (577), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 677 [2024-11-08 16:37:06,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:06,855 INFO L225 Difference]: With dead ends: 1858 [2024-11-08 16:37:06,857 INFO L226 Difference]: Without dead ends: 1189 [2024-11-08 16:37:06,858 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 701 GetRequests, 696 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:06,859 INFO L432 NwaCegarLoop]: 811 mSDtfsCounter, 828 mSDsluCounter, 813 mSDsCounter, 0 mSdLazyCounter, 595 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 828 SdHoareTripleChecker+Valid, 1624 SdHoareTripleChecker+Invalid, 596 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 595 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:06,860 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [828 Valid, 1624 Invalid, 596 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 595 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-08 16:37:06,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1189 states. [2024-11-08 16:37:06,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1189 to 1189. [2024-11-08 16:37:06,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1189 states, 1177 states have (on average 1.4613423959218352) internal successors, (1720), 1177 states have internal predecessors, (1720), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:06,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1189 states to 1189 states and 1740 transitions. [2024-11-08 16:37:06,897 INFO L78 Accepts]: Start accepts. Automaton has 1189 states and 1740 transitions. Word has length 677 [2024-11-08 16:37:06,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:06,898 INFO L471 AbstractCegarLoop]: Abstraction has 1189 states and 1740 transitions. [2024-11-08 16:37:06,898 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 144.25) internal successors, (577), 4 states have internal predecessors, (577), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:06,899 INFO L276 IsEmpty]: Start isEmpty. Operand 1189 states and 1740 transitions. [2024-11-08 16:37:06,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 679 [2024-11-08 16:37:06,907 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:06,908 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:06,940 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-11-08 16:37:07,108 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2024-11-08 16:37:07,109 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:07,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:07,110 INFO L85 PathProgramCache]: Analyzing trace with hash 637701432, now seen corresponding path program 1 times [2024-11-08 16:37:07,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:07,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1624533211] [2024-11-08 16:37:07,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:07,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:07,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,969 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:08,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,971 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:08,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,973 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:08,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,975 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:08,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,978 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:08,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,980 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 484 [2024-11-08 16:37:08,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,982 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 496 [2024-11-08 16:37:08,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,985 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 524 [2024-11-08 16:37:08,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,988 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 548 [2024-11-08 16:37:08,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,990 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 558 [2024-11-08 16:37:08,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:08,993 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:08,993 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:08,993 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1624533211] [2024-11-08 16:37:08,994 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1624533211] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:08,994 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [156858681] [2024-11-08 16:37:08,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:08,994 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:08,995 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:08,998 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:09,000 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-08 16:37:10,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:10,628 INFO L255 TraceCheckSpWp]: Trace formula consists of 3369 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-08 16:37:10,646 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:11,973 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 0 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2024-11-08 16:37:11,973 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:37:11,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [156858681] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:37:11,973 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:37:11,974 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 6 [2024-11-08 16:37:11,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273246763] [2024-11-08 16:37:11,974 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:11,975 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:37:11,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:11,976 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:37:11,976 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:37:11,976 INFO L87 Difference]: Start difference. First operand 1189 states and 1740 transitions. Second operand has 4 states, 4 states have (on average 144.5) internal successors, (578), 4 states have internal predecessors, (578), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:12,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:12,551 INFO L93 Difference]: Finished difference Result 1856 states and 2724 transitions. [2024-11-08 16:37:12,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:12,552 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 144.5) internal successors, (578), 4 states have internal predecessors, (578), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 678 [2024-11-08 16:37:12,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:12,557 INFO L225 Difference]: With dead ends: 1856 [2024-11-08 16:37:12,561 INFO L226 Difference]: Without dead ends: 1188 [2024-11-08 16:37:12,562 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 702 GetRequests, 697 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:12,565 INFO L432 NwaCegarLoop]: 811 mSDtfsCounter, 814 mSDsluCounter, 813 mSDsCounter, 0 mSdLazyCounter, 589 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 814 SdHoareTripleChecker+Valid, 1624 SdHoareTripleChecker+Invalid, 590 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 589 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:12,566 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [814 Valid, 1624 Invalid, 590 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 589 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-08 16:37:12,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states. [2024-11-08 16:37:12,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1188. [2024-11-08 16:37:12,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1188 states, 1176 states have (on average 1.4600340136054422) internal successors, (1717), 1176 states have internal predecessors, (1717), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:12,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1188 states to 1188 states and 1737 transitions. [2024-11-08 16:37:12,633 INFO L78 Accepts]: Start accepts. Automaton has 1188 states and 1737 transitions. Word has length 678 [2024-11-08 16:37:12,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:12,633 INFO L471 AbstractCegarLoop]: Abstraction has 1188 states and 1737 transitions. [2024-11-08 16:37:12,634 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 144.5) internal successors, (578), 4 states have internal predecessors, (578), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:12,634 INFO L276 IsEmpty]: Start isEmpty. Operand 1188 states and 1737 transitions. [2024-11-08 16:37:12,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 680 [2024-11-08 16:37:12,640 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:12,640 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:12,673 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2024-11-08 16:37:12,841 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2024-11-08 16:37:12,841 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:12,842 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:12,842 INFO L85 PathProgramCache]: Analyzing trace with hash -433018947, now seen corresponding path program 1 times [2024-11-08 16:37:12,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:12,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104061003] [2024-11-08 16:37:12,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:12,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:13,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,306 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:14,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,308 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:14,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,313 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:14,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,315 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:14,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:14,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,323 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 485 [2024-11-08 16:37:14,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,325 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 497 [2024-11-08 16:37:14,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,327 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 525 [2024-11-08 16:37:14,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,329 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 549 [2024-11-08 16:37:14,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,331 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 559 [2024-11-08 16:37:14,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:14,335 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:14,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:14,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104061003] [2024-11-08 16:37:14,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1104061003] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:14,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [481133849] [2024-11-08 16:37:14,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:14,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:14,337 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:14,339 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:14,341 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-08 16:37:15,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:15,953 INFO L255 TraceCheckSpWp]: Trace formula consists of 3372 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-08 16:37:15,965 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:17,273 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 120 refuted. 0 times theorem prover too weak. 201 trivial. 0 not checked. [2024-11-08 16:37:17,273 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:18,450 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 421 trivial. 0 not checked. [2024-11-08 16:37:18,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [481133849] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:18,451 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:18,452 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [4, 14] total 19 [2024-11-08 16:37:18,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077175077] [2024-11-08 16:37:18,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:18,453 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:37:18,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:18,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:37:18,455 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2024-11-08 16:37:18,455 INFO L87 Difference]: Start difference. First operand 1188 states and 1737 transitions. Second operand has 5 states, 5 states have (on average 115.2) internal successors, (576), 5 states have internal predecessors, (576), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:18,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:18,771 INFO L93 Difference]: Finished difference Result 1855 states and 2719 transitions. [2024-11-08 16:37:18,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:18,772 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 115.2) internal successors, (576), 5 states have internal predecessors, (576), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 679 [2024-11-08 16:37:18,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:18,777 INFO L225 Difference]: With dead ends: 1855 [2024-11-08 16:37:18,777 INFO L226 Difference]: Without dead ends: 1188 [2024-11-08 16:37:18,778 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1381 GetRequests, 1363 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:37:18,779 INFO L432 NwaCegarLoop]: 1006 mSDtfsCounter, 1835 mSDsluCounter, 1008 mSDsCounter, 0 mSdLazyCounter, 196 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1840 SdHoareTripleChecker+Valid, 2014 SdHoareTripleChecker+Invalid, 203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:18,779 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1840 Valid, 2014 Invalid, 203 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 196 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:37:18,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states. [2024-11-08 16:37:18,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1188. [2024-11-08 16:37:18,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1188 states, 1176 states have (on average 1.4591836734693877) internal successors, (1716), 1176 states have internal predecessors, (1716), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:18,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1188 states to 1188 states and 1736 transitions. [2024-11-08 16:37:18,837 INFO L78 Accepts]: Start accepts. Automaton has 1188 states and 1736 transitions. Word has length 679 [2024-11-08 16:37:18,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:18,838 INFO L471 AbstractCegarLoop]: Abstraction has 1188 states and 1736 transitions. [2024-11-08 16:37:18,838 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 115.2) internal successors, (576), 5 states have internal predecessors, (576), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:18,838 INFO L276 IsEmpty]: Start isEmpty. Operand 1188 states and 1736 transitions. [2024-11-08 16:37:18,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 681 [2024-11-08 16:37:18,846 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:18,847 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:18,882 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-08 16:37:19,052 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2024-11-08 16:37:19,052 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:19,053 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:19,053 INFO L85 PathProgramCache]: Analyzing trace with hash -1088700928, now seen corresponding path program 1 times [2024-11-08 16:37:19,053 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:19,053 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508844084] [2024-11-08 16:37:19,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:19,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:19,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,555 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:20,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,557 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:20,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,559 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:20,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,561 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:20,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,563 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:20,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,565 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 486 [2024-11-08 16:37:20,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,567 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 498 [2024-11-08 16:37:20,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,569 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 526 [2024-11-08 16:37:20,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,571 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 550 [2024-11-08 16:37:20,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,573 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 560 [2024-11-08 16:37:20,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:20,577 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:20,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:20,577 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508844084] [2024-11-08 16:37:20,577 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [508844084] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:20,577 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1875691878] [2024-11-08 16:37:20,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:20,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:20,578 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:20,580 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:20,587 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-08 16:37:22,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:22,311 INFO L255 TraceCheckSpWp]: Trace formula consists of 3375 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-08 16:37:22,327 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:23,713 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 120 refuted. 0 times theorem prover too weak. 201 trivial. 0 not checked. [2024-11-08 16:37:23,713 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:24,872 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 421 trivial. 0 not checked. [2024-11-08 16:37:24,872 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1875691878] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:24,872 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:24,873 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [4, 14] total 19 [2024-11-08 16:37:24,873 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690498331] [2024-11-08 16:37:24,873 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:24,874 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:37:24,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:24,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:37:24,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2024-11-08 16:37:24,876 INFO L87 Difference]: Start difference. First operand 1188 states and 1736 transitions. Second operand has 5 states, 5 states have (on average 115.4) internal successors, (577), 5 states have internal predecessors, (577), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:25,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:25,190 INFO L93 Difference]: Finished difference Result 1855 states and 2717 transitions. [2024-11-08 16:37:25,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:25,191 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 115.4) internal successors, (577), 5 states have internal predecessors, (577), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 680 [2024-11-08 16:37:25,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:25,196 INFO L225 Difference]: With dead ends: 1855 [2024-11-08 16:37:25,196 INFO L226 Difference]: Without dead ends: 1188 [2024-11-08 16:37:25,197 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1383 GetRequests, 1365 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:37:25,198 INFO L432 NwaCegarLoop]: 1006 mSDtfsCounter, 1811 mSDsluCounter, 1008 mSDsCounter, 0 mSdLazyCounter, 194 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1816 SdHoareTripleChecker+Valid, 2014 SdHoareTripleChecker+Invalid, 201 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 194 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:25,198 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1816 Valid, 2014 Invalid, 201 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 194 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:37:25,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states. [2024-11-08 16:37:25,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1188. [2024-11-08 16:37:25,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1188 states, 1176 states have (on average 1.4583333333333333) internal successors, (1715), 1176 states have internal predecessors, (1715), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:25,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1188 states to 1188 states and 1735 transitions. [2024-11-08 16:37:25,239 INFO L78 Accepts]: Start accepts. Automaton has 1188 states and 1735 transitions. Word has length 680 [2024-11-08 16:37:25,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:25,240 INFO L471 AbstractCegarLoop]: Abstraction has 1188 states and 1735 transitions. [2024-11-08 16:37:25,240 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 115.4) internal successors, (577), 5 states have internal predecessors, (577), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:25,240 INFO L276 IsEmpty]: Start isEmpty. Operand 1188 states and 1735 transitions. [2024-11-08 16:37:25,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 682 [2024-11-08 16:37:25,247 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:25,248 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:25,283 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-08 16:37:25,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2024-11-08 16:37:25,449 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:25,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:25,450 INFO L85 PathProgramCache]: Analyzing trace with hash -1036254048, now seen corresponding path program 1 times [2024-11-08 16:37:25,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:25,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573157687] [2024-11-08 16:37:25,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:25,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:26,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,955 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:26,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,957 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:26,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,959 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:26,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,961 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:26,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,962 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:26,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,964 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 487 [2024-11-08 16:37:26,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,966 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 499 [2024-11-08 16:37:26,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,968 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 527 [2024-11-08 16:37:26,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,970 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 551 [2024-11-08 16:37:26,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,972 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 561 [2024-11-08 16:37:26,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:26,975 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:26,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:26,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573157687] [2024-11-08 16:37:26,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1573157687] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:26,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [433753433] [2024-11-08 16:37:26,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:26,977 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:26,977 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:26,979 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:26,983 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-08 16:37:28,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:28,893 INFO L255 TraceCheckSpWp]: Trace formula consists of 3378 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-08 16:37:28,909 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:30,145 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 120 refuted. 0 times theorem prover too weak. 201 trivial. 0 not checked. [2024-11-08 16:37:30,145 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:31,409 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 421 trivial. 0 not checked. [2024-11-08 16:37:31,410 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [433753433] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:31,410 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:31,410 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [4, 14] total 19 [2024-11-08 16:37:31,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [815420961] [2024-11-08 16:37:31,411 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:31,411 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:37:31,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:31,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:37:31,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2024-11-08 16:37:31,413 INFO L87 Difference]: Start difference. First operand 1188 states and 1735 transitions. Second operand has 5 states, 5 states have (on average 115.6) internal successors, (578), 5 states have internal predecessors, (578), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:31,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:31,725 INFO L93 Difference]: Finished difference Result 1855 states and 2715 transitions. [2024-11-08 16:37:31,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:31,726 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 115.6) internal successors, (578), 5 states have internal predecessors, (578), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 681 [2024-11-08 16:37:31,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:31,730 INFO L225 Difference]: With dead ends: 1855 [2024-11-08 16:37:31,730 INFO L226 Difference]: Without dead ends: 1188 [2024-11-08 16:37:31,731 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1385 GetRequests, 1367 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:37:31,732 INFO L432 NwaCegarLoop]: 1006 mSDtfsCounter, 1799 mSDsluCounter, 1008 mSDsCounter, 0 mSdLazyCounter, 192 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1804 SdHoareTripleChecker+Valid, 2014 SdHoareTripleChecker+Invalid, 199 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 192 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:31,732 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1804 Valid, 2014 Invalid, 199 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 192 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:37:31,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states. [2024-11-08 16:37:31,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1188. [2024-11-08 16:37:31,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1188 states, 1176 states have (on average 1.4574829931972788) internal successors, (1714), 1176 states have internal predecessors, (1714), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:31,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1188 states to 1188 states and 1734 transitions. [2024-11-08 16:37:31,772 INFO L78 Accepts]: Start accepts. Automaton has 1188 states and 1734 transitions. Word has length 681 [2024-11-08 16:37:31,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:31,772 INFO L471 AbstractCegarLoop]: Abstraction has 1188 states and 1734 transitions. [2024-11-08 16:37:31,773 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 115.6) internal successors, (578), 5 states have internal predecessors, (578), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:31,776 INFO L276 IsEmpty]: Start isEmpty. Operand 1188 states and 1734 transitions. [2024-11-08 16:37:31,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 683 [2024-11-08 16:37:31,782 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:31,783 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:31,812 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-11-08 16:37:31,983 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2024-11-08 16:37:31,984 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:31,985 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:31,986 INFO L85 PathProgramCache]: Analyzing trace with hash -1514036210, now seen corresponding path program 1 times [2024-11-08 16:37:31,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:31,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465981076] [2024-11-08 16:37:31,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:31,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:32,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,429 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:33,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,430 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:33,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,432 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:33,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,434 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:33,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,436 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:33,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,437 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 488 [2024-11-08 16:37:33,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,439 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 500 [2024-11-08 16:37:33,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,441 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 528 [2024-11-08 16:37:33,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,443 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 552 [2024-11-08 16:37:33,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,445 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 562 [2024-11-08 16:37:33,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:33,448 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:33,448 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:33,448 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465981076] [2024-11-08 16:37:33,448 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1465981076] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:33,448 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1066080644] [2024-11-08 16:37:33,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:33,449 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:33,449 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:33,451 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:33,454 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-08 16:37:35,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:35,079 INFO L255 TraceCheckSpWp]: Trace formula consists of 3381 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-08 16:37:35,090 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:36,404 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 120 refuted. 0 times theorem prover too weak. 201 trivial. 0 not checked. [2024-11-08 16:37:36,404 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:37,388 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 421 trivial. 0 not checked. [2024-11-08 16:37:37,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1066080644] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:37,389 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:37,389 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [4, 14] total 19 [2024-11-08 16:37:37,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [628326749] [2024-11-08 16:37:37,389 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:37,390 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:37:37,390 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:37,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:37:37,391 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2024-11-08 16:37:37,391 INFO L87 Difference]: Start difference. First operand 1188 states and 1734 transitions. Second operand has 5 states, 5 states have (on average 115.8) internal successors, (579), 5 states have internal predecessors, (579), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:37,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:37,621 INFO L93 Difference]: Finished difference Result 1855 states and 2713 transitions. [2024-11-08 16:37:37,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:37:37,622 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 115.8) internal successors, (579), 5 states have internal predecessors, (579), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 682 [2024-11-08 16:37:37,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:37,625 INFO L225 Difference]: With dead ends: 1855 [2024-11-08 16:37:37,625 INFO L226 Difference]: Without dead ends: 1188 [2024-11-08 16:37:37,626 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1387 GetRequests, 1369 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:37:37,626 INFO L432 NwaCegarLoop]: 1006 mSDtfsCounter, 889 mSDsluCounter, 1017 mSDsCounter, 0 mSdLazyCounter, 190 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 894 SdHoareTripleChecker+Valid, 2023 SdHoareTripleChecker+Invalid, 191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 190 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:37,627 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [894 Valid, 2023 Invalid, 191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 190 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:37:37,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states. [2024-11-08 16:37:37,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1188. [2024-11-08 16:37:37,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1188 states, 1176 states have (on average 1.4566326530612246) internal successors, (1713), 1176 states have internal predecessors, (1713), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:37,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1188 states to 1188 states and 1733 transitions. [2024-11-08 16:37:37,660 INFO L78 Accepts]: Start accepts. Automaton has 1188 states and 1733 transitions. Word has length 682 [2024-11-08 16:37:37,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:37,661 INFO L471 AbstractCegarLoop]: Abstraction has 1188 states and 1733 transitions. [2024-11-08 16:37:37,661 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 115.8) internal successors, (579), 5 states have internal predecessors, (579), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:37,662 INFO L276 IsEmpty]: Start isEmpty. Operand 1188 states and 1733 transitions. [2024-11-08 16:37:37,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 684 [2024-11-08 16:37:37,668 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:37,668 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:37,699 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-11-08 16:37:37,869 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2024-11-08 16:37:37,869 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:37,869 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:37,870 INFO L85 PathProgramCache]: Analyzing trace with hash -1983162333, now seen corresponding path program 1 times [2024-11-08 16:37:37,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:37,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936660753] [2024-11-08 16:37:37,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:37,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:38,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,035 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:39,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,037 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:39,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,039 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:39,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,041 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:39,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,044 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:39,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,047 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 489 [2024-11-08 16:37:39,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,049 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 501 [2024-11-08 16:37:39,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,051 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 529 [2024-11-08 16:37:39,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,053 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 553 [2024-11-08 16:37:39,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,054 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 563 [2024-11-08 16:37:39,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:39,057 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2024-11-08 16:37:39,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:39,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1936660753] [2024-11-08 16:37:39,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1936660753] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:39,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1175659755] [2024-11-08 16:37:39,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:39,059 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:39,060 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:39,062 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:39,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-08 16:37:40,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:40,777 INFO L255 TraceCheckSpWp]: Trace formula consists of 3384 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-08 16:37:40,786 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:40,820 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 280 proven. 8 refuted. 0 times theorem prover too weak. 313 trivial. 0 not checked. [2024-11-08 16:37:40,821 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:40,881 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 421 trivial. 0 not checked. [2024-11-08 16:37:40,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1175659755] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:40,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:40,882 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 7 [2024-11-08 16:37:40,882 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603876414] [2024-11-08 16:37:40,882 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:40,883 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:37:40,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:40,884 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:37:40,884 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:40,884 INFO L87 Difference]: Start difference. First operand 1188 states and 1733 transitions. Second operand has 3 states, 3 states have (on average 193.33333333333334) internal successors, (580), 3 states have internal predecessors, (580), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:40,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:40,911 INFO L93 Difference]: Finished difference Result 1856 states and 2713 transitions. [2024-11-08 16:37:40,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:37:40,912 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 193.33333333333334) internal successors, (580), 3 states have internal predecessors, (580), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 683 [2024-11-08 16:37:40,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:40,915 INFO L225 Difference]: With dead ends: 1856 [2024-11-08 16:37:40,915 INFO L226 Difference]: Without dead ends: 1189 [2024-11-08 16:37:40,916 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1388 GetRequests, 1383 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:40,917 INFO L432 NwaCegarLoop]: 1096 mSDtfsCounter, 1 mSDsluCounter, 1092 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2188 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:40,917 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 2188 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:37:40,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1189 states. [2024-11-08 16:37:40,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1189 to 1189. [2024-11-08 16:37:40,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1189 states, 1177 states have (on average 1.4553950722175022) internal successors, (1713), 1177 states have internal predecessors, (1713), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:40,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1189 states to 1189 states and 1733 transitions. [2024-11-08 16:37:40,950 INFO L78 Accepts]: Start accepts. Automaton has 1189 states and 1733 transitions. Word has length 683 [2024-11-08 16:37:40,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:40,951 INFO L471 AbstractCegarLoop]: Abstraction has 1189 states and 1733 transitions. [2024-11-08 16:37:40,952 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 193.33333333333334) internal successors, (580), 3 states have internal predecessors, (580), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:40,952 INFO L276 IsEmpty]: Start isEmpty. Operand 1189 states and 1733 transitions. [2024-11-08 16:37:40,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 686 [2024-11-08 16:37:40,958 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:40,958 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:40,991 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2024-11-08 16:37:41,159 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2024-11-08 16:37:41,160 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:41,160 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:41,160 INFO L85 PathProgramCache]: Analyzing trace with hash -77659938, now seen corresponding path program 1 times [2024-11-08 16:37:41,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:41,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41729128] [2024-11-08 16:37:41,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:41,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:41,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,188 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:42,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,190 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:42,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:42,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,193 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:42,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:42,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,195 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 491 [2024-11-08 16:37:42,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 503 [2024-11-08 16:37:42,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,197 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 531 [2024-11-08 16:37:42,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,199 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 555 [2024-11-08 16:37:42,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 565 [2024-11-08 16:37:42,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:42,202 INFO L134 CoverageAnalysis]: Checked inductivity of 602 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 421 trivial. 0 not checked. [2024-11-08 16:37:42,202 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:42,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41729128] [2024-11-08 16:37:42,202 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [41729128] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:42,202 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1221423490] [2024-11-08 16:37:42,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:42,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:42,202 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:42,203 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:42,204 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-08 16:37:44,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:44,086 INFO L255 TraceCheckSpWp]: Trace formula consists of 3394 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-08 16:37:44,097 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:44,133 INFO L134 CoverageAnalysis]: Checked inductivity of 602 backedges. 280 proven. 8 refuted. 0 times theorem prover too weak. 314 trivial. 0 not checked. [2024-11-08 16:37:44,133 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:44,196 INFO L134 CoverageAnalysis]: Checked inductivity of 602 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 422 trivial. 0 not checked. [2024-11-08 16:37:44,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1221423490] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:44,197 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:44,197 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 7 [2024-11-08 16:37:44,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [5675146] [2024-11-08 16:37:44,198 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:44,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:37:44,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:44,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:37:44,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:44,200 INFO L87 Difference]: Start difference. First operand 1189 states and 1733 transitions. Second operand has 3 states, 3 states have (on average 194.0) internal successors, (582), 3 states have internal predecessors, (582), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:44,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:44,235 INFO L93 Difference]: Finished difference Result 1858 states and 2713 transitions. [2024-11-08 16:37:44,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:37:44,236 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 194.0) internal successors, (582), 3 states have internal predecessors, (582), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 685 [2024-11-08 16:37:44,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:44,240 INFO L225 Difference]: With dead ends: 1858 [2024-11-08 16:37:44,240 INFO L226 Difference]: Without dead ends: 1190 [2024-11-08 16:37:44,241 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1392 GetRequests, 1387 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:44,242 INFO L432 NwaCegarLoop]: 1095 mSDtfsCounter, 1 mSDsluCounter, 1091 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2186 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:44,242 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 2186 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:37:44,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1190 states. [2024-11-08 16:37:44,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1190 to 1190. [2024-11-08 16:37:44,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1190 states, 1178 states have (on average 1.4541595925297113) internal successors, (1713), 1178 states have internal predecessors, (1713), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:44,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1190 states to 1190 states and 1733 transitions. [2024-11-08 16:37:44,275 INFO L78 Accepts]: Start accepts. Automaton has 1190 states and 1733 transitions. Word has length 685 [2024-11-08 16:37:44,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:44,276 INFO L471 AbstractCegarLoop]: Abstraction has 1190 states and 1733 transitions. [2024-11-08 16:37:44,277 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 194.0) internal successors, (582), 3 states have internal predecessors, (582), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:44,277 INFO L276 IsEmpty]: Start isEmpty. Operand 1190 states and 1733 transitions. [2024-11-08 16:37:44,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 688 [2024-11-08 16:37:44,283 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:44,284 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:44,319 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-11-08 16:37:44,484 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2024-11-08 16:37:44,485 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:44,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:44,485 INFO L85 PathProgramCache]: Analyzing trace with hash 1040400185, now seen corresponding path program 1 times [2024-11-08 16:37:44,485 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:44,485 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042352705] [2024-11-08 16:37:44,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:44,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:44,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,447 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:45,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,448 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:45,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,450 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:45,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,451 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:45,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,453 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:45,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,454 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 493 [2024-11-08 16:37:45,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,456 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 505 [2024-11-08 16:37:45,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,457 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 533 [2024-11-08 16:37:45,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,459 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 557 [2024-11-08 16:37:45,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,461 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 567 [2024-11-08 16:37:45,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:45,464 INFO L134 CoverageAnalysis]: Checked inductivity of 603 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 422 trivial. 0 not checked. [2024-11-08 16:37:45,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:45,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1042352705] [2024-11-08 16:37:45,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1042352705] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:45,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [983589908] [2024-11-08 16:37:45,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:45,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:45,465 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:45,466 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:45,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-08 16:37:47,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:47,279 INFO L255 TraceCheckSpWp]: Trace formula consists of 3404 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-08 16:37:47,286 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:47,320 INFO L134 CoverageAnalysis]: Checked inductivity of 603 backedges. 280 proven. 8 refuted. 0 times theorem prover too weak. 315 trivial. 0 not checked. [2024-11-08 16:37:47,320 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:47,388 INFO L134 CoverageAnalysis]: Checked inductivity of 603 backedges. 180 proven. 0 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2024-11-08 16:37:47,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [983589908] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:47,389 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:37:47,389 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 7 [2024-11-08 16:37:47,390 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769919038] [2024-11-08 16:37:47,390 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:47,391 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:37:47,391 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:47,392 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:37:47,393 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:47,393 INFO L87 Difference]: Start difference. First operand 1190 states and 1733 transitions. Second operand has 3 states, 3 states have (on average 194.66666666666666) internal successors, (584), 3 states have internal predecessors, (584), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:47,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:47,433 INFO L93 Difference]: Finished difference Result 1860 states and 2713 transitions. [2024-11-08 16:37:47,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:37:47,434 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 194.66666666666666) internal successors, (584), 3 states have internal predecessors, (584), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 687 [2024-11-08 16:37:47,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:47,437 INFO L225 Difference]: With dead ends: 1860 [2024-11-08 16:37:47,437 INFO L226 Difference]: Without dead ends: 1191 [2024-11-08 16:37:47,439 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1396 GetRequests, 1391 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:37:47,439 INFO L432 NwaCegarLoop]: 1094 mSDtfsCounter, 1 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 2184 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:47,440 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 2184 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:37:47,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1191 states. [2024-11-08 16:37:47,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1191 to 1191. [2024-11-08 16:37:47,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1191 states, 1179 states have (on average 1.4529262086513994) internal successors, (1713), 1179 states have internal predecessors, (1713), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:47,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1191 states to 1191 states and 1733 transitions. [2024-11-08 16:37:47,473 INFO L78 Accepts]: Start accepts. Automaton has 1191 states and 1733 transitions. Word has length 687 [2024-11-08 16:37:47,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:47,474 INFO L471 AbstractCegarLoop]: Abstraction has 1191 states and 1733 transitions. [2024-11-08 16:37:47,474 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 194.66666666666666) internal successors, (584), 3 states have internal predecessors, (584), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:47,474 INFO L276 IsEmpty]: Start isEmpty. Operand 1191 states and 1733 transitions. [2024-11-08 16:37:47,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 690 [2024-11-08 16:37:47,482 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:47,483 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:47,520 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2024-11-08 16:37:47,683 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-11-08 16:37:47,684 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:47,684 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:47,685 INFO L85 PathProgramCache]: Analyzing trace with hash 137850996, now seen corresponding path program 1 times [2024-11-08 16:37:47,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:47,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306152896] [2024-11-08 16:37:47,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:47,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:48,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,788 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:48,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,789 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:48,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,790 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:48,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,792 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:48,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,793 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:48,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,794 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 495 [2024-11-08 16:37:48,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,795 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 507 [2024-11-08 16:37:48,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,797 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 535 [2024-11-08 16:37:48,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 559 [2024-11-08 16:37:48,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 569 [2024-11-08 16:37:48,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:48,802 INFO L134 CoverageAnalysis]: Checked inductivity of 604 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2024-11-08 16:37:48,802 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:48,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306152896] [2024-11-08 16:37:48,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [306152896] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:48,802 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [895408108] [2024-11-08 16:37:48,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:48,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:48,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:48,803 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:48,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-11-08 16:37:50,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:50,716 INFO L255 TraceCheckSpWp]: Trace formula consists of 3414 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-08 16:37:50,724 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:50,771 INFO L134 CoverageAnalysis]: Checked inductivity of 604 backedges. 280 proven. 37 refuted. 0 times theorem prover too weak. 287 trivial. 0 not checked. [2024-11-08 16:37:50,772 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:37:50,854 INFO L134 CoverageAnalysis]: Checked inductivity of 604 backedges. 180 proven. 1 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2024-11-08 16:37:50,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [895408108] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:37:50,854 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:37:50,855 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6, 4] total 9 [2024-11-08 16:37:50,855 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835330716] [2024-11-08 16:37:50,855 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:37:50,857 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:37:50,857 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:50,858 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:37:50,858 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:37:50,858 INFO L87 Difference]: Start difference. First operand 1191 states and 1733 transitions. Second operand has 9 states, 9 states have (on average 66.77777777777777) internal successors, (601), 9 states have internal predecessors, (601), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:37:50,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:50,981 INFO L93 Difference]: Finished difference Result 1866 states and 2721 transitions. [2024-11-08 16:37:50,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:37:50,982 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 66.77777777777777) internal successors, (601), 9 states have internal predecessors, (601), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 689 [2024-11-08 16:37:50,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:50,985 INFO L225 Difference]: With dead ends: 1866 [2024-11-08 16:37:50,985 INFO L226 Difference]: Without dead ends: 1196 [2024-11-08 16:37:50,989 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1401 GetRequests, 1393 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:37:50,989 INFO L432 NwaCegarLoop]: 1095 mSDtfsCounter, 15 mSDsluCounter, 5447 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 6542 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:50,992 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 6542 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:37:50,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1196 states. [2024-11-08 16:37:51,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1196 to 1196. [2024-11-08 16:37:51,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1196 states, 1184 states have (on average 1.4501689189189189) internal successors, (1717), 1184 states have internal predecessors, (1717), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:51,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1196 states to 1196 states and 1737 transitions. [2024-11-08 16:37:51,026 INFO L78 Accepts]: Start accepts. Automaton has 1196 states and 1737 transitions. Word has length 689 [2024-11-08 16:37:51,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:51,027 INFO L471 AbstractCegarLoop]: Abstraction has 1196 states and 1737 transitions. [2024-11-08 16:37:51,027 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 66.77777777777777) internal successors, (601), 9 states have internal predecessors, (601), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:37:51,027 INFO L276 IsEmpty]: Start isEmpty. Operand 1196 states and 1737 transitions. [2024-11-08 16:37:51,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 696 [2024-11-08 16:37:51,035 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:51,035 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:51,069 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2024-11-08 16:37:51,235 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,20 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:51,236 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:51,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:51,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1029928157, now seen corresponding path program 2 times [2024-11-08 16:37:51,237 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:51,237 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642218622] [2024-11-08 16:37:51,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:51,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:51,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,318 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 119 [2024-11-08 16:37:52,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,319 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 131 [2024-11-08 16:37:52,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,320 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-08 16:37:52,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 183 [2024-11-08 16:37:52,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,322 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:37:52,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,323 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 501 [2024-11-08 16:37:52,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,324 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 513 [2024-11-08 16:37:52,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,325 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 541 [2024-11-08 16:37:52,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,327 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 565 [2024-11-08 16:37:52,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,329 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 575 [2024-11-08 16:37:52,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:52,331 INFO L134 CoverageAnalysis]: Checked inductivity of 619 backedges. 180 proven. 16 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2024-11-08 16:37:52,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:52,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642218622] [2024-11-08 16:37:52,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [642218622] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:52,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1741950947] [2024-11-08 16:37:52,333 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:37:52,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:52,333 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:52,337 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:52,338 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-11-08 16:37:54,040 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:37:54,041 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:37:54,046 INFO L255 TraceCheckSpWp]: Trace formula consists of 795 conjuncts, 45 conjuncts are in the unsatisfiable core [2024-11-08 16:37:54,055 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:37:55,590 INFO L134 CoverageAnalysis]: Checked inductivity of 619 backedges. 275 proven. 0 refuted. 0 times theorem prover too weak. 344 trivial. 0 not checked. [2024-11-08 16:37:55,590 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:37:55,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1741950947] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:37:55,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:37:55,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 11 [2024-11-08 16:37:55,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [397741501] [2024-11-08 16:37:55,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:37:55,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:37:55,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:37:55,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:37:55,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:37:55,593 INFO L87 Difference]: Start difference. First operand 1196 states and 1737 transitions. Second operand has 6 states, 6 states have (on average 97.5) internal successors, (585), 6 states have internal predecessors, (585), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:56,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:37:56,352 INFO L93 Difference]: Finished difference Result 2206 states and 3212 transitions. [2024-11-08 16:37:56,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:37:56,353 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 97.5) internal successors, (585), 6 states have internal predecessors, (585), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 695 [2024-11-08 16:37:56,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:37:56,355 INFO L225 Difference]: With dead ends: 2206 [2024-11-08 16:37:56,355 INFO L226 Difference]: Without dead ends: 1204 [2024-11-08 16:37:56,356 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 721 GetRequests, 712 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:37:56,356 INFO L432 NwaCegarLoop]: 797 mSDtfsCounter, 683 mSDsluCounter, 2353 mSDsCounter, 0 mSdLazyCounter, 1204 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 683 SdHoareTripleChecker+Valid, 3150 SdHoareTripleChecker+Invalid, 1206 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1204 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-08 16:37:56,356 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [683 Valid, 3150 Invalid, 1206 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1204 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-08 16:37:56,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1204 states. [2024-11-08 16:37:56,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1204 to 1202. [2024-11-08 16:37:56,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1202 states, 1190 states have (on average 1.446218487394958) internal successors, (1721), 1190 states have internal predecessors, (1721), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:37:56,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1202 states to 1202 states and 1741 transitions. [2024-11-08 16:37:56,394 INFO L78 Accepts]: Start accepts. Automaton has 1202 states and 1741 transitions. Word has length 695 [2024-11-08 16:37:56,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:37:56,395 INFO L471 AbstractCegarLoop]: Abstraction has 1202 states and 1741 transitions. [2024-11-08 16:37:56,395 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 97.5) internal successors, (585), 6 states have internal predecessors, (585), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:37:56,396 INFO L276 IsEmpty]: Start isEmpty. Operand 1202 states and 1741 transitions. [2024-11-08 16:37:56,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 700 [2024-11-08 16:37:56,402 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:37:56,403 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:37:56,435 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2024-11-08 16:37:56,603 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,21 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:56,604 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:37:56,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:37:56,605 INFO L85 PathProgramCache]: Analyzing trace with hash 476381661, now seen corresponding path program 1 times [2024-11-08 16:37:56,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:37:56,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409959661] [2024-11-08 16:37:56,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:56,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:37:57,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,969 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:37:57,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,971 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:37:57,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,972 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:37:57,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,973 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:37:57,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,975 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:37:57,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,976 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 505 [2024-11-08 16:37:57,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,978 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 517 [2024-11-08 16:37:57,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,979 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 545 [2024-11-08 16:37:57,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,981 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 569 [2024-11-08 16:37:57,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,983 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 579 [2024-11-08 16:37:57,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:57,985 INFO L134 CoverageAnalysis]: Checked inductivity of 621 backedges. 182 proven. 16 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2024-11-08 16:37:57,986 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:37:57,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409959661] [2024-11-08 16:37:57,986 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409959661] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:37:57,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1025498359] [2024-11-08 16:37:57,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:37:57,986 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:37:57,986 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:37:57,989 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:37:57,991 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-11-08 16:37:59,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:37:59,997 INFO L255 TraceCheckSpWp]: Trace formula consists of 3452 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-11-08 16:38:00,004 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:00,092 INFO L134 CoverageAnalysis]: Checked inductivity of 621 backedges. 282 proven. 112 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2024-11-08 16:38:00,092 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:00,232 INFO L134 CoverageAnalysis]: Checked inductivity of 621 backedges. 182 proven. 16 refuted. 0 times theorem prover too weak. 423 trivial. 0 not checked. [2024-11-08 16:38:00,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1025498359] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:38:00,232 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:38:00,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 12, 7] total 18 [2024-11-08 16:38:00,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1396978878] [2024-11-08 16:38:00,233 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:38:00,234 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-11-08 16:38:00,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:00,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-08 16:38:00,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2024-11-08 16:38:00,236 INFO L87 Difference]: Start difference. First operand 1202 states and 1741 transitions. Second operand has 18 states, 18 states have (on average 34.94444444444444) internal successors, (629), 18 states have internal predecessors, (629), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:00,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:00,560 INFO L93 Difference]: Finished difference Result 1888 states and 2737 transitions. [2024-11-08 16:38:00,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-08 16:38:00,561 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 34.94444444444444) internal successors, (629), 18 states have internal predecessors, (629), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 699 [2024-11-08 16:38:00,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:00,564 INFO L225 Difference]: With dead ends: 1888 [2024-11-08 16:38:00,564 INFO L226 Difference]: Without dead ends: 1210 [2024-11-08 16:38:00,566 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1425 GetRequests, 1407 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:38:00,566 INFO L432 NwaCegarLoop]: 1109 mSDtfsCounter, 28 mSDsluCounter, 12135 mSDsCounter, 0 mSdLazyCounter, 303 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 13244 SdHoareTripleChecker+Invalid, 304 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 303 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:00,567 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 13244 Invalid, 304 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 303 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:38:00,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1210 states. [2024-11-08 16:38:00,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1210 to 1210. [2024-11-08 16:38:00,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1210 states, 1198 states have (on average 1.4432387312186978) internal successors, (1729), 1198 states have internal predecessors, (1729), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:38:00,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1210 states to 1210 states and 1749 transitions. [2024-11-08 16:38:00,607 INFO L78 Accepts]: Start accepts. Automaton has 1210 states and 1749 transitions. Word has length 699 [2024-11-08 16:38:00,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:00,607 INFO L471 AbstractCegarLoop]: Abstraction has 1210 states and 1749 transitions. [2024-11-08 16:38:00,608 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 34.94444444444444) internal successors, (629), 18 states have internal predecessors, (629), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:00,608 INFO L276 IsEmpty]: Start isEmpty. Operand 1210 states and 1749 transitions. [2024-11-08 16:38:00,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2024-11-08 16:38:00,615 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:00,615 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:00,652 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:00,816 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,22 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:00,816 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:00,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:00,817 INFO L85 PathProgramCache]: Analyzing trace with hash 1380194801, now seen corresponding path program 2 times [2024-11-08 16:38:00,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:00,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064944407] [2024-11-08 16:38:00,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:00,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:01,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,895 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:01,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,897 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:01,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,898 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:01,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,900 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:01,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,901 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:01,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,903 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 513 [2024-11-08 16:38:01,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,904 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 525 [2024-11-08 16:38:01,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,905 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 553 [2024-11-08 16:38:01,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,906 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 577 [2024-11-08 16:38:01,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,907 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 587 [2024-11-08 16:38:01,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:01,910 INFO L134 CoverageAnalysis]: Checked inductivity of 669 backedges. 182 proven. 1 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2024-11-08 16:38:01,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:01,910 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064944407] [2024-11-08 16:38:01,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2064944407] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:01,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490076039] [2024-11-08 16:38:01,911 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:38:01,911 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:01,911 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:01,914 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:01,915 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-11-08 16:38:03,701 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:38:03,701 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:38:03,707 INFO L255 TraceCheckSpWp]: Trace formula consists of 799 conjuncts, 60 conjuncts are in the unsatisfiable core [2024-11-08 16:38:03,719 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:08,273 INFO L134 CoverageAnalysis]: Checked inductivity of 669 backedges. 6 proven. 105 refuted. 0 times theorem prover too weak. 558 trivial. 0 not checked. [2024-11-08 16:38:08,274 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:10,468 INFO L134 CoverageAnalysis]: Checked inductivity of 669 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 587 trivial. 0 not checked. [2024-11-08 16:38:10,468 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1490076039] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:10,468 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:38:10,469 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [4, 13] total 22 [2024-11-08 16:38:10,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [158663366] [2024-11-08 16:38:10,469 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:38:10,470 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:38:10,470 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:10,471 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:38:10,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2024-11-08 16:38:10,472 INFO L87 Difference]: Start difference. First operand 1210 states and 1749 transitions. Second operand has 9 states, 9 states have (on average 55.22222222222222) internal successors, (497), 9 states have internal predecessors, (497), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:12,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:12,116 INFO L93 Difference]: Finished difference Result 2261 states and 3274 transitions. [2024-11-08 16:38:12,117 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:38:12,117 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 55.22222222222222) internal successors, (497), 9 states have internal predecessors, (497), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 707 [2024-11-08 16:38:12,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:12,121 INFO L225 Difference]: With dead ends: 2261 [2024-11-08 16:38:12,121 INFO L226 Difference]: Without dead ends: 1507 [2024-11-08 16:38:12,123 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1436 GetRequests, 1416 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=82, Invalid=380, Unknown=0, NotChecked=0, Total=462 [2024-11-08 16:38:12,123 INFO L432 NwaCegarLoop]: 1142 mSDtfsCounter, 214 mSDsluCounter, 4787 mSDsCounter, 0 mSdLazyCounter, 1797 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 214 SdHoareTripleChecker+Valid, 5929 SdHoareTripleChecker+Invalid, 1805 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 1797 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:12,124 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [214 Valid, 5929 Invalid, 1805 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 1797 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2024-11-08 16:38:12,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1507 states. [2024-11-08 16:38:12,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1507 to 1359. [2024-11-08 16:38:12,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1359 states, 1347 states have (on average 1.447661469933185) internal successors, (1950), 1347 states have internal predecessors, (1950), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:38:12,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1359 states to 1359 states and 1970 transitions. [2024-11-08 16:38:12,164 INFO L78 Accepts]: Start accepts. Automaton has 1359 states and 1970 transitions. Word has length 707 [2024-11-08 16:38:12,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:12,165 INFO L471 AbstractCegarLoop]: Abstraction has 1359 states and 1970 transitions. [2024-11-08 16:38:12,165 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 55.22222222222222) internal successors, (497), 9 states have internal predecessors, (497), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:12,165 INFO L276 IsEmpty]: Start isEmpty. Operand 1359 states and 1970 transitions. [2024-11-08 16:38:12,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 709 [2024-11-08 16:38:12,173 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:12,174 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:12,205 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2024-11-08 16:38:12,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,23 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:12,375 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:12,376 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:12,376 INFO L85 PathProgramCache]: Analyzing trace with hash 1400912359, now seen corresponding path program 1 times [2024-11-08 16:38:12,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:12,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796874315] [2024-11-08 16:38:12,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:12,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:13,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,832 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:13,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,834 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:13,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,835 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:13,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,837 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:13,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,839 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:13,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,840 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 513 [2024-11-08 16:38:13,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,842 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 525 [2024-11-08 16:38:13,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,843 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 553 [2024-11-08 16:38:13,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,845 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 577 [2024-11-08 16:38:13,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,846 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 587 [2024-11-08 16:38:13,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:13,849 INFO L134 CoverageAnalysis]: Checked inductivity of 669 backedges. 182 proven. 1 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2024-11-08 16:38:13,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:13,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796874315] [2024-11-08 16:38:13,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [796874315] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:13,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1403793997] [2024-11-08 16:38:13,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:13,850 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:13,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:13,852 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:13,853 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-11-08 16:38:16,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:16,031 INFO L255 TraceCheckSpWp]: Trace formula consists of 3493 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-08 16:38:16,040 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:16,078 INFO L134 CoverageAnalysis]: Checked inductivity of 669 backedges. 282 proven. 37 refuted. 0 times theorem prover too weak. 350 trivial. 0 not checked. [2024-11-08 16:38:16,078 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:16,161 INFO L134 CoverageAnalysis]: Checked inductivity of 669 backedges. 182 proven. 1 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2024-11-08 16:38:16,161 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1403793997] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:38:16,161 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:38:16,162 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 6, 4] total 9 [2024-11-08 16:38:16,162 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [920483431] [2024-11-08 16:38:16,162 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:38:16,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:38:16,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:16,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:38:16,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:38:16,166 INFO L87 Difference]: Start difference. First operand 1359 states and 1970 transitions. Second operand has 9 states, 9 states have (on average 67.33333333333333) internal successors, (606), 9 states have internal predecessors, (606), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:16,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:16,265 INFO L93 Difference]: Finished difference Result 2200 states and 3192 transitions. [2024-11-08 16:38:16,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:38:16,266 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 67.33333333333333) internal successors, (606), 9 states have internal predecessors, (606), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 708 [2024-11-08 16:38:16,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:16,268 INFO L225 Difference]: With dead ends: 2200 [2024-11-08 16:38:16,269 INFO L226 Difference]: Without dead ends: 1365 [2024-11-08 16:38:16,269 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1439 GetRequests, 1431 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:38:16,270 INFO L432 NwaCegarLoop]: 1094 mSDtfsCounter, 15 mSDsluCounter, 6532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 7626 SdHoareTripleChecker+Invalid, 78 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:16,270 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 7626 Invalid, 78 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:38:16,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1365 states. [2024-11-08 16:38:16,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1365 to 1365. [2024-11-08 16:38:16,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1365 states, 1353 states have (on average 1.4456762749445675) internal successors, (1956), 1353 states have internal predecessors, (1956), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:38:16,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1365 states to 1365 states and 1976 transitions. [2024-11-08 16:38:16,312 INFO L78 Accepts]: Start accepts. Automaton has 1365 states and 1976 transitions. Word has length 708 [2024-11-08 16:38:16,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:16,312 INFO L471 AbstractCegarLoop]: Abstraction has 1365 states and 1976 transitions. [2024-11-08 16:38:16,313 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 67.33333333333333) internal successors, (606), 9 states have internal predecessors, (606), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:16,313 INFO L276 IsEmpty]: Start isEmpty. Operand 1365 states and 1976 transitions. [2024-11-08 16:38:16,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 715 [2024-11-08 16:38:16,319 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:16,320 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:16,354 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:16,520 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,24 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:16,521 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:16,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:16,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1937569558, now seen corresponding path program 2 times [2024-11-08 16:38:16,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:16,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959315424] [2024-11-08 16:38:16,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:16,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:17,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,101 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:18,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,102 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:18,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,103 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:18,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,104 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:18,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,104 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:18,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,105 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 519 [2024-11-08 16:38:18,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,107 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 531 [2024-11-08 16:38:18,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,109 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 559 [2024-11-08 16:38:18,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,110 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 583 [2024-11-08 16:38:18,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,112 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 593 [2024-11-08 16:38:18,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:18,114 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 182 proven. 16 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2024-11-08 16:38:18,114 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:18,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959315424] [2024-11-08 16:38:18,115 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959315424] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:18,115 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [246638041] [2024-11-08 16:38:18,115 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:38:18,115 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:18,116 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:18,117 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:18,121 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-11-08 16:38:19,980 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:38:19,980 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:38:19,986 INFO L255 TraceCheckSpWp]: Trace formula consists of 800 conjuncts, 41 conjuncts are in the unsatisfiable core [2024-11-08 16:38:19,995 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:21,006 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 6 proven. 168 refuted. 0 times theorem prover too weak. 510 trivial. 0 not checked. [2024-11-08 16:38:21,006 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:21,613 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 602 trivial. 0 not checked. [2024-11-08 16:38:21,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [246638041] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:21,614 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:38:21,614 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [7, 11] total 19 [2024-11-08 16:38:21,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1918525293] [2024-11-08 16:38:21,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:38:21,615 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:38:21,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:21,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:38:21,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2024-11-08 16:38:21,617 INFO L87 Difference]: Start difference. First operand 1365 states and 1976 transitions. Second operand has 5 states, 5 states have (on average 99.6) internal successors, (498), 5 states have internal predecessors, (498), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:21,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:21,698 INFO L93 Difference]: Finished difference Result 2351 states and 3410 transitions. [2024-11-08 16:38:21,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:38:21,699 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 99.6) internal successors, (498), 5 states have internal predecessors, (498), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 714 [2024-11-08 16:38:21,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:21,702 INFO L225 Difference]: With dead ends: 2351 [2024-11-08 16:38:21,703 INFO L226 Difference]: Without dead ends: 1508 [2024-11-08 16:38:21,704 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1453 GetRequests, 1436 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2024-11-08 16:38:21,705 INFO L432 NwaCegarLoop]: 1088 mSDtfsCounter, 142 mSDsluCounter, 3255 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 142 SdHoareTripleChecker+Valid, 4343 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:21,705 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [142 Valid, 4343 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:38:21,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1508 states. [2024-11-08 16:38:21,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1508 to 1508. [2024-11-08 16:38:21,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1508 states, 1496 states have (on average 1.4485294117647058) internal successors, (2167), 1496 states have internal predecessors, (2167), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:38:21,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1508 states to 1508 states and 2187 transitions. [2024-11-08 16:38:21,749 INFO L78 Accepts]: Start accepts. Automaton has 1508 states and 2187 transitions. Word has length 714 [2024-11-08 16:38:21,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:21,749 INFO L471 AbstractCegarLoop]: Abstraction has 1508 states and 2187 transitions. [2024-11-08 16:38:21,749 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 99.6) internal successors, (498), 5 states have internal predecessors, (498), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:21,750 INFO L276 IsEmpty]: Start isEmpty. Operand 1508 states and 2187 transitions. [2024-11-08 16:38:21,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2024-11-08 16:38:21,756 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:21,757 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:21,778 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:21,957 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,25 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:21,958 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:21,958 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:21,958 INFO L85 PathProgramCache]: Analyzing trace with hash 776898910, now seen corresponding path program 1 times [2024-11-08 16:38:21,958 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:21,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274710630] [2024-11-08 16:38:21,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:21,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:22,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,446 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:23,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,448 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:23,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,449 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:23,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,450 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:23,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,451 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:23,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,451 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 520 [2024-11-08 16:38:23,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,452 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 532 [2024-11-08 16:38:23,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,453 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 560 [2024-11-08 16:38:23,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,454 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 584 [2024-11-08 16:38:23,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,455 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 594 [2024-11-08 16:38:23,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:23,457 INFO L134 CoverageAnalysis]: Checked inductivity of 685 backedges. 183 proven. 16 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2024-11-08 16:38:23,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:23,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274710630] [2024-11-08 16:38:23,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1274710630] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:23,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1271547895] [2024-11-08 16:38:23,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:23,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:23,458 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:23,460 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:23,461 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2024-11-08 16:38:25,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:25,734 INFO L255 TraceCheckSpWp]: Trace formula consists of 3528 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-11-08 16:38:25,741 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:25,830 INFO L134 CoverageAnalysis]: Checked inductivity of 685 backedges. 283 proven. 112 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2024-11-08 16:38:25,830 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:25,957 INFO L134 CoverageAnalysis]: Checked inductivity of 685 backedges. 183 proven. 16 refuted. 0 times theorem prover too weak. 486 trivial. 0 not checked. [2024-11-08 16:38:25,957 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1271547895] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:38:25,957 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:38:25,957 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 12, 7] total 18 [2024-11-08 16:38:25,957 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407622104] [2024-11-08 16:38:25,957 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:38:25,958 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-11-08 16:38:25,958 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:25,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-08 16:38:25,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2024-11-08 16:38:25,959 INFO L87 Difference]: Start difference. First operand 1508 states and 2187 transitions. Second operand has 18 states, 18 states have (on average 35.05555555555556) internal successors, (631), 18 states have internal predecessors, (631), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:26,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:26,188 INFO L93 Difference]: Finished difference Result 2354 states and 3413 transitions. [2024-11-08 16:38:26,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-08 16:38:26,189 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 35.05555555555556) internal successors, (631), 18 states have internal predecessors, (631), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 715 [2024-11-08 16:38:26,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:26,192 INFO L225 Difference]: With dead ends: 2354 [2024-11-08 16:38:26,193 INFO L226 Difference]: Without dead ends: 1516 [2024-11-08 16:38:26,194 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1457 GetRequests, 1439 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:38:26,195 INFO L432 NwaCegarLoop]: 1109 mSDtfsCounter, 28 mSDsluCounter, 11030 mSDsCounter, 0 mSdLazyCounter, 284 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 12139 SdHoareTripleChecker+Invalid, 285 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 284 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:26,195 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [28 Valid, 12139 Invalid, 285 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 284 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:38:26,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1516 states. [2024-11-08 16:38:26,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1516 to 1516. [2024-11-08 16:38:26,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1516 states, 1504 states have (on average 1.4461436170212767) internal successors, (2175), 1504 states have internal predecessors, (2175), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:38:26,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1516 states to 1516 states and 2195 transitions. [2024-11-08 16:38:26,239 INFO L78 Accepts]: Start accepts. Automaton has 1516 states and 2195 transitions. Word has length 715 [2024-11-08 16:38:26,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:26,240 INFO L471 AbstractCegarLoop]: Abstraction has 1516 states and 2195 transitions. [2024-11-08 16:38:26,240 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 35.05555555555556) internal successors, (631), 18 states have internal predecessors, (631), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:26,241 INFO L276 IsEmpty]: Start isEmpty. Operand 1516 states and 2195 transitions. [2024-11-08 16:38:26,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2024-11-08 16:38:26,247 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:26,248 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:26,284 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:26,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2024-11-08 16:38:26,449 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:26,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:26,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1457147250, now seen corresponding path program 2 times [2024-11-08 16:38:26,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:26,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177808126] [2024-11-08 16:38:26,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:26,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:27,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,046 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:28,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,047 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:28,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,048 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:28,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,050 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:28,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,051 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:28,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,052 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 528 [2024-11-08 16:38:28,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,053 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 540 [2024-11-08 16:38:28,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,054 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 568 [2024-11-08 16:38:28,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,055 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 592 [2024-11-08 16:38:28,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,056 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 602 [2024-11-08 16:38:28,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:28,058 INFO L134 CoverageAnalysis]: Checked inductivity of 733 backedges. 183 proven. 1 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:28,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:28,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177808126] [2024-11-08 16:38:28,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1177808126] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:28,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [310157637] [2024-11-08 16:38:28,059 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:38:28,059 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:28,059 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:28,060 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:28,061 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2024-11-08 16:38:30,090 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:38:30,090 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:38:30,097 INFO L255 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 68 conjuncts are in the unsatisfiable core [2024-11-08 16:38:30,111 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:32,667 INFO L134 CoverageAnalysis]: Checked inductivity of 733 backedges. 105 proven. 75 refuted. 0 times theorem prover too weak. 553 trivial. 0 not checked. [2024-11-08 16:38:32,667 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:37,008 INFO L134 CoverageAnalysis]: Checked inductivity of 733 backedges. 101 proven. 79 refuted. 0 times theorem prover too weak. 553 trivial. 0 not checked. [2024-11-08 16:38:37,009 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [310157637] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:38:37,009 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:38:37,009 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 10, 11] total 21 [2024-11-08 16:38:37,009 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1842388073] [2024-11-08 16:38:37,009 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:38:37,011 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2024-11-08 16:38:37,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:37,013 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-11-08 16:38:37,014 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=346, Unknown=0, NotChecked=0, Total=420 [2024-11-08 16:38:37,014 INFO L87 Difference]: Start difference. First operand 1516 states and 2195 transitions. Second operand has 21 states, 21 states have (on average 74.04761904761905) internal successors, (1555), 21 states have internal predecessors, (1555), 6 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 6 states have call predecessors, (30), 6 states have call successors, (30) [2024-11-08 16:38:40,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:40,313 INFO L93 Difference]: Finished difference Result 3279 states and 4761 transitions. [2024-11-08 16:38:40,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-08 16:38:40,313 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 74.04761904761905) internal successors, (1555), 21 states have internal predecessors, (1555), 6 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 6 states have call predecessors, (30), 6 states have call successors, (30) Word has length 723 [2024-11-08 16:38:40,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:40,316 INFO L225 Difference]: With dead ends: 3279 [2024-11-08 16:38:40,316 INFO L226 Difference]: Without dead ends: 2101 [2024-11-08 16:38:40,318 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1484 GetRequests, 1454 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=169, Invalid=823, Unknown=0, NotChecked=0, Total=992 [2024-11-08 16:38:40,318 INFO L432 NwaCegarLoop]: 812 mSDtfsCounter, 2568 mSDsluCounter, 8361 mSDsCounter, 0 mSdLazyCounter, 3877 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2568 SdHoareTripleChecker+Valid, 9173 SdHoareTripleChecker+Invalid, 3885 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 3877 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:40,318 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2568 Valid, 9173 Invalid, 3885 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 3877 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2024-11-08 16:38:40,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2101 states. [2024-11-08 16:38:40,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2101 to 2094. [2024-11-08 16:38:40,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2094 states, 2062 states have (on average 1.4437439379243453) internal successors, (2977), 2062 states have internal predecessors, (2977), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:38:40,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2094 states to 2094 states and 3037 transitions. [2024-11-08 16:38:40,375 INFO L78 Accepts]: Start accepts. Automaton has 2094 states and 3037 transitions. Word has length 723 [2024-11-08 16:38:40,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:40,376 INFO L471 AbstractCegarLoop]: Abstraction has 2094 states and 3037 transitions. [2024-11-08 16:38:40,377 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 74.04761904761905) internal successors, (1555), 21 states have internal predecessors, (1555), 6 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 6 states have call predecessors, (30), 6 states have call successors, (30) [2024-11-08 16:38:40,377 INFO L276 IsEmpty]: Start isEmpty. Operand 2094 states and 3037 transitions. [2024-11-08 16:38:40,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 726 [2024-11-08 16:38:40,384 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:40,385 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:40,415 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:40,585 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,27 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:40,586 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:40,586 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:40,586 INFO L85 PathProgramCache]: Analyzing trace with hash -833939209, now seen corresponding path program 1 times [2024-11-08 16:38:40,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:40,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343161098] [2024-11-08 16:38:40,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:40,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:40,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,863 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:41,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,864 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:41,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,865 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:41,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,867 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:41,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,868 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:41,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,869 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 530 [2024-11-08 16:38:41,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,870 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 542 [2024-11-08 16:38:41,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,871 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 570 [2024-11-08 16:38:41,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 594 [2024-11-08 16:38:41,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 604 [2024-11-08 16:38:41,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:41,875 INFO L134 CoverageAnalysis]: Checked inductivity of 736 backedges. 183 proven. 4 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:41,875 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:41,875 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343161098] [2024-11-08 16:38:41,875 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343161098] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:41,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1179491099] [2024-11-08 16:38:41,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:41,876 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:41,876 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:41,877 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:41,878 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-11-08 16:38:44,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:44,360 INFO L255 TraceCheckSpWp]: Trace formula consists of 3578 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-08 16:38:44,372 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:44,421 INFO L134 CoverageAnalysis]: Checked inductivity of 736 backedges. 283 proven. 64 refuted. 0 times theorem prover too weak. 389 trivial. 0 not checked. [2024-11-08 16:38:44,421 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:44,501 INFO L134 CoverageAnalysis]: Checked inductivity of 736 backedges. 183 proven. 4 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:44,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1179491099] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:38:44,501 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:38:44,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 8, 5] total 12 [2024-11-08 16:38:44,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168877527] [2024-11-08 16:38:44,502 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:38:44,503 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-08 16:38:44,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:44,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-08 16:38:44,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:38:44,504 INFO L87 Difference]: Start difference. First operand 2094 states and 3037 transitions. Second operand has 12 states, 12 states have (on average 51.25) internal successors, (615), 12 states have internal predecessors, (615), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:44,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:44,655 INFO L93 Difference]: Finished difference Result 3238 states and 4693 transitions. [2024-11-08 16:38:44,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-08 16:38:44,655 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 51.25) internal successors, (615), 12 states have internal predecessors, (615), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 725 [2024-11-08 16:38:44,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:44,659 INFO L225 Difference]: With dead ends: 3238 [2024-11-08 16:38:44,660 INFO L226 Difference]: Without dead ends: 2102 [2024-11-08 16:38:44,661 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1475 GetRequests, 1463 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=128, Unknown=0, NotChecked=0, Total=182 [2024-11-08 16:38:44,662 INFO L432 NwaCegarLoop]: 1099 mSDtfsCounter, 20 mSDsluCounter, 7653 mSDsCounter, 0 mSdLazyCounter, 127 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 8752 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 127 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:44,662 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 8752 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 127 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:38:44,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2102 states. [2024-11-08 16:38:44,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2102 to 2102. [2024-11-08 16:38:44,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2102 states, 2070 states have (on average 1.4420289855072463) internal successors, (2985), 2070 states have internal predecessors, (2985), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:38:44,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2102 states to 2102 states and 3045 transitions. [2024-11-08 16:38:44,724 INFO L78 Accepts]: Start accepts. Automaton has 2102 states and 3045 transitions. Word has length 725 [2024-11-08 16:38:44,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:44,725 INFO L471 AbstractCegarLoop]: Abstraction has 2102 states and 3045 transitions. [2024-11-08 16:38:44,725 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 51.25) internal successors, (615), 12 states have internal predecessors, (615), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:44,725 INFO L276 IsEmpty]: Start isEmpty. Operand 2102 states and 3045 transitions. [2024-11-08 16:38:44,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-11-08 16:38:44,733 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:44,734 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:44,769 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:44,934 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37,28 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:44,936 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:44,936 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:44,937 INFO L85 PathProgramCache]: Analyzing trace with hash -212331893, now seen corresponding path program 2 times [2024-11-08 16:38:44,937 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:44,937 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017013741] [2024-11-08 16:38:44,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:44,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:45,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,413 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:46,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,414 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:46,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,416 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:46,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,417 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:46,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,418 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:46,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,419 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 538 [2024-11-08 16:38:46,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,419 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 550 [2024-11-08 16:38:46,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,420 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 578 [2024-11-08 16:38:46,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,422 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 602 [2024-11-08 16:38:46,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,423 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 612 [2024-11-08 16:38:46,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:46,426 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 183 proven. 36 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:46,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:46,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017013741] [2024-11-08 16:38:46,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1017013741] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:46,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [771954994] [2024-11-08 16:38:46,427 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:38:46,427 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:46,427 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:46,428 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:46,429 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2024-11-08 16:38:48,596 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:38:48,596 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:38:48,602 INFO L255 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-08 16:38:48,608 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:48,777 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 685 trivial. 0 not checked. [2024-11-08 16:38:48,778 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:38:48,778 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [771954994] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:38:48,778 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:38:48,778 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2024-11-08 16:38:48,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104766622] [2024-11-08 16:38:48,779 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:38:48,779 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:38:48,779 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:48,780 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:38:48,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-08 16:38:48,781 INFO L87 Difference]: Start difference. First operand 2102 states and 3045 transitions. Second operand has 8 states, 8 states have (on average 62.375) internal successors, (499), 8 states have internal predecessors, (499), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:48,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:48,874 INFO L93 Difference]: Finished difference Result 3254 states and 4708 transitions. [2024-11-08 16:38:48,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:38:48,874 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 62.375) internal successors, (499), 8 states have internal predecessors, (499), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 733 [2024-11-08 16:38:48,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:48,880 INFO L225 Difference]: With dead ends: 3254 [2024-11-08 16:38:48,880 INFO L226 Difference]: Without dead ends: 2110 [2024-11-08 16:38:48,882 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 761 GetRequests, 748 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2024-11-08 16:38:48,882 INFO L432 NwaCegarLoop]: 1087 mSDtfsCounter, 141 mSDsluCounter, 5418 mSDsCounter, 0 mSdLazyCounter, 59 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 141 SdHoareTripleChecker+Valid, 6505 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 59 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:48,883 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [141 Valid, 6505 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 59 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:38:48,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2110 states. [2024-11-08 16:38:48,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2110 to 2103. [2024-11-08 16:38:48,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2103 states, 2071 states have (on average 1.4422984065668758) internal successors, (2987), 2071 states have internal predecessors, (2987), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:38:48,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2103 states to 2103 states and 3047 transitions. [2024-11-08 16:38:48,941 INFO L78 Accepts]: Start accepts. Automaton has 2103 states and 3047 transitions. Word has length 733 [2024-11-08 16:38:48,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:48,942 INFO L471 AbstractCegarLoop]: Abstraction has 2103 states and 3047 transitions. [2024-11-08 16:38:48,943 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 62.375) internal successors, (499), 8 states have internal predecessors, (499), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:48,943 INFO L276 IsEmpty]: Start isEmpty. Operand 2103 states and 3047 transitions. [2024-11-08 16:38:48,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 734 [2024-11-08 16:38:48,951 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:48,951 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:48,981 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Ended with exit code 0 [2024-11-08 16:38:49,155 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,29 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:49,156 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:49,156 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:49,156 INFO L85 PathProgramCache]: Analyzing trace with hash 1692623848, now seen corresponding path program 1 times [2024-11-08 16:38:49,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:49,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [761950776] [2024-11-08 16:38:49,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:49,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:49,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,773 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:50,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,775 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:50,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,776 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:50,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,778 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:50,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,783 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:50,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,788 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 538 [2024-11-08 16:38:50,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,790 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 550 [2024-11-08 16:38:50,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,791 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 578 [2024-11-08 16:38:50,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,792 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 602 [2024-11-08 16:38:50,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,794 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 612 [2024-11-08 16:38:50,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:50,796 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 182 proven. 36 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:50,796 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:50,796 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [761950776] [2024-11-08 16:38:50,796 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [761950776] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:50,796 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [502339381] [2024-11-08 16:38:50,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:50,797 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:50,797 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:50,799 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:50,802 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2024-11-08 16:38:53,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:53,403 INFO L255 TraceCheckSpWp]: Trace formula consists of 3618 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-08 16:38:53,412 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:53,505 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 108 proven. 2 refuted. 0 times theorem prover too weak. 657 trivial. 0 not checked. [2024-11-08 16:38:53,505 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:53,638 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 108 proven. 0 refuted. 0 times theorem prover too weak. 659 trivial. 0 not checked. [2024-11-08 16:38:53,639 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [502339381] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:53,639 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:38:53,639 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9, 7] total 17 [2024-11-08 16:38:53,639 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176344396] [2024-11-08 16:38:53,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:38:53,641 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:38:53,641 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:53,642 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:38:53,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2024-11-08 16:38:53,642 INFO L87 Difference]: Start difference. First operand 2103 states and 3047 transitions. Second operand has 5 states, 5 states have (on average 104.8) internal successors, (524), 5 states have internal predecessors, (524), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:53,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:53,726 INFO L93 Difference]: Finished difference Result 3534 states and 5116 transitions. [2024-11-08 16:38:53,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:38:53,727 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 104.8) internal successors, (524), 5 states have internal predecessors, (524), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 733 [2024-11-08 16:38:53,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:53,732 INFO L225 Difference]: With dead ends: 3534 [2024-11-08 16:38:53,732 INFO L226 Difference]: Without dead ends: 2237 [2024-11-08 16:38:53,734 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1493 GetRequests, 1478 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2024-11-08 16:38:53,735 INFO L432 NwaCegarLoop]: 1091 mSDtfsCounter, 40 mSDsluCounter, 3261 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 4352 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:53,735 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [40 Valid, 4352 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:38:53,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2237 states. [2024-11-08 16:38:53,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2237 to 2237. [2024-11-08 16:38:53,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2237 states, 2205 states have (on average 1.439909297052154) internal successors, (3175), 2205 states have internal predecessors, (3175), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:38:53,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2237 states to 2237 states and 3235 transitions. [2024-11-08 16:38:53,792 INFO L78 Accepts]: Start accepts. Automaton has 2237 states and 3235 transitions. Word has length 733 [2024-11-08 16:38:53,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:53,792 INFO L471 AbstractCegarLoop]: Abstraction has 2237 states and 3235 transitions. [2024-11-08 16:38:53,793 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 104.8) internal successors, (524), 5 states have internal predecessors, (524), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:38:53,793 INFO L276 IsEmpty]: Start isEmpty. Operand 2237 states and 3235 transitions. [2024-11-08 16:38:53,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 735 [2024-11-08 16:38:53,801 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:53,802 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:53,840 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2024-11-08 16:38:54,002 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 30 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2024-11-08 16:38:54,002 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:54,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:54,003 INFO L85 PathProgramCache]: Analyzing trace with hash -1967973714, now seen corresponding path program 1 times [2024-11-08 16:38:54,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:54,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891707298] [2024-11-08 16:38:54,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:54,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:54,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,331 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:38:55,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,332 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:38:55,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,333 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:38:55,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,334 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:38:55,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,335 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:38:55,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 538 [2024-11-08 16:38:55,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,339 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 550 [2024-11-08 16:38:55,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,341 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 578 [2024-11-08 16:38:55,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,342 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 602 [2024-11-08 16:38:55,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,344 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 612 [2024-11-08 16:38:55,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:55,346 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 183 proven. 36 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:55,347 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:38:55,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891707298] [2024-11-08 16:38:55,347 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [891707298] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:38:55,347 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [919556537] [2024-11-08 16:38:55,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:55,348 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:55,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:38:55,350 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:38:55,352 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2024-11-08 16:38:57,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:38:57,991 INFO L255 TraceCheckSpWp]: Trace formula consists of 3619 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-11-08 16:38:58,000 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:38:58,172 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 283 proven. 152 refuted. 0 times theorem prover too weak. 333 trivial. 0 not checked. [2024-11-08 16:38:58,172 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:38:58,405 INFO L134 CoverageAnalysis]: Checked inductivity of 768 backedges. 183 proven. 36 refuted. 0 times theorem prover too weak. 549 trivial. 0 not checked. [2024-11-08 16:38:58,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [919556537] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:38:58,405 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:38:58,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 16, 9] total 24 [2024-11-08 16:38:58,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1848521949] [2024-11-08 16:38:58,405 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:38:58,406 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-11-08 16:38:58,406 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:38:58,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-11-08 16:38:58,407 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=464, Unknown=0, NotChecked=0, Total=552 [2024-11-08 16:38:58,407 INFO L87 Difference]: Start difference. First operand 2237 states and 3235 transitions. Second operand has 24 states, 24 states have (on average 27.0) internal successors, (648), 24 states have internal predecessors, (648), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:58,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:38:58,727 INFO L93 Difference]: Finished difference Result 3455 states and 4992 transitions. [2024-11-08 16:38:58,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-08 16:38:58,727 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 27.0) internal successors, (648), 24 states have internal predecessors, (648), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 734 [2024-11-08 16:38:58,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:38:58,731 INFO L225 Difference]: With dead ends: 3455 [2024-11-08 16:38:58,731 INFO L226 Difference]: Without dead ends: 2241 [2024-11-08 16:38:58,733 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1495 GetRequests, 1473 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=88, Invalid=464, Unknown=0, NotChecked=0, Total=552 [2024-11-08 16:38:58,734 INFO L432 NwaCegarLoop]: 1119 mSDtfsCounter, 34 mSDsluCounter, 15582 mSDsCounter, 0 mSdLazyCounter, 541 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 16701 SdHoareTripleChecker+Invalid, 542 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 541 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:38:58,734 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [34 Valid, 16701 Invalid, 542 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 541 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:38:58,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2241 states. [2024-11-08 16:38:58,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2241 to 2241. [2024-11-08 16:38:58,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2241 states, 2209 states have (on average 1.4391127206880943) internal successors, (3179), 2209 states have internal predecessors, (3179), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:38:58,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2241 states to 2241 states and 3239 transitions. [2024-11-08 16:38:58,793 INFO L78 Accepts]: Start accepts. Automaton has 2241 states and 3239 transitions. Word has length 734 [2024-11-08 16:38:58,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:38:58,794 INFO L471 AbstractCegarLoop]: Abstraction has 2241 states and 3239 transitions. [2024-11-08 16:38:58,794 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 27.0) internal successors, (648), 24 states have internal predecessors, (648), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:38:58,795 INFO L276 IsEmpty]: Start isEmpty. Operand 2241 states and 3239 transitions. [2024-11-08 16:38:58,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 739 [2024-11-08 16:38:58,802 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:38:58,802 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:38:58,838 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2024-11-08 16:38:59,003 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,31 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:38:59,004 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:38:59,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:38:59,004 INFO L85 PathProgramCache]: Analyzing trace with hash 848352932, now seen corresponding path program 2 times [2024-11-08 16:38:59,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:38:59,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226555305] [2024-11-08 16:38:59,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:38:59,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:38:59,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,006 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:00,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,007 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:00,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,008 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:00,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,009 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:00,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,011 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:00,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,012 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 542 [2024-11-08 16:39:00,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,014 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 554 [2024-11-08 16:39:00,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,015 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 582 [2024-11-08 16:39:00,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,017 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 606 [2024-11-08 16:39:00,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,019 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 616 [2024-11-08 16:39:00,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:00,021 INFO L134 CoverageAnalysis]: Checked inductivity of 796 backedges. 183 proven. 1 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2024-11-08 16:39:00,021 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:00,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1226555305] [2024-11-08 16:39:00,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1226555305] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:39:00,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [51313765] [2024-11-08 16:39:00,022 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:39:00,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:39:00,022 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:39:00,023 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:39:00,024 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2024-11-08 16:39:02,430 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:39:02,430 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:39:02,437 INFO L255 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 70 conjuncts are in the unsatisfiable core [2024-11-08 16:39:02,448 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:39:07,086 INFO L134 CoverageAnalysis]: Checked inductivity of 796 backedges. 4 proven. 108 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2024-11-08 16:39:07,087 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:39:16,688 INFO L134 CoverageAnalysis]: Checked inductivity of 796 backedges. 2 proven. 110 refuted. 0 times theorem prover too weak. 684 trivial. 0 not checked. [2024-11-08 16:39:16,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [51313765] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:39:16,689 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:39:16,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 16, 15] total 31 [2024-11-08 16:39:16,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104052893] [2024-11-08 16:39:16,690 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:39:16,691 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2024-11-08 16:39:16,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:16,693 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2024-11-08 16:39:16,694 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=796, Unknown=0, NotChecked=0, Total=930 [2024-11-08 16:39:16,694 INFO L87 Difference]: Start difference. First operand 2241 states and 3239 transitions. Second operand has 31 states, 31 states have (on average 52.645161290322584) internal successors, (1632), 31 states have internal predecessors, (1632), 4 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 4 states have call predecessors, (20), 4 states have call successors, (20) [2024-11-08 16:39:21,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:21,123 INFO L93 Difference]: Finished difference Result 4498 states and 6526 transitions. [2024-11-08 16:39:21,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-08 16:39:21,124 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 52.645161290322584) internal successors, (1632), 31 states have internal predecessors, (1632), 4 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 4 states have call predecessors, (20), 4 states have call successors, (20) Word has length 738 [2024-11-08 16:39:21,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:21,128 INFO L225 Difference]: With dead ends: 4498 [2024-11-08 16:39:21,128 INFO L226 Difference]: Without dead ends: 2911 [2024-11-08 16:39:21,131 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1529 GetRequests, 1478 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 608 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=345, Invalid=2307, Unknown=0, NotChecked=0, Total=2652 [2024-11-08 16:39:21,131 INFO L432 NwaCegarLoop]: 773 mSDtfsCounter, 5185 mSDsluCounter, 11425 mSDsCounter, 0 mSdLazyCounter, 5048 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5185 SdHoareTripleChecker+Valid, 12198 SdHoareTripleChecker+Invalid, 5059 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 5048 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.5s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:21,132 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [5185 Valid, 12198 Invalid, 5059 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [11 Valid, 5048 Invalid, 0 Unknown, 0 Unchecked, 3.5s Time] [2024-11-08 16:39:21,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2911 states. [2024-11-08 16:39:21,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2911 to 2433. [2024-11-08 16:39:21,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2433 states, 2401 states have (on average 1.4389837567680133) internal successors, (3455), 2401 states have internal predecessors, (3455), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:21,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2433 states to 2433 states and 3515 transitions. [2024-11-08 16:39:21,196 INFO L78 Accepts]: Start accepts. Automaton has 2433 states and 3515 transitions. Word has length 738 [2024-11-08 16:39:21,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:21,197 INFO L471 AbstractCegarLoop]: Abstraction has 2433 states and 3515 transitions. [2024-11-08 16:39:21,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 52.645161290322584) internal successors, (1632), 31 states have internal predecessors, (1632), 4 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 4 states have call predecessors, (20), 4 states have call successors, (20) [2024-11-08 16:39:21,198 INFO L276 IsEmpty]: Start isEmpty. Operand 2433 states and 3515 transitions. [2024-11-08 16:39:21,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 742 [2024-11-08 16:39:21,206 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:21,206 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:21,236 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2024-11-08 16:39:21,407 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 32 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2024-11-08 16:39:21,408 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:21,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:21,408 INFO L85 PathProgramCache]: Analyzing trace with hash -687296647, now seen corresponding path program 1 times [2024-11-08 16:39:21,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:21,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134488803] [2024-11-08 16:39:21,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:21,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:21,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,584 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:22,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,586 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:22,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,588 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:22,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,590 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:22,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,593 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:22,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,595 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 544 [2024-11-08 16:39:22,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,597 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 556 [2024-11-08 16:39:22,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,599 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 584 [2024-11-08 16:39:22,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,601 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 608 [2024-11-08 16:39:22,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,603 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 618 [2024-11-08 16:39:22,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:22,606 INFO L134 CoverageAnalysis]: Checked inductivity of 799 backedges. 183 proven. 4 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2024-11-08 16:39:22,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:22,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134488803] [2024-11-08 16:39:22,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134488803] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:39:22,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1046092570] [2024-11-08 16:39:22,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:22,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:39:22,608 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:39:22,609 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:39:22,611 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2024-11-08 16:39:25,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:25,402 INFO L255 TraceCheckSpWp]: Trace formula consists of 3650 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-08 16:39:25,410 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:39:25,547 INFO L134 CoverageAnalysis]: Checked inductivity of 799 backedges. 283 proven. 64 refuted. 0 times theorem prover too weak. 452 trivial. 0 not checked. [2024-11-08 16:39:25,547 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:39:25,629 INFO L134 CoverageAnalysis]: Checked inductivity of 799 backedges. 183 proven. 4 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2024-11-08 16:39:25,630 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1046092570] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:39:25,630 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:39:25,630 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 8, 5] total 12 [2024-11-08 16:39:25,630 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048509739] [2024-11-08 16:39:25,630 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:39:25,631 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-08 16:39:25,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:25,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-08 16:39:25,632 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:39:25,632 INFO L87 Difference]: Start difference. First operand 2433 states and 3515 transitions. Second operand has 12 states, 12 states have (on average 51.416666666666664) internal successors, (617), 12 states have internal predecessors, (617), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:39:25,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:25,796 INFO L93 Difference]: Finished difference Result 3845 states and 5552 transitions. [2024-11-08 16:39:25,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-08 16:39:25,797 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 51.416666666666664) internal successors, (617), 12 states have internal predecessors, (617), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 741 [2024-11-08 16:39:25,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:25,799 INFO L225 Difference]: With dead ends: 3845 [2024-11-08 16:39:25,800 INFO L226 Difference]: Without dead ends: 2441 [2024-11-08 16:39:25,801 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1507 GetRequests, 1495 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=128, Unknown=0, NotChecked=0, Total=182 [2024-11-08 16:39:25,802 INFO L432 NwaCegarLoop]: 1099 mSDtfsCounter, 20 mSDsluCounter, 9843 mSDsCounter, 0 mSdLazyCounter, 153 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 10942 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 153 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:25,802 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [20 Valid, 10942 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 153 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:39:25,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2441 states. [2024-11-08 16:39:25,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2441 to 2441. [2024-11-08 16:39:25,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2441 states, 2409 states have (on average 1.4375259443752595) internal successors, (3463), 2409 states have internal predecessors, (3463), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:25,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2441 states to 2441 states and 3523 transitions. [2024-11-08 16:39:25,841 INFO L78 Accepts]: Start accepts. Automaton has 2441 states and 3523 transitions. Word has length 741 [2024-11-08 16:39:25,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:25,842 INFO L471 AbstractCegarLoop]: Abstraction has 2441 states and 3523 transitions. [2024-11-08 16:39:25,842 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 51.416666666666664) internal successors, (617), 12 states have internal predecessors, (617), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:39:25,842 INFO L276 IsEmpty]: Start isEmpty. Operand 2441 states and 3523 transitions. [2024-11-08 16:39:25,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 750 [2024-11-08 16:39:25,850 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:25,851 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:25,878 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2024-11-08 16:39:26,051 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2024-11-08 16:39:26,052 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:26,052 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:26,052 INFO L85 PathProgramCache]: Analyzing trace with hash -1361294707, now seen corresponding path program 2 times [2024-11-08 16:39:26,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:26,052 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820938460] [2024-11-08 16:39:26,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:26,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:26,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,371 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:27,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,373 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:27,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,374 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:27,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,375 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:27,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,377 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:27,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,377 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 552 [2024-11-08 16:39:27,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,379 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 564 [2024-11-08 16:39:27,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,380 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 592 [2024-11-08 16:39:27,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,381 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 616 [2024-11-08 16:39:27,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,383 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 626 [2024-11-08 16:39:27,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:27,385 INFO L134 CoverageAnalysis]: Checked inductivity of 831 backedges. 183 proven. 36 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2024-11-08 16:39:27,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:27,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820938460] [2024-11-08 16:39:27,385 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [820938460] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:39:27,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [892148919] [2024-11-08 16:39:27,386 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:39:27,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:39:27,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:39:27,387 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:39:27,388 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2024-11-08 16:39:30,346 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 16:39:30,346 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:39:30,366 INFO L255 TraceCheckSpWp]: Trace formula consists of 3690 conjuncts, 30 conjuncts are in the unsatisfiable core [2024-11-08 16:39:30,374 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:39:30,512 INFO L134 CoverageAnalysis]: Checked inductivity of 831 backedges. 283 proven. 152 refuted. 0 times theorem prover too weak. 396 trivial. 0 not checked. [2024-11-08 16:39:30,512 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:39:30,700 INFO L134 CoverageAnalysis]: Checked inductivity of 831 backedges. 183 proven. 36 refuted. 0 times theorem prover too weak. 612 trivial. 0 not checked. [2024-11-08 16:39:30,700 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [892148919] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:39:30,700 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:39:30,700 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 16, 9] total 24 [2024-11-08 16:39:30,700 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [46642716] [2024-11-08 16:39:30,700 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:39:30,701 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-11-08 16:39:30,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:30,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-11-08 16:39:30,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=464, Unknown=0, NotChecked=0, Total=552 [2024-11-08 16:39:30,703 INFO L87 Difference]: Start difference. First operand 2441 states and 3523 transitions. Second operand has 24 states, 24 states have (on average 27.041666666666668) internal successors, (649), 24 states have internal predecessors, (649), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:39:31,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:31,067 INFO L93 Difference]: Finished difference Result 3857 states and 5562 transitions. [2024-11-08 16:39:31,068 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-08 16:39:31,068 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 27.041666666666668) internal successors, (649), 24 states have internal predecessors, (649), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 749 [2024-11-08 16:39:31,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:31,071 INFO L225 Difference]: With dead ends: 3857 [2024-11-08 16:39:31,071 INFO L226 Difference]: Without dead ends: 2445 [2024-11-08 16:39:31,072 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1525 GetRequests, 1503 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=88, Invalid=464, Unknown=0, NotChecked=0, Total=552 [2024-11-08 16:39:31,072 INFO L432 NwaCegarLoop]: 1119 mSDtfsCounter, 33 mSDsluCounter, 16697 mSDsCounter, 0 mSdLazyCounter, 569 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 17816 SdHoareTripleChecker+Invalid, 570 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 569 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:31,073 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [33 Valid, 17816 Invalid, 570 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 569 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-08 16:39:31,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2445 states. [2024-11-08 16:39:31,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2445 to 2445. [2024-11-08 16:39:31,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2445 states, 2413 states have (on average 1.4368006630750103) internal successors, (3467), 2413 states have internal predecessors, (3467), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:31,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2445 states to 2445 states and 3527 transitions. [2024-11-08 16:39:31,133 INFO L78 Accepts]: Start accepts. Automaton has 2445 states and 3527 transitions. Word has length 749 [2024-11-08 16:39:31,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:31,134 INFO L471 AbstractCegarLoop]: Abstraction has 2445 states and 3527 transitions. [2024-11-08 16:39:31,134 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 27.041666666666668) internal successors, (649), 24 states have internal predecessors, (649), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:39:31,134 INFO L276 IsEmpty]: Start isEmpty. Operand 2445 states and 3527 transitions. [2024-11-08 16:39:31,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 754 [2024-11-08 16:39:31,143 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:31,143 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:31,181 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Ended with exit code 0 [2024-11-08 16:39:31,344 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable43 [2024-11-08 16:39:31,344 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:31,344 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:31,345 INFO L85 PathProgramCache]: Analyzing trace with hash 1619654807, now seen corresponding path program 3 times [2024-11-08 16:39:31,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:31,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261736965] [2024-11-08 16:39:31,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:31,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:32,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,306 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:34,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,308 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:34,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,311 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:34,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,313 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:34,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,316 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:34,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,318 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 556 [2024-11-08 16:39:34,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,319 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 568 [2024-11-08 16:39:34,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,320 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 596 [2024-11-08 16:39:34,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 620 [2024-11-08 16:39:34,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,322 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 630 [2024-11-08 16:39:34,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:34,324 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:34,325 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:34,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261736965] [2024-11-08 16:39:34,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [261736965] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:34,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:34,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:39:34,325 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2003622663] [2024-11-08 16:39:34,325 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:34,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:39:34,326 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:34,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:39:34,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:39:34,328 INFO L87 Difference]: Start difference. First operand 2445 states and 3527 transitions. Second operand has 5 states, 5 states have (on average 118.8) internal successors, (594), 5 states have internal predecessors, (594), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:34,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:34,613 INFO L93 Difference]: Finished difference Result 3861 states and 5564 transitions. [2024-11-08 16:39:34,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:39:34,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 118.8) internal successors, (594), 5 states have internal predecessors, (594), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 753 [2024-11-08 16:39:34,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:34,618 INFO L225 Difference]: With dead ends: 3861 [2024-11-08 16:39:34,618 INFO L226 Difference]: Without dead ends: 2445 [2024-11-08 16:39:34,621 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:34,621 INFO L432 NwaCegarLoop]: 1001 mSDtfsCounter, 1073 mSDsluCounter, 1012 mSDsCounter, 0 mSdLazyCounter, 188 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1078 SdHoareTripleChecker+Valid, 2013 SdHoareTripleChecker+Invalid, 188 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:34,622 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1078 Valid, 2013 Invalid, 188 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 188 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:39:34,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2445 states. [2024-11-08 16:39:34,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2445 to 2445. [2024-11-08 16:39:34,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2445 states, 2413 states have (on average 1.436386241193535) internal successors, (3466), 2413 states have internal predecessors, (3466), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:34,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2445 states to 2445 states and 3526 transitions. [2024-11-08 16:39:34,696 INFO L78 Accepts]: Start accepts. Automaton has 2445 states and 3526 transitions. Word has length 753 [2024-11-08 16:39:34,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:34,696 INFO L471 AbstractCegarLoop]: Abstraction has 2445 states and 3526 transitions. [2024-11-08 16:39:34,697 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 118.8) internal successors, (594), 5 states have internal predecessors, (594), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:34,697 INFO L276 IsEmpty]: Start isEmpty. Operand 2445 states and 3526 transitions. [2024-11-08 16:39:34,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 755 [2024-11-08 16:39:34,705 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:34,706 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:34,706 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-08 16:39:34,706 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:34,706 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:34,707 INFO L85 PathProgramCache]: Analyzing trace with hash 1026356207, now seen corresponding path program 1 times [2024-11-08 16:39:34,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:34,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236831368] [2024-11-08 16:39:34,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:34,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:35,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,343 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:37,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,347 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:37,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,351 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:37,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,354 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:37,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,358 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:37,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,362 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 557 [2024-11-08 16:39:37,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,364 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 569 [2024-11-08 16:39:37,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,365 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 597 [2024-11-08 16:39:37,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,367 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 621 [2024-11-08 16:39:37,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,368 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 631 [2024-11-08 16:39:37,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:37,373 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:37,373 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:37,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236831368] [2024-11-08 16:39:37,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [236831368] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:37,374 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:37,374 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:39:37,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055499313] [2024-11-08 16:39:37,374 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:37,375 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:39:37,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:37,376 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:39:37,377 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:39:37,377 INFO L87 Difference]: Start difference. First operand 2445 states and 3526 transitions. Second operand has 5 states, 5 states have (on average 119.0) internal successors, (595), 5 states have internal predecessors, (595), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:37,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:37,642 INFO L93 Difference]: Finished difference Result 3861 states and 5562 transitions. [2024-11-08 16:39:37,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:39:37,643 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 119.0) internal successors, (595), 5 states have internal predecessors, (595), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 754 [2024-11-08 16:39:37,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:37,645 INFO L225 Difference]: With dead ends: 3861 [2024-11-08 16:39:37,645 INFO L226 Difference]: Without dead ends: 2445 [2024-11-08 16:39:37,647 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:37,647 INFO L432 NwaCegarLoop]: 1001 mSDtfsCounter, 1072 mSDsluCounter, 1012 mSDsCounter, 0 mSdLazyCounter, 186 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1077 SdHoareTripleChecker+Valid, 2013 SdHoareTripleChecker+Invalid, 186 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 186 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:37,647 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1077 Valid, 2013 Invalid, 186 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 186 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:39:37,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2445 states. [2024-11-08 16:39:37,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2445 to 2445. [2024-11-08 16:39:37,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2445 states, 2413 states have (on average 1.4359718193120596) internal successors, (3465), 2413 states have internal predecessors, (3465), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:37,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2445 states to 2445 states and 3525 transitions. [2024-11-08 16:39:37,702 INFO L78 Accepts]: Start accepts. Automaton has 2445 states and 3525 transitions. Word has length 754 [2024-11-08 16:39:37,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:37,702 INFO L471 AbstractCegarLoop]: Abstraction has 2445 states and 3525 transitions. [2024-11-08 16:39:37,703 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 119.0) internal successors, (595), 5 states have internal predecessors, (595), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:37,703 INFO L276 IsEmpty]: Start isEmpty. Operand 2445 states and 3525 transitions. [2024-11-08 16:39:37,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 756 [2024-11-08 16:39:37,711 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:37,711 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:37,712 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-11-08 16:39:37,712 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:37,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:37,712 INFO L85 PathProgramCache]: Analyzing trace with hash 219512564, now seen corresponding path program 1 times [2024-11-08 16:39:37,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:37,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [755798638] [2024-11-08 16:39:37,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:37,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:39,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,348 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:40,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,351 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:40,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,353 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:40,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,356 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:40,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,358 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:40,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,360 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 558 [2024-11-08 16:39:40,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,361 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 570 [2024-11-08 16:39:40,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,362 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 598 [2024-11-08 16:39:40,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,363 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 622 [2024-11-08 16:39:40,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,364 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 632 [2024-11-08 16:39:40,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:40,367 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:40,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:40,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [755798638] [2024-11-08 16:39:40,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [755798638] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:40,367 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:40,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:39:40,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380417166] [2024-11-08 16:39:40,367 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:40,368 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:39:40,368 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:40,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:39:40,369 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:39:40,369 INFO L87 Difference]: Start difference. First operand 2445 states and 3525 transitions. Second operand has 5 states, 5 states have (on average 119.2) internal successors, (596), 5 states have internal predecessors, (596), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:40,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:40,637 INFO L93 Difference]: Finished difference Result 3861 states and 5560 transitions. [2024-11-08 16:39:40,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:39:40,637 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 119.2) internal successors, (596), 5 states have internal predecessors, (596), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 755 [2024-11-08 16:39:40,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:40,641 INFO L225 Difference]: With dead ends: 3861 [2024-11-08 16:39:40,641 INFO L226 Difference]: Without dead ends: 2445 [2024-11-08 16:39:40,643 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:40,643 INFO L432 NwaCegarLoop]: 1001 mSDtfsCounter, 1071 mSDsluCounter, 1012 mSDsCounter, 0 mSdLazyCounter, 184 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1076 SdHoareTripleChecker+Valid, 2013 SdHoareTripleChecker+Invalid, 184 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 184 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:40,644 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1076 Valid, 2013 Invalid, 184 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 184 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:39:40,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2445 states. [2024-11-08 16:39:40,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2445 to 2445. [2024-11-08 16:39:40,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2445 states, 2413 states have (on average 1.4355573974305844) internal successors, (3464), 2413 states have internal predecessors, (3464), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:40,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2445 states to 2445 states and 3524 transitions. [2024-11-08 16:39:40,711 INFO L78 Accepts]: Start accepts. Automaton has 2445 states and 3524 transitions. Word has length 755 [2024-11-08 16:39:40,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:40,712 INFO L471 AbstractCegarLoop]: Abstraction has 2445 states and 3524 transitions. [2024-11-08 16:39:40,712 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 119.2) internal successors, (596), 5 states have internal predecessors, (596), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:40,712 INFO L276 IsEmpty]: Start isEmpty. Operand 2445 states and 3524 transitions. [2024-11-08 16:39:40,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 757 [2024-11-08 16:39:40,720 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:40,721 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:40,721 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-08 16:39:40,721 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:40,722 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:40,722 INFO L85 PathProgramCache]: Analyzing trace with hash 96797927, now seen corresponding path program 1 times [2024-11-08 16:39:40,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:40,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [166279444] [2024-11-08 16:39:40,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:40,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:41,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,705 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:42,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,709 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:42,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,713 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:42,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,717 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:42,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,722 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:42,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,729 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 559 [2024-11-08 16:39:42,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,731 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 571 [2024-11-08 16:39:42,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,733 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 599 [2024-11-08 16:39:42,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,736 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 623 [2024-11-08 16:39:42,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,738 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 633 [2024-11-08 16:39:42,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:42,743 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:42,743 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:42,743 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [166279444] [2024-11-08 16:39:42,743 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [166279444] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:42,744 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:42,744 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 16:39:42,744 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816259270] [2024-11-08 16:39:42,744 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:42,745 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:39:42,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:42,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:39:42,747 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:39:42,747 INFO L87 Difference]: Start difference. First operand 2445 states and 3524 transitions. Second operand has 4 states, 4 states have (on average 149.25) internal successors, (597), 4 states have internal predecessors, (597), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:43,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:43,008 INFO L93 Difference]: Finished difference Result 3861 states and 5558 transitions. [2024-11-08 16:39:43,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:39:43,009 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 149.25) internal successors, (597), 4 states have internal predecessors, (597), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 756 [2024-11-08 16:39:43,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:43,012 INFO L225 Difference]: With dead ends: 3861 [2024-11-08 16:39:43,012 INFO L226 Difference]: Without dead ends: 2445 [2024-11-08 16:39:43,014 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:39:43,014 INFO L432 NwaCegarLoop]: 1001 mSDtfsCounter, 745 mSDsluCounter, 1003 mSDsCounter, 0 mSdLazyCounter, 182 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 745 SdHoareTripleChecker+Valid, 2004 SdHoareTripleChecker+Invalid, 182 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 182 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:43,014 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [745 Valid, 2004 Invalid, 182 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 182 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:39:43,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2445 states. [2024-11-08 16:39:43,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2445 to 2445. [2024-11-08 16:39:43,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2445 states, 2413 states have (on average 1.435142975549109) internal successors, (3463), 2413 states have internal predecessors, (3463), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:43,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2445 states to 2445 states and 3523 transitions. [2024-11-08 16:39:43,069 INFO L78 Accepts]: Start accepts. Automaton has 2445 states and 3523 transitions. Word has length 756 [2024-11-08 16:39:43,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:43,069 INFO L471 AbstractCegarLoop]: Abstraction has 2445 states and 3523 transitions. [2024-11-08 16:39:43,069 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 149.25) internal successors, (597), 4 states have internal predecessors, (597), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:43,070 INFO L276 IsEmpty]: Start isEmpty. Operand 2445 states and 3523 transitions. [2024-11-08 16:39:43,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 758 [2024-11-08 16:39:43,075 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:43,075 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:43,075 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-11-08 16:39:43,075 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:43,075 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:43,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1258730161, now seen corresponding path program 1 times [2024-11-08 16:39:43,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:43,076 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113288384] [2024-11-08 16:39:43,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:43,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:45,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,056 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:47,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,057 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:47,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,058 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:47,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,059 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:47,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,060 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:47,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,062 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 560 [2024-11-08 16:39:47,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,063 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 572 [2024-11-08 16:39:47,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,064 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 600 [2024-11-08 16:39:47,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,065 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:39:47,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,067 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 634 [2024-11-08 16:39:47,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:47,069 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:47,069 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:47,070 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113288384] [2024-11-08 16:39:47,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1113288384] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:47,070 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:47,070 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:39:47,071 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945856638] [2024-11-08 16:39:47,071 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:47,071 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:39:47,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:47,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:39:47,073 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:47,073 INFO L87 Difference]: Start difference. First operand 2445 states and 3523 transitions. Second operand has 6 states, 6 states have (on average 99.66666666666667) internal successors, (598), 6 states have internal predecessors, (598), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:47,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:47,186 INFO L93 Difference]: Finished difference Result 4799 states and 6923 transitions. [2024-11-08 16:39:47,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:39:47,186 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 99.66666666666667) internal successors, (598), 6 states have internal predecessors, (598), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 757 [2024-11-08 16:39:47,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:47,190 INFO L225 Difference]: With dead ends: 4799 [2024-11-08 16:39:47,190 INFO L226 Difference]: Without dead ends: 3383 [2024-11-08 16:39:47,191 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:47,192 INFO L432 NwaCegarLoop]: 1081 mSDtfsCounter, 295 mSDsluCounter, 4313 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 295 SdHoareTripleChecker+Valid, 5394 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:47,192 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [295 Valid, 5394 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:39:47,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3383 states. [2024-11-08 16:39:47,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3383 to 3379. [2024-11-08 16:39:47,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3379 states, 3347 states have (on average 1.4415894831192113) internal successors, (4825), 3347 states have internal predecessors, (4825), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:47,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3379 states to 3379 states and 4885 transitions. [2024-11-08 16:39:47,273 INFO L78 Accepts]: Start accepts. Automaton has 3379 states and 4885 transitions. Word has length 757 [2024-11-08 16:39:47,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:47,274 INFO L471 AbstractCegarLoop]: Abstraction has 3379 states and 4885 transitions. [2024-11-08 16:39:47,274 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 99.66666666666667) internal successors, (598), 6 states have internal predecessors, (598), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:47,274 INFO L276 IsEmpty]: Start isEmpty. Operand 3379 states and 4885 transitions. [2024-11-08 16:39:47,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 759 [2024-11-08 16:39:47,283 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:47,284 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:47,284 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-11-08 16:39:47,284 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:47,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:47,285 INFO L85 PathProgramCache]: Analyzing trace with hash 2099663939, now seen corresponding path program 1 times [2024-11-08 16:39:47,285 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:47,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118955834] [2024-11-08 16:39:47,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:47,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:49,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,224 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:51,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:51,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,226 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:51,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:51,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,228 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:51,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 561 [2024-11-08 16:39:51,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,230 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 573 [2024-11-08 16:39:51,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,231 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 601 [2024-11-08 16:39:51,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 625 [2024-11-08 16:39:51,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 635 [2024-11-08 16:39:51,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:51,234 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:51,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:51,234 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118955834] [2024-11-08 16:39:51,234 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118955834] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:51,234 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:51,234 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:39:51,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619035928] [2024-11-08 16:39:51,235 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:51,235 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:39:51,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:51,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:39:51,236 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:51,237 INFO L87 Difference]: Start difference. First operand 3379 states and 4885 transitions. Second operand has 6 states, 6 states have (on average 99.83333333333333) internal successors, (599), 6 states have internal predecessors, (599), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:51,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:51,388 INFO L93 Difference]: Finished difference Result 7441 states and 10764 transitions. [2024-11-08 16:39:51,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:39:51,389 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 99.83333333333333) internal successors, (599), 6 states have internal predecessors, (599), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 758 [2024-11-08 16:39:51,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:51,396 INFO L225 Difference]: With dead ends: 7441 [2024-11-08 16:39:51,396 INFO L226 Difference]: Without dead ends: 5377 [2024-11-08 16:39:51,399 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:51,400 INFO L432 NwaCegarLoop]: 1081 mSDtfsCounter, 309 mSDsluCounter, 4307 mSDsCounter, 0 mSdLazyCounter, 61 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 309 SdHoareTripleChecker+Valid, 5388 SdHoareTripleChecker+Invalid, 61 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 61 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:51,400 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [309 Valid, 5388 Invalid, 61 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 61 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:39:51,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5377 states. [2024-11-08 16:39:51,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5377 to 5371. [2024-11-08 16:39:51,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5371 states, 5339 states have (on average 1.4467128675781982) internal successors, (7724), 5339 states have internal predecessors, (7724), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:51,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5371 states to 5371 states and 7784 transitions. [2024-11-08 16:39:51,501 INFO L78 Accepts]: Start accepts. Automaton has 5371 states and 7784 transitions. Word has length 758 [2024-11-08 16:39:51,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:51,501 INFO L471 AbstractCegarLoop]: Abstraction has 5371 states and 7784 transitions. [2024-11-08 16:39:51,501 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 99.83333333333333) internal successors, (599), 6 states have internal predecessors, (599), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:51,502 INFO L276 IsEmpty]: Start isEmpty. Operand 5371 states and 7784 transitions. [2024-11-08 16:39:51,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 760 [2024-11-08 16:39:51,509 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:51,509 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:51,509 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-11-08 16:39:51,509 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:51,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:51,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1712676052, now seen corresponding path program 1 times [2024-11-08 16:39:51,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:51,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840919967] [2024-11-08 16:39:51,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:51,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:54,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,789 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:39:55,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,791 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:39:55,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,792 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:39:55,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,794 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:39:55,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,795 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:39:55,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,797 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 562 [2024-11-08 16:39:55,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 574 [2024-11-08 16:39:55,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,799 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 602 [2024-11-08 16:39:55,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 626 [2024-11-08 16:39:55,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 636 [2024-11-08 16:39:55,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:39:55,804 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:39:55,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:39:55,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840919967] [2024-11-08 16:39:55,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1840919967] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:39:55,805 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:39:55,805 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:39:55,806 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044132489] [2024-11-08 16:39:55,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:39:55,806 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:39:55,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:39:55,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:39:55,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:55,808 INFO L87 Difference]: Start difference. First operand 5371 states and 7784 transitions. Second operand has 6 states, 6 states have (on average 100.0) internal successors, (600), 6 states have internal predecessors, (600), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:56,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:39:56,761 INFO L93 Difference]: Finished difference Result 9113 states and 13163 transitions. [2024-11-08 16:39:56,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:39:56,762 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 100.0) internal successors, (600), 6 states have internal predecessors, (600), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 759 [2024-11-08 16:39:56,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:39:56,767 INFO L225 Difference]: With dead ends: 9113 [2024-11-08 16:39:56,767 INFO L226 Difference]: Without dead ends: 5699 [2024-11-08 16:39:56,770 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:39:56,770 INFO L432 NwaCegarLoop]: 804 mSDtfsCounter, 1042 mSDsluCounter, 2391 mSDsCounter, 0 mSdLazyCounter, 1164 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1047 SdHoareTripleChecker+Valid, 3195 SdHoareTripleChecker+Invalid, 1165 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-08 16:39:56,771 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1047 Valid, 3195 Invalid, 1165 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1164 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-08 16:39:56,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5699 states. [2024-11-08 16:39:56,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5699 to 5697. [2024-11-08 16:39:56,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5697 states, 5665 states have (on average 1.4427184466019418) internal successors, (8173), 5665 states have internal predecessors, (8173), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:39:56,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5697 states to 5697 states and 8233 transitions. [2024-11-08 16:39:56,845 INFO L78 Accepts]: Start accepts. Automaton has 5697 states and 8233 transitions. Word has length 759 [2024-11-08 16:39:56,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:39:56,845 INFO L471 AbstractCegarLoop]: Abstraction has 5697 states and 8233 transitions. [2024-11-08 16:39:56,846 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 100.0) internal successors, (600), 6 states have internal predecessors, (600), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:39:56,846 INFO L276 IsEmpty]: Start isEmpty. Operand 5697 states and 8233 transitions. [2024-11-08 16:39:56,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 761 [2024-11-08 16:39:56,853 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:39:56,853 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:39:56,853 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-11-08 16:39:56,853 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:39:56,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:39:56,854 INFO L85 PathProgramCache]: Analyzing trace with hash -1767183230, now seen corresponding path program 1 times [2024-11-08 16:39:56,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:39:56,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1970670722] [2024-11-08 16:39:56,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:39:56,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:39:59,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,843 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:00,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,845 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:00,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,847 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:00,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,849 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:40:00,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,850 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:40:00,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,852 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 563 [2024-11-08 16:40:00,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,853 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 575 [2024-11-08 16:40:00,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,855 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 603 [2024-11-08 16:40:00,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,857 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 627 [2024-11-08 16:40:00,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,858 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 637 [2024-11-08 16:40:00,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:00,860 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:40:00,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:00,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1970670722] [2024-11-08 16:40:00,860 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1970670722] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:00,860 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:00,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:40:00,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1177500864] [2024-11-08 16:40:00,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:00,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:40:00,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:00,862 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:40:00,863 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:00,863 INFO L87 Difference]: Start difference. First operand 5697 states and 8233 transitions. Second operand has 6 states, 6 states have (on average 100.16666666666667) internal successors, (601), 6 states have internal predecessors, (601), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:01,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:01,699 INFO L93 Difference]: Finished difference Result 9439 states and 13611 transitions. [2024-11-08 16:40:01,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:40:01,700 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 100.16666666666667) internal successors, (601), 6 states have internal predecessors, (601), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 760 [2024-11-08 16:40:01,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:01,705 INFO L225 Difference]: With dead ends: 9439 [2024-11-08 16:40:01,705 INFO L226 Difference]: Without dead ends: 5699 [2024-11-08 16:40:01,708 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:01,708 INFO L432 NwaCegarLoop]: 804 mSDtfsCounter, 903 mSDsluCounter, 2382 mSDsCounter, 0 mSdLazyCounter, 1164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 903 SdHoareTripleChecker+Valid, 3186 SdHoareTripleChecker+Invalid, 1164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:01,709 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [903 Valid, 3186 Invalid, 1164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1164 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-08 16:40:01,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5699 states. [2024-11-08 16:40:01,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5699 to 5698. [2024-11-08 16:40:01,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5698 states, 5666 states have (on average 1.4426403106247794) internal successors, (8174), 5666 states have internal predecessors, (8174), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:40:01,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5698 states to 5698 states and 8234 transitions. [2024-11-08 16:40:01,831 INFO L78 Accepts]: Start accepts. Automaton has 5698 states and 8234 transitions. Word has length 760 [2024-11-08 16:40:01,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:01,831 INFO L471 AbstractCegarLoop]: Abstraction has 5698 states and 8234 transitions. [2024-11-08 16:40:01,832 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 100.16666666666667) internal successors, (601), 6 states have internal predecessors, (601), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:01,832 INFO L276 IsEmpty]: Start isEmpty. Operand 5698 states and 8234 transitions. [2024-11-08 16:40:01,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 761 [2024-11-08 16:40:01,839 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:01,840 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:01,840 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-11-08 16:40:01,840 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:01,840 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:01,840 INFO L85 PathProgramCache]: Analyzing trace with hash -137223796, now seen corresponding path program 1 times [2024-11-08 16:40:01,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:01,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641817760] [2024-11-08 16:40:01,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:01,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:04,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,385 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:06,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,387 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:06,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,388 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:06,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,389 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:40:06,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,391 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:40:06,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,392 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 563 [2024-11-08 16:40:06,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,393 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 575 [2024-11-08 16:40:06,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,394 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 603 [2024-11-08 16:40:06,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,395 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 627 [2024-11-08 16:40:06,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,396 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 637 [2024-11-08 16:40:06,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:06,398 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:40:06,398 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:06,398 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641817760] [2024-11-08 16:40:06,398 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1641817760] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:06,398 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:06,398 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:40:06,398 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1145617710] [2024-11-08 16:40:06,399 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:06,399 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:40:06,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:06,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:40:06,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:06,401 INFO L87 Difference]: Start difference. First operand 5698 states and 8234 transitions. Second operand has 6 states, 6 states have (on average 100.16666666666667) internal successors, (601), 6 states have internal predecessors, (601), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:07,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:07,159 INFO L93 Difference]: Finished difference Result 9439 states and 13610 transitions. [2024-11-08 16:40:07,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:40:07,159 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 100.16666666666667) internal successors, (601), 6 states have internal predecessors, (601), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 760 [2024-11-08 16:40:07,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:07,165 INFO L225 Difference]: With dead ends: 9439 [2024-11-08 16:40:07,165 INFO L226 Difference]: Without dead ends: 5698 [2024-11-08 16:40:07,168 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:07,168 INFO L432 NwaCegarLoop]: 804 mSDtfsCounter, 694 mSDsluCounter, 2249 mSDsCounter, 0 mSdLazyCounter, 1102 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 694 SdHoareTripleChecker+Valid, 3053 SdHoareTripleChecker+Invalid, 1105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:07,169 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [694 Valid, 3053 Invalid, 1105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1102 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-08 16:40:07,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5698 states. [2024-11-08 16:40:07,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5698 to 5371. [2024-11-08 16:40:07,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5371 states, 5339 states have (on average 1.4463382655928076) internal successors, (7722), 5339 states have internal predecessors, (7722), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:40:07,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5371 states to 5371 states and 7782 transitions. [2024-11-08 16:40:07,246 INFO L78 Accepts]: Start accepts. Automaton has 5371 states and 7782 transitions. Word has length 760 [2024-11-08 16:40:07,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:07,247 INFO L471 AbstractCegarLoop]: Abstraction has 5371 states and 7782 transitions. [2024-11-08 16:40:07,247 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 100.16666666666667) internal successors, (601), 6 states have internal predecessors, (601), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:07,247 INFO L276 IsEmpty]: Start isEmpty. Operand 5371 states and 7782 transitions. [2024-11-08 16:40:07,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 762 [2024-11-08 16:40:07,253 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:07,254 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:07,254 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-11-08 16:40:07,254 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:07,254 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:07,254 INFO L85 PathProgramCache]: Analyzing trace with hash 1301236785, now seen corresponding path program 1 times [2024-11-08 16:40:07,254 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:07,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968625987] [2024-11-08 16:40:07,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:07,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:09,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,609 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:10,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,610 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:10,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,611 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:10,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,612 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:40:10,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,614 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:40:10,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,615 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 564 [2024-11-08 16:40:10,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,618 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 576 [2024-11-08 16:40:10,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,621 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 604 [2024-11-08 16:40:10,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,623 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 628 [2024-11-08 16:40:10,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,626 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 638 [2024-11-08 16:40:10,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:10,630 INFO L134 CoverageAnalysis]: Checked inductivity of 859 backedges. 183 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:40:10,630 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:10,631 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968625987] [2024-11-08 16:40:10,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [968625987] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:10,631 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:10,631 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:10,631 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148255298] [2024-11-08 16:40:10,631 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:10,632 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:10,632 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:10,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:10,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:10,633 INFO L87 Difference]: Start difference. First operand 5371 states and 7782 transitions. Second operand has 7 states, 7 states have (on average 86.0) internal successors, (602), 7 states have internal predecessors, (602), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:12,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:12,074 INFO L93 Difference]: Finished difference Result 12192 states and 17622 transitions. [2024-11-08 16:40:12,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:40:12,075 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 86.0) internal successors, (602), 7 states have internal predecessors, (602), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 761 [2024-11-08 16:40:12,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:12,084 INFO L225 Difference]: With dead ends: 12192 [2024-11-08 16:40:12,084 INFO L226 Difference]: Without dead ends: 8778 [2024-11-08 16:40:12,088 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:40:12,089 INFO L432 NwaCegarLoop]: 1405 mSDtfsCounter, 1640 mSDsluCounter, 4940 mSDsCounter, 0 mSdLazyCounter, 2197 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1645 SdHoareTripleChecker+Valid, 6345 SdHoareTripleChecker+Invalid, 2198 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2197 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:12,089 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1645 Valid, 6345 Invalid, 2198 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2197 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2024-11-08 16:40:12,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8778 states. [2024-11-08 16:40:12,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8778 to 6053. [2024-11-08 16:40:12,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6053 states, 6006 states have (on average 1.4408924408924408) internal successors, (8654), 6006 states have internal predecessors, (8654), 45 states have call successors, (45), 1 states have call predecessors, (45), 1 states have return successors, (45), 45 states have call predecessors, (45), 45 states have call successors, (45) [2024-11-08 16:40:12,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6053 states to 6053 states and 8744 transitions. [2024-11-08 16:40:12,197 INFO L78 Accepts]: Start accepts. Automaton has 6053 states and 8744 transitions. Word has length 761 [2024-11-08 16:40:12,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:12,198 INFO L471 AbstractCegarLoop]: Abstraction has 6053 states and 8744 transitions. [2024-11-08 16:40:12,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 86.0) internal successors, (602), 7 states have internal predecessors, (602), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:12,198 INFO L276 IsEmpty]: Start isEmpty. Operand 6053 states and 8744 transitions. [2024-11-08 16:40:12,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 763 [2024-11-08 16:40:12,205 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:12,206 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:12,206 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-11-08 16:40:12,206 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:12,206 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:12,206 INFO L85 PathProgramCache]: Analyzing trace with hash -1713702839, now seen corresponding path program 1 times [2024-11-08 16:40:12,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:12,207 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47584625] [2024-11-08 16:40:12,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:12,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:14,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,693 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:17,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,695 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:17,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,696 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:17,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,697 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 185 [2024-11-08 16:40:17,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,699 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-08 16:40:17,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,701 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 564 [2024-11-08 16:40:17,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,702 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 576 [2024-11-08 16:40:17,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,704 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 604 [2024-11-08 16:40:17,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,706 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 628 [2024-11-08 16:40:17,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,707 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 638 [2024-11-08 16:40:17,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:17,710 INFO L134 CoverageAnalysis]: Checked inductivity of 860 backedges. 60 proven. 0 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2024-11-08 16:40:17,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:17,711 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47584625] [2024-11-08 16:40:17,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47584625] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:17,711 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:17,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:40:17,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163375501] [2024-11-08 16:40:17,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:17,712 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:40:17,712 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:17,713 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:40:17,713 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:40:17,714 INFO L87 Difference]: Start difference. First operand 6053 states and 8744 transitions. Second operand has 8 states, 8 states have (on average 60.75) internal successors, (486), 8 states have internal predecessors, (486), 2 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-08 16:40:17,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:17,988 INFO L93 Difference]: Finished difference Result 11693 states and 16900 transitions. [2024-11-08 16:40:17,988 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:40:17,989 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 60.75) internal successors, (486), 8 states have internal predecessors, (486), 2 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 762 [2024-11-08 16:40:17,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:17,994 INFO L225 Difference]: With dead ends: 11693 [2024-11-08 16:40:17,994 INFO L226 Difference]: Without dead ends: 6161 [2024-11-08 16:40:17,999 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:40:17,999 INFO L432 NwaCegarLoop]: 1067 mSDtfsCounter, 990 mSDsluCounter, 5285 mSDsCounter, 0 mSdLazyCounter, 157 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 992 SdHoareTripleChecker+Valid, 6352 SdHoareTripleChecker+Invalid, 158 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 157 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:17,999 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [992 Valid, 6352 Invalid, 158 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 157 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:40:18,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6161 states. [2024-11-08 16:40:18,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6161 to 6134. [2024-11-08 16:40:18,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6134 states, 6087 states have (on average 1.4409397075735173) internal successors, (8771), 6087 states have internal predecessors, (8771), 45 states have call successors, (45), 1 states have call predecessors, (45), 1 states have return successors, (45), 45 states have call predecessors, (45), 45 states have call successors, (45) [2024-11-08 16:40:18,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6134 states to 6134 states and 8861 transitions. [2024-11-08 16:40:18,103 INFO L78 Accepts]: Start accepts. Automaton has 6134 states and 8861 transitions. Word has length 762 [2024-11-08 16:40:18,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:18,104 INFO L471 AbstractCegarLoop]: Abstraction has 6134 states and 8861 transitions. [2024-11-08 16:40:18,104 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 60.75) internal successors, (486), 8 states have internal predecessors, (486), 2 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-08 16:40:18,104 INFO L276 IsEmpty]: Start isEmpty. Operand 6134 states and 8861 transitions. [2024-11-08 16:40:18,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 765 [2024-11-08 16:40:18,115 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:18,115 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:18,115 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-11-08 16:40:18,116 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:18,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:18,116 INFO L85 PathProgramCache]: Analyzing trace with hash 1153414403, now seen corresponding path program 1 times [2024-11-08 16:40:18,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:18,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557547690] [2024-11-08 16:40:18,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:18,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:18,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,370 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:19,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,371 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:19,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,372 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:19,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,373 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-08 16:40:19,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,374 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 196 [2024-11-08 16:40:19,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,375 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 565 [2024-11-08 16:40:19,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,377 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 577 [2024-11-08 16:40:19,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,378 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 605 [2024-11-08 16:40:19,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,380 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 630 [2024-11-08 16:40:19,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,381 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 640 [2024-11-08 16:40:19,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:19,383 INFO L134 CoverageAnalysis]: Checked inductivity of 861 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 770 trivial. 0 not checked. [2024-11-08 16:40:19,384 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:19,384 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557547690] [2024-11-08 16:40:19,384 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [557547690] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:19,384 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:19,385 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:40:19,385 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821267146] [2024-11-08 16:40:19,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:19,386 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:40:19,386 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:19,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:40:19,387 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:19,387 INFO L87 Difference]: Start difference. First operand 6134 states and 8861 transitions. Second operand has 6 states, 6 states have (on average 86.0) internal successors, (516), 6 states have internal predecessors, (516), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:40:19,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:19,962 INFO L93 Difference]: Finished difference Result 12898 states and 18624 transitions. [2024-11-08 16:40:19,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:40:19,963 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 86.0) internal successors, (516), 6 states have internal predecessors, (516), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 764 [2024-11-08 16:40:19,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:19,977 INFO L225 Difference]: With dead ends: 12898 [2024-11-08 16:40:19,977 INFO L226 Difference]: Without dead ends: 6170 [2024-11-08 16:40:19,988 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:19,988 INFO L432 NwaCegarLoop]: 1430 mSDtfsCounter, 343 mSDsluCounter, 5086 mSDsCounter, 0 mSdLazyCounter, 370 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 343 SdHoareTripleChecker+Valid, 6516 SdHoareTripleChecker+Invalid, 382 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 370 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:19,989 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [343 Valid, 6516 Invalid, 382 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 370 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-08 16:40:19,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6170 states. [2024-11-08 16:40:20,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6170 to 6152. [2024-11-08 16:40:20,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6152 states, 6105 states have (on average 1.4396396396396396) internal successors, (8789), 6105 states have internal predecessors, (8789), 45 states have call successors, (45), 1 states have call predecessors, (45), 1 states have return successors, (45), 45 states have call predecessors, (45), 45 states have call successors, (45) [2024-11-08 16:40:20,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6152 states to 6152 states and 8879 transitions. [2024-11-08 16:40:20,143 INFO L78 Accepts]: Start accepts. Automaton has 6152 states and 8879 transitions. Word has length 764 [2024-11-08 16:40:20,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:20,144 INFO L471 AbstractCegarLoop]: Abstraction has 6152 states and 8879 transitions. [2024-11-08 16:40:20,144 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 86.0) internal successors, (516), 6 states have internal predecessors, (516), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:40:20,144 INFO L276 IsEmpty]: Start isEmpty. Operand 6152 states and 8879 transitions. [2024-11-08 16:40:20,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 765 [2024-11-08 16:40:20,156 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:20,157 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:20,157 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-11-08 16:40:20,157 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:20,158 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:20,158 INFO L85 PathProgramCache]: Analyzing trace with hash 726132141, now seen corresponding path program 1 times [2024-11-08 16:40:20,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:20,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1480827230] [2024-11-08 16:40:20,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:20,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:22,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,185 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:24,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,186 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:24,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,187 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:24,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,189 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-08 16:40:24,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,190 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 196 [2024-11-08 16:40:24,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,191 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 565 [2024-11-08 16:40:24,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 577 [2024-11-08 16:40:24,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,193 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 605 [2024-11-08 16:40:24,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 630 [2024-11-08 16:40:24,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,195 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 640 [2024-11-08 16:40:24,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:24,196 INFO L134 CoverageAnalysis]: Checked inductivity of 861 backedges. 91 proven. 0 refuted. 0 times theorem prover too weak. 770 trivial. 0 not checked. [2024-11-08 16:40:24,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:24,196 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1480827230] [2024-11-08 16:40:24,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1480827230] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:24,197 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:24,197 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:24,197 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071756013] [2024-11-08 16:40:24,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:24,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:24,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:24,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:24,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:24,199 INFO L87 Difference]: Start difference. First operand 6152 states and 8879 transitions. Second operand has 7 states, 7 states have (on average 73.71428571428571) internal successors, (516), 7 states have internal predecessors, (516), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:40:24,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:24,731 INFO L93 Difference]: Finished difference Result 12862 states and 18555 transitions. [2024-11-08 16:40:24,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:40:24,732 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 73.71428571428571) internal successors, (516), 7 states have internal predecessors, (516), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 764 [2024-11-08 16:40:24,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:24,738 INFO L225 Difference]: With dead ends: 12862 [2024-11-08 16:40:24,738 INFO L226 Difference]: Without dead ends: 6188 [2024-11-08 16:40:24,743 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:40:24,743 INFO L432 NwaCegarLoop]: 1380 mSDtfsCounter, 1335 mSDsluCounter, 4935 mSDsCounter, 0 mSdLazyCounter, 429 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1336 SdHoareTripleChecker+Valid, 6315 SdHoareTripleChecker+Invalid, 442 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 429 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:24,743 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1336 Valid, 6315 Invalid, 442 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 429 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-08 16:40:24,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6188 states. [2024-11-08 16:40:24,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6188 to 6170. [2024-11-08 16:40:24,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6170 states, 6123 states have (on average 1.4368773477053731) internal successors, (8798), 6123 states have internal predecessors, (8798), 45 states have call successors, (45), 1 states have call predecessors, (45), 1 states have return successors, (45), 45 states have call predecessors, (45), 45 states have call successors, (45) [2024-11-08 16:40:24,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6170 states to 6170 states and 8888 transitions. [2024-11-08 16:40:24,895 INFO L78 Accepts]: Start accepts. Automaton has 6170 states and 8888 transitions. Word has length 764 [2024-11-08 16:40:24,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:24,896 INFO L471 AbstractCegarLoop]: Abstraction has 6170 states and 8888 transitions. [2024-11-08 16:40:24,896 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 73.71428571428571) internal successors, (516), 7 states have internal predecessors, (516), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:40:24,897 INFO L276 IsEmpty]: Start isEmpty. Operand 6170 states and 8888 transitions. [2024-11-08 16:40:24,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 767 [2024-11-08 16:40:24,908 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:24,908 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:24,909 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-11-08 16:40:24,909 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:24,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:24,909 INFO L85 PathProgramCache]: Analyzing trace with hash 1765966409, now seen corresponding path program 1 times [2024-11-08 16:40:24,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:24,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324054284] [2024-11-08 16:40:24,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:24,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:27,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,240 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:29,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,242 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:29,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,243 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:29,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,244 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-08 16:40:29,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,245 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 197 [2024-11-08 16:40:29,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,247 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 566 [2024-11-08 16:40:29,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,248 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 578 [2024-11-08 16:40:29,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,250 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 606 [2024-11-08 16:40:29,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,252 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 631 [2024-11-08 16:40:29,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,254 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 642 [2024-11-08 16:40:29,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:29,258 INFO L134 CoverageAnalysis]: Checked inductivity of 862 backedges. 186 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:40:29,258 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:29,259 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324054284] [2024-11-08 16:40:29,259 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324054284] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:29,259 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:29,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:29,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749406714] [2024-11-08 16:40:29,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:29,260 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:29,261 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:29,261 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:29,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:29,262 INFO L87 Difference]: Start difference. First operand 6170 states and 8888 transitions. Second operand has 7 states, 7 states have (on average 86.71428571428571) internal successors, (607), 7 states have internal predecessors, (607), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:30,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:30,647 INFO L93 Difference]: Finished difference Result 13069 states and 18820 transitions. [2024-11-08 16:40:30,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:40:30,647 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 86.71428571428571) internal successors, (607), 7 states have internal predecessors, (607), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 766 [2024-11-08 16:40:30,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:30,658 INFO L225 Difference]: With dead ends: 13069 [2024-11-08 16:40:30,658 INFO L226 Difference]: Without dead ends: 8895 [2024-11-08 16:40:30,664 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:40:30,665 INFO L432 NwaCegarLoop]: 1403 mSDtfsCounter, 1496 mSDsluCounter, 4961 mSDsCounter, 0 mSdLazyCounter, 2193 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1496 SdHoareTripleChecker+Valid, 6364 SdHoareTripleChecker+Invalid, 2193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:30,665 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1496 Valid, 6364 Invalid, 2193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2193 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-08 16:40:30,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8895 states. [2024-11-08 16:40:30,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8895 to 6174. [2024-11-08 16:40:30,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6174 states, 6127 states have (on average 1.436592133181002) internal successors, (8802), 6127 states have internal predecessors, (8802), 45 states have call successors, (45), 1 states have call predecessors, (45), 1 states have return successors, (45), 45 states have call predecessors, (45), 45 states have call successors, (45) [2024-11-08 16:40:30,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6174 states to 6174 states and 8892 transitions. [2024-11-08 16:40:30,800 INFO L78 Accepts]: Start accepts. Automaton has 6174 states and 8892 transitions. Word has length 766 [2024-11-08 16:40:30,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:30,800 INFO L471 AbstractCegarLoop]: Abstraction has 6174 states and 8892 transitions. [2024-11-08 16:40:30,800 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 86.71428571428571) internal successors, (607), 7 states have internal predecessors, (607), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:30,801 INFO L276 IsEmpty]: Start isEmpty. Operand 6174 states and 8892 transitions. [2024-11-08 16:40:30,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 767 [2024-11-08 16:40:30,809 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:30,809 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:30,809 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-11-08 16:40:30,809 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:30,809 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:30,810 INFO L85 PathProgramCache]: Analyzing trace with hash 690654471, now seen corresponding path program 1 times [2024-11-08 16:40:30,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:30,810 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824341260] [2024-11-08 16:40:30,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:30,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:32,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,479 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:35,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,481 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:35,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,482 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:35,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,484 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-08 16:40:35,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,484 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 197 [2024-11-08 16:40:35,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,485 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 567 [2024-11-08 16:40:35,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,486 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 579 [2024-11-08 16:40:35,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,487 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 607 [2024-11-08 16:40:35,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,488 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 632 [2024-11-08 16:40:35,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,489 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 643 [2024-11-08 16:40:35,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:35,490 INFO L134 CoverageAnalysis]: Checked inductivity of 861 backedges. 61 proven. 0 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2024-11-08 16:40:35,490 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:35,490 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824341260] [2024-11-08 16:40:35,490 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824341260] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:35,490 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:35,490 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:35,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605930410] [2024-11-08 16:40:35,491 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:35,491 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:35,492 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:35,492 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:35,492 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:35,493 INFO L87 Difference]: Start difference. First operand 6174 states and 8892 transitions. Second operand has 7 states, 7 states have (on average 70.0) internal successors, (490), 7 states have internal predecessors, (490), 2 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-08 16:40:35,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:35,684 INFO L93 Difference]: Finished difference Result 11935 states and 17190 transitions. [2024-11-08 16:40:35,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:40:35,685 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 70.0) internal successors, (490), 7 states have internal predecessors, (490), 2 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 766 [2024-11-08 16:40:35,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:35,695 INFO L225 Difference]: With dead ends: 11935 [2024-11-08 16:40:35,695 INFO L226 Difference]: Without dead ends: 6291 [2024-11-08 16:40:35,700 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:40:35,701 INFO L432 NwaCegarLoop]: 1067 mSDtfsCounter, 978 mSDsluCounter, 4232 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 980 SdHoareTripleChecker+Valid, 5299 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:35,701 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [980 Valid, 5299 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:40:35,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6291 states. [2024-11-08 16:40:35,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6291 to 6201. [2024-11-08 16:40:35,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6201 states, 6154 states have (on average 1.4361390965225869) internal successors, (8838), 6154 states have internal predecessors, (8838), 45 states have call successors, (45), 1 states have call predecessors, (45), 1 states have return successors, (45), 45 states have call predecessors, (45), 45 states have call successors, (45) [2024-11-08 16:40:35,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6201 states to 6201 states and 8928 transitions. [2024-11-08 16:40:35,851 INFO L78 Accepts]: Start accepts. Automaton has 6201 states and 8928 transitions. Word has length 766 [2024-11-08 16:40:35,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:35,851 INFO L471 AbstractCegarLoop]: Abstraction has 6201 states and 8928 transitions. [2024-11-08 16:40:35,852 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 70.0) internal successors, (490), 7 states have internal predecessors, (490), 2 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-08 16:40:35,852 INFO L276 IsEmpty]: Start isEmpty. Operand 6201 states and 8928 transitions. [2024-11-08 16:40:35,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 769 [2024-11-08 16:40:35,864 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:35,864 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:35,864 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-11-08 16:40:35,865 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:35,865 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:35,865 INFO L85 PathProgramCache]: Analyzing trace with hash 604182557, now seen corresponding path program 1 times [2024-11-08 16:40:35,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:35,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537111680] [2024-11-08 16:40:35,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:35,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:38,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,000 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:40,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,002 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:40,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,004 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:40,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,006 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 187 [2024-11-08 16:40:40,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,008 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 198 [2024-11-08 16:40:40,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,009 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 568 [2024-11-08 16:40:40,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,012 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:40:40,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,015 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 608 [2024-11-08 16:40:40,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,017 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 634 [2024-11-08 16:40:40,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,020 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 645 [2024-11-08 16:40:40,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:40,024 INFO L134 CoverageAnalysis]: Checked inductivity of 862 backedges. 186 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:40:40,025 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:40,025 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1537111680] [2024-11-08 16:40:40,025 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1537111680] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:40,025 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:40,025 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:40,025 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446630018] [2024-11-08 16:40:40,026 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:40,026 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:40,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:40,027 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:40,027 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:40,028 INFO L87 Difference]: Start difference. First operand 6201 states and 8928 transitions. Second operand has 7 states, 7 states have (on average 87.0) internal successors, (609), 7 states have internal predecessors, (609), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:41,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:41,629 INFO L93 Difference]: Finished difference Result 11168 states and 15997 transitions. [2024-11-08 16:40:41,629 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:40:41,630 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 87.0) internal successors, (609), 7 states have internal predecessors, (609), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 768 [2024-11-08 16:40:41,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:41,640 INFO L225 Difference]: With dead ends: 11168 [2024-11-08 16:40:41,640 INFO L226 Difference]: Without dead ends: 6972 [2024-11-08 16:40:41,645 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:40:41,646 INFO L432 NwaCegarLoop]: 1397 mSDtfsCounter, 1325 mSDsluCounter, 4822 mSDsCounter, 0 mSdLazyCounter, 2121 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1325 SdHoareTripleChecker+Valid, 6219 SdHoareTripleChecker+Invalid, 2124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 2121 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:41,646 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1325 Valid, 6219 Invalid, 2124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 2121 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-08 16:40:41,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6972 states. [2024-11-08 16:40:41,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6972 to 5467. [2024-11-08 16:40:41,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5467 states, 5435 states have (on average 1.4413983440662375) internal successors, (7834), 5435 states have internal predecessors, (7834), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:40:41,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5467 states to 5467 states and 7894 transitions. [2024-11-08 16:40:41,787 INFO L78 Accepts]: Start accepts. Automaton has 5467 states and 7894 transitions. Word has length 768 [2024-11-08 16:40:41,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:41,788 INFO L471 AbstractCegarLoop]: Abstraction has 5467 states and 7894 transitions. [2024-11-08 16:40:41,788 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 87.0) internal successors, (609), 7 states have internal predecessors, (609), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:40:41,788 INFO L276 IsEmpty]: Start isEmpty. Operand 5467 states and 7894 transitions. [2024-11-08 16:40:41,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 770 [2024-11-08 16:40:41,799 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:41,800 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:41,800 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-11-08 16:40:41,800 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:41,800 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:41,801 INFO L85 PathProgramCache]: Analyzing trace with hash 223767134, now seen corresponding path program 1 times [2024-11-08 16:40:41,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:41,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016878261] [2024-11-08 16:40:41,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:41,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:44,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,696 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:45,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,698 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 133 [2024-11-08 16:40:45,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,700 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 161 [2024-11-08 16:40:45,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,702 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 187 [2024-11-08 16:40:45,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,704 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 198 [2024-11-08 16:40:45,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,705 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 567 [2024-11-08 16:40:45,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,706 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 579 [2024-11-08 16:40:45,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,707 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 607 [2024-11-08 16:40:45,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,708 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 633 [2024-11-08 16:40:45,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,709 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 644 [2024-11-08 16:40:45,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:45,711 INFO L134 CoverageAnalysis]: Checked inductivity of 864 backedges. 70 proven. 0 refuted. 0 times theorem prover too weak. 794 trivial. 0 not checked. [2024-11-08 16:40:45,711 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:45,711 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016878261] [2024-11-08 16:40:45,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2016878261] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:45,711 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:45,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:45,712 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326871285] [2024-11-08 16:40:45,712 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:45,713 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:45,713 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:45,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:45,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:45,714 INFO L87 Difference]: Start difference. First operand 5467 states and 7894 transitions. Second operand has 7 states, 7 states have (on average 71.0) internal successors, (497), 7 states have internal predecessors, (497), 3 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-08 16:40:46,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:46,305 INFO L93 Difference]: Finished difference Result 11430 states and 16480 transitions. [2024-11-08 16:40:46,305 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:40:46,305 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 71.0) internal successors, (497), 7 states have internal predecessors, (497), 3 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 769 [2024-11-08 16:40:46,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:46,312 INFO L225 Difference]: With dead ends: 11430 [2024-11-08 16:40:46,312 INFO L226 Difference]: Without dead ends: 5491 [2024-11-08 16:40:46,317 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:40:46,318 INFO L432 NwaCegarLoop]: 1053 mSDtfsCounter, 1217 mSDsluCounter, 3955 mSDsCounter, 0 mSdLazyCounter, 427 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1221 SdHoareTripleChecker+Valid, 5008 SdHoareTripleChecker+Invalid, 445 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 427 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:46,318 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1221 Valid, 5008 Invalid, 445 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 427 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-08 16:40:46,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5491 states. [2024-11-08 16:40:46,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5491 to 5479. [2024-11-08 16:40:46,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5479 states, 5447 states have (on average 1.4393243987516064) internal successors, (7840), 5447 states have internal predecessors, (7840), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:40:46,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5479 states to 5479 states and 7900 transitions. [2024-11-08 16:40:46,449 INFO L78 Accepts]: Start accepts. Automaton has 5479 states and 7900 transitions. Word has length 769 [2024-11-08 16:40:46,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:46,450 INFO L471 AbstractCegarLoop]: Abstraction has 5479 states and 7900 transitions. [2024-11-08 16:40:46,450 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 71.0) internal successors, (497), 7 states have internal predecessors, (497), 3 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-08 16:40:46,450 INFO L276 IsEmpty]: Start isEmpty. Operand 5479 states and 7900 transitions. [2024-11-08 16:40:46,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2024-11-08 16:40:46,461 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:46,462 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:46,462 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-11-08 16:40:46,462 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:46,462 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:46,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1019905588, now seen corresponding path program 1 times [2024-11-08 16:40:46,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:46,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125975600] [2024-11-08 16:40:46,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:46,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:49,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,311 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:50,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,313 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 134 [2024-11-08 16:40:50,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,314 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 162 [2024-11-08 16:40:50,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,315 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 188 [2024-11-08 16:40:50,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,316 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 199 [2024-11-08 16:40:50,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,318 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 568 [2024-11-08 16:40:50,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,319 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 581 [2024-11-08 16:40:50,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,320 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 609 [2024-11-08 16:40:50,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 635 [2024-11-08 16:40:50,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,322 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 646 [2024-11-08 16:40:50,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:50,324 INFO L134 CoverageAnalysis]: Checked inductivity of 865 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 846 trivial. 0 not checked. [2024-11-08 16:40:50,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:50,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125975600] [2024-11-08 16:40:50,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [125975600] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:50,325 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:50,325 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:40:50,326 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313682633] [2024-11-08 16:40:50,326 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:50,326 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:40:50,327 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:50,327 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:40:50,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:50,328 INFO L87 Difference]: Start difference. First operand 5479 states and 7900 transitions. Second operand has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:40:51,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:51,212 INFO L93 Difference]: Finished difference Result 10704 states and 15449 transitions. [2024-11-08 16:40:51,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:40:51,213 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 771 [2024-11-08 16:40:51,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:51,218 INFO L225 Difference]: With dead ends: 10704 [2024-11-08 16:40:51,218 INFO L226 Difference]: Without dead ends: 5491 [2024-11-08 16:40:51,223 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:40:51,223 INFO L432 NwaCegarLoop]: 791 mSDtfsCounter, 1011 mSDsluCounter, 2362 mSDsCounter, 0 mSdLazyCounter, 1188 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1015 SdHoareTripleChecker+Valid, 3153 SdHoareTripleChecker+Invalid, 1188 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:51,224 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1015 Valid, 3153 Invalid, 1188 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1188 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-08 16:40:51,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5491 states. [2024-11-08 16:40:51,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5491 to 5485. [2024-11-08 16:40:51,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5485 states, 5453 states have (on average 1.4388410049514029) internal successors, (7846), 5453 states have internal predecessors, (7846), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:40:51,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5485 states to 5485 states and 7906 transitions. [2024-11-08 16:40:51,347 INFO L78 Accepts]: Start accepts. Automaton has 5485 states and 7906 transitions. Word has length 771 [2024-11-08 16:40:51,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:51,348 INFO L471 AbstractCegarLoop]: Abstraction has 5485 states and 7906 transitions. [2024-11-08 16:40:51,348 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:40:51,348 INFO L276 IsEmpty]: Start isEmpty. Operand 5485 states and 7906 transitions. [2024-11-08 16:40:51,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 774 [2024-11-08 16:40:51,359 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:51,359 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:51,360 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-11-08 16:40:51,360 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:51,360 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:51,360 INFO L85 PathProgramCache]: Analyzing trace with hash 1658344536, now seen corresponding path program 1 times [2024-11-08 16:40:51,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:51,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165584209] [2024-11-08 16:40:51,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:51,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:53,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,756 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:54,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,757 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2024-11-08 16:40:54,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,759 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 163 [2024-11-08 16:40:54,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,761 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 189 [2024-11-08 16:40:54,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,762 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 200 [2024-11-08 16:40:54,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,762 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 569 [2024-11-08 16:40:54,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,763 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 583 [2024-11-08 16:40:54,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,764 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 611 [2024-11-08 16:40:54,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,765 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 637 [2024-11-08 16:40:54,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,765 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 648 [2024-11-08 16:40:54,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:54,767 INFO L134 CoverageAnalysis]: Checked inductivity of 866 backedges. 66 proven. 0 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2024-11-08 16:40:54,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:54,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [165584209] [2024-11-08 16:40:54,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [165584209] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:54,767 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:54,767 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:40:54,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722874002] [2024-11-08 16:40:54,768 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:54,768 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:40:54,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:54,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:40:54,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:40:54,769 INFO L87 Difference]: Start difference. First operand 5485 states and 7906 transitions. Second operand has 7 states, 7 states have (on average 70.85714285714286) internal successors, (496), 7 states have internal predecessors, (496), 3 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-08 16:40:55,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:40:55,609 INFO L93 Difference]: Finished difference Result 10410 states and 15020 transitions. [2024-11-08 16:40:55,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:40:55,610 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 70.85714285714286) internal successors, (496), 7 states have internal predecessors, (496), 3 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 773 [2024-11-08 16:40:55,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:40:55,616 INFO L225 Difference]: With dead ends: 10410 [2024-11-08 16:40:55,617 INFO L226 Difference]: Without dead ends: 5497 [2024-11-08 16:40:55,621 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:40:55,622 INFO L432 NwaCegarLoop]: 790 mSDtfsCounter, 1034 mSDsluCounter, 2368 mSDsCounter, 0 mSdLazyCounter, 1188 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1037 SdHoareTripleChecker+Valid, 3158 SdHoareTripleChecker+Invalid, 1190 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-08 16:40:55,622 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1037 Valid, 3158 Invalid, 1190 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1188 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-08 16:40:55,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5497 states. [2024-11-08 16:40:55,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5497 to 5485. [2024-11-08 16:40:55,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5485 states, 5453 states have (on average 1.4377406931964056) internal successors, (7840), 5453 states have internal predecessors, (7840), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:40:55,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5485 states to 5485 states and 7900 transitions. [2024-11-08 16:40:55,748 INFO L78 Accepts]: Start accepts. Automaton has 5485 states and 7900 transitions. Word has length 773 [2024-11-08 16:40:55,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:40:55,749 INFO L471 AbstractCegarLoop]: Abstraction has 5485 states and 7900 transitions. [2024-11-08 16:40:55,749 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 70.85714285714286) internal successors, (496), 7 states have internal predecessors, (496), 3 states have call successors, (8), 1 states have call predecessors, (8), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-08 16:40:55,749 INFO L276 IsEmpty]: Start isEmpty. Operand 5485 states and 7900 transitions. [2024-11-08 16:40:55,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 774 [2024-11-08 16:40:55,760 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:40:55,760 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:40:55,760 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-11-08 16:40:55,761 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:40:55,761 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:40:55,761 INFO L85 PathProgramCache]: Analyzing trace with hash -1832109800, now seen corresponding path program 1 times [2024-11-08 16:40:55,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:40:55,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700142504] [2024-11-08 16:40:55,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:40:55,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:40:58,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,975 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:40:59,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,977 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2024-11-08 16:40:59,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,979 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 163 [2024-11-08 16:40:59,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,982 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 189 [2024-11-08 16:40:59,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,984 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 200 [2024-11-08 16:40:59,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,985 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 569 [2024-11-08 16:40:59,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,986 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 583 [2024-11-08 16:40:59,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,987 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 611 [2024-11-08 16:40:59,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,988 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 637 [2024-11-08 16:40:59,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,989 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 648 [2024-11-08 16:40:59,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:40:59,991 INFO L134 CoverageAnalysis]: Checked inductivity of 866 backedges. 73 proven. 0 refuted. 0 times theorem prover too weak. 793 trivial. 0 not checked. [2024-11-08 16:40:59,991 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:40:59,991 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700142504] [2024-11-08 16:40:59,991 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [700142504] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:40:59,991 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:40:59,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:40:59,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1896879619] [2024-11-08 16:40:59,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:40:59,992 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:40:59,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:40:59,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:40:59,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:40:59,994 INFO L87 Difference]: Start difference. First operand 5485 states and 7900 transitions. Second operand has 6 states, 6 states have (on average 83.66666666666667) internal successors, (502), 6 states have internal predecessors, (502), 2 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 2 states have call predecessors, (9), 2 states have call successors, (9) [2024-11-08 16:41:00,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:00,870 INFO L93 Difference]: Finished difference Result 10362 states and 14942 transitions. [2024-11-08 16:41:00,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:41:00,870 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 83.66666666666667) internal successors, (502), 6 states have internal predecessors, (502), 2 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 2 states have call predecessors, (9), 2 states have call successors, (9) Word has length 773 [2024-11-08 16:41:00,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:00,875 INFO L225 Difference]: With dead ends: 10362 [2024-11-08 16:41:00,875 INFO L226 Difference]: Without dead ends: 5497 [2024-11-08 16:41:00,879 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:41:00,879 INFO L432 NwaCegarLoop]: 790 mSDtfsCounter, 959 mSDsluCounter, 2359 mSDsCounter, 0 mSdLazyCounter, 1188 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 960 SdHoareTripleChecker+Valid, 3149 SdHoareTripleChecker+Invalid, 1188 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1188 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:00,880 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [960 Valid, 3149 Invalid, 1188 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1188 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-08 16:41:00,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5497 states. [2024-11-08 16:41:00,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5497 to 5491. [2024-11-08 16:41:00,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5491 states, 5459 states have (on average 1.4372595713500642) internal successors, (7846), 5459 states have internal predecessors, (7846), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:41:00,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5491 states to 5491 states and 7906 transitions. [2024-11-08 16:41:00,961 INFO L78 Accepts]: Start accepts. Automaton has 5491 states and 7906 transitions. Word has length 773 [2024-11-08 16:41:00,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:00,962 INFO L471 AbstractCegarLoop]: Abstraction has 5491 states and 7906 transitions. [2024-11-08 16:41:00,962 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 83.66666666666667) internal successors, (502), 6 states have internal predecessors, (502), 2 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 2 states have call predecessors, (9), 2 states have call successors, (9) [2024-11-08 16:41:00,962 INFO L276 IsEmpty]: Start isEmpty. Operand 5491 states and 7906 transitions. [2024-11-08 16:41:00,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 776 [2024-11-08 16:41:00,969 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:00,969 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:00,969 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-11-08 16:41:00,970 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:00,970 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:00,970 INFO L85 PathProgramCache]: Analyzing trace with hash 1994384596, now seen corresponding path program 1 times [2024-11-08 16:41:00,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:00,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375021781] [2024-11-08 16:41:00,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:00,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:05,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,705 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:41:07,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,707 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2024-11-08 16:41:07,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,708 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 163 [2024-11-08 16:41:07,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,710 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 189 [2024-11-08 16:41:07,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,711 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 201 [2024-11-08 16:41:07,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,713 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 570 [2024-11-08 16:41:07,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,714 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 584 [2024-11-08 16:41:07,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,715 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 612 [2024-11-08 16:41:07,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,716 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 638 [2024-11-08 16:41:07,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,717 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 650 [2024-11-08 16:41:07,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:07,719 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 191 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:41:07,719 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:07,719 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375021781] [2024-11-08 16:41:07,719 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [375021781] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:07,719 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:07,719 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:41:07,720 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1865564482] [2024-11-08 16:41:07,720 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:07,721 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:41:07,721 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:07,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:41:07,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:41:07,722 INFO L87 Difference]: Start difference. First operand 5491 states and 7906 transitions. Second operand has 7 states, 7 states have (on average 88.0) internal successors, (616), 7 states have internal predecessors, (616), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:07,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:07,975 INFO L93 Difference]: Finished difference Result 8985 states and 12912 transitions. [2024-11-08 16:41:07,975 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:41:07,975 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 88.0) internal successors, (616), 7 states have internal predecessors, (616), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 775 [2024-11-08 16:41:07,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:07,980 INFO L225 Difference]: With dead ends: 8985 [2024-11-08 16:41:07,980 INFO L226 Difference]: Without dead ends: 5511 [2024-11-08 16:41:07,983 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:41:07,983 INFO L432 NwaCegarLoop]: 1039 mSDtfsCounter, 807 mSDsluCounter, 4126 mSDsCounter, 0 mSdLazyCounter, 247 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 807 SdHoareTripleChecker+Valid, 5165 SdHoareTripleChecker+Invalid, 248 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 247 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:07,984 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [807 Valid, 5165 Invalid, 248 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 247 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:41:07,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5511 states. [2024-11-08 16:41:08,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5511 to 5511. [2024-11-08 16:41:08,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5511 states, 5479 states have (on average 1.4356634422339842) internal successors, (7866), 5479 states have internal predecessors, (7866), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:41:08,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5511 states to 5511 states and 7926 transitions. [2024-11-08 16:41:08,068 INFO L78 Accepts]: Start accepts. Automaton has 5511 states and 7926 transitions. Word has length 775 [2024-11-08 16:41:08,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:08,068 INFO L471 AbstractCegarLoop]: Abstraction has 5511 states and 7926 transitions. [2024-11-08 16:41:08,069 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 88.0) internal successors, (616), 7 states have internal predecessors, (616), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:08,069 INFO L276 IsEmpty]: Start isEmpty. Operand 5511 states and 7926 transitions. [2024-11-08 16:41:08,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 777 [2024-11-08 16:41:08,076 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:08,076 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:08,076 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-11-08 16:41:08,076 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:08,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:08,077 INFO L85 PathProgramCache]: Analyzing trace with hash 127566412, now seen corresponding path program 1 times [2024-11-08 16:41:08,077 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:08,077 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [580474097] [2024-11-08 16:41:08,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:08,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:11,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,440 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:41:15,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,442 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 135 [2024-11-08 16:41:15,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,444 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 163 [2024-11-08 16:41:15,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,446 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 189 [2024-11-08 16:41:15,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,448 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 201 [2024-11-08 16:41:15,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,450 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 571 [2024-11-08 16:41:15,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,453 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 585 [2024-11-08 16:41:15,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,456 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 613 [2024-11-08 16:41:15,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,460 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 639 [2024-11-08 16:41:15,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,463 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:41:15,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:15,469 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 83 proven. 95 refuted. 0 times theorem prover too weak. 689 trivial. 0 not checked. [2024-11-08 16:41:15,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:15,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [580474097] [2024-11-08 16:41:15,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [580474097] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:41:15,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1327813392] [2024-11-08 16:41:15,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:15,470 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:41:15,470 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:41:15,472 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:41:15,474 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2024-11-08 16:41:21,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:21,317 INFO L255 TraceCheckSpWp]: Trace formula consists of 3755 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 16:41:21,325 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:41:21,387 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 819 trivial. 0 not checked. [2024-11-08 16:41:21,388 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:41:21,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1327813392] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:21,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:41:21,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2024-11-08 16:41:21,388 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586231785] [2024-11-08 16:41:21,388 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:21,389 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:41:21,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:21,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:41:21,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:41:21,390 INFO L87 Difference]: Start difference. First operand 5511 states and 7926 transitions. Second operand has 6 states, 5 states have (on average 89.8) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:41:21,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:21,564 INFO L93 Difference]: Finished difference Result 10639 states and 15316 transitions. [2024-11-08 16:41:21,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:41:21,565 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 89.8) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) Word has length 776 [2024-11-08 16:41:21,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:21,572 INFO L225 Difference]: With dead ends: 10639 [2024-11-08 16:41:21,572 INFO L226 Difference]: Without dead ends: 5511 [2024-11-08 16:41:21,577 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 803 GetRequests, 793 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:41:21,577 INFO L432 NwaCegarLoop]: 1078 mSDtfsCounter, 0 mSDsluCounter, 4289 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5367 SdHoareTripleChecker+Invalid, 53 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:21,578 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5367 Invalid, 53 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 53 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:41:21,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5511 states. [2024-11-08 16:41:21,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5511 to 5511. [2024-11-08 16:41:21,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5511 states, 5479 states have (on average 1.4349333820040153) internal successors, (7862), 5479 states have internal predecessors, (7862), 30 states have call successors, (30), 1 states have call predecessors, (30), 1 states have return successors, (30), 30 states have call predecessors, (30), 30 states have call successors, (30) [2024-11-08 16:41:21,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5511 states to 5511 states and 7922 transitions. [2024-11-08 16:41:21,713 INFO L78 Accepts]: Start accepts. Automaton has 5511 states and 7922 transitions. Word has length 776 [2024-11-08 16:41:21,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:21,713 INFO L471 AbstractCegarLoop]: Abstraction has 5511 states and 7922 transitions. [2024-11-08 16:41:21,714 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 89.8) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 1 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:41:21,714 INFO L276 IsEmpty]: Start isEmpty. Operand 5511 states and 7922 transitions. [2024-11-08 16:41:21,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-11-08 16:41:21,725 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:21,726 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:21,776 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2024-11-08 16:41:21,927 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable65 [2024-11-08 16:41:21,928 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:21,928 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:21,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1334316068, now seen corresponding path program 1 times [2024-11-08 16:41:21,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:21,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882258292] [2024-11-08 16:41:21,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:21,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:25,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,826 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:41:30,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,828 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:41:30,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,829 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 164 [2024-11-08 16:41:30,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,830 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 190 [2024-11-08 16:41:30,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,831 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 202 [2024-11-08 16:41:30,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,832 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 573 [2024-11-08 16:41:30,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,832 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 587 [2024-11-08 16:41:30,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,833 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 615 [2024-11-08 16:41:30,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,834 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 641 [2024-11-08 16:41:30,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,835 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:41:30,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:30,836 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 851 trivial. 0 not checked. [2024-11-08 16:41:30,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:30,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882258292] [2024-11-08 16:41:30,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [882258292] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:30,837 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:30,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:41:30,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448337454] [2024-11-08 16:41:30,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:30,838 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:41:30,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:30,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:41:30,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:41:30,839 INFO L87 Difference]: Start difference. First operand 5511 states and 7922 transitions. Second operand has 8 states, 8 states have (on average 56.5) internal successors, (452), 8 states have internal predecessors, (452), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:41:31,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:31,146 INFO L93 Difference]: Finished difference Result 10651 states and 15320 transitions. [2024-11-08 16:41:31,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:41:31,147 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 56.5) internal successors, (452), 8 states have internal predecessors, (452), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 778 [2024-11-08 16:41:31,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:31,152 INFO L225 Difference]: With dead ends: 10651 [2024-11-08 16:41:31,152 INFO L226 Difference]: Without dead ends: 5551 [2024-11-08 16:41:31,155 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:41:31,156 INFO L432 NwaCegarLoop]: 1057 mSDtfsCounter, 1032 mSDsluCounter, 5234 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1037 SdHoareTripleChecker+Valid, 6291 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:31,157 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1037 Valid, 6291 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:41:31,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5551 states. [2024-11-08 16:41:31,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5551 to 5539. [2024-11-08 16:41:31,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5539 states, 5505 states have (on average 1.433605812897366) internal successors, (7892), 5505 states have internal predecessors, (7892), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-08 16:41:31,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5539 states to 5539 states and 7956 transitions. [2024-11-08 16:41:31,242 INFO L78 Accepts]: Start accepts. Automaton has 5539 states and 7956 transitions. Word has length 778 [2024-11-08 16:41:31,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:31,242 INFO L471 AbstractCegarLoop]: Abstraction has 5539 states and 7956 transitions. [2024-11-08 16:41:31,243 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 56.5) internal successors, (452), 8 states have internal predecessors, (452), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:41:31,243 INFO L276 IsEmpty]: Start isEmpty. Operand 5539 states and 7956 transitions. [2024-11-08 16:41:31,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-11-08 16:41:31,254 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:31,254 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:31,255 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-11-08 16:41:31,255 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:31,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:31,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1206593572, now seen corresponding path program 1 times [2024-11-08 16:41:31,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:31,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181142162] [2024-11-08 16:41:31,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:31,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:35,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,712 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:41:36,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,714 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:41:36,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,716 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 164 [2024-11-08 16:41:36,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,717 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 190 [2024-11-08 16:41:36,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,719 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 202 [2024-11-08 16:41:36,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,720 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 573 [2024-11-08 16:41:36,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,721 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 587 [2024-11-08 16:41:36,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,722 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 615 [2024-11-08 16:41:36,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,723 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 641 [2024-11-08 16:41:36,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,723 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:41:36,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:36,725 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:41:36,725 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:36,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [181142162] [2024-11-08 16:41:36,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [181142162] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:36,726 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:36,726 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-08 16:41:36,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61217385] [2024-11-08 16:41:36,726 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:36,727 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:41:36,727 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:36,728 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:41:36,728 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:41:36,728 INFO L87 Difference]: Start difference. First operand 5539 states and 7956 transitions. Second operand has 7 states, 7 states have (on average 88.42857142857143) internal successors, (619), 7 states have internal predecessors, (619), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:36,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:36,993 INFO L93 Difference]: Finished difference Result 9055 states and 12985 transitions. [2024-11-08 16:41:36,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:41:36,994 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 88.42857142857143) internal successors, (619), 7 states have internal predecessors, (619), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 778 [2024-11-08 16:41:36,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:36,999 INFO L225 Difference]: With dead ends: 9055 [2024-11-08 16:41:36,999 INFO L226 Difference]: Without dead ends: 5547 [2024-11-08 16:41:37,002 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:41:37,002 INFO L432 NwaCegarLoop]: 1038 mSDtfsCounter, 806 mSDsluCounter, 4131 mSDsCounter, 0 mSdLazyCounter, 249 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 806 SdHoareTripleChecker+Valid, 5169 SdHoareTripleChecker+Invalid, 249 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 249 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:37,002 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [806 Valid, 5169 Invalid, 249 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 249 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:41:37,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5547 states. [2024-11-08 16:41:37,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5547 to 5543. [2024-11-08 16:41:37,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5543 states, 5509 states have (on average 1.4332909783989836) internal successors, (7896), 5509 states have internal predecessors, (7896), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-08 16:41:37,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5543 states to 5543 states and 7960 transitions. [2024-11-08 16:41:37,151 INFO L78 Accepts]: Start accepts. Automaton has 5543 states and 7960 transitions. Word has length 778 [2024-11-08 16:41:37,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:37,151 INFO L471 AbstractCegarLoop]: Abstraction has 5543 states and 7960 transitions. [2024-11-08 16:41:37,152 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 88.42857142857143) internal successors, (619), 7 states have internal predecessors, (619), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:37,152 INFO L276 IsEmpty]: Start isEmpty. Operand 5543 states and 7960 transitions. [2024-11-08 16:41:37,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 779 [2024-11-08 16:41:37,159 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:37,159 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:37,159 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-11-08 16:41:37,159 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:37,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:37,160 INFO L85 PathProgramCache]: Analyzing trace with hash 736814396, now seen corresponding path program 1 times [2024-11-08 16:41:37,160 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:37,160 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12796896] [2024-11-08 16:41:37,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:37,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:37,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,439 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:41:38,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,441 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:41:38,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,442 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 164 [2024-11-08 16:41:38,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,443 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 190 [2024-11-08 16:41:38,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,444 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 202 [2024-11-08 16:41:38,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,446 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 573 [2024-11-08 16:41:38,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,447 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 587 [2024-11-08 16:41:38,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,447 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 615 [2024-11-08 16:41:38,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,448 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 641 [2024-11-08 16:41:38,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,449 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:41:38,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:38,451 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:41:38,451 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:38,451 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12796896] [2024-11-08 16:41:38,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [12796896] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:38,451 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:38,451 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:41:38,452 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894218662] [2024-11-08 16:41:38,452 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:38,453 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:41:38,453 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:38,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:41:38,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:41:38,454 INFO L87 Difference]: Start difference. First operand 5543 states and 7960 transitions. Second operand has 5 states, 5 states have (on average 123.8) internal successors, (619), 5 states have internal predecessors, (619), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:38,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:38,630 INFO L93 Difference]: Finished difference Result 11782 states and 16867 transitions. [2024-11-08 16:41:38,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:41:38,631 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 123.8) internal successors, (619), 5 states have internal predecessors, (619), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 778 [2024-11-08 16:41:38,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:38,638 INFO L225 Difference]: With dead ends: 11782 [2024-11-08 16:41:38,638 INFO L226 Difference]: Without dead ends: 8270 [2024-11-08 16:41:38,641 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:41:38,642 INFO L432 NwaCegarLoop]: 1298 mSDtfsCounter, 603 mSDsluCounter, 3658 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 603 SdHoareTripleChecker+Valid, 4956 SdHoareTripleChecker+Invalid, 55 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:38,642 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [603 Valid, 4956 Invalid, 55 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:41:38,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8270 states. [2024-11-08 16:41:38,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8270 to 7803. [2024-11-08 16:41:38,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7803 states, 7753 states have (on average 1.4326067328775958) internal successors, (11107), 7753 states have internal predecessors, (11107), 48 states have call successors, (48), 1 states have call predecessors, (48), 1 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2024-11-08 16:41:38,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7803 states to 7803 states and 11203 transitions. [2024-11-08 16:41:38,778 INFO L78 Accepts]: Start accepts. Automaton has 7803 states and 11203 transitions. Word has length 778 [2024-11-08 16:41:38,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:38,778 INFO L471 AbstractCegarLoop]: Abstraction has 7803 states and 11203 transitions. [2024-11-08 16:41:38,779 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 123.8) internal successors, (619), 5 states have internal predecessors, (619), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:38,779 INFO L276 IsEmpty]: Start isEmpty. Operand 7803 states and 11203 transitions. [2024-11-08 16:41:38,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-11-08 16:41:38,787 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:38,788 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:38,788 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-11-08 16:41:38,788 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:38,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:38,788 INFO L85 PathProgramCache]: Analyzing trace with hash -988365295, now seen corresponding path program 1 times [2024-11-08 16:41:38,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:38,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722518707] [2024-11-08 16:41:38,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:38,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:39,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:40,991 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:41:40,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:40,993 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:41:40,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:40,994 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2024-11-08 16:41:40,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:40,996 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 191 [2024-11-08 16:41:40,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:40,997 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 203 [2024-11-08 16:41:40,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:40,999 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 574 [2024-11-08 16:41:40,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:41,000 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 588 [2024-11-08 16:41:41,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:41,001 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 616 [2024-11-08 16:41:41,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:41,002 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 642 [2024-11-08 16:41:41,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:41,003 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 654 [2024-11-08 16:41:41,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:41,004 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:41:41,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:41,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722518707] [2024-11-08 16:41:41,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722518707] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:41,005 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:41,005 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:41:41,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371950487] [2024-11-08 16:41:41,005 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:41,006 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:41:41,006 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:41,007 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:41:41,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:41:41,007 INFO L87 Difference]: Start difference. First operand 7803 states and 11203 transitions. Second operand has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:41,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:41,260 INFO L93 Difference]: Finished difference Result 14078 states and 20160 transitions. [2024-11-08 16:41:41,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:41:41,260 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 779 [2024-11-08 16:41:41,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:41,269 INFO L225 Difference]: With dead ends: 14078 [2024-11-08 16:41:41,269 INFO L226 Difference]: Without dead ends: 10566 [2024-11-08 16:41:41,273 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:41:41,274 INFO L432 NwaCegarLoop]: 1194 mSDtfsCounter, 538 mSDsluCounter, 6330 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 538 SdHoareTripleChecker+Valid, 7524 SdHoareTripleChecker+Invalid, 141 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:41,274 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [538 Valid, 7524 Invalid, 141 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 141 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:41:41,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10566 states. [2024-11-08 16:41:41,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10566 to 10542. [2024-11-08 16:41:41,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10542 states, 10476 states have (on average 1.4294578083237877) internal successors, (14975), 10476 states have internal predecessors, (14975), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:41:41,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10542 states to 10542 states and 15103 transitions. [2024-11-08 16:41:41,444 INFO L78 Accepts]: Start accepts. Automaton has 10542 states and 15103 transitions. Word has length 779 [2024-11-08 16:41:41,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:41,445 INFO L471 AbstractCegarLoop]: Abstraction has 10542 states and 15103 transitions. [2024-11-08 16:41:41,445 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:41,445 INFO L276 IsEmpty]: Start isEmpty. Operand 10542 states and 15103 transitions. [2024-11-08 16:41:41,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-11-08 16:41:41,455 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:41,455 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:41,455 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-11-08 16:41:41,455 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:41,456 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:41,456 INFO L85 PathProgramCache]: Analyzing trace with hash -1666037985, now seen corresponding path program 1 times [2024-11-08 16:41:41,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:41,456 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2116817309] [2024-11-08 16:41:41,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:41,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:43,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,870 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:41:44,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,871 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:41:44,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,872 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2024-11-08 16:41:44,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 191 [2024-11-08 16:41:44,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 203 [2024-11-08 16:41:44,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 574 [2024-11-08 16:41:44,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,875 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 588 [2024-11-08 16:41:44,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,876 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 616 [2024-11-08 16:41:44,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,877 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 642 [2024-11-08 16:41:44,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,878 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 654 [2024-11-08 16:41:44,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:44,880 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:41:44,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:44,880 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2116817309] [2024-11-08 16:41:44,880 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2116817309] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:44,880 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:44,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:41:44,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072234236] [2024-11-08 16:41:44,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:44,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:41:44,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:44,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:41:44,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:41:44,883 INFO L87 Difference]: Start difference. First operand 10542 states and 15103 transitions. Second operand has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:45,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:45,178 INFO L93 Difference]: Finished difference Result 15868 states and 22747 transitions. [2024-11-08 16:41:45,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:41:45,178 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 779 [2024-11-08 16:41:45,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:45,188 INFO L225 Difference]: With dead ends: 15868 [2024-11-08 16:41:45,189 INFO L226 Difference]: Without dead ends: 12210 [2024-11-08 16:41:45,193 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:41:45,193 INFO L432 NwaCegarLoop]: 1462 mSDtfsCounter, 738 mSDsluCounter, 7950 mSDsCounter, 0 mSdLazyCounter, 125 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 738 SdHoareTripleChecker+Valid, 9412 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 125 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:45,194 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [738 Valid, 9412 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 125 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:41:45,199 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12210 states. [2024-11-08 16:41:45,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12210 to 12052. [2024-11-08 16:41:45,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12052 states, 11986 states have (on average 1.433255464708827) internal successors, (17179), 11986 states have internal predecessors, (17179), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:41:45,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12052 states to 12052 states and 17307 transitions. [2024-11-08 16:41:45,386 INFO L78 Accepts]: Start accepts. Automaton has 12052 states and 17307 transitions. Word has length 779 [2024-11-08 16:41:45,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:45,387 INFO L471 AbstractCegarLoop]: Abstraction has 12052 states and 17307 transitions. [2024-11-08 16:41:45,387 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:45,387 INFO L276 IsEmpty]: Start isEmpty. Operand 12052 states and 17307 transitions. [2024-11-08 16:41:45,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-11-08 16:41:45,398 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:45,398 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:45,399 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-11-08 16:41:45,399 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:45,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:45,399 INFO L85 PathProgramCache]: Analyzing trace with hash 563008705, now seen corresponding path program 1 times [2024-11-08 16:41:45,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:45,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120299395] [2024-11-08 16:41:45,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:45,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:45,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,731 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:41:46,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,733 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:41:46,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,734 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2024-11-08 16:41:46,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,736 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 191 [2024-11-08 16:41:46,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,737 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 203 [2024-11-08 16:41:46,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,739 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 574 [2024-11-08 16:41:46,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,740 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 588 [2024-11-08 16:41:46,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,741 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 616 [2024-11-08 16:41:46,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,742 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 642 [2024-11-08 16:41:46,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,743 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 654 [2024-11-08 16:41:46,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:46,745 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 779 trivial. 0 not checked. [2024-11-08 16:41:46,745 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:46,746 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120299395] [2024-11-08 16:41:46,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [120299395] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:46,746 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:46,746 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:41:46,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466175963] [2024-11-08 16:41:46,746 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:46,747 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:41:46,747 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:46,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:41:46,748 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:41:46,748 INFO L87 Difference]: Start difference. First operand 12052 states and 17307 transitions. Second operand has 6 states, 6 states have (on average 87.0) internal successors, (522), 6 states have internal predecessors, (522), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:47,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:47,575 INFO L93 Difference]: Finished difference Result 18593 states and 26713 transitions. [2024-11-08 16:41:47,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:41:47,576 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 87.0) internal successors, (522), 6 states have internal predecessors, (522), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 779 [2024-11-08 16:41:47,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:47,586 INFO L225 Difference]: With dead ends: 18593 [2024-11-08 16:41:47,587 INFO L226 Difference]: Without dead ends: 12068 [2024-11-08 16:41:47,592 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:41:47,593 INFO L432 NwaCegarLoop]: 806 mSDtfsCounter, 946 mSDsluCounter, 2384 mSDsCounter, 0 mSdLazyCounter, 1133 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 946 SdHoareTripleChecker+Valid, 3190 SdHoareTripleChecker+Invalid, 1135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1133 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:47,593 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [946 Valid, 3190 Invalid, 1135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1133 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-08 16:41:47,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12068 states. [2024-11-08 16:41:47,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12068 to 12068. [2024-11-08 16:41:47,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12068 states, 12002 states have (on average 1.4326778870188301) internal successors, (17195), 12002 states have internal predecessors, (17195), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:41:47,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12068 states to 12068 states and 17323 transitions. [2024-11-08 16:41:47,776 INFO L78 Accepts]: Start accepts. Automaton has 12068 states and 17323 transitions. Word has length 779 [2024-11-08 16:41:47,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:47,776 INFO L471 AbstractCegarLoop]: Abstraction has 12068 states and 17323 transitions. [2024-11-08 16:41:47,776 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 87.0) internal successors, (522), 6 states have internal predecessors, (522), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:47,776 INFO L276 IsEmpty]: Start isEmpty. Operand 12068 states and 17323 transitions. [2024-11-08 16:41:47,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2024-11-08 16:41:47,787 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:47,788 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:47,788 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-11-08 16:41:47,788 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:47,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:47,788 INFO L85 PathProgramCache]: Analyzing trace with hash -338872979, now seen corresponding path program 1 times [2024-11-08 16:41:47,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:47,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864882022] [2024-11-08 16:41:47,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:47,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:41:52,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,543 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:41:54,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,545 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:41:54,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,547 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 164 [2024-11-08 16:41:54,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,549 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 190 [2024-11-08 16:41:54,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,551 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 202 [2024-11-08 16:41:54,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,552 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 574 [2024-11-08 16:41:54,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,553 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 588 [2024-11-08 16:41:54,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,554 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 616 [2024-11-08 16:41:54,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,555 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 642 [2024-11-08 16:41:54,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,556 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 654 [2024-11-08 16:41:54,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:41:54,558 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:41:54,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:41:54,559 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864882022] [2024-11-08 16:41:54,559 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [864882022] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:41:54,559 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:41:54,559 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:41:54,559 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250809432] [2024-11-08 16:41:54,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:41:54,560 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:41:54,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:41:54,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:41:54,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:41:54,562 INFO L87 Difference]: Start difference. First operand 12068 states and 17323 transitions. Second operand has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:55,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:41:55,737 INFO L93 Difference]: Finished difference Result 16461 states and 23597 transitions. [2024-11-08 16:41:55,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:41:55,738 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 779 [2024-11-08 16:41:55,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:41:55,749 INFO L225 Difference]: With dead ends: 16461 [2024-11-08 16:41:55,749 INFO L226 Difference]: Without dead ends: 12108 [2024-11-08 16:41:55,754 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:41:55,754 INFO L432 NwaCegarLoop]: 794 mSDtfsCounter, 848 mSDsluCounter, 3155 mSDsCounter, 0 mSdLazyCounter, 1467 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 848 SdHoareTripleChecker+Valid, 3949 SdHoareTripleChecker+Invalid, 1469 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1467 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:41:55,754 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [848 Valid, 3949 Invalid, 1469 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1467 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-08 16:41:55,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12108 states. [2024-11-08 16:41:55,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12108 to 12108. [2024-11-08 16:41:55,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12108 states, 12042 states have (on average 1.4312406576980568) internal successors, (17235), 12042 states have internal predecessors, (17235), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:41:55,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12108 states to 12108 states and 17363 transitions. [2024-11-08 16:41:55,961 INFO L78 Accepts]: Start accepts. Automaton has 12108 states and 17363 transitions. Word has length 779 [2024-11-08 16:41:55,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:41:55,961 INFO L471 AbstractCegarLoop]: Abstraction has 12108 states and 17363 transitions. [2024-11-08 16:41:55,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.5) internal successors, (620), 8 states have internal predecessors, (620), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:41:55,962 INFO L276 IsEmpty]: Start isEmpty. Operand 12108 states and 17363 transitions. [2024-11-08 16:41:55,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 781 [2024-11-08 16:41:55,974 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:41:55,974 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:41:55,974 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-11-08 16:41:55,975 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:41:55,975 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:41:55,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1606777609, now seen corresponding path program 1 times [2024-11-08 16:41:55,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:41:55,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983985286] [2024-11-08 16:41:55,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:41:55,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:42:00,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,602 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:42:02,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,604 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:42:02,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,607 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 164 [2024-11-08 16:42:02,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,609 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 190 [2024-11-08 16:42:02,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,613 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 202 [2024-11-08 16:42:02,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,616 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 575 [2024-11-08 16:42:02,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,618 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 589 [2024-11-08 16:42:02,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,619 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 617 [2024-11-08 16:42:02,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,621 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 643 [2024-11-08 16:42:02,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,623 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 655 [2024-11-08 16:42:02,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:02,626 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:42:02,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:42:02,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983985286] [2024-11-08 16:42:02,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983985286] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:42:02,627 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:42:02,627 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:42:02,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213863290] [2024-11-08 16:42:02,627 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:42:02,628 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:42:02,628 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:42:02,629 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:42:02,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:42:02,629 INFO L87 Difference]: Start difference. First operand 12108 states and 17363 transitions. Second operand has 8 states, 8 states have (on average 77.625) internal successors, (621), 8 states have internal predecessors, (621), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:42:03,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:42:03,887 INFO L93 Difference]: Finished difference Result 16573 states and 23729 transitions. [2024-11-08 16:42:03,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-08 16:42:03,888 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 77.625) internal successors, (621), 8 states have internal predecessors, (621), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 780 [2024-11-08 16:42:03,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:42:03,897 INFO L225 Difference]: With dead ends: 16573 [2024-11-08 16:42:03,898 INFO L226 Difference]: Without dead ends: 12108 [2024-11-08 16:42:03,902 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2024-11-08 16:42:03,903 INFO L432 NwaCegarLoop]: 764 mSDtfsCounter, 1641 mSDsluCounter, 3029 mSDsCounter, 0 mSdLazyCounter, 1603 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1641 SdHoareTripleChecker+Valid, 3793 SdHoareTripleChecker+Invalid, 1606 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1603 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:42:03,903 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1641 Valid, 3793 Invalid, 1606 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1603 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-08 16:42:03,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12108 states. [2024-11-08 16:42:04,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12108 to 12108. [2024-11-08 16:42:04,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12108 states, 12042 states have (on average 1.4305763162265404) internal successors, (17227), 12042 states have internal predecessors, (17227), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:42:04,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12108 states to 12108 states and 17355 transitions. [2024-11-08 16:42:04,102 INFO L78 Accepts]: Start accepts. Automaton has 12108 states and 17355 transitions. Word has length 780 [2024-11-08 16:42:04,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:42:04,102 INFO L471 AbstractCegarLoop]: Abstraction has 12108 states and 17355 transitions. [2024-11-08 16:42:04,103 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 77.625) internal successors, (621), 8 states have internal predecessors, (621), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:42:04,103 INFO L276 IsEmpty]: Start isEmpty. Operand 12108 states and 17355 transitions. [2024-11-08 16:42:04,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 782 [2024-11-08 16:42:04,114 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:42:04,115 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:42:04,115 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73 [2024-11-08 16:42:04,115 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:42:04,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:42:04,116 INFO L85 PathProgramCache]: Analyzing trace with hash 588824157, now seen corresponding path program 1 times [2024-11-08 16:42:04,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:42:04,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104964477] [2024-11-08 16:42:04,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:04,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:42:08,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,823 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:42:09,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,824 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:42:09,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,837 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 164 [2024-11-08 16:42:09,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,838 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 190 [2024-11-08 16:42:09,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,839 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 202 [2024-11-08 16:42:09,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,840 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 576 [2024-11-08 16:42:09,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,841 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 590 [2024-11-08 16:42:09,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,842 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 618 [2024-11-08 16:42:09,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,842 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 644 [2024-11-08 16:42:09,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,843 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 656 [2024-11-08 16:42:09,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:09,844 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 26 proven. 24 refuted. 0 times theorem prover too weak. 818 trivial. 0 not checked. [2024-11-08 16:42:09,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:42:09,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104964477] [2024-11-08 16:42:09,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2104964477] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:42:09,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [461372184] [2024-11-08 16:42:09,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:09,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:42:09,845 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:42:09,849 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:42:09,851 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2024-11-08 16:42:19,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:19,416 INFO L255 TraceCheckSpWp]: Trace formula consists of 3768 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 16:42:19,424 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:42:19,448 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 273 proven. 0 refuted. 0 times theorem prover too weak. 595 trivial. 0 not checked. [2024-11-08 16:42:19,448 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:42:19,449 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [461372184] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:42:19,449 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:42:19,449 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 6 [2024-11-08 16:42:19,449 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860389974] [2024-11-08 16:42:19,449 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:42:19,450 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:42:19,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:42:19,451 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:42:19,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:42:19,452 INFO L87 Difference]: Start difference. First operand 12108 states and 17355 transitions. Second operand has 6 states, 5 states have (on average 121.8) internal successors, (609), 6 states have internal predecessors, (609), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (9), 2 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-08 16:42:19,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:42:19,723 INFO L93 Difference]: Finished difference Result 23507 states and 33742 transitions. [2024-11-08 16:42:19,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:42:19,724 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 121.8) internal successors, (609), 6 states have internal predecessors, (609), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (9), 2 states have call predecessors, (9), 3 states have call successors, (9) Word has length 781 [2024-11-08 16:42:19,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:42:19,737 INFO L225 Difference]: With dead ends: 23507 [2024-11-08 16:42:19,737 INFO L226 Difference]: Without dead ends: 12108 [2024-11-08 16:42:19,746 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 805 GetRequests, 801 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:42:19,747 INFO L432 NwaCegarLoop]: 1074 mSDtfsCounter, 0 mSDsluCounter, 4277 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5351 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:42:19,747 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5351 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:42:19,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12108 states. [2024-11-08 16:42:19,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12108 to 12108. [2024-11-08 16:42:19,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12108 states, 12042 states have (on average 1.429579804019266) internal successors, (17215), 12042 states have internal predecessors, (17215), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:42:19,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12108 states to 12108 states and 17343 transitions. [2024-11-08 16:42:19,966 INFO L78 Accepts]: Start accepts. Automaton has 12108 states and 17343 transitions. Word has length 781 [2024-11-08 16:42:19,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:42:19,967 INFO L471 AbstractCegarLoop]: Abstraction has 12108 states and 17343 transitions. [2024-11-08 16:42:19,967 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 121.8) internal successors, (609), 6 states have internal predecessors, (609), 3 states have call successors, (9), 2 states have call predecessors, (9), 3 states have return successors, (9), 2 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-08 16:42:19,967 INFO L276 IsEmpty]: Start isEmpty. Operand 12108 states and 17343 transitions. [2024-11-08 16:42:19,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-11-08 16:42:19,978 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:42:19,979 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:42:20,014 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2024-11-08 16:42:20,179 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74,36 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:42:20,180 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:42:20,180 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:42:20,180 INFO L85 PathProgramCache]: Analyzing trace with hash -1783756689, now seen corresponding path program 1 times [2024-11-08 16:42:20,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:42:20,180 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054026632] [2024-11-08 16:42:20,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:20,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:42:22,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,727 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:42:24,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,728 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:42:24,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,729 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2024-11-08 16:42:24,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,730 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 191 [2024-11-08 16:42:24,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,732 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 203 [2024-11-08 16:42:24,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,733 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 577 [2024-11-08 16:42:24,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,734 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 592 [2024-11-08 16:42:24,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,734 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 620 [2024-11-08 16:42:24,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,735 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 646 [2024-11-08 16:42:24,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,736 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 658 [2024-11-08 16:42:24,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:24,738 INFO L134 CoverageAnalysis]: Checked inductivity of 865 backedges. 189 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:42:24,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:42:24,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054026632] [2024-11-08 16:42:24,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054026632] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:42:24,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:42:24,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-08 16:42:24,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238834798] [2024-11-08 16:42:24,739 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:42:24,739 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:42:24,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:42:24,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:42:24,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:42:24,740 INFO L87 Difference]: Start difference. First operand 12108 states and 17343 transitions. Second operand has 9 states, 9 states have (on average 69.33333333333333) internal successors, (624), 9 states have internal predecessors, (624), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:42:25,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:42:25,315 INFO L93 Difference]: Finished difference Result 18158 states and 25999 transitions. [2024-11-08 16:42:25,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:42:25,316 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 69.33333333333333) internal successors, (624), 9 states have internal predecessors, (624), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 783 [2024-11-08 16:42:25,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:42:25,329 INFO L225 Difference]: With dead ends: 18158 [2024-11-08 16:42:25,329 INFO L226 Difference]: Without dead ends: 13963 [2024-11-08 16:42:25,334 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:42:25,334 INFO L432 NwaCegarLoop]: 1409 mSDtfsCounter, 1197 mSDsluCounter, 7979 mSDsCounter, 0 mSdLazyCounter, 518 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1197 SdHoareTripleChecker+Valid, 9388 SdHoareTripleChecker+Invalid, 518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 518 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:42:25,334 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1197 Valid, 9388 Invalid, 518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 518 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-08 16:42:25,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13963 states. [2024-11-08 16:42:25,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13963 to 13621. [2024-11-08 16:42:25,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13621 states, 13555 states have (on average 1.433050534857986) internal successors, (19425), 13555 states have internal predecessors, (19425), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:42:25,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13621 states to 13621 states and 19553 transitions. [2024-11-08 16:42:25,557 INFO L78 Accepts]: Start accepts. Automaton has 13621 states and 19553 transitions. Word has length 783 [2024-11-08 16:42:25,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:42:25,557 INFO L471 AbstractCegarLoop]: Abstraction has 13621 states and 19553 transitions. [2024-11-08 16:42:25,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 69.33333333333333) internal successors, (624), 9 states have internal predecessors, (624), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:42:25,558 INFO L276 IsEmpty]: Start isEmpty. Operand 13621 states and 19553 transitions. [2024-11-08 16:42:25,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 784 [2024-11-08 16:42:25,571 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:42:25,571 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:42:25,571 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-11-08 16:42:25,571 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:42:25,571 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:42:25,572 INFO L85 PathProgramCache]: Analyzing trace with hash -163569183, now seen corresponding path program 1 times [2024-11-08 16:42:25,572 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:42:25,572 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677446256] [2024-11-08 16:42:25,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:25,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:42:30,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,287 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:42:32,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,288 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:42:32,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,289 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2024-11-08 16:42:32,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,302 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 191 [2024-11-08 16:42:32,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,303 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 203 [2024-11-08 16:42:32,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,304 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 577 [2024-11-08 16:42:32,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,304 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 592 [2024-11-08 16:42:32,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,305 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 620 [2024-11-08 16:42:32,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,306 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 646 [2024-11-08 16:42:32,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,307 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 658 [2024-11-08 16:42:32,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:32,308 INFO L134 CoverageAnalysis]: Checked inductivity of 869 backedges. 54 proven. 21 refuted. 0 times theorem prover too weak. 794 trivial. 0 not checked. [2024-11-08 16:42:32,308 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:42:32,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677446256] [2024-11-08 16:42:32,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1677446256] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:42:32,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1672245217] [2024-11-08 16:42:32,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:32,309 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:42:32,309 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:42:32,310 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:42:32,311 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2024-11-08 16:42:37,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:37,911 INFO L255 TraceCheckSpWp]: Trace formula consists of 3774 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 16:42:37,919 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:42:37,937 INFO L134 CoverageAnalysis]: Checked inductivity of 869 backedges. 138 proven. 0 refuted. 0 times theorem prover too weak. 731 trivial. 0 not checked. [2024-11-08 16:42:37,937 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:42:37,937 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1672245217] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:42:37,937 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:42:37,938 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 6 [2024-11-08 16:42:37,938 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1140658735] [2024-11-08 16:42:37,938 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:42:37,938 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:42:37,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:42:37,939 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:42:37,939 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:42:37,939 INFO L87 Difference]: Start difference. First operand 13621 states and 19553 transitions. Second operand has 6 states, 5 states have (on average 98.2) internal successors, (491), 6 states have internal predecessors, (491), 3 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (8), 2 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-08 16:42:38,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:42:38,147 INFO L93 Difference]: Finished difference Result 26056 states and 37454 transitions. [2024-11-08 16:42:38,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:42:38,147 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 98.2) internal successors, (491), 6 states have internal predecessors, (491), 3 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (8), 2 states have call predecessors, (8), 3 states have call successors, (8) Word has length 783 [2024-11-08 16:42:38,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:42:38,160 INFO L225 Difference]: With dead ends: 26056 [2024-11-08 16:42:38,160 INFO L226 Difference]: Without dead ends: 13621 [2024-11-08 16:42:38,168 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 807 GetRequests, 803 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:42:38,168 INFO L432 NwaCegarLoop]: 1073 mSDtfsCounter, 0 mSDsluCounter, 4273 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5346 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:42:38,169 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5346 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:42:38,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13621 states. [2024-11-08 16:42:38,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13621 to 13621. [2024-11-08 16:42:38,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13621 states, 13555 states have (on average 1.4321652526742898) internal successors, (19413), 13555 states have internal predecessors, (19413), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:42:38,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13621 states to 13621 states and 19541 transitions. [2024-11-08 16:42:38,381 INFO L78 Accepts]: Start accepts. Automaton has 13621 states and 19541 transitions. Word has length 783 [2024-11-08 16:42:38,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:42:38,382 INFO L471 AbstractCegarLoop]: Abstraction has 13621 states and 19541 transitions. [2024-11-08 16:42:38,382 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 98.2) internal successors, (491), 6 states have internal predecessors, (491), 3 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (8), 2 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-08 16:42:38,382 INFO L276 IsEmpty]: Start isEmpty. Operand 13621 states and 19541 transitions. [2024-11-08 16:42:38,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 786 [2024-11-08 16:42:38,395 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:42:38,396 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:42:38,430 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2024-11-08 16:42:38,596 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76,37 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:42:38,596 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:42:38,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:42:38,597 INFO L85 PathProgramCache]: Analyzing trace with hash -1623145391, now seen corresponding path program 1 times [2024-11-08 16:42:38,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:42:38,597 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437974810] [2024-11-08 16:42:38,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:38,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:42:43,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,605 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:42:44,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,606 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:42:44,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,607 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:42:44,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,608 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 192 [2024-11-08 16:42:44,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,622 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 204 [2024-11-08 16:42:44,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,623 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 578 [2024-11-08 16:42:44,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,624 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 593 [2024-11-08 16:42:44,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,625 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 622 [2024-11-08 16:42:44,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,625 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 648 [2024-11-08 16:42:44,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,626 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 660 [2024-11-08 16:42:44,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:44,627 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 80 proven. 18 refuted. 0 times theorem prover too weak. 772 trivial. 0 not checked. [2024-11-08 16:42:44,628 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:42:44,628 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437974810] [2024-11-08 16:42:44,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1437974810] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:42:44,628 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [404769786] [2024-11-08 16:42:44,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:44,628 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:42:44,628 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:42:44,629 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:42:44,697 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2024-11-08 16:42:53,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:53,375 INFO L255 TraceCheckSpWp]: Trace formula consists of 3780 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-08 16:42:53,390 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:42:53,425 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 185 proven. 0 refuted. 0 times theorem prover too weak. 685 trivial. 0 not checked. [2024-11-08 16:42:53,425 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:42:53,425 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [404769786] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:42:53,425 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:42:53,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 6 [2024-11-08 16:42:53,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274001717] [2024-11-08 16:42:53,426 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:42:53,427 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:42:53,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:42:53,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:42:53,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:42:53,428 INFO L87 Difference]: Start difference. First operand 13621 states and 19541 transitions. Second operand has 6 states, 5 states have (on average 113.4) internal successors, (567), 6 states have internal predecessors, (567), 3 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (7), 2 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-08 16:42:53,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:42:53,696 INFO L93 Difference]: Finished difference Result 25588 states and 36764 transitions. [2024-11-08 16:42:53,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:42:53,697 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 113.4) internal successors, (567), 6 states have internal predecessors, (567), 3 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (7), 2 states have call predecessors, (7), 3 states have call successors, (7) Word has length 785 [2024-11-08 16:42:53,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:42:53,708 INFO L225 Difference]: With dead ends: 25588 [2024-11-08 16:42:53,708 INFO L226 Difference]: Without dead ends: 13621 [2024-11-08 16:42:53,717 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 809 GetRequests, 805 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:42:53,717 INFO L432 NwaCegarLoop]: 1072 mSDtfsCounter, 0 mSDsluCounter, 4269 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 5341 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:42:53,718 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 5341 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:42:53,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13621 states. [2024-11-08 16:42:53,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13621 to 13597. [2024-11-08 16:42:53,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13597 states, 13531 states have (on average 1.432044933855591) internal successors, (19377), 13531 states have internal predecessors, (19377), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:42:53,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13597 states to 13597 states and 19505 transitions. [2024-11-08 16:42:53,964 INFO L78 Accepts]: Start accepts. Automaton has 13597 states and 19505 transitions. Word has length 785 [2024-11-08 16:42:53,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:42:53,964 INFO L471 AbstractCegarLoop]: Abstraction has 13597 states and 19505 transitions. [2024-11-08 16:42:53,964 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 113.4) internal successors, (567), 6 states have internal predecessors, (567), 3 states have call successors, (7), 2 states have call predecessors, (7), 3 states have return successors, (7), 2 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-08 16:42:53,965 INFO L276 IsEmpty]: Start isEmpty. Operand 13597 states and 19505 transitions. [2024-11-08 16:42:53,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 788 [2024-11-08 16:42:53,977 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:42:53,977 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:42:54,017 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Forceful destruction successful, exit code 0 [2024-11-08 16:42:54,178 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable77 [2024-11-08 16:42:54,178 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:42:54,178 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:42:54,178 INFO L85 PathProgramCache]: Analyzing trace with hash 1807512513, now seen corresponding path program 1 times [2024-11-08 16:42:54,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:42:54,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779104431] [2024-11-08 16:42:54,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:54,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:42:57,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,766 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:42:58,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,768 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:42:58,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,769 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:42:58,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,770 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:42:58,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,772 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:42:58,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,773 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 579 [2024-11-08 16:42:58,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,774 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 594 [2024-11-08 16:42:58,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,776 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 623 [2024-11-08 16:42:58,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,777 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 650 [2024-11-08 16:42:58,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,778 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 662 [2024-11-08 16:42:58,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:42:58,780 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 125 proven. 4 refuted. 0 times theorem prover too weak. 742 trivial. 0 not checked. [2024-11-08 16:42:58,780 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:42:58,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [779104431] [2024-11-08 16:42:58,780 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [779104431] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:42:58,780 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [995336701] [2024-11-08 16:42:58,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:42:58,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:42:58,781 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:42:58,782 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:42:58,783 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2024-11-08 16:43:03,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:03,194 INFO L255 TraceCheckSpWp]: Trace formula consists of 3786 conjuncts, 45 conjuncts are in the unsatisfiable core [2024-11-08 16:43:03,204 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:43:03,761 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 154 proven. 0 refuted. 0 times theorem prover too weak. 717 trivial. 0 not checked. [2024-11-08 16:43:03,761 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:43:03,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [995336701] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:03,762 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-08 16:43:03,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [6] total 9 [2024-11-08 16:43:03,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833823987] [2024-11-08 16:43:03,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:03,763 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:43:03,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:03,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:43:03,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:43:03,763 INFO L87 Difference]: Start difference. First operand 13597 states and 19505 transitions. Second operand has 6 states, 6 states have (on average 85.33333333333333) internal successors, (512), 6 states have internal predecessors, (512), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-08 16:43:04,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:04,709 INFO L93 Difference]: Finished difference Result 25600 states and 36770 transitions. [2024-11-08 16:43:04,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:43:04,710 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 85.33333333333333) internal successors, (512), 6 states have internal predecessors, (512), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 787 [2024-11-08 16:43:04,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:04,721 INFO L225 Difference]: With dead ends: 25600 [2024-11-08 16:43:04,721 INFO L226 Difference]: Without dead ends: 13645 [2024-11-08 16:43:04,727 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 815 GetRequests, 808 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:43:04,728 INFO L432 NwaCegarLoop]: 790 mSDtfsCounter, 952 mSDsluCounter, 2332 mSDsCounter, 0 mSdLazyCounter, 1168 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 954 SdHoareTripleChecker+Valid, 3122 SdHoareTripleChecker+Invalid, 1168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:04,728 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [954 Valid, 3122 Invalid, 1168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1168 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-08 16:43:04,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13645 states. [2024-11-08 16:43:04,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13645 to 13633. [2024-11-08 16:43:04,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13633 states, 13567 states have (on average 1.4308985037222672) internal successors, (19413), 13567 states have internal predecessors, (19413), 64 states have call successors, (64), 1 states have call predecessors, (64), 1 states have return successors, (64), 64 states have call predecessors, (64), 64 states have call successors, (64) [2024-11-08 16:43:04,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13633 states to 13633 states and 19541 transitions. [2024-11-08 16:43:04,955 INFO L78 Accepts]: Start accepts. Automaton has 13633 states and 19541 transitions. Word has length 787 [2024-11-08 16:43:04,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:04,955 INFO L471 AbstractCegarLoop]: Abstraction has 13633 states and 19541 transitions. [2024-11-08 16:43:04,956 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 85.33333333333333) internal successors, (512), 6 states have internal predecessors, (512), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-08 16:43:04,956 INFO L276 IsEmpty]: Start isEmpty. Operand 13633 states and 19541 transitions. [2024-11-08 16:43:04,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 788 [2024-11-08 16:43:04,969 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:04,970 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:05,002 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Ended with exit code 0 [2024-11-08 16:43:05,170 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable78 [2024-11-08 16:43:05,171 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:05,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:05,171 INFO L85 PathProgramCache]: Analyzing trace with hash 1956716481, now seen corresponding path program 1 times [2024-11-08 16:43:05,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:05,172 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638176348] [2024-11-08 16:43:05,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:05,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:43:10,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,787 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 122 [2024-11-08 16:43:14,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,789 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:43:14,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,791 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:43:14,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,793 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:43:14,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,795 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:43:14,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 579 [2024-11-08 16:43:14,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,799 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 594 [2024-11-08 16:43:14,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 623 [2024-11-08 16:43:14,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,801 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 650 [2024-11-08 16:43:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 662 [2024-11-08 16:43:14,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:14,804 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 781 trivial. 0 not checked. [2024-11-08 16:43:14,804 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:43:14,804 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638176348] [2024-11-08 16:43:14,804 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1638176348] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:14,804 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:43:14,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-08 16:43:14,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1691807745] [2024-11-08 16:43:14,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:14,805 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:43:14,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:14,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:43:14,806 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:43:14,806 INFO L87 Difference]: Start difference. First operand 13633 states and 19541 transitions. Second operand has 9 states, 9 states have (on average 58.55555555555556) internal successors, (527), 9 states have internal predecessors, (527), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:43:15,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:15,368 INFO L93 Difference]: Finished difference Result 41794 states and 59812 transitions. [2024-11-08 16:43:15,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:43:15,368 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 58.55555555555556) internal successors, (527), 9 states have internal predecessors, (527), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 787 [2024-11-08 16:43:15,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:15,397 INFO L225 Difference]: With dead ends: 41794 [2024-11-08 16:43:15,397 INFO L226 Difference]: Without dead ends: 33721 [2024-11-08 16:43:15,408 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:43:15,408 INFO L432 NwaCegarLoop]: 1062 mSDtfsCounter, 2899 mSDsluCounter, 7130 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2909 SdHoareTripleChecker+Valid, 8192 SdHoareTripleChecker+Invalid, 166 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:15,408 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2909 Valid, 8192 Invalid, 166 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:43:15,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33721 states. [2024-11-08 16:43:15,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33721 to 13870. [2024-11-08 16:43:15,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13870 states, 13801 states have (on average 1.431200637634954) internal successors, (19752), 13801 states have internal predecessors, (19752), 67 states have call successors, (67), 1 states have call predecessors, (67), 1 states have return successors, (67), 67 states have call predecessors, (67), 67 states have call successors, (67) [2024-11-08 16:43:15,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13870 states to 13870 states and 19886 transitions. [2024-11-08 16:43:15,715 INFO L78 Accepts]: Start accepts. Automaton has 13870 states and 19886 transitions. Word has length 787 [2024-11-08 16:43:15,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:15,716 INFO L471 AbstractCegarLoop]: Abstraction has 13870 states and 19886 transitions. [2024-11-08 16:43:15,716 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 58.55555555555556) internal successors, (527), 9 states have internal predecessors, (527), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:43:15,716 INFO L276 IsEmpty]: Start isEmpty. Operand 13870 states and 19886 transitions. [2024-11-08 16:43:15,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 788 [2024-11-08 16:43:15,729 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:15,730 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:15,730 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable79 [2024-11-08 16:43:15,730 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:15,730 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:15,730 INFO L85 PathProgramCache]: Analyzing trace with hash 268279869, now seen corresponding path program 1 times [2024-11-08 16:43:15,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:15,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771533011] [2024-11-08 16:43:15,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:15,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:43:19,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,751 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:43:24,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,753 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:43:24,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,756 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:43:24,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,760 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:43:24,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,763 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:43:24,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,767 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 579 [2024-11-08 16:43:24,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,768 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 594 [2024-11-08 16:43:24,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,770 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 623 [2024-11-08 16:43:24,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,772 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 650 [2024-11-08 16:43:24,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,773 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 662 [2024-11-08 16:43:24,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:24,776 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 757 trivial. 0 not checked. [2024-11-08 16:43:24,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:43:24,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771533011] [2024-11-08 16:43:24,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771533011] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:24,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:43:24,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:43:24,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699274857] [2024-11-08 16:43:24,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:24,778 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:43:24,778 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:24,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:43:24,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:43:24,780 INFO L87 Difference]: Start difference. First operand 13870 states and 19886 transitions. Second operand has 8 states, 8 states have (on average 68.875) internal successors, (551), 8 states have internal predecessors, (551), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:43:25,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:25,253 INFO L93 Difference]: Finished difference Result 28839 states and 41294 transitions. [2024-11-08 16:43:25,253 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:43:25,253 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 68.875) internal successors, (551), 8 states have internal predecessors, (551), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 787 [2024-11-08 16:43:25,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:25,267 INFO L225 Difference]: With dead ends: 28839 [2024-11-08 16:43:25,267 INFO L226 Difference]: Without dead ends: 15822 [2024-11-08 16:43:25,276 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2024-11-08 16:43:25,277 INFO L432 NwaCegarLoop]: 1270 mSDtfsCounter, 1366 mSDsluCounter, 4644 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1370 SdHoareTripleChecker+Valid, 5914 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:25,277 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1370 Valid, 5914 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:43:25,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15822 states. [2024-11-08 16:43:25,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15822 to 15762. [2024-11-08 16:43:25,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15762 states, 15661 states have (on average 1.4237915841900262) internal successors, (22298), 15661 states have internal predecessors, (22298), 99 states have call successors, (99), 1 states have call predecessors, (99), 1 states have return successors, (99), 99 states have call predecessors, (99), 99 states have call successors, (99) [2024-11-08 16:43:25,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15762 states to 15762 states and 22496 transitions. [2024-11-08 16:43:25,538 INFO L78 Accepts]: Start accepts. Automaton has 15762 states and 22496 transitions. Word has length 787 [2024-11-08 16:43:25,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:25,539 INFO L471 AbstractCegarLoop]: Abstraction has 15762 states and 22496 transitions. [2024-11-08 16:43:25,539 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 68.875) internal successors, (551), 8 states have internal predecessors, (551), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:43:25,539 INFO L276 IsEmpty]: Start isEmpty. Operand 15762 states and 22496 transitions. [2024-11-08 16:43:25,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 789 [2024-11-08 16:43:25,553 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:25,554 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:25,554 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-11-08 16:43:25,554 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:25,554 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:25,554 INFO L85 PathProgramCache]: Analyzing trace with hash -1854477586, now seen corresponding path program 1 times [2024-11-08 16:43:25,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:25,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662990161] [2024-11-08 16:43:25,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:25,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:43:28,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,442 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 124 [2024-11-08 16:43:30,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,444 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2024-11-08 16:43:30,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,445 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 167 [2024-11-08 16:43:30,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,447 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 194 [2024-11-08 16:43:30,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,449 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 206 [2024-11-08 16:43:30,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,451 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:43:30,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,452 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 595 [2024-11-08 16:43:30,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,453 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:43:30,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,454 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:43:30,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,455 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-08 16:43:30,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:30,457 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 191 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:43:30,457 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:43:30,458 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662990161] [2024-11-08 16:43:30,458 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1662990161] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:30,458 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:43:30,458 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-08 16:43:30,458 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640665475] [2024-11-08 16:43:30,458 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:30,459 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:43:30,459 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:30,459 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:43:30,460 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:43:30,460 INFO L87 Difference]: Start difference. First operand 15762 states and 22496 transitions. Second operand has 9 states, 9 states have (on average 69.88888888888889) internal successors, (629), 9 states have internal predecessors, (629), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:43:30,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:30,813 INFO L93 Difference]: Finished difference Result 21227 states and 30262 transitions. [2024-11-08 16:43:30,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:43:30,814 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 69.88888888888889) internal successors, (629), 9 states have internal predecessors, (629), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 788 [2024-11-08 16:43:30,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:30,827 INFO L225 Difference]: With dead ends: 21227 [2024-11-08 16:43:30,827 INFO L226 Difference]: Without dead ends: 15950 [2024-11-08 16:43:30,833 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:43:30,833 INFO L432 NwaCegarLoop]: 1760 mSDtfsCounter, 1186 mSDsluCounter, 8847 mSDsCounter, 0 mSdLazyCounter, 184 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1186 SdHoareTripleChecker+Valid, 10607 SdHoareTripleChecker+Invalid, 185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 184 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:30,833 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1186 Valid, 10607 Invalid, 185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 184 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:43:30,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15950 states. [2024-11-08 16:43:31,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15950 to 15924. [2024-11-08 16:43:31,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15924 states, 15823 states have (on average 1.4228022498894015) internal successors, (22513), 15823 states have internal predecessors, (22513), 99 states have call successors, (99), 1 states have call predecessors, (99), 1 states have return successors, (99), 99 states have call predecessors, (99), 99 states have call successors, (99) [2024-11-08 16:43:31,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15924 states to 15924 states and 22711 transitions. [2024-11-08 16:43:31,111 INFO L78 Accepts]: Start accepts. Automaton has 15924 states and 22711 transitions. Word has length 788 [2024-11-08 16:43:31,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:31,111 INFO L471 AbstractCegarLoop]: Abstraction has 15924 states and 22711 transitions. [2024-11-08 16:43:31,111 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 69.88888888888889) internal successors, (629), 9 states have internal predecessors, (629), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:43:31,111 INFO L276 IsEmpty]: Start isEmpty. Operand 15924 states and 22711 transitions. [2024-11-08 16:43:31,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 789 [2024-11-08 16:43:31,127 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:31,127 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:31,127 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81 [2024-11-08 16:43:31,127 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:31,127 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:31,128 INFO L85 PathProgramCache]: Analyzing trace with hash -1810738153, now seen corresponding path program 1 times [2024-11-08 16:43:31,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:31,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734851708] [2024-11-08 16:43:31,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:31,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:43:34,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,074 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 124 [2024-11-08 16:43:38,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,076 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2024-11-08 16:43:38,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,078 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 167 [2024-11-08 16:43:38,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,080 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 194 [2024-11-08 16:43:38,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,082 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 206 [2024-11-08 16:43:38,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,084 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:43:38,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,086 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 595 [2024-11-08 16:43:38,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,086 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:43:38,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,087 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:43:38,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,088 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-08 16:43:38,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:38,091 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 191 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:43:38,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:43:38,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734851708] [2024-11-08 16:43:38,091 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1734851708] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:38,091 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:43:38,091 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2024-11-08 16:43:38,091 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526921614] [2024-11-08 16:43:38,091 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:38,092 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-08 16:43:38,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:38,093 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-08 16:43:38,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2024-11-08 16:43:38,093 INFO L87 Difference]: Start difference. First operand 15924 states and 22711 transitions. Second operand has 14 states, 14 states have (on average 44.92857142857143) internal successors, (629), 14 states have internal predecessors, (629), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:43:39,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:39,084 INFO L93 Difference]: Finished difference Result 22014 states and 31393 transitions. [2024-11-08 16:43:39,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-08 16:43:39,084 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 44.92857142857143) internal successors, (629), 14 states have internal predecessors, (629), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 788 [2024-11-08 16:43:39,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:39,100 INFO L225 Difference]: With dead ends: 22014 [2024-11-08 16:43:39,100 INFO L226 Difference]: Without dead ends: 16833 [2024-11-08 16:43:39,106 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=62, Invalid=318, Unknown=0, NotChecked=0, Total=380 [2024-11-08 16:43:39,106 INFO L432 NwaCegarLoop]: 1838 mSDtfsCounter, 2868 mSDsluCounter, 18624 mSDsCounter, 0 mSdLazyCounter, 846 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2877 SdHoareTripleChecker+Valid, 20462 SdHoareTripleChecker+Invalid, 849 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 846 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:39,107 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2877 Valid, 20462 Invalid, 849 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 846 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-08 16:43:39,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16833 states. [2024-11-08 16:43:39,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16833 to 16635. [2024-11-08 16:43:39,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16635 states, 16534 states have (on average 1.4241562840208055) internal successors, (23547), 16534 states have internal predecessors, (23547), 99 states have call successors, (99), 1 states have call predecessors, (99), 1 states have return successors, (99), 99 states have call predecessors, (99), 99 states have call successors, (99) [2024-11-08 16:43:39,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16635 states to 16635 states and 23745 transitions. [2024-11-08 16:43:39,413 INFO L78 Accepts]: Start accepts. Automaton has 16635 states and 23745 transitions. Word has length 788 [2024-11-08 16:43:39,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:39,413 INFO L471 AbstractCegarLoop]: Abstraction has 16635 states and 23745 transitions. [2024-11-08 16:43:39,414 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 44.92857142857143) internal successors, (629), 14 states have internal predecessors, (629), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:43:39,414 INFO L276 IsEmpty]: Start isEmpty. Operand 16635 states and 23745 transitions. [2024-11-08 16:43:39,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 789 [2024-11-08 16:43:39,438 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:39,438 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:39,438 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82 [2024-11-08 16:43:39,439 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:39,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:39,439 INFO L85 PathProgramCache]: Analyzing trace with hash -147890461, now seen corresponding path program 1 times [2024-11-08 16:43:39,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:39,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461137265] [2024-11-08 16:43:39,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:39,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:43:45,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,150 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:43:50,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,154 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 136 [2024-11-08 16:43:50,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,155 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 165 [2024-11-08 16:43:50,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,156 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 192 [2024-11-08 16:43:50,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,157 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 204 [2024-11-08 16:43:50,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,158 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:43:50,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,159 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 595 [2024-11-08 16:43:50,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,160 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:43:50,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,161 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:43:50,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,161 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-08 16:43:50,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:50,163 INFO L134 CoverageAnalysis]: Checked inductivity of 869 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 856 trivial. 0 not checked. [2024-11-08 16:43:50,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:43:50,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461137265] [2024-11-08 16:43:50,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [461137265] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:50,163 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:43:50,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-08 16:43:50,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469238328] [2024-11-08 16:43:50,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:50,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:43:50,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:50,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:43:50,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:43:50,165 INFO L87 Difference]: Start difference. First operand 16635 states and 23745 transitions. Second operand has 9 states, 9 states have (on average 50.888888888888886) internal successors, (458), 9 states have internal predecessors, (458), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:43:50,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:50,708 INFO L93 Difference]: Finished difference Result 50883 states and 72959 transitions. [2024-11-08 16:43:50,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:43:50,708 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 50.888888888888886) internal successors, (458), 9 states have internal predecessors, (458), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 788 [2024-11-08 16:43:50,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:50,742 INFO L225 Difference]: With dead ends: 50883 [2024-11-08 16:43:50,742 INFO L226 Difference]: Without dead ends: 37225 [2024-11-08 16:43:50,758 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:43:50,758 INFO L432 NwaCegarLoop]: 1064 mSDtfsCounter, 1759 mSDsluCounter, 6504 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1769 SdHoareTripleChecker+Valid, 7568 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:50,758 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1769 Valid, 7568 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:43:50,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37225 states. [2024-11-08 16:43:51,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37225 to 17299. [2024-11-08 16:43:51,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17299 states, 17189 states have (on average 1.4236430275175984) internal successors, (24471), 17189 states have internal predecessors, (24471), 108 states have call successors, (108), 1 states have call predecessors, (108), 1 states have return successors, (108), 108 states have call predecessors, (108), 108 states have call successors, (108) [2024-11-08 16:43:51,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17299 states to 17299 states and 24687 transitions. [2024-11-08 16:43:51,193 INFO L78 Accepts]: Start accepts. Automaton has 17299 states and 24687 transitions. Word has length 788 [2024-11-08 16:43:51,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:51,194 INFO L471 AbstractCegarLoop]: Abstraction has 17299 states and 24687 transitions. [2024-11-08 16:43:51,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 50.888888888888886) internal successors, (458), 9 states have internal predecessors, (458), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-08 16:43:51,194 INFO L276 IsEmpty]: Start isEmpty. Operand 17299 states and 24687 transitions. [2024-11-08 16:43:51,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 789 [2024-11-08 16:43:51,211 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:51,212 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:51,212 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83 [2024-11-08 16:43:51,212 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:51,212 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:51,213 INFO L85 PathProgramCache]: Analyzing trace with hash -950169776, now seen corresponding path program 1 times [2024-11-08 16:43:51,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:51,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117732244] [2024-11-08 16:43:51,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:51,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:43:54,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,813 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:43:56,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,814 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:43:56,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,815 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:43:56,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,816 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:43:56,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,817 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:43:56,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,818 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:43:56,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,819 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 595 [2024-11-08 16:43:56,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,820 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:43:56,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,820 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:43:56,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,821 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-08 16:43:56,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:43:56,823 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 191 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:43:56,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:43:56,823 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117732244] [2024-11-08 16:43:56,823 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117732244] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:43:56,823 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:43:56,823 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-08 16:43:56,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [75840171] [2024-11-08 16:43:56,823 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:43:56,824 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-08 16:43:56,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:43:56,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-08 16:43:56,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:43:56,825 INFO L87 Difference]: Start difference. First operand 17299 states and 24687 transitions. Second operand has 8 states, 8 states have (on average 78.625) internal successors, (629), 8 states have internal predecessors, (629), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:43:57,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:43:57,096 INFO L93 Difference]: Finished difference Result 23526 states and 33475 transitions. [2024-11-08 16:43:57,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-08 16:43:57,096 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 78.625) internal successors, (629), 8 states have internal predecessors, (629), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 788 [2024-11-08 16:43:57,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:43:57,111 INFO L225 Difference]: With dead ends: 23526 [2024-11-08 16:43:57,111 INFO L226 Difference]: Without dead ends: 18444 [2024-11-08 16:43:57,118 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:43:57,118 INFO L432 NwaCegarLoop]: 1064 mSDtfsCounter, 434 mSDsluCounter, 5306 mSDsCounter, 0 mSdLazyCounter, 85 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 434 SdHoareTripleChecker+Valid, 6370 SdHoareTripleChecker+Invalid, 87 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 85 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:43:57,118 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [434 Valid, 6370 Invalid, 87 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 85 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:43:57,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18444 states. [2024-11-08 16:43:57,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18444 to 17377. [2024-11-08 16:43:57,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17377 states, 17267 states have (on average 1.42329298662188) internal successors, (24576), 17267 states have internal predecessors, (24576), 108 states have call successors, (108), 1 states have call predecessors, (108), 1 states have return successors, (108), 108 states have call predecessors, (108), 108 states have call successors, (108) [2024-11-08 16:43:57,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17377 states to 17377 states and 24792 transitions. [2024-11-08 16:43:57,420 INFO L78 Accepts]: Start accepts. Automaton has 17377 states and 24792 transitions. Word has length 788 [2024-11-08 16:43:57,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:43:57,421 INFO L471 AbstractCegarLoop]: Abstraction has 17377 states and 24792 transitions. [2024-11-08 16:43:57,421 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 78.625) internal successors, (629), 8 states have internal predecessors, (629), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:43:57,421 INFO L276 IsEmpty]: Start isEmpty. Operand 17377 states and 24792 transitions. [2024-11-08 16:43:57,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 789 [2024-11-08 16:43:57,439 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:43:57,439 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:43:57,440 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84 [2024-11-08 16:43:57,440 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:43:57,440 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:43:57,440 INFO L85 PathProgramCache]: Analyzing trace with hash 405752647, now seen corresponding path program 1 times [2024-11-08 16:43:57,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:43:57,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951845602] [2024-11-08 16:43:57,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:43:57,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:44:01,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,653 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:44:02,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,654 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:44:02,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,657 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:44:02,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,660 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:44:02,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,663 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:44:02,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,666 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:44:02,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,667 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 595 [2024-11-08 16:44:02,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,668 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:44:02,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,670 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:44:02,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,672 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-08 16:44:02,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:02,674 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 757 trivial. 0 not checked. [2024-11-08 16:44:02,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:44:02,674 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951845602] [2024-11-08 16:44:02,674 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [951845602] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:44:02,674 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:44:02,674 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-08 16:44:02,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387648721] [2024-11-08 16:44:02,675 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:44:02,675 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-08 16:44:02,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:44:02,676 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-08 16:44:02,676 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:44:02,676 INFO L87 Difference]: Start difference. First operand 17377 states and 24792 transitions. Second operand has 4 states, 4 states have (on average 138.0) internal successors, (552), 4 states have internal predecessors, (552), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:44:02,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:44:02,886 INFO L93 Difference]: Finished difference Result 21843 states and 31091 transitions. [2024-11-08 16:44:02,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-08 16:44:02,886 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 138.0) internal successors, (552), 4 states have internal predecessors, (552), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 788 [2024-11-08 16:44:02,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:44:02,899 INFO L225 Difference]: With dead ends: 21843 [2024-11-08 16:44:02,899 INFO L226 Difference]: Without dead ends: 13407 [2024-11-08 16:44:02,906 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-08 16:44:02,907 INFO L432 NwaCegarLoop]: 1071 mSDtfsCounter, 127 mSDsluCounter, 1914 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 2985 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:44:02,907 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [127 Valid, 2985 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:44:02,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13407 states. [2024-11-08 16:44:03,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13407 to 13403. [2024-11-08 16:44:03,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13403 states, 13293 states have (on average 1.4132250056420672) internal successors, (18786), 13293 states have internal predecessors, (18786), 108 states have call successors, (108), 1 states have call predecessors, (108), 1 states have return successors, (108), 108 states have call predecessors, (108), 108 states have call successors, (108) [2024-11-08 16:44:03,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13403 states to 13403 states and 19002 transitions. [2024-11-08 16:44:03,158 INFO L78 Accepts]: Start accepts. Automaton has 13403 states and 19002 transitions. Word has length 788 [2024-11-08 16:44:03,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:44:03,159 INFO L471 AbstractCegarLoop]: Abstraction has 13403 states and 19002 transitions. [2024-11-08 16:44:03,159 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 138.0) internal successors, (552), 4 states have internal predecessors, (552), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:44:03,159 INFO L276 IsEmpty]: Start isEmpty. Operand 13403 states and 19002 transitions. [2024-11-08 16:44:03,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 789 [2024-11-08 16:44:03,172 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:44:03,173 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:44:03,173 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85 [2024-11-08 16:44:03,173 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:44:03,173 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:44:03,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1178644905, now seen corresponding path program 1 times [2024-11-08 16:44:03,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:44:03,173 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1805650896] [2024-11-08 16:44:03,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:44:03,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:44:08,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,605 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-08 16:44:12,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,608 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 138 [2024-11-08 16:44:12,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,611 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 167 [2024-11-08 16:44:12,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,615 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 194 [2024-11-08 16:44:12,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,618 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 206 [2024-11-08 16:44:12,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,621 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 580 [2024-11-08 16:44:12,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,623 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 595 [2024-11-08 16:44:12,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,625 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 624 [2024-11-08 16:44:12,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,627 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 651 [2024-11-08 16:44:12,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,628 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-08 16:44:12,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:12,631 INFO L134 CoverageAnalysis]: Checked inductivity of 869 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 757 trivial. 0 not checked. [2024-11-08 16:44:12,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:44:12,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1805650896] [2024-11-08 16:44:12,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1805650896] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:44:12,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:44:12,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-08 16:44:12,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1791282980] [2024-11-08 16:44:12,632 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:44:12,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-08 16:44:12,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:44:12,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-08 16:44:12,634 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-11-08 16:44:12,634 INFO L87 Difference]: Start difference. First operand 13403 states and 19002 transitions. Second operand has 9 states, 9 states have (on average 61.333333333333336) internal successors, (552), 9 states have internal predecessors, (552), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:44:13,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:44:13,184 INFO L93 Difference]: Finished difference Result 36083 states and 51325 transitions. [2024-11-08 16:44:13,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-08 16:44:13,185 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 61.333333333333336) internal successors, (552), 9 states have internal predecessors, (552), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 788 [2024-11-08 16:44:13,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:44:13,209 INFO L225 Difference]: With dead ends: 36083 [2024-11-08 16:44:13,209 INFO L226 Difference]: Without dead ends: 29775 [2024-11-08 16:44:13,219 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2024-11-08 16:44:13,219 INFO L432 NwaCegarLoop]: 1284 mSDtfsCounter, 1850 mSDsluCounter, 7401 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1859 SdHoareTripleChecker+Valid, 8685 SdHoareTripleChecker+Invalid, 168 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:44:13,219 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1859 Valid, 8685 Invalid, 168 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:44:13,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29775 states. [2024-11-08 16:44:13,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29775 to 13541. [2024-11-08 16:44:13,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13541 states, 13425 states have (on average 1.4116201117318437) internal successors, (18951), 13425 states have internal predecessors, (18951), 114 states have call successors, (114), 1 states have call predecessors, (114), 1 states have return successors, (114), 114 states have call predecessors, (114), 114 states have call successors, (114) [2024-11-08 16:44:13,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13541 states to 13541 states and 19179 transitions. [2024-11-08 16:44:13,523 INFO L78 Accepts]: Start accepts. Automaton has 13541 states and 19179 transitions. Word has length 788 [2024-11-08 16:44:13,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:44:13,524 INFO L471 AbstractCegarLoop]: Abstraction has 13541 states and 19179 transitions. [2024-11-08 16:44:13,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 61.333333333333336) internal successors, (552), 9 states have internal predecessors, (552), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:44:13,524 INFO L276 IsEmpty]: Start isEmpty. Operand 13541 states and 19179 transitions. [2024-11-08 16:44:13,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 790 [2024-11-08 16:44:13,537 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:44:13,537 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:44:13,537 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-11-08 16:44:13,538 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:44:13,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:44:13,538 INFO L85 PathProgramCache]: Analyzing trace with hash 1962520826, now seen corresponding path program 1 times [2024-11-08 16:44:13,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:44:13,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997604555] [2024-11-08 16:44:13,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:44:13,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:44:18,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:44:20,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:44:20,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,195 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:44:20,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:44:20,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,197 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:44:20,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,198 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 581 [2024-11-08 16:44:20,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,199 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 596 [2024-11-08 16:44:20,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 625 [2024-11-08 16:44:20,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,201 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 652 [2024-11-08 16:44:20,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,202 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 664 [2024-11-08 16:44:20,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:20,204 INFO L134 CoverageAnalysis]: Checked inductivity of 867 backedges. 185 proven. 0 refuted. 0 times theorem prover too weak. 682 trivial. 0 not checked. [2024-11-08 16:44:20,204 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:44:20,204 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997604555] [2024-11-08 16:44:20,204 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [997604555] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:44:20,204 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:44:20,204 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-08 16:44:20,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [349459618] [2024-11-08 16:44:20,204 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:44:20,205 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-08 16:44:20,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:44:20,205 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-08 16:44:20,205 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-08 16:44:20,206 INFO L87 Difference]: Start difference. First operand 13541 states and 19179 transitions. Second operand has 6 states, 6 states have (on average 104.5) internal successors, (627), 6 states have internal predecessors, (627), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:44:20,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:44:20,559 INFO L93 Difference]: Finished difference Result 28497 states and 40216 transitions. [2024-11-08 16:44:20,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:44:20,560 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 104.5) internal successors, (627), 6 states have internal predecessors, (627), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 789 [2024-11-08 16:44:20,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:44:20,580 INFO L225 Difference]: With dead ends: 28497 [2024-11-08 16:44:20,580 INFO L226 Difference]: Without dead ends: 23361 [2024-11-08 16:44:20,588 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:44:20,589 INFO L432 NwaCegarLoop]: 1069 mSDtfsCounter, 755 mSDsluCounter, 4144 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 755 SdHoareTripleChecker+Valid, 5213 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:44:20,589 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [755 Valid, 5213 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:44:20,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23361 states. [2024-11-08 16:44:21,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23361 to 21209. [2024-11-08 16:44:21,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21209 states, 21003 states have (on average 1.4143693758034566) internal successors, (29706), 21003 states have internal predecessors, (29706), 204 states have call successors, (204), 1 states have call predecessors, (204), 1 states have return successors, (204), 204 states have call predecessors, (204), 204 states have call successors, (204) [2024-11-08 16:44:21,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21209 states to 21209 states and 30114 transitions. [2024-11-08 16:44:21,174 INFO L78 Accepts]: Start accepts. Automaton has 21209 states and 30114 transitions. Word has length 789 [2024-11-08 16:44:21,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:44:21,175 INFO L471 AbstractCegarLoop]: Abstraction has 21209 states and 30114 transitions. [2024-11-08 16:44:21,175 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 104.5) internal successors, (627), 6 states have internal predecessors, (627), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:44:21,175 INFO L276 IsEmpty]: Start isEmpty. Operand 21209 states and 30114 transitions. [2024-11-08 16:44:21,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 791 [2024-11-08 16:44:21,204 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:44:21,204 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:44:21,205 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-11-08 16:44:21,205 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:44:21,205 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:44:21,205 INFO L85 PathProgramCache]: Analyzing trace with hash -1128985411, now seen corresponding path program 1 times [2024-11-08 16:44:21,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:44:21,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933260580] [2024-11-08 16:44:21,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:44:21,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:44:27,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,667 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:44:31,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,669 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:44:31,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,670 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:44:31,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,672 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:44:31,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,673 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:44:31,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,674 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 582 [2024-11-08 16:44:31,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,676 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 597 [2024-11-08 16:44:31,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,679 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 626 [2024-11-08 16:44:31,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,681 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:44:31,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,684 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 665 [2024-11-08 16:44:31,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:31,688 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 119 proven. 73 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:44:31,688 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:44:31,688 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933260580] [2024-11-08 16:44:31,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [933260580] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:44:31,689 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [165291825] [2024-11-08 16:44:31,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:44:31,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:44:31,689 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:44:31,693 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:44:31,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2024-11-08 16:44:43,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:44:43,548 INFO L255 TraceCheckSpWp]: Trace formula consists of 3789 conjuncts, 155 conjuncts are in the unsatisfiable core [2024-11-08 16:44:43,564 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:44:47,298 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 286 proven. 42 refuted. 0 times theorem prover too weak. 540 trivial. 0 not checked. [2024-11-08 16:44:47,298 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:44:49,929 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:44:49,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [165291825] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-08 16:44:49,929 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:44:49,929 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [11, 28] total 51 [2024-11-08 16:44:49,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1893901534] [2024-11-08 16:44:49,930 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:44:49,930 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-11-08 16:44:49,930 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:44:49,931 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-11-08 16:44:49,931 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=187, Invalid=2363, Unknown=0, NotChecked=0, Total=2550 [2024-11-08 16:44:49,931 INFO L87 Difference]: Start difference. First operand 21209 states and 30114 transitions. Second operand has 16 states, 16 states have (on average 39.4375) internal successors, (631), 16 states have internal predecessors, (631), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:44:56,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:44:56,742 INFO L93 Difference]: Finished difference Result 29592 states and 41975 transitions. [2024-11-08 16:44:56,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-11-08 16:44:56,743 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 39.4375) internal successors, (631), 16 states have internal predecessors, (631), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 790 [2024-11-08 16:44:56,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:44:56,759 INFO L225 Difference]: With dead ends: 29592 [2024-11-08 16:44:56,760 INFO L226 Difference]: Without dead ends: 25547 [2024-11-08 16:44:56,763 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1628 GetRequests, 1568 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1049 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=277, Invalid=3505, Unknown=0, NotChecked=0, Total=3782 [2024-11-08 16:44:56,764 INFO L432 NwaCegarLoop]: 1692 mSDtfsCounter, 1537 mSDsluCounter, 16667 mSDsCounter, 0 mSdLazyCounter, 6447 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1542 SdHoareTripleChecker+Valid, 18359 SdHoareTripleChecker+Invalid, 6454 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 6447 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.7s IncrementalHoareTripleChecker+Time [2024-11-08 16:44:56,764 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1542 Valid, 18359 Invalid, 6454 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [7 Valid, 6447 Invalid, 0 Unknown, 0 Unchecked, 5.7s Time] [2024-11-08 16:44:56,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25547 states. [2024-11-08 16:44:57,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25547 to 21481. [2024-11-08 16:44:57,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21481 states, 21271 states have (on average 1.4133797188660617) internal successors, (30064), 21271 states have internal predecessors, (30064), 208 states have call successors, (208), 1 states have call predecessors, (208), 1 states have return successors, (208), 208 states have call predecessors, (208), 208 states have call successors, (208) [2024-11-08 16:44:57,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21481 states to 21481 states and 30480 transitions. [2024-11-08 16:44:57,260 INFO L78 Accepts]: Start accepts. Automaton has 21481 states and 30480 transitions. Word has length 790 [2024-11-08 16:44:57,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:44:57,261 INFO L471 AbstractCegarLoop]: Abstraction has 21481 states and 30480 transitions. [2024-11-08 16:44:57,261 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 39.4375) internal successors, (631), 16 states have internal predecessors, (631), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:44:57,261 INFO L276 IsEmpty]: Start isEmpty. Operand 21481 states and 30480 transitions. [2024-11-08 16:44:57,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 791 [2024-11-08 16:44:57,277 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:44:57,278 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:44:57,313 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Ended with exit code 0 [2024-11-08 16:44:57,478 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable88 [2024-11-08 16:44:57,478 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:44:57,479 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:44:57,479 INFO L85 PathProgramCache]: Analyzing trace with hash -1148986595, now seen corresponding path program 1 times [2024-11-08 16:44:57,479 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:44:57,479 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722027021] [2024-11-08 16:44:57,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:44:57,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:45:02,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,441 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:45:04,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,443 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:45:04,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,445 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:45:04,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,446 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:45:04,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,448 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:45:04,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,450 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 582 [2024-11-08 16:45:04,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,452 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 597 [2024-11-08 16:45:04,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,454 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 626 [2024-11-08 16:45:04,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,457 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:45:04,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,460 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 665 [2024-11-08 16:45:04,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:04,463 INFO L134 CoverageAnalysis]: Checked inductivity of 866 backedges. 126 proven. 3 refuted. 0 times theorem prover too weak. 737 trivial. 0 not checked. [2024-11-08 16:45:04,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:45:04,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722027021] [2024-11-08 16:45:04,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722027021] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:45:04,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [980269642] [2024-11-08 16:45:04,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:45:04,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:45:04,465 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:45:04,466 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:45:04,468 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2024-11-08 16:45:16,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:16,061 INFO L255 TraceCheckSpWp]: Trace formula consists of 3789 conjuncts, 145 conjuncts are in the unsatisfiable core [2024-11-08 16:45:16,081 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:45:19,714 INFO L134 CoverageAnalysis]: Checked inductivity of 866 backedges. 154 proven. 105 refuted. 0 times theorem prover too weak. 607 trivial. 0 not checked. [2024-11-08 16:45:19,715 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:45:29,579 INFO L134 CoverageAnalysis]: Checked inductivity of 866 backedges. 216 proven. 10 refuted. 0 times theorem prover too weak. 640 trivial. 0 not checked. [2024-11-08 16:45:29,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [980269642] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:45:29,579 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:45:29,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 31, 30] total 64 [2024-11-08 16:45:29,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979848086] [2024-11-08 16:45:29,580 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:45:29,581 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 64 states [2024-11-08 16:45:29,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:45:29,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2024-11-08 16:45:29,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=911, Invalid=3121, Unknown=0, NotChecked=0, Total=4032 [2024-11-08 16:45:29,583 INFO L87 Difference]: Start difference. First operand 21481 states and 30480 transitions. Second operand has 64 states, 64 states have (on average 25.03125) internal successors, (1602), 64 states have internal predecessors, (1602), 8 states have call successors, (25), 2 states have call predecessors, (25), 2 states have return successors, (25), 8 states have call predecessors, (25), 8 states have call successors, (25) [2024-11-08 16:45:37,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:45:37,902 INFO L93 Difference]: Finished difference Result 48168 states and 68231 transitions. [2024-11-08 16:45:37,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2024-11-08 16:45:37,903 INFO L78 Accepts]: Start accepts. Automaton has has 64 states, 64 states have (on average 25.03125) internal successors, (1602), 64 states have internal predecessors, (1602), 8 states have call successors, (25), 2 states have call predecessors, (25), 2 states have return successors, (25), 8 states have call predecessors, (25), 8 states have call successors, (25) Word has length 790 [2024-11-08 16:45:37,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:45:37,933 INFO L225 Difference]: With dead ends: 48168 [2024-11-08 16:45:37,933 INFO L226 Difference]: Without dead ends: 33160 [2024-11-08 16:45:37,947 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1634 GetRequests, 1543 SyntacticMatches, 1 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2303 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=1880, Invalid=6492, Unknown=0, NotChecked=0, Total=8372 [2024-11-08 16:45:37,947 INFO L432 NwaCegarLoop]: 925 mSDtfsCounter, 5087 mSDsluCounter, 21137 mSDsCounter, 0 mSdLazyCounter, 11444 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5092 SdHoareTripleChecker+Valid, 22062 SdHoareTripleChecker+Invalid, 11454 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 11444 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.4s IncrementalHoareTripleChecker+Time [2024-11-08 16:45:37,947 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [5092 Valid, 22062 Invalid, 11454 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [10 Valid, 11444 Invalid, 0 Unknown, 0 Unchecked, 6.4s Time] [2024-11-08 16:45:37,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33160 states. [2024-11-08 16:45:38,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33160 to 21376. [2024-11-08 16:45:38,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21376 states, 21166 states have (on average 1.4121232164792592) internal successors, (29889), 21166 states have internal predecessors, (29889), 208 states have call successors, (208), 1 states have call predecessors, (208), 1 states have return successors, (208), 208 states have call predecessors, (208), 208 states have call successors, (208) [2024-11-08 16:45:38,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21376 states to 21376 states and 30305 transitions. [2024-11-08 16:45:38,408 INFO L78 Accepts]: Start accepts. Automaton has 21376 states and 30305 transitions. Word has length 790 [2024-11-08 16:45:38,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:45:38,409 INFO L471 AbstractCegarLoop]: Abstraction has 21376 states and 30305 transitions. [2024-11-08 16:45:38,409 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 64 states, 64 states have (on average 25.03125) internal successors, (1602), 64 states have internal predecessors, (1602), 8 states have call successors, (25), 2 states have call predecessors, (25), 2 states have return successors, (25), 8 states have call predecessors, (25), 8 states have call successors, (25) [2024-11-08 16:45:38,409 INFO L276 IsEmpty]: Start isEmpty. Operand 21376 states and 30305 transitions. [2024-11-08 16:45:38,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 792 [2024-11-08 16:45:38,439 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:45:38,440 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:45:38,482 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Forceful destruction successful, exit code 0 [2024-11-08 16:45:38,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable89 [2024-11-08 16:45:38,644 INFO L396 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:45:38,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:45:38,645 INFO L85 PathProgramCache]: Analyzing trace with hash 1279831021, now seen corresponding path program 1 times [2024-11-08 16:45:38,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:45:38,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341359036] [2024-11-08 16:45:38,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:45:38,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:45:45,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,002 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:45:49,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,004 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:45:49,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,006 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:45:49,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,007 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:45:49,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,009 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:45:49,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,011 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 581 [2024-11-08 16:45:49,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,013 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 596 [2024-11-08 16:45:49,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,015 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 625 [2024-11-08 16:45:49,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,017 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 652 [2024-11-08 16:45:49,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,019 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 664 [2024-11-08 16:45:49,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:45:49,022 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 121 proven. 74 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:45:49,022 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:45:49,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1341359036] [2024-11-08 16:45:49,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1341359036] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:45:49,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1236572112] [2024-11-08 16:45:49,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:45:49,022 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:45:49,022 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:45:49,023 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:45:49,025 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2024-11-08 16:46:04,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:04,412 INFO L255 TraceCheckSpWp]: Trace formula consists of 3790 conjuncts, 158 conjuncts are in the unsatisfiable core [2024-11-08 16:46:04,429 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:46:09,826 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 160 proven. 107 refuted. 0 times theorem prover too weak. 604 trivial. 0 not checked. [2024-11-08 16:46:09,826 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:46:19,148 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 117 proven. 114 refuted. 0 times theorem prover too weak. 640 trivial. 0 not checked. [2024-11-08 16:46:19,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1236572112] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:46:19,149 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-08 16:46:19,149 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 27, 29] total 63 [2024-11-08 16:46:19,149 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1003134864] [2024-11-08 16:46:19,149 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-08 16:46:19,151 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2024-11-08 16:46:19,151 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:46:19,152 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2024-11-08 16:46:19,153 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=527, Invalid=3379, Unknown=0, NotChecked=0, Total=3906 [2024-11-08 16:46:19,153 INFO L87 Difference]: Start difference. First operand 21376 states and 30305 transitions. Second operand has 63 states, 63 states have (on average 26.841269841269842) internal successors, (1691), 63 states have internal predecessors, (1691), 11 states have call successors, (30), 2 states have call predecessors, (30), 2 states have return successors, (30), 11 states have call predecessors, (30), 11 states have call successors, (30) [2024-11-08 16:46:36,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:46:36,046 INFO L93 Difference]: Finished difference Result 30083 states and 42477 transitions. [2024-11-08 16:46:36,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2024-11-08 16:46:36,047 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 63 states have (on average 26.841269841269842) internal successors, (1691), 63 states have internal predecessors, (1691), 11 states have call successors, (30), 2 states have call predecessors, (30), 2 states have return successors, (30), 11 states have call predecessors, (30), 11 states have call successors, (30) Word has length 791 [2024-11-08 16:46:36,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:46:36,064 INFO L225 Difference]: With dead ends: 30083 [2024-11-08 16:46:36,064 INFO L226 Difference]: Without dead ends: 25769 [2024-11-08 16:46:36,069 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1678 GetRequests, 1554 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3526 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=2811, Invalid=12939, Unknown=0, NotChecked=0, Total=15750 [2024-11-08 16:46:36,069 INFO L432 NwaCegarLoop]: 1262 mSDtfsCounter, 3418 mSDsluCounter, 33265 mSDsCounter, 0 mSdLazyCounter, 21315 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 11.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3423 SdHoareTripleChecker+Valid, 34527 SdHoareTripleChecker+Invalid, 21361 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 21315 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 12.7s IncrementalHoareTripleChecker+Time [2024-11-08 16:46:36,070 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3423 Valid, 34527 Invalid, 21361 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [46 Valid, 21315 Invalid, 0 Unknown, 0 Unchecked, 12.7s Time] [2024-11-08 16:46:36,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25769 states. [2024-11-08 16:46:36,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25769 to 22035. [2024-11-08 16:46:36,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22035 states, 21806 states have (on average 1.4108043657708886) internal successors, (30764), 21806 states have internal predecessors, (30764), 227 states have call successors, (227), 1 states have call predecessors, (227), 1 states have return successors, (227), 227 states have call predecessors, (227), 227 states have call successors, (227) [2024-11-08 16:46:36,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22035 states to 22035 states and 31218 transitions. [2024-11-08 16:46:36,472 INFO L78 Accepts]: Start accepts. Automaton has 22035 states and 31218 transitions. Word has length 791 [2024-11-08 16:46:36,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:46:36,473 INFO L471 AbstractCegarLoop]: Abstraction has 22035 states and 31218 transitions. [2024-11-08 16:46:36,473 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 26.841269841269842) internal successors, (1691), 63 states have internal predecessors, (1691), 11 states have call successors, (30), 2 states have call predecessors, (30), 2 states have return successors, (30), 11 states have call predecessors, (30), 11 states have call successors, (30) [2024-11-08 16:46:36,473 INFO L276 IsEmpty]: Start isEmpty. Operand 22035 states and 31218 transitions. [2024-11-08 16:46:36,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 793 [2024-11-08 16:46:36,493 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:46:36,493 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:46:36,533 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Forceful destruction successful, exit code 0 [2024-11-08 16:46:36,694 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90,42 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:46:36,694 INFO L396 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:46:36,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:46:36,695 INFO L85 PathProgramCache]: Analyzing trace with hash 393837440, now seen corresponding path program 1 times [2024-11-08 16:46:36,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:46:36,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840089669] [2024-11-08 16:46:36,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:46:36,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:46:42,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:47,995 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:46:47,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:47,996 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:46:47,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:47,998 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:46:47,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:47,999 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:46:47,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,000 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:46:48,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,001 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 582 [2024-11-08 16:46:48,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,003 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 597 [2024-11-08 16:46:48,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,006 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 626 [2024-11-08 16:46:48,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,008 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:46:48,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,010 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 667 [2024-11-08 16:46:48,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:46:48,014 INFO L134 CoverageAnalysis]: Checked inductivity of 868 backedges. 192 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:46:48,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:46:48,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840089669] [2024-11-08 16:46:48,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [840089669] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:46:48,014 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:46:48,015 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-08 16:46:48,015 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [291236708] [2024-11-08 16:46:48,015 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:46:48,015 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-08 16:46:48,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:46:48,017 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-08 16:46:48,017 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:46:48,017 INFO L87 Difference]: Start difference. First operand 22035 states and 31218 transitions. Second operand has 10 states, 10 states have (on average 63.3) internal successors, (633), 10 states have internal predecessors, (633), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:46:48,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:46:48,737 INFO L93 Difference]: Finished difference Result 31835 states and 45032 transitions. [2024-11-08 16:46:48,737 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-08 16:46:48,738 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 63.3) internal successors, (633), 10 states have internal predecessors, (633), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 792 [2024-11-08 16:46:48,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:46:48,763 INFO L225 Difference]: With dead ends: 31835 [2024-11-08 16:46:48,763 INFO L226 Difference]: Without dead ends: 26874 [2024-11-08 16:46:48,772 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2024-11-08 16:46:48,772 INFO L432 NwaCegarLoop]: 1960 mSDtfsCounter, 1200 mSDsluCounter, 10965 mSDsCounter, 0 mSdLazyCounter, 185 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1205 SdHoareTripleChecker+Valid, 12925 SdHoareTripleChecker+Invalid, 187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 185 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:46:48,772 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1205 Valid, 12925 Invalid, 187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 185 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:46:48,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26874 states. [2024-11-08 16:46:49,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26874 to 21928. [2024-11-08 16:46:49,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21928 states, 21701 states have (on average 1.4108566425510345) internal successors, (30617), 21701 states have internal predecessors, (30617), 225 states have call successors, (225), 1 states have call predecessors, (225), 1 states have return successors, (225), 225 states have call predecessors, (225), 225 states have call successors, (225) [2024-11-08 16:46:49,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21928 states to 21928 states and 31067 transitions. [2024-11-08 16:46:49,396 INFO L78 Accepts]: Start accepts. Automaton has 21928 states and 31067 transitions. Word has length 792 [2024-11-08 16:46:49,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:46:49,397 INFO L471 AbstractCegarLoop]: Abstraction has 21928 states and 31067 transitions. [2024-11-08 16:46:49,397 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 63.3) internal successors, (633), 10 states have internal predecessors, (633), 2 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:46:49,397 INFO L276 IsEmpty]: Start isEmpty. Operand 21928 states and 31067 transitions. [2024-11-08 16:46:49,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 793 [2024-11-08 16:46:49,420 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:46:49,421 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:46:49,421 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91 [2024-11-08 16:46:49,421 INFO L396 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:46:49,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:46:49,422 INFO L85 PathProgramCache]: Analyzing trace with hash 2111743311, now seen corresponding path program 1 times [2024-11-08 16:46:49,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:46:49,422 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559197018] [2024-11-08 16:46:49,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:46:49,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:46:56,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 121 [2024-11-08 16:47:02,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,875 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 137 [2024-11-08 16:47:02,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,876 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 166 [2024-11-08 16:47:02,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,877 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 193 [2024-11-08 16:47:02,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,878 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 205 [2024-11-08 16:47:02,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,879 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 582 [2024-11-08 16:47:02,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,881 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 597 [2024-11-08 16:47:02,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,884 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 626 [2024-11-08 16:47:02,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,888 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 653 [2024-11-08 16:47:02,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,891 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 665 [2024-11-08 16:47:02,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:02,896 INFO L134 CoverageAnalysis]: Checked inductivity of 871 backedges. 195 proven. 0 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2024-11-08 16:47:02,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-08 16:47:02,897 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1559197018] [2024-11-08 16:47:02,897 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1559197018] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:02,897 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:02,897 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-08 16:47:02,897 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468755886] [2024-11-08 16:47:02,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:02,898 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-08 16:47:02,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-08 16:47:02,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-08 16:47:02,899 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-11-08 16:47:02,900 INFO L87 Difference]: Start difference. First operand 21928 states and 31067 transitions. Second operand has 10 states, 10 states have (on average 63.3) internal successors, (633), 10 states have internal predecessors, (633), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:47:03,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:03,725 INFO L93 Difference]: Finished difference Result 35228 states and 49575 transitions. [2024-11-08 16:47:03,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-08 16:47:03,726 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 63.3) internal successors, (633), 10 states have internal predecessors, (633), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 792 [2024-11-08 16:47:03,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:03,757 INFO L225 Difference]: With dead ends: 35228 [2024-11-08 16:47:03,757 INFO L226 Difference]: Without dead ends: 30374 [2024-11-08 16:47:03,767 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2024-11-08 16:47:03,767 INFO L432 NwaCegarLoop]: 1580 mSDtfsCounter, 1675 mSDsluCounter, 10904 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1679 SdHoareTripleChecker+Valid, 12484 SdHoareTripleChecker+Invalid, 167 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:03,768 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1679 Valid, 12484 Invalid, 167 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:47:03,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30374 states. [2024-11-08 16:47:04,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30374 to 24237. [2024-11-08 16:47:04,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24237 states, 23993 states have (on average 1.4031175759596548) internal successors, (33665), 23993 states have internal predecessors, (33665), 242 states have call successors, (242), 1 states have call predecessors, (242), 1 states have return successors, (242), 242 states have call predecessors, (242), 242 states have call successors, (242) [2024-11-08 16:47:04,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24237 states to 24237 states and 34149 transitions. [2024-11-08 16:47:04,386 INFO L78 Accepts]: Start accepts. Automaton has 24237 states and 34149 transitions. Word has length 792 [2024-11-08 16:47:04,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:04,387 INFO L471 AbstractCegarLoop]: Abstraction has 24237 states and 34149 transitions. [2024-11-08 16:47:04,387 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 63.3) internal successors, (633), 10 states have internal predecessors, (633), 3 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-08 16:47:04,387 INFO L276 IsEmpty]: Start isEmpty. Operand 24237 states and 34149 transitions. [2024-11-08 16:47:04,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 794 [2024-11-08 16:47:04,409 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:04,409 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:04,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable92 [2024-11-08 16:47:04,410 INFO L396 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:04,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:04,410 INFO L85 PathProgramCache]: Analyzing trace with hash 563893378, now seen corresponding path program 1 times [2024-11-08 16:47:04,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-08 16:47:04,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647512264] [2024-11-08 16:47:04,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:04,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-08 16:47:16,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:47:16,737 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-08 16:47:28,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-08 16:47:29,321 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-08 16:47:29,321 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-08 16:47:29,322 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-08 16:47:29,325 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93 [2024-11-08 16:47:29,328 INFO L407 BasicCegarLoop]: Path program histogram: [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:29,711 WARN L290 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2024-11-08 16:47:29,712 WARN L290 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2024-11-08 16:47:29,844 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-08 16:47:29,846 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 08.11 04:47:29 BoogieIcfgContainer [2024-11-08 16:47:29,849 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-08 16:47:29,850 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-08 16:47:29,850 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-08 16:47:29,850 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-08 16:47:29,851 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:36:08" (3/4) ... [2024-11-08 16:47:29,854 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-08 16:47:29,855 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-08 16:47:29,856 INFO L158 Benchmark]: Toolchain (without parser) took 688387.76ms. Allocated memory was 130.0MB in the beginning and 3.4GB in the end (delta: 3.3GB). Free memory was 87.3MB in the beginning and 2.6GB in the end (delta: -2.5GB). Peak memory consumption was 798.6MB. Max. memory is 16.1GB. [2024-11-08 16:47:29,856 INFO L158 Benchmark]: CDTParser took 0.39ms. Allocated memory is still 130.0MB. Free memory was 70.7MB in the beginning and 70.5MB in the end (delta: 142.6kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-08 16:47:29,856 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1127.73ms. Allocated memory was 130.0MB in the beginning and 161.5MB in the end (delta: 31.5MB). Free memory was 87.0MB in the beginning and 110.5MB in the end (delta: -23.4MB). Peak memory consumption was 37.6MB. Max. memory is 16.1GB. [2024-11-08 16:47:29,856 INFO L158 Benchmark]: Boogie Procedure Inliner took 588.33ms. Allocated memory is still 161.5MB. Free memory was 109.8MB in the beginning and 81.2MB in the end (delta: 28.6MB). Peak memory consumption was 50.2MB. Max. memory is 16.1GB. [2024-11-08 16:47:29,857 INFO L158 Benchmark]: Boogie Preprocessor took 724.30ms. Allocated memory was 161.5MB in the beginning and 268.4MB in the end (delta: 107.0MB). Free memory was 81.2MB in the beginning and 177.3MB in the end (delta: -96.1MB). Peak memory consumption was 36.4MB. Max. memory is 16.1GB. [2024-11-08 16:47:29,857 INFO L158 Benchmark]: RCFGBuilder took 4251.09ms. Allocated memory was 268.4MB in the beginning and 388.0MB in the end (delta: 119.5MB). Free memory was 177.3MB in the beginning and 242.7MB in the end (delta: -65.5MB). Peak memory consumption was 94.0MB. Max. memory is 16.1GB. [2024-11-08 16:47:29,857 INFO L158 Benchmark]: TraceAbstraction took 681675.59ms. Allocated memory was 388.0MB in the beginning and 3.4GB in the end (delta: 3.0GB). Free memory was 242.7MB in the beginning and 2.6GB in the end (delta: -2.3GB). Peak memory consumption was 1.8GB. Max. memory is 16.1GB. [2024-11-08 16:47:29,857 INFO L158 Benchmark]: Witness Printer took 5.79ms. Allocated memory is still 3.4GB. Free memory is still 2.6GB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-08 16:47:29,857 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.39ms. Allocated memory is still 130.0MB. Free memory was 70.7MB in the beginning and 70.5MB in the end (delta: 142.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1127.73ms. Allocated memory was 130.0MB in the beginning and 161.5MB in the end (delta: 31.5MB). Free memory was 87.0MB in the beginning and 110.5MB in the end (delta: -23.4MB). Peak memory consumption was 37.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 588.33ms. Allocated memory is still 161.5MB. Free memory was 109.8MB in the beginning and 81.2MB in the end (delta: 28.6MB). Peak memory consumption was 50.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 724.30ms. Allocated memory was 161.5MB in the beginning and 268.4MB in the end (delta: 107.0MB). Free memory was 81.2MB in the beginning and 177.3MB in the end (delta: -96.1MB). Peak memory consumption was 36.4MB. Max. memory is 16.1GB. * RCFGBuilder took 4251.09ms. Allocated memory was 268.4MB in the beginning and 388.0MB in the end (delta: 119.5MB). Free memory was 177.3MB in the beginning and 242.7MB in the end (delta: -65.5MB). Peak memory consumption was 94.0MB. Max. memory is 16.1GB. * TraceAbstraction took 681675.59ms. Allocated memory was 388.0MB in the beginning and 3.4GB in the end (delta: 3.0GB). Free memory was 242.7MB in the beginning and 2.6GB in the end (delta: -2.3GB). Peak memory consumption was 1.8GB. Max. memory is 16.1GB. * Witness Printer took 5.79ms. Allocated memory is still 3.4GB. Free memory is still 2.6GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 403, overapproximation of bitwiseAnd at line 408. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 16); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (16 - 1); [L32] const SORT_5 mask_SORT_5 = (SORT_5)-1 >> (sizeof(SORT_5) * 8 - 2); [L33] const SORT_5 msb_SORT_5 = (SORT_5)1 << (2 - 1); [L35] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 8); [L36] const SORT_11 msb_SORT_11 = (SORT_11)1 << (8 - 1); [L38] const SORT_12 mask_SORT_12 = (SORT_12)-1 >> (sizeof(SORT_12) * 8 - 3); [L39] const SORT_12 msb_SORT_12 = (SORT_12)1 << (3 - 1); [L42] const SORT_15 mask_SORT_15 = (SORT_15)-1 >> (sizeof(SORT_15) * 8 - 4); [L43] const SORT_15 msb_SORT_15 = (SORT_15)1 << (4 - 1); [L45] const SORT_36 mask_SORT_36 = (SORT_36)-1 >> (sizeof(SORT_36) * 8 - 5); [L46] const SORT_36 msb_SORT_36 = (SORT_36)1 << (5 - 1); [L48] const SORT_38 mask_SORT_38 = (SORT_38)-1 >> (sizeof(SORT_38) * 8 - 6); [L49] const SORT_38 msb_SORT_38 = (SORT_38)1 << (6 - 1); [L51] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 7); [L52] const SORT_40 msb_SORT_40 = (SORT_40)1 << (7 - 1); [L54] const SORT_229 mask_SORT_229 = (SORT_229)-1 >> (sizeof(SORT_229) * 8 - 32); [L55] const SORT_229 msb_SORT_229 = (SORT_229)1 << (32 - 1); [L57] const SORT_15 var_27 = 8; [L58] const SORT_15 var_99 = 0; [L59] const SORT_1 var_109 = 1; [L60] const SORT_1 var_110 = 0; [L61] const SORT_11 var_183 = 0; [L62] const SORT_229 var_230 = 2; [L63] const SORT_11 var_410 = 255; [L65] SORT_1 input_2; [L66] SORT_3 input_4; [L67] SORT_5 input_6; [L68] SORT_3 input_7; [L69] SORT_5 input_8; [L70] SORT_1 input_9; [L71] SORT_1 input_10; [L73] SORT_13 state_14; [L74] unsigned char i = 0; VAL [i=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=2, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=2, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=3, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=3, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=4, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=4, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=5, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=5, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=6, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=6, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=7, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND FALSE !(i < (1 << 3)) [L74] COND TRUE i < (1 << 3) [L74] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=7, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] state_14[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L74] ++i VAL [i=8, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L74] COND TRUE i < (1 << 3) [L75] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L75] SORT_15 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L76] SORT_15 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L77] SORT_11 state_26 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L78] SORT_1 state_31 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] SORT_13 state_44; [L80] unsigned char i = 0; VAL [i=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=2, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=2, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=3, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=3, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=4, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=4, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=5, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=5, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=6, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=6, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=7, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND FALSE !(i < (1 << 3)) [L80] COND TRUE i < (1 << 3) [L80] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [i=7, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] state_44[i] = __VERIFIER_nondet_uchar() & mask_SORT_11 [L80] ++i VAL [i=8, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L80] COND TRUE i < (1 << 3) [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L81] SORT_15 state_45 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L82] SORT_15 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L83] SORT_11 state_55 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L84] SORT_1 state_85 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L85] SORT_1 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_15 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L86] SORT_15 state_89 = __VERIFIER_nondet_uchar() & mask_SORT_15; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L87] SORT_11 state_105 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L88] SORT_1 state_111 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L89] SORT_1 state_333 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L90] SORT_1 state_334 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L91] SORT_1 state_335 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L92] SORT_1 state_336 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L93] SORT_1 state_337 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L94] SORT_1 state_338 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L95] SORT_1 state_339 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L96] SORT_1 state_340 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] SORT_1 init_112_arg_1 = var_109; [L99] state_111 = init_112_arg_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L102] input_2 = __VERIFIER_nondet_uchar() [L103] input_4 = __VERIFIER_nondet_ushort() [L104] input_6 = __VERIFIER_nondet_uchar() [L105] input_7 = __VERIFIER_nondet_ushort() [L106] input_8 = __VERIFIER_nondet_uchar() [L107] input_9 = __VERIFIER_nondet_uchar() [L108] EXPR input_9 & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L108] input_9 = input_9 & mask_SORT_1 [L109] input_10 = __VERIFIER_nondet_uchar() [L111] SORT_15 var_52_arg_0 = state_48; [L112] SORT_15 var_52_arg_1 = state_45; [L113] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L114] SORT_1 var_117_arg_0 = var_52; [L115] SORT_1 var_117 = ~var_117_arg_0; [L116] SORT_5 var_51_arg_0 = input_8; [L117] SORT_1 var_51 = var_51_arg_0 >> 0; [L118] SORT_1 var_118_arg_0 = var_51; [L119] SORT_1 var_118 = ~var_118_arg_0; [L120] SORT_1 var_119_arg_0 = var_117; [L121] SORT_1 var_119_arg_1 = var_118; VAL [input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_119_arg_0=-2, var_119_arg_1=-2, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L122] EXPR var_119_arg_0 | var_119_arg_1 VAL [input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L122] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L123] SORT_1 var_120_arg_0 = var_109; [L124] SORT_1 var_120 = ~var_120_arg_0; [L125] SORT_1 var_121_arg_0 = var_119; [L126] SORT_1 var_121_arg_1 = var_120; VAL [input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_121_arg_0=254, var_121_arg_1=-2, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L127] EXPR var_121_arg_0 | var_121_arg_1 VAL [input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L127] SORT_1 var_121 = var_121_arg_0 | var_121_arg_1; [L128] EXPR var_121 & mask_SORT_1 VAL [input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L128] var_121 = var_121 & mask_SORT_1 [L129] SORT_1 constr_122_arg_0 = var_121; VAL [constr_122_arg_0=1, input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L130] CALL assume_abort_if_not(constr_122_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L130] RET assume_abort_if_not(constr_122_arg_0) VAL [constr_122_arg_0=1, input_8=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L131] SORT_15 var_23_arg_0 = state_19; [L132] SORT_15 var_23_arg_1 = state_16; [L133] SORT_1 var_23 = var_23_arg_0 == var_23_arg_1; [L134] SORT_1 var_123_arg_0 = var_23; [L135] SORT_1 var_123 = ~var_123_arg_0; [L136] SORT_5 var_22_arg_0 = input_8; [L137] SORT_1 var_22 = var_22_arg_0 >> 1; [L138] SORT_1 var_124_arg_0 = var_22; [L139] SORT_1 var_124 = ~var_124_arg_0; [L140] SORT_1 var_125_arg_0 = var_123; [L141] SORT_1 var_125_arg_1 = var_124; VAL [constr_122_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_125_arg_0=-2, var_125_arg_1=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L142] EXPR var_125_arg_0 | var_125_arg_1 VAL [constr_122_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L142] SORT_1 var_125 = var_125_arg_0 | var_125_arg_1; [L143] SORT_1 var_126_arg_0 = var_109; [L144] SORT_1 var_126 = ~var_126_arg_0; [L145] SORT_1 var_127_arg_0 = var_125; [L146] SORT_1 var_127_arg_1 = var_126; VAL [constr_122_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_127_arg_0=256, var_127_arg_1=-2, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L147] EXPR var_127_arg_0 | var_127_arg_1 VAL [constr_122_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L147] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L148] EXPR var_127 & mask_SORT_1 VAL [constr_122_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L148] var_127 = var_127 & mask_SORT_1 [L149] SORT_1 constr_128_arg_0 = var_127; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L150] CALL assume_abort_if_not(constr_128_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L150] RET assume_abort_if_not(constr_128_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L151] SORT_15 var_49_arg_0 = state_48; [L152] SORT_12 var_49 = var_49_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_49=0, var_51=1, var_52=1, var_99=0] [L153] EXPR var_49 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L153] var_49 = var_49 & mask_SORT_12 [L154] SORT_15 var_46_arg_0 = state_45; [L155] SORT_12 var_46 = var_46_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L156] EXPR var_46 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_49=0, var_51=1, var_52=1, var_99=0] [L156] var_46 = var_46 & mask_SORT_12 [L157] SORT_12 var_73_arg_0 = var_49; [L158] SORT_12 var_73_arg_1 = var_46; [L159] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L160] SORT_15 var_74_arg_0 = state_48; [L161] SORT_1 var_74 = var_74_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_74=0, var_99=0] [L162] EXPR var_74 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_99=0] [L162] var_74 = var_74 & mask_SORT_1 [L163] SORT_15 var_75_arg_0 = state_45; [L164] SORT_1 var_75 = var_75_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_74=0, var_75=0, var_99=0] [L165] EXPR var_75 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_74=0, var_99=0] [L165] var_75 = var_75 & mask_SORT_1 [L166] SORT_1 var_76_arg_0 = var_74; [L167] SORT_1 var_76_arg_1 = var_75; [L168] SORT_1 var_76 = var_76_arg_0 != var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_73; [L170] SORT_1 var_77_arg_1 = var_76; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_77_arg_0=1, var_77_arg_1=0, var_99=0] [L171] EXPR var_77_arg_0 & var_77_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L171] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L172] EXPR var_77 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L172] var_77 = var_77 & mask_SORT_1 [L173] SORT_1 var_129_arg_0 = var_77; [L174] SORT_1 var_129 = ~var_129_arg_0; [L175] SORT_5 var_92_arg_0 = input_6; [L176] SORT_1 var_92 = var_92_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_129=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L177] EXPR var_92 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_129=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L177] var_92 = var_92 & mask_SORT_1 [L178] SORT_1 var_130_arg_0 = var_92; [L179] SORT_1 var_130 = ~var_130_arg_0; [L180] SORT_1 var_131_arg_0 = var_129; [L181] SORT_1 var_131_arg_1 = var_130; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_131_arg_0=-1, var_131_arg_1=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L182] EXPR var_131_arg_0 | var_131_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L182] SORT_1 var_131 = var_131_arg_0 | var_131_arg_1; [L183] SORT_1 var_132_arg_0 = var_109; [L184] SORT_1 var_132 = ~var_132_arg_0; [L185] SORT_1 var_133_arg_0 = var_131; [L186] SORT_1 var_133_arg_1 = var_132; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_133_arg_0=255, var_133_arg_1=-2, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L187] EXPR var_133_arg_0 | var_133_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L187] SORT_1 var_133 = var_133_arg_0 | var_133_arg_1; [L188] EXPR var_133 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L188] var_133 = var_133 & mask_SORT_1 [L189] SORT_1 constr_134_arg_0 = var_133; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L190] CALL assume_abort_if_not(constr_134_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L190] RET assume_abort_if_not(constr_134_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L191] SORT_15 var_20_arg_0 = state_19; [L192] SORT_12 var_20 = var_20_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L193] EXPR var_20 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L193] var_20 = var_20 & mask_SORT_12 [L194] SORT_15 var_17_arg_0 = state_16; [L195] SORT_12 var_17 = var_17_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L196] EXPR var_17 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L196] var_17 = var_17 & mask_SORT_12 [L197] SORT_12 var_78_arg_0 = var_20; [L198] SORT_12 var_78_arg_1 = var_17; [L199] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L200] SORT_15 var_79_arg_0 = state_19; [L201] SORT_1 var_79 = var_79_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_79=0, var_92=0, var_99=0] [L202] EXPR var_79 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_92=0, var_99=0] [L202] var_79 = var_79 & mask_SORT_1 [L203] SORT_15 var_80_arg_0 = state_16; [L204] SORT_1 var_80 = var_80_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_79=0, var_80=0, var_92=0, var_99=0] [L205] EXPR var_80 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_79=0, var_92=0, var_99=0] [L205] var_80 = var_80 & mask_SORT_1 [L206] SORT_1 var_81_arg_0 = var_79; [L207] SORT_1 var_81_arg_1 = var_80; [L208] SORT_1 var_81 = var_81_arg_0 != var_81_arg_1; [L209] SORT_1 var_82_arg_0 = var_78; [L210] SORT_1 var_82_arg_1 = var_81; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_82_arg_0=1, var_82_arg_1=0, var_92=0, var_99=0] [L211] EXPR var_82_arg_0 & var_82_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L211] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_1 var_135_arg_0 = var_82; [L213] SORT_1 var_135 = ~var_135_arg_0; [L214] SORT_5 var_136_arg_0 = input_6; [L215] SORT_1 var_136 = var_136_arg_0 >> 1; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_135=-1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L216] EXPR var_136 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_135=-1, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L216] var_136 = var_136 & mask_SORT_1 [L217] SORT_1 var_137_arg_0 = var_136; [L218] SORT_1 var_137 = ~var_137_arg_0; [L219] SORT_1 var_138_arg_0 = var_135; [L220] SORT_1 var_138_arg_1 = var_137; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_138_arg_0=-1, var_138_arg_1=-1, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L221] EXPR var_138_arg_0 | var_138_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L221] SORT_1 var_138 = var_138_arg_0 | var_138_arg_1; [L222] SORT_1 var_139_arg_0 = var_109; [L223] SORT_1 var_139 = ~var_139_arg_0; [L224] SORT_1 var_140_arg_0 = var_138; [L225] SORT_1 var_140_arg_1 = var_139; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_140_arg_0=255, var_140_arg_1=-2, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L226] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L226] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L227] EXPR var_140 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L227] var_140 = var_140 & mask_SORT_1 [L228] SORT_1 constr_141_arg_0 = var_140; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L229] CALL assume_abort_if_not(constr_141_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L229] RET assume_abort_if_not(constr_141_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L230] SORT_1 var_142_arg_0 = state_111; [L231] SORT_1 var_142_arg_1 = input_9; [L232] SORT_1 var_142 = var_142_arg_0 == var_142_arg_1; [L233] SORT_1 var_143_arg_0 = var_109; [L234] SORT_1 var_143 = ~var_143_arg_0; [L235] SORT_1 var_144_arg_0 = var_142; [L236] SORT_1 var_144_arg_1 = var_143; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_144_arg_0=0, var_144_arg_1=-2, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L237] EXPR var_144_arg_0 | var_144_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L237] SORT_1 var_144 = var_144_arg_0 | var_144_arg_1; [L238] EXPR var_144 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L238] var_144 = var_144 & mask_SORT_1 [L239] SORT_1 constr_145_arg_0 = var_144; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L240] CALL assume_abort_if_not(constr_145_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L240] RET assume_abort_if_not(constr_145_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=1, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L242] SORT_1 var_113_arg_0 = state_111; [L243] SORT_1 var_113_arg_1 = var_110; [L244] SORT_1 var_113_arg_2 = var_109; [L245] SORT_1 var_113 = var_113_arg_0 ? var_113_arg_1 : var_113_arg_2; [L246] SORT_1 var_87_arg_0 = state_86; [L247] SORT_1 var_87 = ~var_87_arg_0; [L248] SORT_1 var_88_arg_0 = state_85; [L249] SORT_1 var_88_arg_1 = var_87; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_88_arg_0=0, var_88_arg_1=-1, var_92=0, var_99=0] [L250] EXPR var_88_arg_0 & var_88_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L250] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L251] SORT_15 var_90_arg_0 = state_89; [L252] SORT_1 var_90 = var_90_arg_0 != 0; [L253] SORT_1 var_91_arg_0 = var_88; [L254] SORT_1 var_91_arg_1 = var_90; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_99=0] [L255] EXPR var_91_arg_0 & var_91_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L255] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L256] SORT_1 var_93_arg_0 = state_85; [L257] SORT_1 var_93 = ~var_93_arg_0; [L258] SORT_1 var_94_arg_0 = var_92; [L259] SORT_1 var_94_arg_1 = var_93; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_94_arg_0=0, var_94_arg_1=-1, var_99=0] [L260] EXPR var_94_arg_0 & var_94_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_99=0] [L260] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L261] SORT_1 var_95_arg_0 = var_94; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_95_arg_0=0, var_99=0] [L262] EXPR var_95_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_99=0] [L262] var_95_arg_0 = var_95_arg_0 & mask_SORT_1 [L263] SORT_15 var_95 = var_95_arg_0; [L264] SORT_15 var_96_arg_0 = state_89; [L265] SORT_15 var_96_arg_1 = var_95; [L266] SORT_15 var_96 = var_96_arg_0 + var_96_arg_1; [L267] SORT_1 var_53_arg_0 = var_52; [L268] SORT_1 var_53 = ~var_53_arg_0; [L269] SORT_1 var_54_arg_0 = var_51; [L270] SORT_1 var_54_arg_1 = var_53; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54_arg_0=1, var_54_arg_1=-2, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L271] EXPR var_54_arg_0 & var_54_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L271] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L272] EXPR var_54 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L272] var_54 = var_54 & mask_SORT_1 [L273] SORT_15 var_56_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_56_arg_0=8, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L274] EXPR var_56_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L274] var_56_arg_0 = var_56_arg_0 & mask_SORT_15 [L275] SORT_11 var_56 = var_56_arg_0; [L276] SORT_11 var_57_arg_0 = state_55; [L277] SORT_11 var_57_arg_1 = var_56; [L278] SORT_1 var_57 = var_57_arg_0 >= var_57_arg_1; [L279] SORT_1 var_58_arg_0 = var_54; [L280] SORT_1 var_58_arg_1 = var_57; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_58_arg_0=0, var_58_arg_1=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L281] EXPR var_58_arg_0 & var_58_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L281] SORT_1 var_58 = var_58_arg_0 & var_58_arg_1; [L282] SORT_1 var_59_arg_0 = state_31; [L283] SORT_1 var_59 = ~var_59_arg_0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_58=0, var_59=-1, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L284] EXPR var_59 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_58=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L284] var_59 = var_59 & mask_SORT_1 [L285] SORT_1 var_60_arg_0 = var_58; [L286] SORT_1 var_60_arg_1 = var_59; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60_arg_0=0, var_60_arg_1=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L287] EXPR var_60_arg_0 & var_60_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L287] SORT_1 var_60 = var_60_arg_0 & var_60_arg_1; [L288] EXPR var_60 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L288] var_60 = var_60 & mask_SORT_1 [L289] SORT_1 var_97_arg_0 = var_60; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_97_arg_0=0, var_99=0] [L290] EXPR var_97_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L290] var_97_arg_0 = var_97_arg_0 & mask_SORT_1 [L291] SORT_15 var_97 = var_97_arg_0; [L292] SORT_15 var_98_arg_0 = var_96; [L293] SORT_15 var_98_arg_1 = var_97; [L294] SORT_15 var_98 = var_98_arg_0 - var_98_arg_1; [L295] SORT_1 var_100_arg_0 = input_9; [L296] SORT_15 var_100_arg_1 = var_99; [L297] SORT_15 var_100_arg_2 = var_98; [L298] SORT_15 var_100 = var_100_arg_0 ? var_100_arg_1 : var_100_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_99=0] [L299] EXPR var_100 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_99=0] [L299] var_100 = var_100 & mask_SORT_15 [L300] SORT_15 var_101_arg_0 = var_100; [L301] SORT_1 var_101 = var_101_arg_0 != 0; [L302] SORT_1 var_102_arg_0 = var_101; [L303] SORT_1 var_102 = ~var_102_arg_0; [L304] SORT_1 var_103_arg_0 = var_91; [L305] SORT_1 var_103_arg_1 = var_102; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103_arg_0=0, var_103_arg_1=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L306] EXPR var_103_arg_0 & var_103_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L306] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L307] SORT_1 var_104_arg_0 = var_103; [L308] SORT_1 var_104 = ~var_104_arg_0; [L309] SORT_11* var_21_arg_0 = state_14; [L310] SORT_12 var_21_arg_1 = var_20; [L311] EXPR var_21_arg_0[(unsigned char) var_21_arg_1] [L311] SORT_11 var_21 = var_21_arg_0[(unsigned char) var_21_arg_1]; [L312] SORT_1 var_24_arg_0 = var_23; [L313] SORT_1 var_24 = ~var_24_arg_0; [L314] SORT_1 var_25_arg_0 = var_22; [L315] SORT_1 var_25_arg_1 = var_24; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25_arg_0=0, var_25_arg_1=-2, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L316] EXPR var_25_arg_0 & var_25_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L316] SORT_1 var_25 = var_25_arg_0 & var_25_arg_1; [L317] SORT_15 var_28_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_28_arg_0=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L318] EXPR var_28_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L318] var_28_arg_0 = var_28_arg_0 & mask_SORT_15 [L319] SORT_11 var_28 = var_28_arg_0; [L320] SORT_11 var_29_arg_0 = state_26; [L321] SORT_11 var_29_arg_1 = var_28; [L322] SORT_1 var_29 = var_29_arg_0 >= var_29_arg_1; [L323] SORT_1 var_30_arg_0 = var_25; [L324] SORT_1 var_30_arg_1 = var_29; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_30_arg_0=0, var_30_arg_1=1, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L325] EXPR var_30_arg_0 & var_30_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L325] SORT_1 var_30 = var_30_arg_0 & var_30_arg_1; [L326] SORT_1 var_32_arg_0 = var_30; [L327] SORT_1 var_32_arg_1 = state_31; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32_arg_0=0, var_32_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L328] EXPR var_32_arg_0 & var_32_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L328] SORT_1 var_32 = var_32_arg_0 & var_32_arg_1; [L329] EXPR var_32 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L329] var_32 = var_32 & mask_SORT_1 [L330] SORT_1 var_33_arg_0 = var_32; [L331] SORT_1 var_33_arg_1 = var_32; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_33_arg_0=0, var_33_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L332] EXPR ((SORT_5)var_33_arg_0 << 1) | var_33_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L332] SORT_5 var_33 = ((SORT_5)var_33_arg_0 << 1) | var_33_arg_1; [L333] EXPR var_33 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L333] var_33 = var_33 & mask_SORT_5 [L334] SORT_1 var_34_arg_0 = var_32; [L335] SORT_5 var_34_arg_1 = var_33; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_34_arg_0=0, var_34_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L336] EXPR ((SORT_12)var_34_arg_0 << 2) | var_34_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L336] SORT_12 var_34 = ((SORT_12)var_34_arg_0 << 2) | var_34_arg_1; [L337] EXPR var_34 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L337] var_34 = var_34 & mask_SORT_12 [L338] SORT_1 var_35_arg_0 = var_32; [L339] SORT_12 var_35_arg_1 = var_34; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_35_arg_0=0, var_35_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L340] EXPR ((SORT_15)var_35_arg_0 << 3) | var_35_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L340] SORT_15 var_35 = ((SORT_15)var_35_arg_0 << 3) | var_35_arg_1; [L341] EXPR var_35 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L341] var_35 = var_35 & mask_SORT_15 [L342] SORT_1 var_37_arg_0 = var_32; [L343] SORT_15 var_37_arg_1 = var_35; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_37_arg_0=0, var_37_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L344] EXPR ((SORT_36)var_37_arg_0 << 4) | var_37_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L344] SORT_36 var_37 = ((SORT_36)var_37_arg_0 << 4) | var_37_arg_1; [L345] EXPR var_37 & mask_SORT_36 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L345] var_37 = var_37 & mask_SORT_36 [L346] SORT_1 var_39_arg_0 = var_32; [L347] SORT_36 var_39_arg_1 = var_37; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_39_arg_0=0, var_39_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L348] EXPR ((SORT_38)var_39_arg_0 << 5) | var_39_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L348] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 5) | var_39_arg_1; [L349] EXPR var_39 & mask_SORT_38 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L349] var_39 = var_39 & mask_SORT_38 [L350] SORT_1 var_41_arg_0 = var_32; [L351] SORT_38 var_41_arg_1 = var_39; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_41_arg_0=0, var_41_arg_1=0, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L352] EXPR ((SORT_40)var_41_arg_0 << 6) | var_41_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L352] SORT_40 var_41 = ((SORT_40)var_41_arg_0 << 6) | var_41_arg_1; [L353] EXPR var_41 & mask_SORT_40 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L353] var_41 = var_41 & mask_SORT_40 [L354] SORT_1 var_42_arg_0 = var_32; [L355] SORT_40 var_42_arg_1 = var_41; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_42_arg_0=0, var_42_arg_1=0, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L356] EXPR ((SORT_11)var_42_arg_0 << 7) | var_42_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L356] SORT_11 var_42 = ((SORT_11)var_42_arg_0 << 7) | var_42_arg_1; [L357] SORT_11 var_43_arg_0 = var_21; [L358] SORT_11 var_43_arg_1 = var_42; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43_arg_0=0, var_43_arg_1=0, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L359] EXPR var_43_arg_0 & var_43_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L359] SORT_11 var_43 = var_43_arg_0 & var_43_arg_1; [L360] SORT_11* var_50_arg_0 = state_44; [L361] SORT_12 var_50_arg_1 = var_49; [L362] EXPR var_50_arg_0[(unsigned char) var_50_arg_1] [L362] SORT_11 var_50 = var_50_arg_0[(unsigned char) var_50_arg_1]; [L363] EXPR var_50 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L363] var_50 = var_50 & mask_SORT_11 [L364] SORT_1 var_61_arg_0 = var_60; [L365] SORT_1 var_61_arg_1 = var_60; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_61_arg_0=0, var_61_arg_1=0, var_92=0, var_93=-1, var_99=0] [L366] EXPR ((SORT_5)var_61_arg_0 << 1) | var_61_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L366] SORT_5 var_61 = ((SORT_5)var_61_arg_0 << 1) | var_61_arg_1; [L367] EXPR var_61 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L367] var_61 = var_61 & mask_SORT_5 [L368] SORT_1 var_62_arg_0 = var_60; [L369] SORT_5 var_62_arg_1 = var_61; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_62_arg_0=0, var_62_arg_1=0, var_92=0, var_93=-1, var_99=0] [L370] EXPR ((SORT_12)var_62_arg_0 << 2) | var_62_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L370] SORT_12 var_62 = ((SORT_12)var_62_arg_0 << 2) | var_62_arg_1; [L371] EXPR var_62 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L371] var_62 = var_62 & mask_SORT_12 [L372] SORT_1 var_63_arg_0 = var_60; [L373] SORT_12 var_63_arg_1 = var_62; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_63_arg_0=0, var_63_arg_1=0, var_92=0, var_93=-1, var_99=0] [L374] EXPR ((SORT_15)var_63_arg_0 << 3) | var_63_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L374] SORT_15 var_63 = ((SORT_15)var_63_arg_0 << 3) | var_63_arg_1; [L375] EXPR var_63 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L375] var_63 = var_63 & mask_SORT_15 [L376] SORT_1 var_64_arg_0 = var_60; [L377] SORT_15 var_64_arg_1 = var_63; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_64_arg_0=0, var_64_arg_1=0, var_92=0, var_93=-1, var_99=0] [L378] EXPR ((SORT_36)var_64_arg_0 << 4) | var_64_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L378] SORT_36 var_64 = ((SORT_36)var_64_arg_0 << 4) | var_64_arg_1; [L379] EXPR var_64 & mask_SORT_36 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L379] var_64 = var_64 & mask_SORT_36 [L380] SORT_1 var_65_arg_0 = var_60; [L381] SORT_36 var_65_arg_1 = var_64; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_65_arg_0=0, var_65_arg_1=0, var_92=0, var_93=-1, var_99=0] [L382] EXPR ((SORT_38)var_65_arg_0 << 5) | var_65_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L382] SORT_38 var_65 = ((SORT_38)var_65_arg_0 << 5) | var_65_arg_1; [L383] EXPR var_65 & mask_SORT_38 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L383] var_65 = var_65 & mask_SORT_38 [L384] SORT_1 var_66_arg_0 = var_60; [L385] SORT_38 var_66_arg_1 = var_65; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_66_arg_0=0, var_66_arg_1=0, var_92=0, var_93=-1, var_99=0] [L386] EXPR ((SORT_40)var_66_arg_0 << 6) | var_66_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L386] SORT_40 var_66 = ((SORT_40)var_66_arg_0 << 6) | var_66_arg_1; [L387] EXPR var_66 & mask_SORT_40 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L387] var_66 = var_66 & mask_SORT_40 [L388] SORT_1 var_67_arg_0 = var_60; [L389] SORT_40 var_67_arg_1 = var_66; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_67_arg_0=0, var_67_arg_1=0, var_92=0, var_93=-1, var_99=0] [L390] EXPR ((SORT_11)var_67_arg_0 << 7) | var_67_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L390] SORT_11 var_67 = ((SORT_11)var_67_arg_0 << 7) | var_67_arg_1; [L391] SORT_11 var_68_arg_0 = var_50; [L392] SORT_11 var_68_arg_1 = var_67; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_54=0, var_59=0, var_60=0, var_68_arg_0=0, var_68_arg_1=0, var_92=0, var_93=-1, var_99=0] [L393] EXPR var_68_arg_0 & var_68_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L393] SORT_11 var_68 = var_68_arg_0 & var_68_arg_1; [L394] SORT_11 var_69_arg_0 = var_43; [L395] SORT_11 var_69_arg_1 = var_68; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_69_arg_0=0, var_69_arg_1=0, var_92=0, var_93=-1, var_99=0] [L396] EXPR var_69_arg_0 | var_69_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L396] SORT_11 var_69 = var_69_arg_0 | var_69_arg_1; [L397] EXPR var_69 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L397] var_69 = var_69 & mask_SORT_11 [L398] SORT_11 var_106_arg_0 = state_105; [L399] SORT_11 var_106_arg_1 = var_69; [L400] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L401] SORT_1 var_107_arg_0 = var_104; [L402] SORT_1 var_107_arg_1 = var_106; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_107_arg_0=-1, var_107_arg_1=1, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L403] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_113=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L403] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L404] SORT_1 var_114_arg_0 = var_107; [L405] SORT_1 var_114 = ~var_114_arg_0; [L406] SORT_1 var_115_arg_0 = var_113; [L407] SORT_1 var_115_arg_1 = var_114; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_115_arg_0=0, var_115_arg_1=-256, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L408] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L408] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L409] EXPR var_115 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L409] var_115 = var_115 & mask_SORT_1 [L410] SORT_1 bad_116_arg_0 = var_115; [L411] CALL __VERIFIER_assert(!(bad_116_arg_0)) [L21] COND FALSE !(!(cond)) [L411] RET __VERIFIER_assert(!(bad_116_arg_0)) [L413] SORT_1 var_298_arg_0 = var_136; [L414] SORT_1 var_298_arg_1 = var_32; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_298_arg_0=0, var_298_arg_1=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L415] EXPR var_298_arg_0 | var_298_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L415] SORT_1 var_298 = var_298_arg_0 | var_298_arg_1; [L416] SORT_1 var_299_arg_0 = var_298; [L417] SORT_1 var_299_arg_1 = input_9; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299_arg_0=0, var_299_arg_1=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L418] EXPR var_299_arg_0 | var_299_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L418] SORT_1 var_299 = var_299_arg_0 | var_299_arg_1; [L419] EXPR var_299 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L419] var_299 = var_299 & mask_SORT_1 [L420] SORT_1 var_310_arg_0 = var_136; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299=0, var_310_arg_0=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L421] EXPR var_310_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L421] var_310_arg_0 = var_310_arg_0 & mask_SORT_1 [L422] SORT_15 var_310 = var_310_arg_0; [L423] SORT_15 var_311_arg_0 = state_16; [L424] SORT_15 var_311_arg_1 = var_310; [L425] SORT_15 var_311 = var_311_arg_0 + var_311_arg_1; [L426] SORT_1 var_404_arg_0 = var_299; [L427] SORT_15 var_404_arg_1 = var_311; [L428] SORT_15 var_404_arg_2 = state_16; [L429] SORT_15 var_404 = var_404_arg_0 ? var_404_arg_1 : var_404_arg_2; [L430] SORT_1 var_405_arg_0 = input_9; [L431] SORT_15 var_405_arg_1 = var_99; [L432] SORT_15 var_405_arg_2 = var_404; [L433] SORT_15 var_405 = var_405_arg_0 ? var_405_arg_1 : var_405_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299=0, var_32=0, var_405=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L434] EXPR var_405 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L434] var_405 = var_405 & mask_SORT_15 [L435] SORT_15 next_406_arg_1 = var_405; [L436] SORT_1 var_304_arg_0 = var_32; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, state_105=0, state_14={10:0}, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299=0, var_304_arg_0=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L437] EXPR var_304_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, state_105=0, state_14={10:0}, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_299=0, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L437] var_304_arg_0 = var_304_arg_0 & mask_SORT_1 [L438] SORT_15 var_304 = var_304_arg_0; [L439] SORT_15 var_305_arg_0 = state_19; [L440] SORT_15 var_305_arg_1 = var_304; [L441] SORT_15 var_305 = var_305_arg_0 + var_305_arg_1; [L442] SORT_1 var_407_arg_0 = var_299; [L443] SORT_15 var_407_arg_1 = var_305; [L444] SORT_15 var_407_arg_2 = state_19; [L445] SORT_15 var_407 = var_407_arg_0 ? var_407_arg_1 : var_407_arg_2; [L446] SORT_1 var_408_arg_0 = input_9; [L447] SORT_15 var_408_arg_1 = var_99; [L448] SORT_15 var_408_arg_2 = var_407; [L449] SORT_15 var_408 = var_408_arg_0 ? var_408_arg_1 : var_408_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_408=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L450] EXPR var_408 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L450] var_408 = var_408 & mask_SORT_15 [L451] SORT_15 next_409_arg_1 = var_408; [L452] SORT_11 var_417_arg_0 = var_410; [L453] SORT_1 var_417 = var_417_arg_0 != 0; [L454] SORT_3 var_258_arg_0 = input_4; [L455] SORT_11 var_258 = var_258_arg_0 >> 8; [L456] SORT_11* var_18_arg_0 = state_14; [L457] SORT_12 var_18_arg_1 = var_17; [L458] EXPR var_18_arg_0[(unsigned char) var_18_arg_1] [L458] SORT_11 var_18 = var_18_arg_0[(unsigned char) var_18_arg_1]; [L459] SORT_1 var_317_arg_0 = var_136; [L460] SORT_11 var_317_arg_1 = var_258; [L461] SORT_11 var_317_arg_2 = var_18; [L462] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L463] SORT_11 var_414_arg_0 = var_317; [L464] SORT_11 var_414_arg_1 = var_410; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_414_arg_0=0, var_414_arg_1=255, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L465] EXPR var_414_arg_0 & var_414_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L465] SORT_11 var_414 = var_414_arg_0 & var_414_arg_1; [L466] SORT_11* var_411_arg_0 = state_14; [L467] SORT_12 var_411_arg_1 = var_17; [L468] EXPR var_411_arg_0[(unsigned char) var_411_arg_1] [L468] SORT_11 var_411 = var_411_arg_0[(unsigned char) var_411_arg_1]; [L469] SORT_11 var_412_arg_0 = var_410; [L470] SORT_11 var_412 = ~var_412_arg_0; [L471] SORT_11 var_413_arg_0 = var_411; [L472] SORT_11 var_413_arg_1 = var_412; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_413_arg_0=0, var_413_arg_1=-256, var_414=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L473] EXPR var_413_arg_0 & var_413_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_414=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L473] SORT_11 var_413 = var_413_arg_0 & var_413_arg_1; [L474] SORT_11 var_415_arg_0 = var_414; [L475] SORT_11 var_415_arg_1 = var_413; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_415_arg_0=0, var_415_arg_1=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L476] EXPR var_415_arg_0 | var_415_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L476] SORT_11 var_415 = var_415_arg_0 | var_415_arg_1; [L477] SORT_11* var_416_arg_0 = state_14; [L478] SORT_12 var_416_arg_1 = var_17; [L479] SORT_11 var_416_arg_2 = var_415; [L480] SORT_13 var_416; [L481] unsigned char i = 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=0, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=2, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=3, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=4, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=5, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=6, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=7, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND FALSE !(i < (1 << 3)) [L481] COND TRUE i < (1 << 3) [L481] EXPR var_416_arg_0[i] [L481] var_416[i] = var_416_arg_0[i] [L481] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=8, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416={13:0}, var_416_arg_0={10:0}, var_416_arg_1=0, var_416_arg_2=0, var_417=1, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L481] COND TRUE i < (1 << 3) [L482] var_416[(unsigned char) var_416_arg_1] = var_416_arg_2 [L483] SORT_1 var_418_arg_0 = var_417; [L484] SORT_11* var_418_arg_1 = var_416; [L485] SORT_11* var_418_arg_2 = state_14; [L486] SORT_11* var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2; [L487] SORT_11* next_419_arg_1 = var_418; [L488] SORT_1 var_157_arg_0 = var_25; [L489] SORT_1 var_157_arg_1 = var_54; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157_arg_0=0, var_157_arg_1=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L490] EXPR ((SORT_5)var_157_arg_0 << 1) | var_157_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L490] SORT_5 var_157 = ((SORT_5)var_157_arg_0 << 1) | var_157_arg_1; [L491] EXPR var_157 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L491] var_157 = var_157 & mask_SORT_5 [L492] SORT_1 var_162_arg_0 = state_31; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_162_arg_0=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L493] EXPR var_162_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L493] var_162_arg_0 = var_162_arg_0 & mask_SORT_1 [L494] SORT_5 var_162 = var_162_arg_0; [L495] SORT_1 var_163_arg_0 = var_109; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_162=0, var_163_arg_0=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L496] EXPR var_163_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_162=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L496] var_163_arg_0 = var_163_arg_0 & mask_SORT_1 [L497] SORT_5 var_163 = var_163_arg_0; [L498] SORT_5 var_164_arg_0 = var_162; [L499] SORT_5 var_164_arg_1 = var_163; [L500] SORT_5 var_164 = var_164_arg_0 + var_164_arg_1; [L501] SORT_5 var_165_arg_0 = var_164; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_165_arg_0=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L502] EXPR var_165_arg_0 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L502] var_165_arg_0 = var_165_arg_0 & mask_SORT_5 [L503] SORT_12 var_165 = var_165_arg_0; [L504] SORT_1 var_166_arg_0 = var_109; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_165=0, var_166_arg_0=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L505] EXPR var_166_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_165=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L505] var_166_arg_0 = var_166_arg_0 & mask_SORT_1 [L506] SORT_12 var_166 = var_166_arg_0; [L507] SORT_12 var_167_arg_0 = var_165; [L508] SORT_12 var_167_arg_1 = var_166; [L509] SORT_12 var_167 = var_167_arg_0 + var_167_arg_1; [L510] SORT_12 var_168_arg_0 = var_167; [L511] SORT_1 var_168 = var_168_arg_0 >> 0; [L512] SORT_1 var_169_arg_0 = var_168; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_168=1, var_169_arg_0=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L513] EXPR var_169_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_168=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L513] var_169_arg_0 = var_169_arg_0 & mask_SORT_1 [L514] SORT_5 var_169 = var_169_arg_0; [L515] SORT_5 var_170_arg_0 = var_157; [L516] SORT_5 var_170_arg_1 = var_169; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_168=1, var_170_arg_0=0, var_170_arg_1=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L517] EXPR var_170_arg_0 >> var_170_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_168=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L517] SORT_5 var_170 = var_170_arg_0 >> var_170_arg_1; [L518] SORT_5 var_171_arg_0 = var_170; [L519] SORT_1 var_171 = var_171_arg_0 >> 0; [L520] SORT_1 var_152_arg_0 = var_110; [L521] SORT_1 var_152_arg_1 = state_31; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_152_arg_0=0, var_152_arg_1=0, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L522] EXPR ((SORT_5)var_152_arg_0 << 1) | var_152_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L522] SORT_5 var_152 = ((SORT_5)var_152_arg_0 << 1) | var_152_arg_1; [L523] SORT_5 var_153_arg_0 = var_152; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_153_arg_0=0, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L524] EXPR var_153_arg_0 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L524] var_153_arg_0 = var_153_arg_0 & mask_SORT_5 [L525] SORT_12 var_153 = var_153_arg_0; [L526] SORT_1 var_154_arg_0 = var_109; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_153=0, var_154_arg_0=1, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L527] EXPR var_154_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_153=0, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L527] var_154_arg_0 = var_154_arg_0 & mask_SORT_1 [L528] SORT_12 var_154 = var_154_arg_0; [L529] SORT_12 var_155_arg_0 = var_153; [L530] SORT_12 var_155_arg_1 = var_154; [L531] SORT_12 var_155 = var_155_arg_0 + var_155_arg_1; [L532] SORT_12 var_156_arg_0 = var_155; [L533] SORT_1 var_156 = var_156_arg_0 >> 0; [L534] SORT_1 var_158_arg_0 = var_156; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_157=0, var_158_arg_0=1, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L535] EXPR var_158_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_157=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L535] var_158_arg_0 = var_158_arg_0 & mask_SORT_1 [L536] SORT_5 var_158 = var_158_arg_0; [L537] SORT_5 var_159_arg_0 = var_157; [L538] SORT_5 var_159_arg_1 = var_158; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_159_arg_0=0, var_159_arg_1=1, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L539] EXPR var_159_arg_0 >> var_159_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L539] SORT_5 var_159 = var_159_arg_0 >> var_159_arg_1; [L540] SORT_5 var_160_arg_0 = var_159; [L541] SORT_1 var_160 = var_160_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_160=0, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L542] EXPR var_160 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_168=1, var_171=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L542] var_160 = var_160 & mask_SORT_1 [L543] SORT_1 var_172_arg_0 = var_160; [L544] SORT_1 var_172 = ~var_172_arg_0; [L545] SORT_1 var_173_arg_0 = var_171; [L546] SORT_1 var_173_arg_1 = var_172; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_160=0, var_168=1, var_173_arg_0=0, var_173_arg_1=-1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L547] EXPR var_173_arg_0 & var_173_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_160=0, var_168=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L547] SORT_1 var_173 = var_173_arg_0 & var_173_arg_1; [L548] EXPR var_173 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_156=1, var_160=0, var_168=1, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L548] var_173 = var_173 & mask_SORT_1 [L549] SORT_1 var_161_arg_0 = var_160; [L550] SORT_1 var_161_arg_1 = var_156; [L551] SORT_1 var_161_arg_2 = state_31; [L552] SORT_1 var_161 = var_161_arg_0 ? var_161_arg_1 : var_161_arg_2; [L553] SORT_1 var_174_arg_0 = var_173; [L554] SORT_1 var_174_arg_1 = var_168; [L555] SORT_1 var_174_arg_2 = var_161; [L556] SORT_1 var_174 = var_174_arg_0 ? var_174_arg_1 : var_174_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L557] EXPR var_174 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L557] var_174 = var_174 & mask_SORT_1 [L558] SORT_1 var_204_arg_0 = var_174; [L559] SORT_1 var_204_arg_1 = state_31; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_204_arg_0=0, var_204_arg_1=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L560] EXPR var_204_arg_0 | var_204_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L560] SORT_1 var_204 = var_204_arg_0 | var_204_arg_1; [L561] EXPR var_204 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L561] var_204 = var_204 & mask_SORT_1 [L562] SORT_1 var_198_arg_0 = var_25; [L563] SORT_1 var_198 = ~var_198_arg_0; [L564] SORT_1 var_199_arg_0 = state_31; [L565] SORT_1 var_199_arg_1 = var_198; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_199_arg_0=0, var_199_arg_1=-1, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L566] EXPR var_199_arg_0 & var_199_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L566] SORT_1 var_199 = var_199_arg_0 & var_199_arg_1; [L567] EXPR var_199 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L567] var_199 = var_199 & mask_SORT_1 [L568] SORT_3 var_191_arg_0 = input_7; [L569] SORT_11 var_191 = var_191_arg_0 >> 8; [L570] SORT_11 var_192_arg_0 = state_26; [L571] SORT_11 var_192_arg_1 = var_191; [L572] SORT_11 var_192 = var_192_arg_0 + var_192_arg_1; [L573] SORT_1 var_193_arg_0 = var_174; [L574] SORT_11 var_193_arg_1 = var_192; [L575] SORT_11 var_193_arg_2 = state_26; [L576] SORT_11 var_193 = var_193_arg_0 ? var_193_arg_1 : var_193_arg_2; [L577] SORT_15 var_195_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_193=0, var_195_arg_0=8, var_198=-1, var_199=0, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L578] EXPR var_195_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_193=0, var_198=-1, var_199=0, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L578] var_195_arg_0 = var_195_arg_0 & mask_SORT_15 [L579] SORT_11 var_195 = var_195_arg_0; [L580] SORT_11 var_196_arg_0 = var_193; [L581] SORT_11 var_196_arg_1 = var_195; [L582] SORT_11 var_196 = var_196_arg_0 - var_196_arg_1; [L583] SORT_1 var_197_arg_0 = var_32; [L584] SORT_11 var_197_arg_1 = var_196; [L585] SORT_11 var_197_arg_2 = var_193; [L586] SORT_11 var_197 = var_197_arg_0 ? var_197_arg_1 : var_197_arg_2; [L587] SORT_1 var_200_arg_0 = var_199; [L588] SORT_11 var_200_arg_1 = state_26; [L589] SORT_11 var_200_arg_2 = var_197; [L590] SORT_11 var_200 = var_200_arg_0 ? var_200_arg_1 : var_200_arg_2; [L591] SORT_1 var_201_arg_0 = input_9; [L592] SORT_11 var_201_arg_1 = var_183; [L593] SORT_11 var_201_arg_2 = var_200; [L594] SORT_11 var_201 = var_201_arg_0 ? var_201_arg_1 : var_201_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_201=0, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L595] EXPR var_201 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_204=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L595] var_201 = var_201 & mask_SORT_11 [L596] SORT_1 var_420_arg_0 = var_204; [L597] SORT_11 var_420_arg_1 = var_201; [L598] SORT_11 var_420_arg_2 = state_26; [L599] SORT_11 var_420 = var_420_arg_0 ? var_420_arg_1 : var_420_arg_2; [L600] SORT_1 var_421_arg_0 = input_9; [L601] SORT_11 var_421_arg_1 = var_183; [L602] SORT_11 var_421_arg_2 = var_420; [L603] SORT_11 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_421=0, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L604] EXPR var_421 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L604] var_421 = var_421 & mask_SORT_11 [L605] SORT_11 next_422_arg_1 = var_421; [L606] SORT_1 var_180_arg_0 = var_54; [L607] SORT_1 var_180 = ~var_180_arg_0; [L608] SORT_1 var_181_arg_0 = var_59; [L609] SORT_1 var_181_arg_1 = var_180; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_181_arg_0=0, var_181_arg_1=-1, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L610] EXPR var_181_arg_0 & var_181_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L610] SORT_1 var_181 = var_181_arg_0 & var_181_arg_1; [L611] EXPR var_181 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_7=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L611] var_181 = var_181 & mask_SORT_1 [L612] SORT_3 var_150_arg_0 = input_7; [L613] SORT_11 var_150 = var_150_arg_0 >> 0; [L614] SORT_11 var_151_arg_0 = state_55; [L615] SORT_11 var_151_arg_1 = var_150; [L616] SORT_11 var_151 = var_151_arg_0 + var_151_arg_1; [L617] SORT_1 var_175_arg_0 = var_174; [L618] SORT_11 var_175_arg_1 = state_55; [L619] SORT_11 var_175_arg_2 = var_151; [L620] SORT_11 var_175 = var_175_arg_0 ? var_175_arg_1 : var_175_arg_2; [L621] SORT_15 var_177_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_175=0, var_177_arg_0=8, var_180=-1, var_181=0, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L622] EXPR var_177_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_175=0, var_180=-1, var_181=0, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L622] var_177_arg_0 = var_177_arg_0 & mask_SORT_15 [L623] SORT_11 var_177 = var_177_arg_0; [L624] SORT_11 var_178_arg_0 = var_175; [L625] SORT_11 var_178_arg_1 = var_177; [L626] SORT_11 var_178 = var_178_arg_0 - var_178_arg_1; [L627] SORT_1 var_179_arg_0 = var_60; [L628] SORT_11 var_179_arg_1 = var_178; [L629] SORT_11 var_179_arg_2 = var_175; [L630] SORT_11 var_179 = var_179_arg_0 ? var_179_arg_1 : var_179_arg_2; [L631] SORT_1 var_182_arg_0 = var_181; [L632] SORT_11 var_182_arg_1 = state_55; [L633] SORT_11 var_182_arg_2 = var_179; [L634] SORT_11 var_182 = var_182_arg_0 ? var_182_arg_1 : var_182_arg_2; [L635] SORT_1 var_184_arg_0 = input_9; [L636] SORT_11 var_184_arg_1 = var_183; [L637] SORT_11 var_184_arg_2 = var_182; [L638] SORT_11 var_184 = var_184_arg_0 ? var_184_arg_1 : var_184_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_183=0, var_184=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L639] EXPR var_184 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_183=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L639] var_184 = var_184 & mask_SORT_11 [L640] SORT_15 var_212_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_183=0, var_184=0, var_198=-1, var_201=0, var_212_arg_0=8, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L641] EXPR var_212_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_180=-1, var_183=0, var_184=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L641] var_212_arg_0 = var_212_arg_0 & mask_SORT_15 [L642] SORT_11 var_212 = var_212_arg_0; [L643] SORT_11 var_213_arg_0 = var_184; [L644] SORT_11 var_213_arg_1 = var_212; [L645] SORT_1 var_213 = var_213_arg_0 < var_213_arg_1; [L646] SORT_1 var_214_arg_0 = var_180; [L647] SORT_1 var_214_arg_1 = var_213; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_214_arg_0=-1, var_214_arg_1=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L648] EXPR var_214_arg_0 | var_214_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L648] SORT_1 var_214 = var_214_arg_0 | var_214_arg_1; [L649] SORT_1 var_215_arg_0 = var_59; [L650] SORT_1 var_215_arg_1 = var_214; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_215_arg_0=0, var_215_arg_1=255, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L651] EXPR var_215_arg_0 & var_215_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L651] SORT_1 var_215 = var_215_arg_0 & var_215_arg_1; [L652] SORT_1 var_216_arg_0 = var_60; [L653] SORT_1 var_216_arg_1 = var_215; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_216_arg_0=0, var_216_arg_1=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L654] EXPR var_216_arg_0 & var_216_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L654] SORT_1 var_216 = var_216_arg_0 & var_216_arg_1; [L655] EXPR var_216 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L655] var_216 = var_216 & mask_SORT_1 [L656] SORT_15 var_207_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_207_arg_0=8, var_216=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L657] EXPR var_207_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_198=-1, var_201=0, var_216=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L657] var_207_arg_0 = var_207_arg_0 & mask_SORT_15 [L658] SORT_11 var_207 = var_207_arg_0; [L659] SORT_11 var_208_arg_0 = var_201; [L660] SORT_11 var_208_arg_1 = var_207; [L661] SORT_1 var_208 = var_208_arg_0 < var_208_arg_1; [L662] SORT_1 var_209_arg_0 = var_198; [L663] SORT_1 var_209_arg_1 = var_208; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_209_arg_0=-1, var_209_arg_1=0, var_216=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L664] EXPR var_209_arg_0 | var_209_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_216=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L664] SORT_1 var_209 = var_209_arg_0 | var_209_arg_1; [L665] SORT_1 var_210_arg_0 = state_31; [L666] SORT_1 var_210_arg_1 = var_209; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_210_arg_0=0, var_210_arg_1=255, var_216=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L667] EXPR var_210_arg_0 & var_210_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_216=0, var_27=8, var_32=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L667] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L668] SORT_1 var_211_arg_0 = var_32; [L669] SORT_1 var_211_arg_1 = var_210; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_211_arg_0=0, var_211_arg_1=0, var_216=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L670] EXPR var_211_arg_0 & var_211_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_216=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L670] SORT_1 var_211 = var_211_arg_0 & var_211_arg_1; [L671] EXPR var_211 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_216=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L671] var_211 = var_211 & mask_SORT_1 [L672] SORT_1 var_217_arg_0 = var_216; [L673] SORT_1 var_217_arg_1 = var_211; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_217_arg_0=0, var_217_arg_1=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L674] EXPR ((SORT_5)var_217_arg_0 << 1) | var_217_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L674] SORT_5 var_217 = ((SORT_5)var_217_arg_0 << 1) | var_217_arg_1; [L675] EXPR var_217 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L675] var_217 = var_217 & mask_SORT_5 [L676] SORT_5 var_218_arg_0 = var_217; [L677] SORT_1 var_218 = var_218_arg_0 != 0; [L678] SORT_1 var_423_arg_0 = var_218; [L679] SORT_1 var_423_arg_1 = var_174; [L680] SORT_1 var_423_arg_2 = state_31; [L681] SORT_1 var_423 = var_423_arg_0 ? var_423_arg_1 : var_423_arg_2; [L682] SORT_1 var_424_arg_0 = input_9; [L683] SORT_1 var_424_arg_1 = var_110; [L684] SORT_1 var_424_arg_2 = var_423; [L685] SORT_1 var_424 = var_424_arg_0 ? var_424_arg_1 : var_424_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_424=0, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L686] EXPR var_424 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L686] var_424 = var_424 & mask_SORT_1 [L687] SORT_1 next_425_arg_1 = var_424; [L688] SORT_1 var_269_arg_0 = var_92; [L689] SORT_1 var_269_arg_1 = var_60; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_269_arg_0=0, var_269_arg_1=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L690] EXPR var_269_arg_0 | var_269_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L690] SORT_1 var_269 = var_269_arg_0 | var_269_arg_1; [L691] SORT_1 var_270_arg_0 = var_269; [L692] SORT_1 var_270_arg_1 = input_9; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270_arg_0=0, var_270_arg_1=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L693] EXPR var_270_arg_0 | var_270_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L693] SORT_1 var_270 = var_270_arg_0 | var_270_arg_1; [L694] EXPR var_270 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L694] var_270 = var_270 & mask_SORT_1 [L695] SORT_1 var_281_arg_0 = var_92; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_281_arg_0=0, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L696] EXPR var_281_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L696] var_281_arg_0 = var_281_arg_0 & mask_SORT_1 [L697] SORT_15 var_281 = var_281_arg_0; [L698] SORT_15 var_282_arg_0 = state_45; [L699] SORT_15 var_282_arg_1 = var_281; [L700] SORT_15 var_282 = var_282_arg_0 + var_282_arg_1; [L701] SORT_1 var_426_arg_0 = var_270; [L702] SORT_15 var_426_arg_1 = var_282; [L703] SORT_15 var_426_arg_2 = state_45; [L704] SORT_15 var_426 = var_426_arg_0 ? var_426_arg_1 : var_426_arg_2; [L705] SORT_1 var_427_arg_0 = input_9; [L706] SORT_15 var_427_arg_1 = var_99; [L707] SORT_15 var_427_arg_2 = var_426; [L708] SORT_15 var_427 = var_427_arg_0 ? var_427_arg_1 : var_427_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_427=0, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L709] EXPR var_427 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L709] var_427 = var_427 & mask_SORT_15 [L710] SORT_15 next_428_arg_1 = var_427; [L711] SORT_1 var_275_arg_0 = var_60; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_275_arg_0=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L712] EXPR var_275_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L712] var_275_arg_0 = var_275_arg_0 & mask_SORT_1 [L713] SORT_15 var_275 = var_275_arg_0; [L714] SORT_15 var_276_arg_0 = state_48; [L715] SORT_15 var_276_arg_1 = var_275; [L716] SORT_15 var_276 = var_276_arg_0 + var_276_arg_1; [L717] SORT_1 var_429_arg_0 = var_270; [L718] SORT_15 var_429_arg_1 = var_276; [L719] SORT_15 var_429_arg_2 = state_48; [L720] SORT_15 var_429 = var_429_arg_0 ? var_429_arg_1 : var_429_arg_2; [L721] SORT_1 var_430_arg_0 = input_9; [L722] SORT_15 var_430_arg_1 = var_99; [L723] SORT_15 var_430_arg_2 = var_429; [L724] SORT_15 var_430 = var_430_arg_0 ? var_430_arg_1 : var_430_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_430=0, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L725] EXPR var_430 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_4=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L725] var_430 = var_430 & mask_SORT_15 [L726] SORT_15 next_431_arg_1 = var_430; [L727] SORT_11 var_438_arg_0 = var_410; [L728] SORT_1 var_438 = var_438_arg_0 != 0; [L729] SORT_3 var_256_arg_0 = input_4; [L730] SORT_11 var_256 = var_256_arg_0 >> 0; [L731] SORT_11* var_47_arg_0 = state_44; [L732] SORT_12 var_47_arg_1 = var_46; [L733] EXPR var_47_arg_0[(unsigned char) var_47_arg_1] [L733] SORT_11 var_47 = var_47_arg_0[(unsigned char) var_47_arg_1]; [L734] SORT_1 var_288_arg_0 = var_92; [L735] SORT_11 var_288_arg_1 = var_256; [L736] SORT_11 var_288_arg_2 = var_47; [L737] SORT_11 var_288 = var_288_arg_0 ? var_288_arg_1 : var_288_arg_2; [L738] SORT_11 var_435_arg_0 = var_288; [L739] SORT_11 var_435_arg_1 = var_410; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_435_arg_0=0, var_435_arg_1=255, var_438=1, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L740] EXPR var_435_arg_0 & var_435_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_438=1, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L740] SORT_11 var_435 = var_435_arg_0 & var_435_arg_1; [L741] SORT_11* var_432_arg_0 = state_44; [L742] SORT_12 var_432_arg_1 = var_46; [L743] EXPR var_432_arg_0[(unsigned char) var_432_arg_1] [L743] SORT_11 var_432 = var_432_arg_0[(unsigned char) var_432_arg_1]; [L744] SORT_11 var_433_arg_0 = var_410; [L745] SORT_11 var_433 = ~var_433_arg_0; [L746] SORT_11 var_434_arg_0 = var_432; [L747] SORT_11 var_434_arg_1 = var_433; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_434_arg_0=0, var_434_arg_1=-256, var_435=0, var_438=1, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L748] EXPR var_434_arg_0 & var_434_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_435=0, var_438=1, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L748] SORT_11 var_434 = var_434_arg_0 & var_434_arg_1; [L749] SORT_11 var_436_arg_0 = var_435; [L750] SORT_11 var_436_arg_1 = var_434; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_436_arg_0=0, var_436_arg_1=0, var_438=1, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L751] EXPR var_436_arg_0 | var_436_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_438=1, var_46=0, var_59=0, var_92=0, var_93=-1, var_99=0] [L751] SORT_11 var_436 = var_436_arg_0 | var_436_arg_1; [L752] SORT_11* var_437_arg_0 = state_44; [L753] SORT_12 var_437_arg_1 = var_46; [L754] SORT_11 var_437_arg_2 = var_436; [L755] SORT_13 var_437; [L756] unsigned char i = 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=0, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=2, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=3, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=4, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=5, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=6, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=7, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND FALSE !(i < (1 << 3)) [L756] COND TRUE i < (1 << 3) [L756] EXPR var_437_arg_0[i] [L756] var_437[i] = var_437_arg_0[i] [L756] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=8, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_174=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437={9:0}, var_437_arg_0={11:0}, var_437_arg_1=0, var_437_arg_2=0, var_438=1, var_59=0, var_92=0, var_93=-1, var_99=0] [L756] COND TRUE i < (1 << 3) [L757] var_437[(unsigned char) var_437_arg_1] = var_437_arg_2 [L758] SORT_1 var_439_arg_0 = var_438; [L759] SORT_11* var_439_arg_1 = var_437; [L760] SORT_11* var_439_arg_2 = state_44; [L761] SORT_11* var_439 = var_439_arg_0 ? var_439_arg_1 : var_439_arg_2; [L762] SORT_11* next_440_arg_1 = var_439; [L763] SORT_1 var_187_arg_0 = var_174; [L764] SORT_1 var_187 = ~var_187_arg_0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_184=0, var_187=-1, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_59=0, var_92=0, var_93=-1, var_99=0] [L765] EXPR var_187 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_59=0, var_92=0, var_93=-1, var_99=0] [L765] var_187 = var_187 & mask_SORT_1 [L766] SORT_1 var_188_arg_0 = var_187; [L767] SORT_1 var_188_arg_1 = var_59; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_184=0, var_188_arg_0=0, var_188_arg_1=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_92=0, var_93=-1, var_99=0] [L768] EXPR var_188_arg_0 | var_188_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_92=0, var_93=-1, var_99=0] [L768] SORT_1 var_188 = var_188_arg_0 | var_188_arg_1; [L769] EXPR var_188 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_184=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_92=0, var_93=-1, var_99=0] [L769] var_188 = var_188 & mask_SORT_1 [L770] SORT_1 var_441_arg_0 = var_188; [L771] SORT_11 var_441_arg_1 = var_184; [L772] SORT_11 var_441_arg_2 = state_55; [L773] SORT_11 var_441 = var_441_arg_0 ? var_441_arg_1 : var_441_arg_2; [L774] SORT_1 var_442_arg_0 = input_9; [L775] SORT_11 var_442_arg_1 = var_183; [L776] SORT_11 var_442_arg_2 = var_441; [L777] SORT_11 var_442 = var_442_arg_0 ? var_442_arg_1 : var_442_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_442=0, var_92=0, var_93=-1, var_99=0] [L778] EXPR var_442 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_92=0, var_93=-1, var_99=0] [L778] var_442 = var_442 & mask_SORT_11 [L779] SORT_11 next_443_arg_1 = var_442; [L780] SORT_1 var_365_arg_0 = input_10; [L781] SORT_1 var_365_arg_1 = var_92; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365_arg_0=0, var_365_arg_1=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L782] EXPR var_365_arg_0 & var_365_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L782] SORT_1 var_365 = var_365_arg_0 & var_365_arg_1; [L783] SORT_1 var_366_arg_0 = state_85; [L784] SORT_1 var_366_arg_1 = var_365; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365=0, var_366_arg_0=0, var_366_arg_1=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L785] EXPR var_366_arg_0 | var_366_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L785] SORT_1 var_366 = var_366_arg_0 | var_366_arg_1; [L786] SORT_1 var_444_arg_0 = state_85; [L787] SORT_1 var_444_arg_1 = var_109; [L788] SORT_1 var_444_arg_2 = var_366; [L789] SORT_1 var_444 = var_444_arg_0 ? var_444_arg_1 : var_444_arg_2; [L790] SORT_1 var_445_arg_0 = input_9; [L791] SORT_1 var_445_arg_1 = var_110; [L792] SORT_1 var_445_arg_2 = var_444; [L793] SORT_1 var_445 = var_445_arg_0 ? var_445_arg_1 : var_445_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_445=0, var_93=-1, var_99=0] [L794] EXPR var_445 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L794] var_445 = var_445 & mask_SORT_1 [L795] SORT_1 next_446_arg_1 = var_445; [L796] SORT_1 var_376_arg_0 = var_103; [L797] SORT_1 var_376_arg_1 = state_86; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_89=0, var_100=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365=0, var_376_arg_0=0, var_376_arg_1=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L798] EXPR var_376_arg_0 | var_376_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_85=0, state_89=0, var_100=0, var_109=1, var_110=0, var_183=0, var_256=0, var_270=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L798] SORT_1 var_376 = var_376_arg_0 | var_376_arg_1; [L799] SORT_1 var_447_arg_0 = input_9; [L800] SORT_1 var_447_arg_1 = var_110; [L801] SORT_1 var_447_arg_2 = var_376; [L802] SORT_1 var_447 = var_447_arg_0 ? var_447_arg_1 : var_447_arg_2; [L803] SORT_1 next_448_arg_1 = var_447; [L804] SORT_1 var_388_arg_0 = var_270; [L805] SORT_1 var_388_arg_1 = state_85; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_89=0, var_100=0, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_365=0, var_388_arg_0=0, var_388_arg_1=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L806] EXPR var_388_arg_0 | var_388_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_89=0, var_100=0, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L806] SORT_1 var_388 = var_388_arg_0 | var_388_arg_1; [L807] EXPR var_388 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, state_89=0, var_100=0, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L807] var_388 = var_388 & mask_SORT_1 [L808] SORT_1 var_449_arg_0 = var_388; [L809] SORT_15 var_449_arg_1 = var_100; [L810] SORT_15 var_449_arg_2 = state_89; [L811] SORT_15 var_449 = var_449_arg_0 ? var_449_arg_1 : var_449_arg_2; [L812] SORT_1 var_450_arg_0 = input_9; [L813] SORT_15 var_450_arg_1 = var_99; [L814] SORT_15 var_450_arg_2 = var_449; [L815] SORT_15 var_450 = var_450_arg_0 ? var_450_arg_1 : var_450_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_450=0, var_93=-1, var_99=0] [L816] EXPR var_450 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_365=0, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_93=-1, var_99=0] [L816] var_450 = var_450 & mask_SORT_15 [L817] SORT_15 next_451_arg_1 = var_450; [L818] SORT_1 var_373_arg_0 = var_365; [L819] SORT_1 var_373_arg_1 = var_93; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_373_arg_0=0, var_373_arg_1=-1, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L820] EXPR var_373_arg_0 & var_373_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L820] SORT_1 var_373 = var_373_arg_0 & var_373_arg_1; [L821] EXPR var_373 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, state_105=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_256=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L821] var_373 = var_373 & mask_SORT_1 [L822] SORT_1 var_452_arg_0 = var_373; [L823] SORT_11 var_452_arg_1 = var_256; [L824] SORT_11 var_452_arg_2 = state_105; [L825] SORT_11 var_452 = var_452_arg_0 ? var_452_arg_1 : var_452_arg_2; [L826] SORT_1 var_453_arg_0 = input_9; [L827] SORT_11 var_453_arg_1 = var_183; [L828] SORT_11 var_453_arg_2 = var_452; [L829] SORT_11 var_453 = var_453_arg_0 ? var_453_arg_1 : var_453_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_453=0, var_99=0] [L830] EXPR var_453 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_406_arg_1=0, next_409_arg_1=0, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, state_14={10:0}, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L830] var_453 = var_453 & mask_SORT_11 [L831] SORT_11 next_454_arg_1 = var_453; [L832] SORT_1 next_455_arg_1 = var_110; [L834] state_16 = next_406_arg_1 [L835] state_19 = next_409_arg_1 [L836] unsigned char i = 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=2, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=3, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=4, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=5, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=6, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=7, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND FALSE !(i < (1 << 3)) [L836] COND TRUE i < (1 << 3) [L836] EXPR next_419_arg_1[i] [L836] state_14[i] = next_419_arg_1[i] [L836] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=8, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_422_arg_1=0, next_425_arg_1=0, next_428_arg_1=0, next_431_arg_1=0, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_44={11:0}, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L836] COND TRUE i < (1 << 3) [L837] state_26 = next_422_arg_1 [L838] state_31 = next_425_arg_1 [L839] state_45 = next_428_arg_1 [L840] state_48 = next_431_arg_1 [L841] unsigned char i = 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=0, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=2, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=3, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=4, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=5, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=6, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=7, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND FALSE !(i < (1 << 3)) [L841] COND TRUE i < (1 << 3) [L841] EXPR next_440_arg_1[i] [L841] state_44[i] = next_440_arg_1[i] [L841] ++i VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, i=8, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, next_419_arg_1={13:0}, next_440_arg_1={9:0}, next_443_arg_1=0, next_446_arg_1=0, next_448_arg_1=0, next_451_arg_1=0, next_454_arg_1=0, next_455_arg_1=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_416_arg_0={10:0}, var_437_arg_0={11:0}, var_99=0] [L841] COND TRUE i < (1 << 3) [L842] state_55 = next_443_arg_1 [L843] state_85 = next_446_arg_1 [L844] state_86 = next_448_arg_1 [L845] state_89 = next_451_arg_1 [L846] state_105 = next_454_arg_1 [L847] state_111 = next_455_arg_1 [L102] input_2 = __VERIFIER_nondet_uchar() [L103] input_4 = __VERIFIER_nondet_ushort() [L104] input_6 = __VERIFIER_nondet_uchar() [L105] input_7 = __VERIFIER_nondet_ushort() [L106] input_8 = __VERIFIER_nondet_uchar() [L107] input_9 = __VERIFIER_nondet_uchar() [L108] EXPR input_9 & mask_SORT_1 VAL [mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_99=0] [L108] input_9 = input_9 & mask_SORT_1 [L109] input_10 = __VERIFIER_nondet_uchar() [L111] SORT_15 var_52_arg_0 = state_48; [L112] SORT_15 var_52_arg_1 = state_45; [L113] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L114] SORT_1 var_117_arg_0 = var_52; [L115] SORT_1 var_117 = ~var_117_arg_0; [L116] SORT_5 var_51_arg_0 = input_8; [L117] SORT_1 var_51 = var_51_arg_0 >> 0; [L118] SORT_1 var_118_arg_0 = var_51; [L119] SORT_1 var_118 = ~var_118_arg_0; [L120] SORT_1 var_119_arg_0 = var_117; [L121] SORT_1 var_119_arg_1 = var_118; VAL [input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_119_arg_0=-2, var_119_arg_1=-2, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L122] EXPR var_119_arg_0 | var_119_arg_1 VAL [input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L122] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L123] SORT_1 var_120_arg_0 = var_109; [L124] SORT_1 var_120 = ~var_120_arg_0; [L125] SORT_1 var_121_arg_0 = var_119; [L126] SORT_1 var_121_arg_1 = var_120; VAL [input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_121_arg_0=254, var_121_arg_1=-2, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L127] EXPR var_121_arg_0 | var_121_arg_1 VAL [input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L127] SORT_1 var_121 = var_121_arg_0 | var_121_arg_1; [L128] EXPR var_121 & mask_SORT_1 VAL [input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L128] var_121 = var_121 & mask_SORT_1 [L129] SORT_1 constr_122_arg_0 = var_121; VAL [constr_122_arg_0=1, input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L130] CALL assume_abort_if_not(constr_122_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L130] RET assume_abort_if_not(constr_122_arg_0) VAL [constr_122_arg_0=1, input_8=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L131] SORT_15 var_23_arg_0 = state_19; [L132] SORT_15 var_23_arg_1 = state_16; [L133] SORT_1 var_23 = var_23_arg_0 == var_23_arg_1; [L134] SORT_1 var_123_arg_0 = var_23; [L135] SORT_1 var_123 = ~var_123_arg_0; [L136] SORT_5 var_22_arg_0 = input_8; [L137] SORT_1 var_22 = var_22_arg_0 >> 1; [L138] SORT_1 var_124_arg_0 = var_22; [L139] SORT_1 var_124 = ~var_124_arg_0; [L140] SORT_1 var_125_arg_0 = var_123; [L141] SORT_1 var_125_arg_1 = var_124; VAL [constr_122_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_125_arg_0=-2, var_125_arg_1=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L142] EXPR var_125_arg_0 | var_125_arg_1 VAL [constr_122_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L142] SORT_1 var_125 = var_125_arg_0 | var_125_arg_1; [L143] SORT_1 var_126_arg_0 = var_109; [L144] SORT_1 var_126 = ~var_126_arg_0; [L145] SORT_1 var_127_arg_0 = var_125; [L146] SORT_1 var_127_arg_1 = var_126; VAL [constr_122_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_127_arg_0=256, var_127_arg_1=-2, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L147] EXPR var_127_arg_0 | var_127_arg_1 VAL [constr_122_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L147] SORT_1 var_127 = var_127_arg_0 | var_127_arg_1; [L148] EXPR var_127 & mask_SORT_1 VAL [constr_122_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L148] var_127 = var_127 & mask_SORT_1 [L149] SORT_1 constr_128_arg_0 = var_127; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L150] CALL assume_abort_if_not(constr_128_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L150] RET assume_abort_if_not(constr_128_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L151] SORT_15 var_49_arg_0 = state_48; [L152] SORT_12 var_49 = var_49_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_49=0, var_51=1, var_52=1, var_99=0] [L153] EXPR var_49 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_51=1, var_52=1, var_99=0] [L153] var_49 = var_49 & mask_SORT_12 [L154] SORT_15 var_46_arg_0 = state_45; [L155] SORT_12 var_46 = var_46_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L156] EXPR var_46 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_49=0, var_51=1, var_52=1, var_99=0] [L156] var_46 = var_46 & mask_SORT_12 [L157] SORT_12 var_73_arg_0 = var_49; [L158] SORT_12 var_73_arg_1 = var_46; [L159] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L160] SORT_15 var_74_arg_0 = state_48; [L161] SORT_1 var_74 = var_74_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_74=0, var_99=0] [L162] EXPR var_74 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_99=0] [L162] var_74 = var_74 & mask_SORT_1 [L163] SORT_15 var_75_arg_0 = state_45; [L164] SORT_1 var_75 = var_75_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_74=0, var_75=0, var_99=0] [L165] EXPR var_75 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_73=1, var_74=0, var_99=0] [L165] var_75 = var_75 & mask_SORT_1 [L166] SORT_1 var_76_arg_0 = var_74; [L167] SORT_1 var_76_arg_1 = var_75; [L168] SORT_1 var_76 = var_76_arg_0 != var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_73; [L170] SORT_1 var_77_arg_1 = var_76; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_77_arg_0=1, var_77_arg_1=0, var_99=0] [L171] EXPR var_77_arg_0 & var_77_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L171] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L172] EXPR var_77 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L172] var_77 = var_77 & mask_SORT_1 [L173] SORT_1 var_129_arg_0 = var_77; [L174] SORT_1 var_129 = ~var_129_arg_0; [L175] SORT_5 var_92_arg_0 = input_6; [L176] SORT_1 var_92 = var_92_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_129=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L177] EXPR var_92 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_129=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_99=0] [L177] var_92 = var_92 & mask_SORT_1 [L178] SORT_1 var_130_arg_0 = var_92; [L179] SORT_1 var_130 = ~var_130_arg_0; [L180] SORT_1 var_131_arg_0 = var_129; [L181] SORT_1 var_131_arg_1 = var_130; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_131_arg_0=-1, var_131_arg_1=-1, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L182] EXPR var_131_arg_0 | var_131_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L182] SORT_1 var_131 = var_131_arg_0 | var_131_arg_1; [L183] SORT_1 var_132_arg_0 = var_109; [L184] SORT_1 var_132 = ~var_132_arg_0; [L185] SORT_1 var_133_arg_0 = var_131; [L186] SORT_1 var_133_arg_1 = var_132; VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_133_arg_0=255, var_133_arg_1=-2, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L187] EXPR var_133_arg_0 | var_133_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L187] SORT_1 var_133 = var_133_arg_0 | var_133_arg_1; [L188] EXPR var_133 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L188] var_133 = var_133 & mask_SORT_1 [L189] SORT_1 constr_134_arg_0 = var_133; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L190] CALL assume_abort_if_not(constr_134_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L190] RET assume_abort_if_not(constr_134_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L191] SORT_15 var_20_arg_0 = state_19; [L192] SORT_12 var_20 = var_20_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L193] EXPR var_20 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L193] var_20 = var_20 & mask_SORT_12 [L194] SORT_15 var_17_arg_0 = state_16; [L195] SORT_12 var_17 = var_17_arg_0 >> 0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L196] EXPR var_17 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L196] var_17 = var_17 & mask_SORT_12 [L197] SORT_12 var_78_arg_0 = var_20; [L198] SORT_12 var_78_arg_1 = var_17; [L199] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L200] SORT_15 var_79_arg_0 = state_19; [L201] SORT_1 var_79 = var_79_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_79=0, var_92=0, var_99=0] [L202] EXPR var_79 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_92=0, var_99=0] [L202] var_79 = var_79 & mask_SORT_1 [L203] SORT_15 var_80_arg_0 = state_16; [L204] SORT_1 var_80 = var_80_arg_0 >> 3; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_79=0, var_80=0, var_92=0, var_99=0] [L205] EXPR var_80 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_78=1, var_79=0, var_92=0, var_99=0] [L205] var_80 = var_80 & mask_SORT_1 [L206] SORT_1 var_81_arg_0 = var_79; [L207] SORT_1 var_81_arg_1 = var_80; [L208] SORT_1 var_81 = var_81_arg_0 != var_81_arg_1; [L209] SORT_1 var_82_arg_0 = var_78; [L210] SORT_1 var_82_arg_1 = var_81; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_82_arg_0=1, var_82_arg_1=0, var_92=0, var_99=0] [L211] EXPR var_82_arg_0 & var_82_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_6=0, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L211] SORT_1 var_82 = var_82_arg_0 & var_82_arg_1; [L212] SORT_1 var_135_arg_0 = var_82; [L213] SORT_1 var_135 = ~var_135_arg_0; [L214] SORT_5 var_136_arg_0 = input_6; [L215] SORT_1 var_136 = var_136_arg_0 >> 1; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_135=-1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L216] EXPR var_136 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_135=-1, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L216] var_136 = var_136 & mask_SORT_1 [L217] SORT_1 var_137_arg_0 = var_136; [L218] SORT_1 var_137 = ~var_137_arg_0; [L219] SORT_1 var_138_arg_0 = var_135; [L220] SORT_1 var_138_arg_1 = var_137; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_138_arg_0=-1, var_138_arg_1=-1, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L221] EXPR var_138_arg_0 | var_138_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L221] SORT_1 var_138 = var_138_arg_0 | var_138_arg_1; [L222] SORT_1 var_139_arg_0 = var_109; [L223] SORT_1 var_139 = ~var_139_arg_0; [L224] SORT_1 var_140_arg_0 = var_138; [L225] SORT_1 var_140_arg_1 = var_139; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_140_arg_0=255, var_140_arg_1=-2, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L226] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L226] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L227] EXPR var_140 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L227] var_140 = var_140 & mask_SORT_1 [L228] SORT_1 constr_141_arg_0 = var_140; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L229] CALL assume_abort_if_not(constr_141_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L229] RET assume_abort_if_not(constr_141_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L230] SORT_1 var_142_arg_0 = state_111; [L231] SORT_1 var_142_arg_1 = input_9; [L232] SORT_1 var_142 = var_142_arg_0 == var_142_arg_1; [L233] SORT_1 var_143_arg_0 = var_109; [L234] SORT_1 var_143 = ~var_143_arg_0; [L235] SORT_1 var_144_arg_0 = var_142; [L236] SORT_1 var_144_arg_1 = var_143; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_144_arg_0=0, var_144_arg_1=-2, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L237] EXPR var_144_arg_0 | var_144_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L237] SORT_1 var_144 = var_144_arg_0 | var_144_arg_1; [L238] EXPR var_144 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L238] var_144 = var_144 & mask_SORT_1 [L239] SORT_1 constr_145_arg_0 = var_144; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L240] CALL assume_abort_if_not(constr_145_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L240] RET assume_abort_if_not(constr_145_arg_0) VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_111=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L242] SORT_1 var_113_arg_0 = state_111; [L243] SORT_1 var_113_arg_1 = var_110; [L244] SORT_1 var_113_arg_2 = var_109; [L245] SORT_1 var_113 = var_113_arg_0 ? var_113_arg_1 : var_113_arg_2; [L246] SORT_1 var_87_arg_0 = state_86; [L247] SORT_1 var_87 = ~var_87_arg_0; [L248] SORT_1 var_88_arg_0 = state_85; [L249] SORT_1 var_88_arg_1 = var_87; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_88_arg_0=0, var_88_arg_1=-1, var_92=0, var_99=0] [L250] EXPR var_88_arg_0 & var_88_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L250] SORT_1 var_88 = var_88_arg_0 & var_88_arg_1; [L251] SORT_15 var_90_arg_0 = state_89; [L252] SORT_1 var_90 = var_90_arg_0 != 0; [L253] SORT_1 var_91_arg_0 = var_88; [L254] SORT_1 var_91_arg_1 = var_90; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91_arg_0=0, var_91_arg_1=0, var_92=0, var_99=0] [L255] EXPR var_91_arg_0 & var_91_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_92=0, var_99=0] [L255] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L256] SORT_1 var_93_arg_0 = state_85; [L257] SORT_1 var_93 = ~var_93_arg_0; [L258] SORT_1 var_94_arg_0 = var_92; [L259] SORT_1 var_94_arg_1 = var_93; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_94_arg_0=0, var_94_arg_1=-1, var_99=0] [L260] EXPR var_94_arg_0 & var_94_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_99=0] [L260] SORT_1 var_94 = var_94_arg_0 & var_94_arg_1; [L261] SORT_1 var_95_arg_0 = var_94; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_95_arg_0=0, var_99=0] [L262] EXPR var_95_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_51=1, var_52=1, var_91=0, var_92=0, var_93=-1, var_99=0] [L262] var_95_arg_0 = var_95_arg_0 & mask_SORT_1 [L263] SORT_15 var_95 = var_95_arg_0; [L264] SORT_15 var_96_arg_0 = state_89; [L265] SORT_15 var_96_arg_1 = var_95; [L266] SORT_15 var_96 = var_96_arg_0 + var_96_arg_1; [L267] SORT_1 var_53_arg_0 = var_52; [L268] SORT_1 var_53 = ~var_53_arg_0; [L269] SORT_1 var_54_arg_0 = var_51; [L270] SORT_1 var_54_arg_1 = var_53; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54_arg_0=1, var_54_arg_1=-2, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L271] EXPR var_54_arg_0 & var_54_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L271] SORT_1 var_54 = var_54_arg_0 & var_54_arg_1; [L272] EXPR var_54 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L272] var_54 = var_54 & mask_SORT_1 [L273] SORT_15 var_56_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_56_arg_0=8, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L274] EXPR var_56_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L274] var_56_arg_0 = var_56_arg_0 & mask_SORT_15 [L275] SORT_11 var_56 = var_56_arg_0; [L276] SORT_11 var_57_arg_0 = state_55; [L277] SORT_11 var_57_arg_1 = var_56; [L278] SORT_1 var_57 = var_57_arg_0 >= var_57_arg_1; [L279] SORT_1 var_58_arg_0 = var_54; [L280] SORT_1 var_58_arg_1 = var_57; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_58_arg_0=0, var_58_arg_1=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L281] EXPR var_58_arg_0 & var_58_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L281] SORT_1 var_58 = var_58_arg_0 & var_58_arg_1; [L282] SORT_1 var_59_arg_0 = state_31; [L283] SORT_1 var_59 = ~var_59_arg_0; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_58=0, var_59=-1, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L284] EXPR var_59 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_58=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L284] var_59 = var_59 & mask_SORT_1 [L285] SORT_1 var_60_arg_0 = var_58; [L286] SORT_1 var_60_arg_1 = var_59; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60_arg_0=0, var_60_arg_1=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L287] EXPR var_60_arg_0 & var_60_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L287] SORT_1 var_60 = var_60_arg_0 & var_60_arg_1; [L288] EXPR var_60 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L288] var_60 = var_60 & mask_SORT_1 [L289] SORT_1 var_97_arg_0 = var_60; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_97_arg_0=0, var_99=0] [L290] EXPR var_97_arg_0 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_96=0, var_99=0] [L290] var_97_arg_0 = var_97_arg_0 & mask_SORT_1 [L291] SORT_15 var_97 = var_97_arg_0; [L292] SORT_15 var_98_arg_0 = var_96; [L293] SORT_15 var_98_arg_1 = var_97; [L294] SORT_15 var_98 = var_98_arg_0 - var_98_arg_1; [L295] SORT_1 var_100_arg_0 = input_9; [L296] SORT_15 var_100_arg_1 = var_99; [L297] SORT_15 var_100_arg_2 = var_98; [L298] SORT_15 var_100 = var_100_arg_0 ? var_100_arg_1 : var_100_arg_2; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_99=0] [L299] EXPR var_100 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_91=0, var_92=0, var_93=-1, var_99=0] [L299] var_100 = var_100 & mask_SORT_15 [L300] SORT_15 var_101_arg_0 = var_100; [L301] SORT_1 var_101 = var_101_arg_0 != 0; [L302] SORT_1 var_102_arg_0 = var_101; [L303] SORT_1 var_102 = ~var_102_arg_0; [L304] SORT_1 var_103_arg_0 = var_91; [L305] SORT_1 var_103_arg_1 = var_102; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103_arg_0=0, var_103_arg_1=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L306] EXPR var_103_arg_0 & var_103_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_20=0, var_22=0, var_23=1, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L306] SORT_1 var_103 = var_103_arg_0 & var_103_arg_1; [L307] SORT_1 var_104_arg_0 = var_103; [L308] SORT_1 var_104 = ~var_104_arg_0; [L309] SORT_11* var_21_arg_0 = state_14; [L310] SORT_12 var_21_arg_1 = var_20; [L311] EXPR var_21_arg_0[(unsigned char) var_21_arg_1] [L311] SORT_11 var_21 = var_21_arg_0[(unsigned char) var_21_arg_1]; [L312] SORT_1 var_24_arg_0 = var_23; [L313] SORT_1 var_24 = ~var_24_arg_0; [L314] SORT_1 var_25_arg_0 = var_22; [L315] SORT_1 var_25_arg_1 = var_24; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25_arg_0=0, var_25_arg_1=-2, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L316] EXPR var_25_arg_0 & var_25_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L316] SORT_1 var_25 = var_25_arg_0 & var_25_arg_1; [L317] SORT_15 var_28_arg_0 = var_27; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_28_arg_0=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L318] EXPR var_28_arg_0 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L318] var_28_arg_0 = var_28_arg_0 & mask_SORT_15 [L319] SORT_11 var_28 = var_28_arg_0; [L320] SORT_11 var_29_arg_0 = state_26; [L321] SORT_11 var_29_arg_1 = var_28; [L322] SORT_1 var_29 = var_29_arg_0 >= var_29_arg_1; [L323] SORT_1 var_30_arg_0 = var_25; [L324] SORT_1 var_30_arg_1 = var_29; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_30_arg_0=0, var_30_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L325] EXPR var_30_arg_0 & var_30_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L325] SORT_1 var_30 = var_30_arg_0 & var_30_arg_1; [L326] SORT_1 var_32_arg_0 = var_30; [L327] SORT_1 var_32_arg_1 = state_31; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32_arg_0=0, var_32_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L328] EXPR var_32_arg_0 & var_32_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L328] SORT_1 var_32 = var_32_arg_0 & var_32_arg_1; [L329] EXPR var_32 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L329] var_32 = var_32 & mask_SORT_1 [L330] SORT_1 var_33_arg_0 = var_32; [L331] SORT_1 var_33_arg_1 = var_32; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_33_arg_0=0, var_33_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L332] EXPR ((SORT_5)var_33_arg_0 << 1) | var_33_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L332] SORT_5 var_33 = ((SORT_5)var_33_arg_0 << 1) | var_33_arg_1; [L333] EXPR var_33 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L333] var_33 = var_33 & mask_SORT_5 [L334] SORT_1 var_34_arg_0 = var_32; [L335] SORT_5 var_34_arg_1 = var_33; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_34_arg_0=0, var_34_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L336] EXPR ((SORT_12)var_34_arg_0 << 2) | var_34_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L336] SORT_12 var_34 = ((SORT_12)var_34_arg_0 << 2) | var_34_arg_1; [L337] EXPR var_34 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L337] var_34 = var_34 & mask_SORT_12 [L338] SORT_1 var_35_arg_0 = var_32; [L339] SORT_12 var_35_arg_1 = var_34; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_35_arg_0=0, var_35_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L340] EXPR ((SORT_15)var_35_arg_0 << 3) | var_35_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L340] SORT_15 var_35 = ((SORT_15)var_35_arg_0 << 3) | var_35_arg_1; [L341] EXPR var_35 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L341] var_35 = var_35 & mask_SORT_15 [L342] SORT_1 var_37_arg_0 = var_32; [L343] SORT_15 var_37_arg_1 = var_35; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_37_arg_0=0, var_37_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L344] EXPR ((SORT_36)var_37_arg_0 << 4) | var_37_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L344] SORT_36 var_37 = ((SORT_36)var_37_arg_0 << 4) | var_37_arg_1; [L345] EXPR var_37 & mask_SORT_36 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L345] var_37 = var_37 & mask_SORT_36 [L346] SORT_1 var_39_arg_0 = var_32; [L347] SORT_36 var_39_arg_1 = var_37; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_39_arg_0=0, var_39_arg_1=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L348] EXPR ((SORT_38)var_39_arg_0 << 5) | var_39_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L348] SORT_38 var_39 = ((SORT_38)var_39_arg_0 << 5) | var_39_arg_1; [L349] EXPR var_39 & mask_SORT_38 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L349] var_39 = var_39 & mask_SORT_38 [L350] SORT_1 var_41_arg_0 = var_32; [L351] SORT_38 var_41_arg_1 = var_39; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_41_arg_0=0, var_41_arg_1=0, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L352] EXPR ((SORT_40)var_41_arg_0 << 6) | var_41_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L352] SORT_40 var_41 = ((SORT_40)var_41_arg_0 << 6) | var_41_arg_1; [L353] EXPR var_41 & mask_SORT_40 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L353] var_41 = var_41 & mask_SORT_40 [L354] SORT_1 var_42_arg_0 = var_32; [L355] SORT_40 var_42_arg_1 = var_41; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_42_arg_0=0, var_42_arg_1=0, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L356] EXPR ((SORT_11)var_42_arg_0 << 7) | var_42_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_21=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L356] SORT_11 var_42 = ((SORT_11)var_42_arg_0 << 7) | var_42_arg_1; [L357] SORT_11 var_43_arg_0 = var_21; [L358] SORT_11 var_43_arg_1 = var_42; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43_arg_0=0, var_43_arg_1=0, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L359] EXPR var_43_arg_0 & var_43_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_49=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L359] SORT_11 var_43 = var_43_arg_0 & var_43_arg_1; [L360] SORT_11* var_50_arg_0 = state_44; [L361] SORT_12 var_50_arg_1 = var_49; [L362] EXPR var_50_arg_0[(unsigned char) var_50_arg_1] [L362] SORT_11 var_50 = var_50_arg_0[(unsigned char) var_50_arg_1]; [L363] EXPR var_50 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L363] var_50 = var_50 & mask_SORT_11 [L364] SORT_1 var_61_arg_0 = var_60; [L365] SORT_1 var_61_arg_1 = var_60; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_61_arg_0=0, var_61_arg_1=0, var_92=0, var_93=-1, var_99=0] [L366] EXPR ((SORT_5)var_61_arg_0 << 1) | var_61_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L366] SORT_5 var_61 = ((SORT_5)var_61_arg_0 << 1) | var_61_arg_1; [L367] EXPR var_61 & mask_SORT_5 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L367] var_61 = var_61 & mask_SORT_5 [L368] SORT_1 var_62_arg_0 = var_60; [L369] SORT_5 var_62_arg_1 = var_61; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_62_arg_0=0, var_62_arg_1=0, var_92=0, var_93=-1, var_99=0] [L370] EXPR ((SORT_12)var_62_arg_0 << 2) | var_62_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L370] SORT_12 var_62 = ((SORT_12)var_62_arg_0 << 2) | var_62_arg_1; [L371] EXPR var_62 & mask_SORT_12 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L371] var_62 = var_62 & mask_SORT_12 [L372] SORT_1 var_63_arg_0 = var_60; [L373] SORT_12 var_63_arg_1 = var_62; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_63_arg_0=0, var_63_arg_1=0, var_92=0, var_93=-1, var_99=0] [L374] EXPR ((SORT_15)var_63_arg_0 << 3) | var_63_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L374] SORT_15 var_63 = ((SORT_15)var_63_arg_0 << 3) | var_63_arg_1; [L375] EXPR var_63 & mask_SORT_15 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L375] var_63 = var_63 & mask_SORT_15 [L376] SORT_1 var_64_arg_0 = var_60; [L377] SORT_15 var_64_arg_1 = var_63; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_64_arg_0=0, var_64_arg_1=0, var_92=0, var_93=-1, var_99=0] [L378] EXPR ((SORT_36)var_64_arg_0 << 4) | var_64_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L378] SORT_36 var_64 = ((SORT_36)var_64_arg_0 << 4) | var_64_arg_1; [L379] EXPR var_64 & mask_SORT_36 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L379] var_64 = var_64 & mask_SORT_36 [L380] SORT_1 var_65_arg_0 = var_60; [L381] SORT_36 var_65_arg_1 = var_64; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_65_arg_0=0, var_65_arg_1=0, var_92=0, var_93=-1, var_99=0] [L382] EXPR ((SORT_38)var_65_arg_0 << 5) | var_65_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L382] SORT_38 var_65 = ((SORT_38)var_65_arg_0 << 5) | var_65_arg_1; [L383] EXPR var_65 & mask_SORT_38 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L383] var_65 = var_65 & mask_SORT_38 [L384] SORT_1 var_66_arg_0 = var_60; [L385] SORT_38 var_66_arg_1 = var_65; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_66_arg_0=0, var_66_arg_1=0, var_92=0, var_93=-1, var_99=0] [L386] EXPR ((SORT_40)var_66_arg_0 << 6) | var_66_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L386] SORT_40 var_66 = ((SORT_40)var_66_arg_0 << 6) | var_66_arg_1; [L387] EXPR var_66 & mask_SORT_40 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L387] var_66 = var_66 & mask_SORT_40 [L388] SORT_1 var_67_arg_0 = var_60; [L389] SORT_40 var_67_arg_1 = var_66; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_67_arg_0=0, var_67_arg_1=0, var_92=0, var_93=-1, var_99=0] [L390] EXPR ((SORT_11)var_67_arg_0 << 7) | var_67_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_50=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L390] SORT_11 var_67 = ((SORT_11)var_67_arg_0 << 7) | var_67_arg_1; [L391] SORT_11 var_68_arg_0 = var_50; [L392] SORT_11 var_68_arg_1 = var_67; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_54=0, var_59=0, var_60=0, var_68_arg_0=0, var_68_arg_1=0, var_92=0, var_93=-1, var_99=0] [L393] EXPR var_68_arg_0 & var_68_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_43=0, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L393] SORT_11 var_68 = var_68_arg_0 & var_68_arg_1; [L394] SORT_11 var_69_arg_0 = var_43; [L395] SORT_11 var_69_arg_1 = var_68; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_69_arg_0=0, var_69_arg_1=0, var_92=0, var_93=-1, var_99=0] [L396] EXPR var_69_arg_0 | var_69_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L396] SORT_11 var_69 = var_69_arg_0 | var_69_arg_1; [L397] EXPR var_69 & mask_SORT_11 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_104=-1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L397] var_69 = var_69 & mask_SORT_11 [L398] SORT_11 var_106_arg_0 = state_105; [L399] SORT_11 var_106_arg_1 = var_69; [L400] SORT_1 var_106 = var_106_arg_0 == var_106_arg_1; [L401] SORT_1 var_107_arg_0 = var_104; [L402] SORT_1 var_107_arg_1 = var_106; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_107_arg_0=-1, var_107_arg_1=1, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L403] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_113=1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L403] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L404] SORT_1 var_114_arg_0 = var_107; [L405] SORT_1 var_114 = ~var_114_arg_0; [L406] SORT_1 var_115_arg_0 = var_113; [L407] SORT_1 var_115_arg_1 = var_114; VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_115_arg_0=1, var_115_arg_1=-1, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L408] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L408] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L409] EXPR var_115 & mask_SORT_1 VAL [constr_122_arg_0=1, constr_128_arg_0=1, constr_134_arg_0=1, constr_141_arg_0=1, constr_145_arg_0=1, input_9=1, mask_SORT_11=255, mask_SORT_12=7, mask_SORT_15=15, mask_SORT_1=1, mask_SORT_36=31, mask_SORT_38=63, mask_SORT_40=127, mask_SORT_5=3, state_105=0, state_14={10:0}, state_16=0, state_19=0, state_26=0, state_31=0, state_44={11:0}, state_45=0, state_48=0, state_55=0, state_85=0, state_86=0, state_89=0, var_100=0, var_103=0, var_109=1, var_110=0, var_136=0, var_17=0, var_183=0, var_25=0, var_27=8, var_32=0, var_410=255, var_46=0, var_54=0, var_59=0, var_60=0, var_92=0, var_93=-1, var_99=0] [L409] var_115 = var_115 & mask_SORT_1 [L410] SORT_1 bad_116_arg_0 = var_115; [L411] CALL __VERIFIER_assert(!(bad_116_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 753 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 681.0s, OverallIterations: 94, TraceHistogramMax: 10, PathProgramHistogramMax: 3, EmptinessCheckTime: 0.9s, AutomataDifference: 85.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 90245 SdHoareTripleChecker+Valid, 63.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 90073 mSDsluCounter, 589531 SdHoareTripleChecker+Invalid, 54.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 487912 mSDsCounter, 274 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 89347 IncrementalHoareTripleChecker+Invalid, 89621 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 274 mSolverCounterUnsat, 101619 mSDtfsCounter, 89347 mSolverCounterSat, 1.6s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 46397 GetRequests, 45310 SyntacticMatches, 2 SemanticMatches, 1085 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8420 ImplicationChecksByTransitivity, 21.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24237occurred in iteration=93, InterpolantAutomatonStates: 790, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 12.3s AutomataMinimizationTime, 93 MinimizatonAttempts, 100427 StatesRemovedByMinimization, 49 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 12.7s SsaConstructionTime, 232.9s SatisfiabilityAnalysisTime, 236.8s InterpolantComputationTime, 88252 NumberOfCodeBlocks, 84787 NumberOfCodeBlocksAsserted, 136 NumberOfCheckSat, 105135 ConstructedInterpolants, 0 QuantifiedInterpolants, 349344 SizeOfPredicates, 104 NumberOfNonLiveVariables, 109424 ConjunctsInSsa, 1279 ConjunctsInUnsatCore, 162 InterpolantComputations, 77 PerfectInterpolantSequences, 100643/103876 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-08 16:47:29,962 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/lib/jvm/java-11-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 1d054f79132e175b09d8c50472a4c24ca52f401c76e1d0704dd5609a369827e2 --- Real Ultimate output --- This is Ultimate 0.2.5-dev-a016563 [2024-11-08 16:47:32,887 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-08 16:47:33,011 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-08 16:47:33,021 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-08 16:47:33,021 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-08 16:47:33,067 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-08 16:47:33,068 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-08 16:47:33,068 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-08 16:47:33,069 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-08 16:47:33,069 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-08 16:47:33,070 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-08 16:47:33,070 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-08 16:47:33,071 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-08 16:47:33,071 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-08 16:47:33,072 INFO L153 SettingsManager]: * Use SBE=true [2024-11-08 16:47:33,074 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-08 16:47:33,076 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-08 16:47:33,079 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-08 16:47:33,080 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-08 16:47:33,080 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-08 16:47:33,080 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-08 16:47:33,081 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-08 16:47:33,081 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-08 16:47:33,081 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-08 16:47:33,082 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-08 16:47:33,082 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-08 16:47:33,083 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-08 16:47:33,084 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-08 16:47:33,085 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-08 16:47:33,085 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-08 16:47:33,086 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-08 16:47:33,086 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-08 16:47:33,087 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-08 16:47:33,088 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-08 16:47:33,088 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-08 16:47:33,089 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-08 16:47:33,090 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-08 16:47:33,090 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-08 16:47:33,090 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-08 16:47:33,091 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-08 16:47:33,091 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-08 16:47:33,091 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1d054f79132e175b09d8c50472a4c24ca52f401c76e1d0704dd5609a369827e2 [2024-11-08 16:47:33,597 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-08 16:47:33,628 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-08 16:47:33,632 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-08 16:47:33,634 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-08 16:47:33,634 INFO L274 PluginConnector]: CDTParser initialized [2024-11-08 16:47:33,636 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/../../sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c Unable to find full path for "g++" [2024-11-08 16:47:35,946 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-08 16:47:36,327 INFO L384 CDTParser]: Found 1 translation units. [2024-11-08 16:47:36,328 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c [2024-11-08 16:47:36,346 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data/c597af55f/7e5c6b7318c248388f9fe6f31bb94fc6/FLAGbaf1bd8d6 [2024-11-08 16:47:36,364 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/data/c597af55f/7e5c6b7318c248388f9fe6f31bb94fc6 [2024-11-08 16:47:36,367 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-08 16:47:36,369 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-08 16:47:36,370 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-08 16:47:36,371 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-08 16:47:36,377 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-08 16:47:36,378 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:47:36" (1/1) ... [2024-11-08 16:47:36,380 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8925215 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:36, skipping insertion in model container [2024-11-08 16:47:36,380 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.11 04:47:36" (1/1) ... [2024-11-08 16:47:36,445 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-08 16:47:36,764 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c[1268,1281] [2024-11-08 16:47:37,118 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 16:47:37,131 INFO L200 MainTranslator]: Completed pre-run [2024-11-08 16:47:37,147 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/sv-benchmarks/c/hardware-verification-array/btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c[1268,1281] [2024-11-08 16:47:37,318 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-08 16:47:37,339 INFO L204 MainTranslator]: Completed translation [2024-11-08 16:47:37,340 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37 WrapperNode [2024-11-08 16:47:37,340 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-08 16:47:37,341 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-08 16:47:37,341 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-08 16:47:37,342 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-08 16:47:37,360 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,398 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,492 INFO L138 Inliner]: procedures = 18, calls = 41, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 954 [2024-11-08 16:47:37,492 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-08 16:47:37,493 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-08 16:47:37,493 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-08 16:47:37,494 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-08 16:47:37,515 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,519 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,530 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,585 INFO L175 MemorySlicer]: Split 20 memory accesses to 3 slices as follows [2, 9, 9]. 45 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 8 writes are split as follows [0, 4, 4]. [2024-11-08 16:47:37,589 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,589 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,619 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,624 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,628 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,634 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,645 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-08 16:47:37,646 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-08 16:47:37,646 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-08 16:47:37,646 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-08 16:47:37,647 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (1/1) ... [2024-11-08 16:47:37,654 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-08 16:47:37,680 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:37,702 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-08 16:47:37,707 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-08 16:47:37,782 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-08 16:47:37,783 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1#0 [2024-11-08 16:47:37,783 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1#1 [2024-11-08 16:47:37,784 INFO L130 BoogieDeclarations]: Found specification of procedure read~intINTTYPE1#2 [2024-11-08 16:47:37,784 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-08 16:47:37,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#1 [2024-11-08 16:47:37,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#2 [2024-11-08 16:47:37,785 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-08 16:47:37,785 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-08 16:47:37,785 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-08 16:47:37,786 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-08 16:47:37,786 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-08 16:47:37,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1#0 [2024-11-08 16:47:37,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1#1 [2024-11-08 16:47:37,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~intINTTYPE1#2 [2024-11-08 16:47:37,786 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-08 16:47:38,115 INFO L238 CfgBuilder]: Building ICFG [2024-11-08 16:47:38,119 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-08 16:47:39,354 INFO L? ?]: Removed 687 outVars from TransFormulas that were not future-live. [2024-11-08 16:47:39,354 INFO L287 CfgBuilder]: Performing block encoding [2024-11-08 16:47:39,368 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-08 16:47:39,368 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-08 16:47:39,369 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:47:39 BoogieIcfgContainer [2024-11-08 16:47:39,369 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-08 16:47:39,371 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-08 16:47:39,372 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-08 16:47:39,375 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-08 16:47:39,376 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.11 04:47:36" (1/3) ... [2024-11-08 16:47:39,377 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@638a9390 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:47:39, skipping insertion in model container [2024-11-08 16:47:39,377 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.11 04:47:37" (2/3) ... [2024-11-08 16:47:39,377 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@638a9390 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.11 04:47:39, skipping insertion in model container [2024-11-08 16:47:39,378 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.11 04:47:39" (3/3) ... [2024-11-08 16:47:39,379 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.safe_arbitrated_fifos_n2d8w8.c [2024-11-08 16:47:39,401 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-08 16:47:39,402 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-11-08 16:47:39,472 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-08 16:47:39,480 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3a8d84fa, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-08 16:47:39,481 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-08 16:47:39,485 INFO L276 IsEmpty]: Start isEmpty. Operand has 43 states, 35 states have (on average 1.4857142857142858) internal successors, (52), 36 states have internal predecessors, (52), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:47:39,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-08 16:47:39,496 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:39,497 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:39,497 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:39,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:39,504 INFO L85 PathProgramCache]: Analyzing trace with hash 1940288848, now seen corresponding path program 1 times [2024-11-08 16:47:39,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:39,522 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [634588245] [2024-11-08 16:47:39,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:39,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:39,523 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:39,526 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:39,528 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-08 16:47:40,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:40,090 INFO L255 TraceCheckSpWp]: Trace formula consists of 376 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-08 16:47:40,099 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:40,131 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-11-08 16:47:40,131 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:40,132 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:40,133 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [634588245] [2024-11-08 16:47:40,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [634588245] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:40,134 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:40,134 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-08 16:47:40,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343879913] [2024-11-08 16:47:40,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:40,142 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-08 16:47:40,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:40,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-08 16:47:40,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-08 16:47:40,175 INFO L87 Difference]: Start difference. First operand has 43 states, 35 states have (on average 1.4857142857142858) internal successors, (52), 36 states have internal predecessors, (52), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) Second operand has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:47:40,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:40,203 INFO L93 Difference]: Finished difference Result 74 states and 114 transitions. [2024-11-08 16:47:40,204 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-08 16:47:40,205 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) Word has length 39 [2024-11-08 16:47:40,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:40,214 INFO L225 Difference]: With dead ends: 74 [2024-11-08 16:47:40,214 INFO L226 Difference]: Without dead ends: 39 [2024-11-08 16:47:40,218 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-08 16:47:40,222 INFO L432 NwaCegarLoop]: 55 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:40,224 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:47:40,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2024-11-08 16:47:40,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2024-11-08 16:47:40,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 32 states have (on average 1.40625) internal successors, (45), 32 states have internal predecessors, (45), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:47:40,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 55 transitions. [2024-11-08 16:47:40,272 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 55 transitions. Word has length 39 [2024-11-08 16:47:40,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:40,273 INFO L471 AbstractCegarLoop]: Abstraction has 39 states and 55 transitions. [2024-11-08 16:47:40,276 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 9.5) internal successors, (19), 2 states have internal predecessors, (19), 2 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-08 16:47:40,276 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 55 transitions. [2024-11-08 16:47:40,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-08 16:47:40,279 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:40,281 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:40,308 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-08 16:47:40,483 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:40,484 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:40,485 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:40,485 INFO L85 PathProgramCache]: Analyzing trace with hash 150186630, now seen corresponding path program 1 times [2024-11-08 16:47:40,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:40,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1870784024] [2024-11-08 16:47:40,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:40,486 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:40,487 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:40,489 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:40,493 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-08 16:47:41,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:41,017 INFO L255 TraceCheckSpWp]: Trace formula consists of 376 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 16:47:41,022 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:41,055 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-08 16:47:41,055 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:41,056 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:41,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1870784024] [2024-11-08 16:47:41,056 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1870784024] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:41,057 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:41,057 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:47:41,057 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659339974] [2024-11-08 16:47:41,057 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:41,059 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:47:41,059 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:41,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:47:41,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:41,061 INFO L87 Difference]: Start difference. First operand 39 states and 55 transitions. Second operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:47:41,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:41,095 INFO L93 Difference]: Finished difference Result 76 states and 108 transitions. [2024-11-08 16:47:41,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:47:41,096 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 39 [2024-11-08 16:47:41,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:41,097 INFO L225 Difference]: With dead ends: 76 [2024-11-08 16:47:41,097 INFO L226 Difference]: Without dead ends: 41 [2024-11-08 16:47:41,098 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:41,099 INFO L432 NwaCegarLoop]: 53 mSDtfsCounter, 1 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 102 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:41,100 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 102 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:47:41,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2024-11-08 16:47:41,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2024-11-08 16:47:41,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 34 states have (on average 1.3823529411764706) internal successors, (47), 34 states have internal predecessors, (47), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:47:41,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 57 transitions. [2024-11-08 16:47:41,110 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 57 transitions. Word has length 39 [2024-11-08 16:47:41,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:41,113 INFO L471 AbstractCegarLoop]: Abstraction has 41 states and 57 transitions. [2024-11-08 16:47:41,113 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 3 states have internal predecessors, (17), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:47:41,114 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2024-11-08 16:47:41,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2024-11-08 16:47:41,117 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:41,118 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:41,146 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-08 16:47:41,318 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:41,320 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:41,321 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:41,325 INFO L85 PathProgramCache]: Analyzing trace with hash -1487602527, now seen corresponding path program 1 times [2024-11-08 16:47:41,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:41,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1861840572] [2024-11-08 16:47:41,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:41,326 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:41,327 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:41,330 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:41,332 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-08 16:47:41,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:41,810 INFO L255 TraceCheckSpWp]: Trace formula consists of 382 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 16:47:41,815 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:41,832 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:47:41,836 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:41,836 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:41,836 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1861840572] [2024-11-08 16:47:41,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1861840572] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:41,837 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:41,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:47:41,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445301639] [2024-11-08 16:47:41,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:41,838 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:47:41,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:41,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:47:41,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:41,839 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:47:41,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:41,882 INFO L93 Difference]: Finished difference Result 75 states and 105 transitions. [2024-11-08 16:47:41,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:47:41,883 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 41 [2024-11-08 16:47:41,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:41,884 INFO L225 Difference]: With dead ends: 75 [2024-11-08 16:47:41,884 INFO L226 Difference]: Without dead ends: 43 [2024-11-08 16:47:41,885 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:41,886 INFO L432 NwaCegarLoop]: 53 mSDtfsCounter, 1 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 101 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:41,887 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 101 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:47:41,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2024-11-08 16:47:41,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2024-11-08 16:47:41,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 36 states have (on average 1.3611111111111112) internal successors, (49), 36 states have internal predecessors, (49), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:47:41,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 59 transitions. [2024-11-08 16:47:41,916 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 59 transitions. Word has length 41 [2024-11-08 16:47:41,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:41,917 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 59 transitions. [2024-11-08 16:47:41,917 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.333333333333333) internal successors, (19), 3 states have internal predecessors, (19), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:47:41,918 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 59 transitions. [2024-11-08 16:47:41,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2024-11-08 16:47:41,920 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:41,921 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:41,947 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-08 16:47:42,121 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:42,122 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:42,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:42,123 INFO L85 PathProgramCache]: Analyzing trace with hash -1021093476, now seen corresponding path program 1 times [2024-11-08 16:47:42,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:42,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [286570720] [2024-11-08 16:47:42,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:42,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:42,125 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:42,127 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:42,130 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-08 16:47:42,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:42,650 INFO L255 TraceCheckSpWp]: Trace formula consists of 388 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 16:47:42,655 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:42,691 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:47:42,692 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:47:42,819 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2024-11-08 16:47:42,820 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:42,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [286570720] [2024-11-08 16:47:42,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [286570720] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:47:42,821 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:47:42,824 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2024-11-08 16:47:42,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472466112] [2024-11-08 16:47:42,824 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:47:42,825 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:47:42,825 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:42,826 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:47:42,826 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:47:42,827 INFO L87 Difference]: Start difference. First operand 43 states and 59 transitions. Second operand has 7 states, 7 states have (on average 4.0) internal successors, (28), 7 states have internal predecessors, (28), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:47:42,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:42,935 INFO L93 Difference]: Finished difference Result 85 states and 120 transitions. [2024-11-08 16:47:42,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:47:42,938 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.0) internal successors, (28), 7 states have internal predecessors, (28), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 43 [2024-11-08 16:47:42,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:42,939 INFO L225 Difference]: With dead ends: 85 [2024-11-08 16:47:42,939 INFO L226 Difference]: Without dead ends: 48 [2024-11-08 16:47:42,940 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:47:42,945 INFO L432 NwaCegarLoop]: 52 mSDtfsCounter, 3 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 150 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:42,945 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 150 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:47:42,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2024-11-08 16:47:42,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2024-11-08 16:47:42,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 41 states have internal predecessors, (53), 5 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 5 states have call predecessors, (5), 5 states have call successors, (5) [2024-11-08 16:47:42,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 63 transitions. [2024-11-08 16:47:42,959 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 63 transitions. Word has length 43 [2024-11-08 16:47:42,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:42,963 INFO L471 AbstractCegarLoop]: Abstraction has 48 states and 63 transitions. [2024-11-08 16:47:42,963 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 4.0) internal successors, (28), 7 states have internal predecessors, (28), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:47:42,963 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 63 transitions. [2024-11-08 16:47:42,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2024-11-08 16:47:42,964 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:42,964 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:42,992 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-08 16:47:43,165 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:43,166 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:43,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:43,167 INFO L85 PathProgramCache]: Analyzing trace with hash -283951315, now seen corresponding path program 2 times [2024-11-08 16:47:43,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:43,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2065065432] [2024-11-08 16:47:43,168 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:47:43,169 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:43,169 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:43,171 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:43,175 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-08 16:47:43,635 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-08 16:47:43,635 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:47:43,641 INFO L255 TraceCheckSpWp]: Trace formula consists of 257 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-08 16:47:43,647 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:44,042 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-11-08 16:47:44,042 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:44,043 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:44,043 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2065065432] [2024-11-08 16:47:44,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2065065432] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:44,043 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:44,044 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-08 16:47:44,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629533462] [2024-11-08 16:47:44,044 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:44,045 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-08 16:47:44,045 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:44,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-08 16:47:44,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-08 16:47:44,046 INFO L87 Difference]: Start difference. First operand 48 states and 63 transitions. Second operand has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:47:44,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:44,368 INFO L93 Difference]: Finished difference Result 62 states and 82 transitions. [2024-11-08 16:47:44,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-08 16:47:44,369 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 49 [2024-11-08 16:47:44,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:44,370 INFO L225 Difference]: With dead ends: 62 [2024-11-08 16:47:44,371 INFO L226 Difference]: Without dead ends: 60 [2024-11-08 16:47:44,371 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:47:44,372 INFO L432 NwaCegarLoop]: 42 mSDtfsCounter, 39 mSDsluCounter, 85 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 44 SdHoareTripleChecker+Valid, 127 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:44,372 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [44 Valid, 127 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-08 16:47:44,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2024-11-08 16:47:44,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2024-11-08 16:47:44,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 48 states have (on average 1.25) internal successors, (60), 48 states have internal predecessors, (60), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:44,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 80 transitions. [2024-11-08 16:47:44,392 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 80 transitions. Word has length 49 [2024-11-08 16:47:44,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:44,394 INFO L471 AbstractCegarLoop]: Abstraction has 60 states and 80 transitions. [2024-11-08 16:47:44,394 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 4.2) internal successors, (21), 5 states have internal predecessors, (21), 1 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-08 16:47:44,395 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 80 transitions. [2024-11-08 16:47:44,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2024-11-08 16:47:44,396 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:44,397 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:44,423 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-08 16:47:44,597 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:44,598 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:44,598 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:44,598 INFO L85 PathProgramCache]: Analyzing trace with hash -1087761704, now seen corresponding path program 1 times [2024-11-08 16:47:44,600 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:44,601 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [520231538] [2024-11-08 16:47:44,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:44,601 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:44,602 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:44,603 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:44,605 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-08 16:47:45,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:45,495 INFO L255 TraceCheckSpWp]: Trace formula consists of 1130 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 16:47:45,501 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:45,515 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2024-11-08 16:47:45,515 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:45,516 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:45,516 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [520231538] [2024-11-08 16:47:45,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [520231538] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:45,516 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:45,517 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:47:45,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443047316] [2024-11-08 16:47:45,517 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:45,518 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:47:45,518 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:45,519 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:47:45,519 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:45,519 INFO L87 Difference]: Start difference. First operand 60 states and 80 transitions. Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:45,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:45,609 INFO L93 Difference]: Finished difference Result 93 states and 127 transitions. [2024-11-08 16:47:45,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:47:45,613 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 90 [2024-11-08 16:47:45,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:45,614 INFO L225 Difference]: With dead ends: 93 [2024-11-08 16:47:45,615 INFO L226 Difference]: Without dead ends: 62 [2024-11-08 16:47:45,615 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:45,616 INFO L432 NwaCegarLoop]: 52 mSDtfsCounter, 1 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:45,617 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 99 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:47:45,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2024-11-08 16:47:45,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2024-11-08 16:47:45,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 50 states have (on average 1.24) internal successors, (62), 50 states have internal predecessors, (62), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:45,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 82 transitions. [2024-11-08 16:47:45,632 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 82 transitions. Word has length 90 [2024-11-08 16:47:45,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:45,633 INFO L471 AbstractCegarLoop]: Abstraction has 62 states and 82 transitions. [2024-11-08 16:47:45,633 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:45,633 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 82 transitions. [2024-11-08 16:47:45,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2024-11-08 16:47:45,635 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:45,635 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:45,663 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-08 16:47:45,839 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:45,840 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:45,840 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:45,840 INFO L85 PathProgramCache]: Analyzing trace with hash -767018189, now seen corresponding path program 1 times [2024-11-08 16:47:45,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:45,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1793089519] [2024-11-08 16:47:45,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:45,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:45,843 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:45,844 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:45,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-08 16:47:46,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:46,761 INFO L255 TraceCheckSpWp]: Trace formula consists of 1137 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 16:47:46,767 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:46,783 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-08 16:47:46,783 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:46,783 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:46,784 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1793089519] [2024-11-08 16:47:46,784 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1793089519] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:46,784 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:46,784 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:47:46,785 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [910248485] [2024-11-08 16:47:46,785 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:46,785 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:47:46,786 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:46,786 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:47:46,786 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:46,787 INFO L87 Difference]: Start difference. First operand 62 states and 82 transitions. Second operand has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:46,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:46,833 INFO L93 Difference]: Finished difference Result 97 states and 131 transitions. [2024-11-08 16:47:46,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:47:46,835 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 92 [2024-11-08 16:47:46,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:46,836 INFO L225 Difference]: With dead ends: 97 [2024-11-08 16:47:46,837 INFO L226 Difference]: Without dead ends: 64 [2024-11-08 16:47:46,837 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 90 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:46,838 INFO L432 NwaCegarLoop]: 52 mSDtfsCounter, 1 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:46,838 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 99 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:47:46,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2024-11-08 16:47:46,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 64. [2024-11-08 16:47:46,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 52 states have (on average 1.2307692307692308) internal successors, (64), 52 states have internal predecessors, (64), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:46,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 84 transitions. [2024-11-08 16:47:46,853 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 84 transitions. Word has length 92 [2024-11-08 16:47:46,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:46,853 INFO L471 AbstractCegarLoop]: Abstraction has 64 states and 84 transitions. [2024-11-08 16:47:46,854 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:46,854 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 84 transitions. [2024-11-08 16:47:46,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-08 16:47:46,858 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:46,858 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:46,893 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-08 16:47:47,059 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:47,059 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:47,059 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:47,060 INFO L85 PathProgramCache]: Analyzing trace with hash 1420496494, now seen corresponding path program 1 times [2024-11-08 16:47:47,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:47,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [175153100] [2024-11-08 16:47:47,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:47,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:47,061 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:47,064 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:47,067 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-08 16:47:47,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:47,942 INFO L255 TraceCheckSpWp]: Trace formula consists of 1144 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 16:47:47,948 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:47,966 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-11-08 16:47:47,966 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:47,966 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:47,966 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [175153100] [2024-11-08 16:47:47,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [175153100] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:47,967 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:47,967 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:47:47,967 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970399695] [2024-11-08 16:47:47,967 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:47,968 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:47:47,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:47,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:47:47,969 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:47,969 INFO L87 Difference]: Start difference. First operand 64 states and 84 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:48,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:48,006 INFO L93 Difference]: Finished difference Result 101 states and 135 transitions. [2024-11-08 16:47:48,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:47:48,006 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 94 [2024-11-08 16:47:48,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:48,008 INFO L225 Difference]: With dead ends: 101 [2024-11-08 16:47:48,008 INFO L226 Difference]: Without dead ends: 66 [2024-11-08 16:47:48,009 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:48,009 INFO L432 NwaCegarLoop]: 52 mSDtfsCounter, 1 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:48,010 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 99 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:47:48,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2024-11-08 16:47:48,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2024-11-08 16:47:48,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 54 states have (on average 1.2222222222222223) internal successors, (66), 54 states have internal predecessors, (66), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:48,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 86 transitions. [2024-11-08 16:47:48,023 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 86 transitions. Word has length 94 [2024-11-08 16:47:48,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:48,024 INFO L471 AbstractCegarLoop]: Abstraction has 66 states and 86 transitions. [2024-11-08 16:47:48,024 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:48,024 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 86 transitions. [2024-11-08 16:47:48,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2024-11-08 16:47:48,026 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:48,026 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:48,057 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-08 16:47:48,226 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:48,227 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:48,227 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:48,227 INFO L85 PathProgramCache]: Analyzing trace with hash 543964297, now seen corresponding path program 1 times [2024-11-08 16:47:48,228 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:48,228 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [506525081] [2024-11-08 16:47:48,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:48,229 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:48,229 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:48,230 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:48,231 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-08 16:47:49,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:49,124 INFO L255 TraceCheckSpWp]: Trace formula consists of 1151 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-08 16:47:49,130 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:49,144 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 112 proven. 0 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2024-11-08 16:47:49,144 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-08 16:47:49,145 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:49,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [506525081] [2024-11-08 16:47:49,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [506525081] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-08 16:47:49,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-08 16:47:49,146 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-08 16:47:49,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022495488] [2024-11-08 16:47:49,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-08 16:47:49,147 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-08 16:47:49,147 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:49,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-08 16:47:49,148 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:49,148 INFO L87 Difference]: Start difference. First operand 66 states and 86 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:49,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:49,189 INFO L93 Difference]: Finished difference Result 105 states and 139 transitions. [2024-11-08 16:47:49,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-08 16:47:49,190 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 96 [2024-11-08 16:47:49,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:49,191 INFO L225 Difference]: With dead ends: 105 [2024-11-08 16:47:49,191 INFO L226 Difference]: Without dead ends: 68 [2024-11-08 16:47:49,192 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-08 16:47:49,193 INFO L432 NwaCegarLoop]: 52 mSDtfsCounter, 1 mSDsluCounter, 47 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 99 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:49,193 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 99 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-08 16:47:49,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2024-11-08 16:47:49,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2024-11-08 16:47:49,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 56 states have (on average 1.2142857142857142) internal successors, (68), 56 states have internal predecessors, (68), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:49,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 88 transitions. [2024-11-08 16:47:49,207 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 88 transitions. Word has length 96 [2024-11-08 16:47:49,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:49,207 INFO L471 AbstractCegarLoop]: Abstraction has 68 states and 88 transitions. [2024-11-08 16:47:49,207 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2024-11-08 16:47:49,207 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 88 transitions. [2024-11-08 16:47:49,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2024-11-08 16:47:49,209 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:49,209 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:49,239 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-08 16:47:49,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:49,410 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:49,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:49,411 INFO L85 PathProgramCache]: Analyzing trace with hash -1860995708, now seen corresponding path program 1 times [2024-11-08 16:47:49,412 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:49,412 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [848754945] [2024-11-08 16:47:49,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-08 16:47:49,412 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:49,413 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:49,415 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:49,417 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-08 16:47:50,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:47:50,390 INFO L255 TraceCheckSpWp]: Trace formula consists of 1158 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 16:47:50,397 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:50,424 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 212 trivial. 0 not checked. [2024-11-08 16:47:50,424 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:47:50,535 INFO L134 CoverageAnalysis]: Checked inductivity of 213 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 212 trivial. 0 not checked. [2024-11-08 16:47:50,536 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:50,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [848754945] [2024-11-08 16:47:50,536 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [848754945] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:47:50,536 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:47:50,536 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2024-11-08 16:47:50,536 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790408280] [2024-11-08 16:47:50,536 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:47:50,537 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:47:50,537 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:50,538 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:47:50,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:47:50,538 INFO L87 Difference]: Start difference. First operand 68 states and 88 transitions. Second operand has 7 states, 7 states have (on average 6.571428571428571) internal successors, (46), 7 states have internal predecessors, (46), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:47:50,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:50,624 INFO L93 Difference]: Finished difference Result 125 states and 167 transitions. [2024-11-08 16:47:50,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:47:50,632 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 6.571428571428571) internal successors, (46), 7 states have internal predecessors, (46), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) Word has length 98 [2024-11-08 16:47:50,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:50,633 INFO L225 Difference]: With dead ends: 125 [2024-11-08 16:47:50,633 INFO L226 Difference]: Without dead ends: 73 [2024-11-08 16:47:50,634 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 189 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:47:50,635 INFO L432 NwaCegarLoop]: 51 mSDtfsCounter, 4 mSDsluCounter, 94 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 145 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:50,635 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 145 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:47:50,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2024-11-08 16:47:50,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2024-11-08 16:47:50,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 61 states have (on average 1.180327868852459) internal successors, (72), 61 states have internal predecessors, (72), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:50,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 92 transitions. [2024-11-08 16:47:50,660 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 92 transitions. Word has length 98 [2024-11-08 16:47:50,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:50,660 INFO L471 AbstractCegarLoop]: Abstraction has 73 states and 92 transitions. [2024-11-08 16:47:50,660 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 6.571428571428571) internal successors, (46), 7 states have internal predecessors, (46), 1 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 1 states have call predecessors, (10), 1 states have call successors, (10) [2024-11-08 16:47:50,661 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 92 transitions. [2024-11-08 16:47:50,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2024-11-08 16:47:50,662 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:50,662 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:50,693 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-11-08 16:47:50,863 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:50,863 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:50,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:50,864 INFO L85 PathProgramCache]: Analyzing trace with hash -742769677, now seen corresponding path program 2 times [2024-11-08 16:47:50,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:50,865 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1444124693] [2024-11-08 16:47:50,866 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:47:50,866 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:50,866 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:50,867 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:50,881 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-08 16:47:51,883 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 16:47:51,883 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:47:51,895 INFO L255 TraceCheckSpWp]: Trace formula consists of 1176 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 16:47:51,901 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:51,931 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 112 proven. 1 refuted. 0 times theorem prover too weak. 115 trivial. 0 not checked. [2024-11-08 16:47:51,932 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:47:52,028 INFO L134 CoverageAnalysis]: Checked inductivity of 228 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 215 trivial. 0 not checked. [2024-11-08 16:47:52,028 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:52,029 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1444124693] [2024-11-08 16:47:52,029 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1444124693] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:47:52,029 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:47:52,029 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2024-11-08 16:47:52,029 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048299418] [2024-11-08 16:47:52,030 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:47:52,030 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:47:52,031 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:52,031 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:47:52,032 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:47:52,032 INFO L87 Difference]: Start difference. First operand 73 states and 92 transitions. Second operand has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:47:52,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:52,170 INFO L93 Difference]: Finished difference Result 117 states and 153 transitions. [2024-11-08 16:47:52,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:47:52,173 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 104 [2024-11-08 16:47:52,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:52,174 INFO L225 Difference]: With dead ends: 117 [2024-11-08 16:47:52,175 INFO L226 Difference]: Without dead ends: 78 [2024-11-08 16:47:52,175 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 201 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:47:52,176 INFO L432 NwaCegarLoop]: 50 mSDtfsCounter, 4 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 142 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:52,176 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 142 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:47:52,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2024-11-08 16:47:52,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2024-11-08 16:47:52,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 66 states have (on average 1.1515151515151516) internal successors, (76), 66 states have internal predecessors, (76), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:52,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 96 transitions. [2024-11-08 16:47:52,208 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 96 transitions. Word has length 104 [2024-11-08 16:47:52,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:52,208 INFO L471 AbstractCegarLoop]: Abstraction has 78 states and 96 transitions. [2024-11-08 16:47:52,209 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:47:52,209 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 96 transitions. [2024-11-08 16:47:52,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2024-11-08 16:47:52,214 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:52,214 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:52,249 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-11-08 16:47:52,415 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:52,415 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:52,415 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:52,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1036503932, now seen corresponding path program 3 times [2024-11-08 16:47:52,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:52,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2129383823] [2024-11-08 16:47:52,417 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-08 16:47:52,417 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:52,417 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:52,418 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:52,419 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-08 16:47:53,666 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2024-11-08 16:47:53,667 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:47:53,677 INFO L255 TraceCheckSpWp]: Trace formula consists of 985 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 16:47:53,685 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:53,714 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 112 proven. 1 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2024-11-08 16:47:53,714 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:47:53,825 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 230 trivial. 0 not checked. [2024-11-08 16:47:53,825 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:53,825 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2129383823] [2024-11-08 16:47:53,825 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2129383823] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:47:53,826 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:47:53,826 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2024-11-08 16:47:53,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675287093] [2024-11-08 16:47:53,826 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:47:53,827 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:47:53,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:53,828 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:47:53,828 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:47:53,828 INFO L87 Difference]: Start difference. First operand 78 states and 96 transitions. Second operand has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:47:53,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:53,935 INFO L93 Difference]: Finished difference Result 127 states and 161 transitions. [2024-11-08 16:47:53,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:47:53,936 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 110 [2024-11-08 16:47:53,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:53,937 INFO L225 Difference]: With dead ends: 127 [2024-11-08 16:47:53,937 INFO L226 Difference]: Without dead ends: 83 [2024-11-08 16:47:53,937 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 213 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:47:53,938 INFO L432 NwaCegarLoop]: 49 mSDtfsCounter, 3 mSDsluCounter, 225 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 274 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:53,938 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 274 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:47:53,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2024-11-08 16:47:53,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2024-11-08 16:47:53,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 71 states have (on average 1.1267605633802817) internal successors, (80), 71 states have internal predecessors, (80), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:53,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 100 transitions. [2024-11-08 16:47:53,951 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 100 transitions. Word has length 110 [2024-11-08 16:47:53,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:53,951 INFO L471 AbstractCegarLoop]: Abstraction has 83 states and 100 transitions. [2024-11-08 16:47:53,952 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:47:53,952 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 100 transitions. [2024-11-08 16:47:53,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-11-08 16:47:53,954 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:53,954 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:53,987 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-08 16:47:54,154 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:54,155 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:54,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:54,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1044213269, now seen corresponding path program 4 times [2024-11-08 16:47:54,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:54,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1942745310] [2024-11-08 16:47:54,157 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-08 16:47:54,157 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:54,157 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:54,159 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:54,160 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-08 16:47:55,332 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-08 16:47:55,333 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:47:55,344 INFO L255 TraceCheckSpWp]: Trace formula consists of 1172 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 16:47:55,348 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:47:55,378 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 112 proven. 1 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2024-11-08 16:47:55,378 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:47:55,484 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2024-11-08 16:47:55,485 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:47:55,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1942745310] [2024-11-08 16:47:55,485 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1942745310] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:47:55,485 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:47:55,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2024-11-08 16:47:55,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854981330] [2024-11-08 16:47:55,486 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:47:55,486 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:47:55,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:47:55,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:47:55,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:47:55,488 INFO L87 Difference]: Start difference. First operand 83 states and 100 transitions. Second operand has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:47:55,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:47:55,583 INFO L93 Difference]: Finished difference Result 137 states and 169 transitions. [2024-11-08 16:47:55,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:47:55,584 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 116 [2024-11-08 16:47:55,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:47:55,586 INFO L225 Difference]: With dead ends: 137 [2024-11-08 16:47:55,586 INFO L226 Difference]: Without dead ends: 88 [2024-11-08 16:47:55,586 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 225 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:47:55,587 INFO L432 NwaCegarLoop]: 48 mSDtfsCounter, 4 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 136 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:47:55,588 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 136 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:47:55,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2024-11-08 16:47:55,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2024-11-08 16:47:55,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 76 states have (on average 1.105263157894737) internal successors, (84), 76 states have internal predecessors, (84), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:47:55,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 104 transitions. [2024-11-08 16:47:55,602 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 104 transitions. Word has length 116 [2024-11-08 16:47:55,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:47:55,602 INFO L471 AbstractCegarLoop]: Abstraction has 88 states and 104 transitions. [2024-11-08 16:47:55,603 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:47:55,603 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 104 transitions. [2024-11-08 16:47:55,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-08 16:47:55,604 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:47:55,605 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:47:55,632 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2024-11-08 16:47:55,805 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:55,806 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:47:55,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:47:55,806 INFO L85 PathProgramCache]: Analyzing trace with hash 423458758, now seen corresponding path program 5 times [2024-11-08 16:47:55,808 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:47:55,808 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [246218078] [2024-11-08 16:47:55,808 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-08 16:47:55,808 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:47:55,808 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:47:55,809 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:47:55,811 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-08 16:48:04,273 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-11-08 16:48:04,273 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:48:04,291 INFO L255 TraceCheckSpWp]: Trace formula consists of 984 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-08 16:48:04,297 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:48:04,335 INFO L134 CoverageAnalysis]: Checked inductivity of 273 backedges. 112 proven. 1 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2024-11-08 16:48:04,335 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:48:04,453 INFO L134 CoverageAnalysis]: Checked inductivity of 273 backedges. 12 proven. 1 refuted. 0 times theorem prover too weak. 260 trivial. 0 not checked. [2024-11-08 16:48:04,453 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:48:04,453 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [246218078] [2024-11-08 16:48:04,453 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [246218078] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:48:04,453 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:48:04,453 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5] total 7 [2024-11-08 16:48:04,453 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [664626699] [2024-11-08 16:48:04,454 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:48:04,454 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-08 16:48:04,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:48:04,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-08 16:48:04,455 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2024-11-08 16:48:04,456 INFO L87 Difference]: Start difference. First operand 88 states and 104 transitions. Second operand has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:48:04,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:48:04,603 INFO L93 Difference]: Finished difference Result 147 states and 177 transitions. [2024-11-08 16:48:04,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-08 16:48:04,605 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 122 [2024-11-08 16:48:04,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:48:04,607 INFO L225 Difference]: With dead ends: 147 [2024-11-08 16:48:04,607 INFO L226 Difference]: Without dead ends: 93 [2024-11-08 16:48:04,608 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 237 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=31, Unknown=0, NotChecked=0, Total=56 [2024-11-08 16:48:04,609 INFO L432 NwaCegarLoop]: 47 mSDtfsCounter, 4 mSDsluCounter, 86 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 133 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:48:04,609 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 133 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-08 16:48:04,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2024-11-08 16:48:04,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2024-11-08 16:48:04,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 81 states have (on average 1.0864197530864197) internal successors, (88), 81 states have internal predecessors, (88), 10 states have call successors, (10), 1 states have call predecessors, (10), 1 states have return successors, (10), 10 states have call predecessors, (10), 10 states have call successors, (10) [2024-11-08 16:48:04,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 108 transitions. [2024-11-08 16:48:04,634 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 108 transitions. Word has length 122 [2024-11-08 16:48:04,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:48:04,634 INFO L471 AbstractCegarLoop]: Abstraction has 93 states and 108 transitions. [2024-11-08 16:48:04,635 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 7.428571428571429) internal successors, (52), 7 states have internal predecessors, (52), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:48:04,635 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 108 transitions. [2024-11-08 16:48:04,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-08 16:48:04,637 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:48:04,638 INFO L215 NwaCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:48:04,668 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2024-11-08 16:48:04,838 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:48:04,839 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:48:04,839 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:48:04,839 INFO L85 PathProgramCache]: Analyzing trace with hash -324559113, now seen corresponding path program 6 times [2024-11-08 16:48:04,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:48:04,841 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [427397959] [2024-11-08 16:48:04,842 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 16:48:04,842 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:48:04,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:48:04,844 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:48:04,846 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-08 16:48:08,957 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-11-08 16:48:08,957 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:48:08,974 INFO L255 TraceCheckSpWp]: Trace formula consists of 1142 conjuncts, 44 conjuncts are in the unsatisfiable core [2024-11-08 16:48:08,986 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:48:10,382 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 12 proven. 39 refuted. 0 times theorem prover too weak. 237 trivial. 0 not checked. [2024-11-08 16:48:10,383 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:48:10,536 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:48:10,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [427397959] [2024-11-08 16:48:10,536 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [427397959] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:48:10,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [685943300] [2024-11-08 16:48:10,536 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-08 16:48:10,537 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-08 16:48:10,537 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/cvc4 [2024-11-08 16:48:10,539 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-08 16:48:10,541 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (17)] Waiting until timeout for monitored process [2024-11-08 16:48:13,643 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2024-11-08 16:48:13,643 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:48:13,670 INFO L255 TraceCheckSpWp]: Trace formula consists of 1142 conjuncts, 44 conjuncts are in the unsatisfiable core [2024-11-08 16:48:13,681 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:48:15,288 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 249 trivial. 0 not checked. [2024-11-08 16:48:15,288 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:48:15,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [685943300] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-08 16:48:15,547 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:48:15,547 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 11] total 18 [2024-11-08 16:48:15,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010864035] [2024-11-08 16:48:15,547 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:48:15,548 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2024-11-08 16:48:15,549 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:48:15,549 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-08 16:48:15,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=364, Unknown=0, NotChecked=0, Total=420 [2024-11-08 16:48:15,550 INFO L87 Difference]: Start difference. First operand 93 states and 108 transitions. Second operand has 18 states, 16 states have (on average 4.9375) internal successors, (79), 17 states have internal predecessors, (79), 5 states have call successors, (16), 1 states have call predecessors, (16), 2 states have return successors, (16), 5 states have call predecessors, (16), 5 states have call successors, (16) [2024-11-08 16:48:16,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:48:16,905 INFO L93 Difference]: Finished difference Result 169 states and 195 transitions. [2024-11-08 16:48:16,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-08 16:48:16,906 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 16 states have (on average 4.9375) internal successors, (79), 17 states have internal predecessors, (79), 5 states have call successors, (16), 1 states have call predecessors, (16), 2 states have return successors, (16), 5 states have call predecessors, (16), 5 states have call successors, (16) Word has length 128 [2024-11-08 16:48:16,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:48:16,907 INFO L225 Difference]: With dead ends: 169 [2024-11-08 16:48:16,908 INFO L226 Difference]: Without dead ends: 167 [2024-11-08 16:48:16,908 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 243 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=97, Invalid=553, Unknown=0, NotChecked=0, Total=650 [2024-11-08 16:48:16,909 INFO L432 NwaCegarLoop]: 39 mSDtfsCounter, 68 mSDsluCounter, 395 mSDsCounter, 0 mSdLazyCounter, 483 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 73 SdHoareTripleChecker+Valid, 434 SdHoareTripleChecker+Invalid, 487 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 483 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-08 16:48:16,909 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [73 Valid, 434 Invalid, 487 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 483 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-08 16:48:16,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2024-11-08 16:48:16,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 146. [2024-11-08 16:48:16,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 146 states, 129 states have (on average 1.0852713178294573) internal successors, (140), 129 states have internal predecessors, (140), 15 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2024-11-08 16:48:16,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 170 transitions. [2024-11-08 16:48:16,940 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 170 transitions. Word has length 128 [2024-11-08 16:48:16,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:48:16,943 INFO L471 AbstractCegarLoop]: Abstraction has 146 states and 170 transitions. [2024-11-08 16:48:16,943 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 16 states have (on average 4.9375) internal successors, (79), 17 states have internal predecessors, (79), 5 states have call successors, (16), 1 states have call predecessors, (16), 2 states have return successors, (16), 5 states have call predecessors, (16), 5 states have call successors, (16) [2024-11-08 16:48:16,943 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 170 transitions. [2024-11-08 16:48:16,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2024-11-08 16:48:16,949 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:48:16,949 INFO L215 NwaCegarLoop]: trace histogram [15, 15, 15, 8, 8, 8, 8, 8, 8, 8, 8, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:48:16,981 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt (17)] Ended with exit code 0 [2024-11-08 16:48:17,175 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2024-11-08 16:48:17,350 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/cvc4 --incremental --print-success --lang smt,16 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:48:17,350 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:48:17,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:48:17,351 INFO L85 PathProgramCache]: Analyzing trace with hash -2113632002, now seen corresponding path program 7 times [2024-11-08 16:48:17,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:48:17,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [719996420] [2024-11-08 16:48:17,352 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-08 16:48:17,353 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:48:17,353 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:48:17,354 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:48:17,355 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-08 16:48:19,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-08 16:48:19,033 INFO L255 TraceCheckSpWp]: Trace formula consists of 2096 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-08 16:48:19,039 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:48:19,114 INFO L134 CoverageAnalysis]: Checked inductivity of 785 backedges. 308 proven. 16 refuted. 0 times theorem prover too weak. 461 trivial. 0 not checked. [2024-11-08 16:48:19,114 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-08 16:48:19,381 INFO L134 CoverageAnalysis]: Checked inductivity of 785 backedges. 108 proven. 16 refuted. 0 times theorem prover too weak. 661 trivial. 0 not checked. [2024-11-08 16:48:19,381 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-08 16:48:19,381 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [719996420] [2024-11-08 16:48:19,381 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [719996420] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-08 16:48:19,381 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-08 16:48:19,381 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 13 [2024-11-08 16:48:19,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484730734] [2024-11-08 16:48:19,382 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-08 16:48:19,382 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2024-11-08 16:48:19,382 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-08 16:48:19,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-08 16:48:19,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=103, Unknown=0, NotChecked=0, Total=156 [2024-11-08 16:48:19,384 INFO L87 Difference]: Start difference. First operand 146 states and 170 transitions. Second operand has 13 states, 13 states have (on average 5.615384615384615) internal successors, (73), 13 states have internal predecessors, (73), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:48:19,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-08 16:48:19,776 INFO L93 Difference]: Finished difference Result 262 states and 313 transitions. [2024-11-08 16:48:19,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-08 16:48:19,777 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 5.615384615384615) internal successors, (73), 13 states have internal predecessors, (73), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) Word has length 201 [2024-11-08 16:48:19,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-08 16:48:19,778 INFO L225 Difference]: With dead ends: 262 [2024-11-08 16:48:19,779 INFO L226 Difference]: Without dead ends: 170 [2024-11-08 16:48:19,780 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 404 GetRequests, 389 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=175, Unknown=0, NotChecked=0, Total=272 [2024-11-08 16:48:19,780 INFO L432 NwaCegarLoop]: 46 mSDtfsCounter, 6 mSDsluCounter, 215 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 261 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-08 16:48:19,781 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 261 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-08 16:48:19,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2024-11-08 16:48:19,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2024-11-08 16:48:19,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 153 states have (on average 1.0849673202614378) internal successors, (166), 153 states have internal predecessors, (166), 15 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 15 states have call predecessors, (15), 15 states have call successors, (15) [2024-11-08 16:48:19,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 196 transitions. [2024-11-08 16:48:19,803 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 196 transitions. Word has length 201 [2024-11-08 16:48:19,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-08 16:48:19,804 INFO L471 AbstractCegarLoop]: Abstraction has 170 states and 196 transitions. [2024-11-08 16:48:19,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 5.615384615384615) internal successors, (73), 13 states have internal predecessors, (73), 2 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 2 states have call predecessors, (15), 2 states have call successors, (15) [2024-11-08 16:48:19,804 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 196 transitions. [2024-11-08 16:48:19,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-11-08 16:48:19,808 INFO L207 NwaCegarLoop]: Found error trace [2024-11-08 16:48:19,808 INFO L215 NwaCegarLoop]: trace histogram [16, 16, 15, 15, 15, 8, 8, 8, 8, 8, 8, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-08 16:48:19,848 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2024-11-08 16:48:20,009 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 18 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:48:20,009 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-08 16:48:20,009 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-08 16:48:20,010 INFO L85 PathProgramCache]: Analyzing trace with hash -1612097666, now seen corresponding path program 8 times [2024-11-08 16:48:20,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-08 16:48:20,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1679599330] [2024-11-08 16:48:20,012 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-08 16:48:20,012 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-08 16:48:20,012 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 [2024-11-08 16:48:20,013 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-08 16:48:20,015 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b4cbc6de-09fe-4c26-aa7d-f2923e837e4b/bin/uautomizer-verify-jihMAELWvX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-08 16:48:21,836 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-08 16:48:21,836 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-08 16:48:21,862 INFO L255 TraceCheckSpWp]: Trace formula consists of 2152 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-08 16:48:21,869 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-08 16:48:21,926 INFO L134 CoverageAnalysis]: Checked inductivity of 985 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 969 trivial. 0 not checked. [2024-11-08 16:48:21,927 INFO L311 TraceCheckSpWp]: Computing backward predicates...