./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 4f9af400 extending candidate: java ['java'] extending candidate: /usr/bin/java ['java', '/usr/bin/java'] extending candidate: /opt/oracle-jdk-bin-*/bin/java ['java', '/usr/bin/java'] extending candidate: /opt/openjdk-*/bin/java ['java', '/usr/bin/java'] extending candidate: /usr/lib/jvm/java-*-openjdk-amd64/bin/java ['java', '/usr/bin/java', '/usr/lib/jvm/java-1.11.0-openjdk-amd64/bin/java', '/usr/lib/jvm/java-17-openjdk-amd64/bin/java', '/usr/lib/jvm/java-11-openjdk-amd64/bin/java', '/usr/lib/jvm/java-1.17.0-openjdk-amd64/bin/java'] ['/root/.sdkman/candidates/java/21.0.5-tem/bin/java', '-Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config', '-Xmx15G', '-Xms4m', '-jar', '/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar', '-data', '@noDefault', '-ultimatedata', '/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data', '-tc', '/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml', '-i', '../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i', '-s', '/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf', '--cacsl2boogietranslator.entry.function', 'main', '--witnessprinter.witness.directory', '/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux', '--witnessprinter.witness.filename', 'witness', '--witnessprinter.write.witness.besides.input.file', 'false', '--witnessprinter.graph.data.specification', 'CHECK( init(main()), LTL(F end) )\n\n', '--witnessprinter.graph.data.producer', 'Automizer', '--witnessprinter.graph.data.architecture', '64bit', '--witnessprinter.graph.data.programhash', '68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe'] Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.3.0-?-4f9af40 [2024-11-07 23:51:31,098 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-07 23:51:31,206 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-07 23:51:31,211 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-07 23:51:31,213 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-07 23:51:31,239 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-07 23:51:31,242 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-07 23:51:31,243 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-07 23:51:31,243 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-07 23:51:31,243 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-07 23:51:31,244 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-07 23:51:31,244 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-07 23:51:31,244 INFO L153 SettingsManager]: * Use SBE=true [2024-11-07 23:51:31,245 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-07 23:51:31,245 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-07 23:51:31,245 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-07 23:51:31,245 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-07 23:51:31,246 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-07 23:51:31,246 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-07 23:51:31,247 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-07 23:51:31,247 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-07 23:51:31,248 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-07 23:51:31,248 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-07 23:51:31,248 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-07 23:51:31,248 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2024-11-07 23:51:31,518 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-07 23:51:31,524 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-07 23:51:31,526 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-07 23:51:31,527 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-07 23:51:31,528 INFO L274 PluginConnector]: CDTParser initialized [2024-11-07 23:51:31,529 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-07 23:51:32,820 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-07 23:51:33,062 INFO L384 CDTParser]: Found 1 translation units. [2024-11-07 23:51:33,064 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-07 23:51:33,078 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/83c558e8e/884d370f36824671b7aa5d7b819c81a7/FLAG59ee99cb1 [2024-11-07 23:51:33,096 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/83c558e8e/884d370f36824671b7aa5d7b819c81a7 [2024-11-07 23:51:33,098 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-07 23:51:33,100 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-07 23:51:33,102 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-07 23:51:33,103 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-07 23:51:33,107 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-07 23:51:33,107 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,108 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f541f8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33, skipping insertion in model container [2024-11-07 23:51:33,108 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,140 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-07 23:51:33,373 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-07 23:51:33,381 INFO L200 MainTranslator]: Completed pre-run [2024-11-07 23:51:33,418 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-07 23:51:33,444 INFO L204 MainTranslator]: Completed translation [2024-11-07 23:51:33,445 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33 WrapperNode [2024-11-07 23:51:33,445 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-07 23:51:33,446 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-07 23:51:33,446 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-07 23:51:33,446 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-07 23:51:33,451 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,464 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,483 INFO L138 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 33 [2024-11-07 23:51:33,484 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-07 23:51:33,485 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-07 23:51:33,485 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-07 23:51:33,485 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-07 23:51:33,492 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,492 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,495 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,508 INFO L175 MemorySlicer]: Split 7 memory accesses to 2 slices as follows [3, 4]. 57 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 3 writes are split as follows [1, 2]. [2024-11-07 23:51:33,509 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,509 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,516 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,523 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,524 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,525 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,526 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-07 23:51:33,528 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-07 23:51:33,528 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-07 23:51:33,528 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-07 23:51:33,529 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (1/1) ... [2024-11-07 23:51:33,537 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-07 23:51:33,551 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:51:33,563 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-07 23:51:33,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-07 23:51:33,589 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-07 23:51:33,590 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-07 23:51:33,590 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-07 23:51:33,590 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-07 23:51:33,590 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-07 23:51:33,590 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-07 23:51:33,590 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-07 23:51:33,590 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-07 23:51:33,693 INFO L238 CfgBuilder]: Building ICFG [2024-11-07 23:51:33,695 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-07 23:51:33,786 INFO L? ?]: Removed 4 outVars from TransFormulas that were not future-live. [2024-11-07 23:51:33,789 INFO L287 CfgBuilder]: Performing block encoding [2024-11-07 23:51:33,796 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-07 23:51:33,796 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-07 23:51:33,797 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 11:51:33 BoogieIcfgContainer [2024-11-07 23:51:33,797 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-07 23:51:33,798 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-07 23:51:33,798 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-07 23:51:33,803 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-07 23:51:33,804 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-07 23:51:33,804 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 11:51:33" (1/3) ... [2024-11-07 23:51:33,805 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28e5502f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 11:51:33, skipping insertion in model container [2024-11-07 23:51:33,805 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-07 23:51:33,806 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 11:51:33" (2/3) ... [2024-11-07 23:51:33,806 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28e5502f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 11:51:33, skipping insertion in model container [2024-11-07 23:51:33,806 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-07 23:51:33,806 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 11:51:33" (3/3) ... [2024-11-07 23:51:33,809 INFO L332 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-07 23:51:33,861 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-07 23:51:33,862 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-07 23:51:33,862 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-07 23:51:33,862 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-07 23:51:33,862 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-07 23:51:33,863 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-07 23:51:33,863 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-07 23:51:33,863 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-07 23:51:33,867 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:33,880 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-07 23:51:33,880 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:33,880 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:33,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:33,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-07 23:51:33,884 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-07 23:51:33,884 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:33,885 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-07 23:51:33,885 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:33,885 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:33,885 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:33,886 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-07 23:51:33,892 INFO L745 eck$LassoCheckResult]: Stem: 6#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 5#L549-3true [2024-11-07 23:51:33,892 INFO L747 eck$LassoCheckResult]: Loop: 5#L549-3true call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 7#L551-3true assume !true; 11#L551-4true call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 5#L549-3true [2024-11-07 23:51:33,896 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:33,900 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-07 23:51:33,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:33,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282095562] [2024-11-07 23:51:33,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:33,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:34,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:34,007 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:34,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:34,036 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:34,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:34,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times [2024-11-07 23:51:34,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:34,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816695177] [2024-11-07 23:51:34,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:34,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:34,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:34,091 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:34,091 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816695177] [2024-11-07 23:51:34,092 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1816695177] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-07 23:51:34,092 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-07 23:51:34,092 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-07 23:51:34,092 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268314871] [2024-11-07 23:51:34,093 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-07 23:51:34,095 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:51:34,096 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:51:34,119 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-07 23:51:34,119 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-07 23:51:34,121 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:34,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:51:34,127 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-11-07 23:51:34,128 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-11-07 23:51:34,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-07 23:51:34,134 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2024-11-07 23:51:34,135 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-11-07 23:51:34,135 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-11-07 23:51:34,136 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2024-11-07 23:51:34,137 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:51:34,137 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-07 23:51:34,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2024-11-07 23:51:34,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2024-11-07 23:51:34,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:34,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2024-11-07 23:51:34,159 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-07 23:51:34,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-07 23:51:34,163 INFO L425 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-07 23:51:34,164 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-07 23:51:34,164 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2024-11-07 23:51:34,165 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-07 23:51:34,165 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:34,166 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:34,166 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:34,166 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-07 23:51:34,166 INFO L745 eck$LassoCheckResult]: Stem: 33#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 34#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 32#L549-3 [2024-11-07 23:51:34,166 INFO L747 eck$LassoCheckResult]: Loop: 32#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 32#L549-3 [2024-11-07 23:51:34,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:34,167 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2024-11-07 23:51:34,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:34,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576109304] [2024-11-07 23:51:34,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:34,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:34,212 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:34,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:34,224 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:34,224 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:34,224 INFO L85 PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times [2024-11-07 23:51:34,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:34,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621366922] [2024-11-07 23:51:34,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:34,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:34,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:34,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:34,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621366922] [2024-11-07 23:51:34,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1621366922] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-07 23:51:34,405 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-07 23:51:34,405 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-07 23:51:34,405 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82920369] [2024-11-07 23:51:34,405 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-07 23:51:34,405 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:51:34,406 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:51:34,406 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-07 23:51:34,406 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-07 23:51:34,406 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:34,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:51:34,444 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2024-11-07 23:51:34,444 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2024-11-07 23:51:34,444 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2024-11-07 23:51:34,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2024-11-07 23:51:34,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-11-07 23:51:34,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-11-07 23:51:34,445 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2024-11-07 23:51:34,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:51:34,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-11-07 23:51:34,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2024-11-07 23:51:34,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-11-07 23:51:34,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:34,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2024-11-07 23:51:34,447 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-11-07 23:51:34,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-07 23:51:34,448 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-11-07 23:51:34,448 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-07 23:51:34,448 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2024-11-07 23:51:34,448 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2024-11-07 23:51:34,449 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:34,449 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:34,449 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:34,449 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1] [2024-11-07 23:51:34,449 INFO L745 eck$LassoCheckResult]: Stem: 60#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 61#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 57#L549-3 [2024-11-07 23:51:34,449 INFO L747 eck$LassoCheckResult]: Loop: 57#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 58#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 59#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 57#L549-3 [2024-11-07 23:51:34,450 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:34,450 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2024-11-07 23:51:34,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:34,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886663281] [2024-11-07 23:51:34,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:34,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:34,460 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:34,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:34,465 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:34,466 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:34,466 INFO L85 PathProgramCache]: Analyzing trace with hash -274676436, now seen corresponding path program 1 times [2024-11-07 23:51:34,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:34,466 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977113319] [2024-11-07 23:51:34,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:34,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:34,705 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:34,706 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:34,706 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977113319] [2024-11-07 23:51:34,706 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977113319] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-07 23:51:34,706 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [250309111] [2024-11-07 23:51:34,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-07 23:51:34,707 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:51:34,710 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-07 23:51:34,712 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-07 23:51:34,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:34,772 INFO L255 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-07 23:51:34,778 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-07 23:51:34,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-07 23:51:34,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-07 23:51:34,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-07 23:51:34,860 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:34,861 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-07 23:51:34,915 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:34,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [250309111] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-07 23:51:34,915 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-07 23:51:34,915 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 9 [2024-11-07 23:51:34,915 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943856707] [2024-11-07 23:51:34,916 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-07 23:51:34,916 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:51:34,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:51:34,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-07 23:51:34,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2024-11-07 23:51:34,916 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 9 states, 9 states have (on average 1.5555555555555556) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:34,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:51:34,990 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2024-11-07 23:51:34,990 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2024-11-07 23:51:34,991 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-11-07 23:51:34,992 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2024-11-07 23:51:34,992 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-07 23:51:34,992 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-07 23:51:34,993 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2024-11-07 23:51:34,993 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:51:34,993 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-07 23:51:34,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2024-11-07 23:51:34,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2024-11-07 23:51:34,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:34,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2024-11-07 23:51:34,996 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-07 23:51:34,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-07 23:51:34,997 INFO L425 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-07 23:51:34,997 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-07 23:51:34,997 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2024-11-07 23:51:34,998 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-11-07 23:51:34,998 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:34,998 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:34,998 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:34,998 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1] [2024-11-07 23:51:34,998 INFO L745 eck$LassoCheckResult]: Stem: 139#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 140#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 135#L549-3 [2024-11-07 23:51:34,998 INFO L747 eck$LassoCheckResult]: Loop: 135#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 133#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 134#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 136#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 137#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 138#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 147#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 146#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 145#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 144#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 143#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 142#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 141#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 135#L549-3 [2024-11-07 23:51:34,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:34,998 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2024-11-07 23:51:34,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:34,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841534032] [2024-11-07 23:51:34,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:34,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:35,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:35,014 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:35,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:35,024 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:35,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:35,025 INFO L85 PathProgramCache]: Analyzing trace with hash 351922269, now seen corresponding path program 2 times [2024-11-07 23:51:35,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:35,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766409413] [2024-11-07 23:51:35,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:35,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:35,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:35,572 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:35,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:35,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766409413] [2024-11-07 23:51:35,573 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [766409413] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-07 23:51:35,573 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [44322273] [2024-11-07 23:51:35,573 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-07 23:51:35,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-07 23:51:35,575 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:51:35,577 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-07 23:51:35,579 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-07 23:51:35,652 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-07 23:51:35,652 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-07 23:51:35,653 INFO L255 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 16 conjuncts are in the unsatisfiable core [2024-11-07 23:51:35,656 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-07 23:51:35,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-07 23:51:35,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-07 23:51:35,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:35,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:35,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:35,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-07 23:51:35,751 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:35,751 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-07 23:51:35,873 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:35,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [44322273] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-07 23:51:35,876 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-07 23:51:35,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 18 [2024-11-07 23:51:35,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1942562228] [2024-11-07 23:51:35,876 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-07 23:51:35,877 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:51:35,877 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:51:35,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-07 23:51:35,878 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=179, Unknown=0, NotChecked=0, Total=306 [2024-11-07 23:51:35,878 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 18 states, 18 states have (on average 1.7777777777777777) internal successors, (32), 18 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:36,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:51:36,031 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-11-07 23:51:36,031 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-11-07 23:51:36,032 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-07 23:51:36,033 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-11-07 23:51:36,034 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2024-11-07 23:51:36,034 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2024-11-07 23:51:36,034 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-11-07 23:51:36,034 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:51:36,034 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-07 23:51:36,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-11-07 23:51:36,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2024-11-07 23:51:36,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:36,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2024-11-07 23:51:36,038 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-07 23:51:36,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-07 23:51:36,039 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-07 23:51:36,039 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-07 23:51:36,040 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2024-11-07 23:51:36,041 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-07 23:51:36,041 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:36,042 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:36,042 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:36,042 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2024-11-07 23:51:36,042 INFO L745 eck$LassoCheckResult]: Stem: 286#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 287#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 282#L549-3 [2024-11-07 23:51:36,042 INFO L747 eck$LassoCheckResult]: Loop: 282#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 280#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 281#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 283#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 284#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 285#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 306#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 305#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 304#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 303#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 302#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 301#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 300#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 299#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 298#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 297#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 296#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 295#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 294#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 293#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 292#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 291#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 290#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 289#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 288#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 282#L549-3 [2024-11-07 23:51:36,042 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:36,043 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2024-11-07 23:51:36,043 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:36,043 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151321651] [2024-11-07 23:51:36,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:36,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:36,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:36,053 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:36,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:36,059 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:36,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:36,060 INFO L85 PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 3 times [2024-11-07 23:51:36,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:36,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832476578] [2024-11-07 23:51:36,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:36,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:36,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:37,179 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:37,179 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:37,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1832476578] [2024-11-07 23:51:37,179 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1832476578] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-07 23:51:37,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [832254978] [2024-11-07 23:51:37,179 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-07 23:51:37,179 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-07 23:51:37,180 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:51:37,182 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-07 23:51:37,186 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-07 23:51:37,306 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-07 23:51:37,306 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-07 23:51:37,307 INFO L255 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-11-07 23:51:37,312 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-07 23:51:37,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-07 23:51:37,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-07 23:51:37,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:37,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-07 23:51:37,447 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:37,447 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-07 23:51:37,767 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:37,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [832254978] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-07 23:51:37,767 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-07 23:51:37,767 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14, 14] total 36 [2024-11-07 23:51:37,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098245858] [2024-11-07 23:51:37,768 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-07 23:51:37,768 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:51:37,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:51:37,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-11-07 23:51:37,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=541, Invalid=719, Unknown=0, NotChecked=0, Total=1260 [2024-11-07 23:51:37,770 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 36 states, 36 states have (on average 1.8888888888888888) internal successors, (68), 36 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:38,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:51:38,152 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2024-11-07 23:51:38,153 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2024-11-07 23:51:38,154 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-11-07 23:51:38,154 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2024-11-07 23:51:38,154 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2024-11-07 23:51:38,154 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2024-11-07 23:51:38,154 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2024-11-07 23:51:38,155 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:51:38,155 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-11-07 23:51:38,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2024-11-07 23:51:38,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2024-11-07 23:51:38,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:38,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2024-11-07 23:51:38,159 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-11-07 23:51:38,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-07 23:51:38,163 INFO L425 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-11-07 23:51:38,163 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-07 23:51:38,163 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2024-11-07 23:51:38,164 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-11-07 23:51:38,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:38,164 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:38,165 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:38,165 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1] [2024-11-07 23:51:38,165 INFO L745 eck$LassoCheckResult]: Stem: 571#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 572#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 567#L549-3 [2024-11-07 23:51:38,165 INFO L747 eck$LassoCheckResult]: Loop: 567#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 565#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 566#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 570#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 568#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 569#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 615#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 614#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 613#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 612#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 611#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 610#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 609#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 608#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 607#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 606#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 605#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 604#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 603#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 602#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 601#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 600#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 599#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 598#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 597#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 596#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 595#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 594#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 593#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 592#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 591#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 590#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 589#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 588#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 587#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 586#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 585#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 584#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 583#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 582#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 581#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 580#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 579#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 578#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 577#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 576#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 575#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 574#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 573#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 567#L549-3 [2024-11-07 23:51:38,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:38,168 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2024-11-07 23:51:38,168 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:38,168 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698806762] [2024-11-07 23:51:38,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:38,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:38,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:38,175 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:38,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:38,181 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:38,182 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:38,182 INFO L85 PathProgramCache]: Analyzing trace with hash 1009537987, now seen corresponding path program 4 times [2024-11-07 23:51:38,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:38,183 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847674294] [2024-11-07 23:51:38,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:38,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:38,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:41,119 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:41,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:41,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847674294] [2024-11-07 23:51:41,120 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1847674294] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-07 23:51:41,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [396875333] [2024-11-07 23:51:41,121 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-07 23:51:41,121 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-07 23:51:41,124 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:51:41,127 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-07 23:51:41,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-07 23:51:41,474 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-07 23:51:41,475 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-07 23:51:41,478 INFO L255 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 70 conjuncts are in the unsatisfiable core [2024-11-07 23:51:41,486 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-07 23:51:41,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-07 23:51:41,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-07 23:51:41,510 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:51:41,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-07 23:51:41,724 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:41,724 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-07 23:51:42,700 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:42,700 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [396875333] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-07 23:51:42,700 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-07 23:51:42,700 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 26, 26] total 72 [2024-11-07 23:51:42,700 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122378218] [2024-11-07 23:51:42,700 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-07 23:51:42,701 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:51:42,701 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:51:42,702 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2024-11-07 23:51:42,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2233, Invalid=2879, Unknown=0, NotChecked=0, Total=5112 [2024-11-07 23:51:42,705 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 72 states, 72 states have (on average 1.9444444444444444) internal successors, (140), 72 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:43,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:51:43,657 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2024-11-07 23:51:43,657 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2024-11-07 23:51:43,661 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2024-11-07 23:51:43,663 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2024-11-07 23:51:43,664 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2024-11-07 23:51:43,664 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2024-11-07 23:51:43,666 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2024-11-07 23:51:43,667 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:51:43,667 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-11-07 23:51:43,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2024-11-07 23:51:43,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2024-11-07 23:51:43,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:51:43,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2024-11-07 23:51:43,674 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-11-07 23:51:43,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-11-07 23:51:43,675 INFO L425 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-11-07 23:51:43,675 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-07 23:51:43,675 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2024-11-07 23:51:43,676 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2024-11-07 23:51:43,676 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:51:43,676 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:51:43,677 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:51:43,677 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1] [2024-11-07 23:51:43,678 INFO L745 eck$LassoCheckResult]: Stem: 1132#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1133#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1128#L549-3 [2024-11-07 23:51:43,678 INFO L747 eck$LassoCheckResult]: Loop: 1128#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1126#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1127#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1129#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1130#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1131#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1224#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1223#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1222#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1221#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1220#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1219#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1218#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1217#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1216#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1215#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1214#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1213#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1212#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1211#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1210#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1209#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1208#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1207#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1206#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1205#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1204#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1203#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1202#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1201#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1200#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1199#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1198#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1197#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1196#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1195#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1194#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1193#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1192#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1191#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1190#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1189#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1188#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1187#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1186#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1185#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1184#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1183#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1182#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1181#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1180#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1179#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1178#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1177#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1176#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1175#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1174#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1173#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1172#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1171#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1170#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1169#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1168#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1167#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1166#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1165#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1164#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1163#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1162#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1161#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1160#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1159#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1158#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1157#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1156#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1155#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1154#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1153#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1152#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1151#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1150#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1149#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1148#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1146#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1144#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1143#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1142#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1141#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1140#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1138#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1137#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1136#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1135#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1134#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1128#L549-3 [2024-11-07 23:51:43,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:43,682 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2024-11-07 23:51:43,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:43,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108585869] [2024-11-07 23:51:43,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:43,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:43,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:43,690 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:51:43,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:51:43,694 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:51:43,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:51:43,695 INFO L85 PathProgramCache]: Analyzing trace with hash 1846627915, now seen corresponding path program 5 times [2024-11-07 23:51:43,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:51:43,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214336497] [2024-11-07 23:51:43,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:51:43,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:51:43,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:51:50,931 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:51:50,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:51:50,931 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214336497] [2024-11-07 23:51:50,931 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [214336497] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-07 23:51:50,931 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1734599007] [2024-11-07 23:51:50,931 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-07 23:51:50,931 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-07 23:51:50,932 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:51:50,934 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-07 23:51:50,935 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-07 23:52:10,036 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-07 23:52:10,036 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-07 23:52:10,052 INFO L255 TraceCheckSpWp]: Trace formula consists of 722 conjuncts, 142 conjuncts are in the unsatisfiable core [2024-11-07 23:52:10,069 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-07 23:52:10,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-07 23:52:10,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 3 [2024-11-07 23:52:10,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-07 23:52:10,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-07 23:52:10,451 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:52:10,451 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-07 23:52:13,035 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:52:13,035 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1734599007] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-07 23:52:13,035 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-07 23:52:13,035 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 50, 50] total 144 [2024-11-07 23:52:13,035 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893156929] [2024-11-07 23:52:13,035 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-07 23:52:13,036 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-07 23:52:13,036 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-07 23:52:13,038 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 144 interpolants. [2024-11-07 23:52:13,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9073, Invalid=11519, Unknown=0, NotChecked=0, Total=20592 [2024-11-07 23:52:13,047 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand has 144 states, 144 states have (on average 1.9722222222222223) internal successors, (284), 144 states have internal predecessors, (284), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:52:15,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-07 23:52:15,584 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2024-11-07 23:52:15,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2024-11-07 23:52:15,585 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2024-11-07 23:52:15,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2024-11-07 23:52:15,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2024-11-07 23:52:15,588 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2024-11-07 23:52:15,588 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2024-11-07 23:52:15,588 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-07 23:52:15,588 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-11-07 23:52:15,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2024-11-07 23:52:15,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2024-11-07 23:52:15,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-07 23:52:15,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2024-11-07 23:52:15,599 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-11-07 23:52:15,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-11-07 23:52:15,600 INFO L425 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-11-07 23:52:15,601 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-07 23:52:15,601 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2024-11-07 23:52:15,602 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2024-11-07 23:52:15,603 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-07 23:52:15,603 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-07 23:52:15,607 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-07 23:52:15,607 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [95, 94, 1, 1, 1, 1] [2024-11-07 23:52:15,608 INFO L745 eck$LassoCheckResult]: Stem: 2245#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2246#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 2241#L549-3 [2024-11-07 23:52:15,608 INFO L747 eck$LassoCheckResult]: Loop: 2241#L549-3 call main_#t~mem4#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2239#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#1(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2240#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2244#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2242#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2243#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2433#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2432#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2431#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2430#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2429#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2428#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2427#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2426#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2425#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2424#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2423#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2422#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2421#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2420#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2419#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2418#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2417#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2416#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2415#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2414#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2413#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2412#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2411#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2410#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2409#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2408#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2407#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2406#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2405#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2404#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2403#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2402#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2401#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2400#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2399#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2398#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2397#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2396#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2395#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2394#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2393#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2392#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2391#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2390#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2389#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2388#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2387#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2386#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2385#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2384#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2383#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2382#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2381#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2380#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2379#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2378#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2377#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2376#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2375#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2374#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2373#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2372#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2371#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2370#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2369#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2368#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2367#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2366#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2365#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2364#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2363#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2362#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2361#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2360#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2359#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2358#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2357#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2356#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2355#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2354#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2353#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2352#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2351#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2350#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2349#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2348#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2347#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2346#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2345#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2344#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2343#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2342#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2341#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2340#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2339#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2338#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2337#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2336#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2335#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2334#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2333#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2332#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2331#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2330#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2329#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2328#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2327#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2326#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2325#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2324#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2323#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2322#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2321#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2320#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2319#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2318#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2317#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2315#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2313#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2312#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2311#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2310#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2309#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2307#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2305#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2303#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2301#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2300#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2299#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2297#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2295#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2294#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2293#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2292#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2291#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2290#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2289#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2288#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2287#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2286#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2285#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2284#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2283#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2282#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2281#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2280#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2279#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2278#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2277#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2276#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2275#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2274#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2273#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2272#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2271#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2270#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2269#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2268#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2267#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2266#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2265#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2264#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2263#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2262#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2261#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2260#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2259#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2258#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2257#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2256#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2255#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2254#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2253#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2252#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2251#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2250#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#1(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2249#L551-3 call main_#t~mem5#1 := read~int#1(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2248#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 2247#L551-4 call main_#t~mem7#1 := read~int#0(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#0(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 2241#L549-3 [2024-11-07 23:52:15,608 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:52:15,608 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2024-11-07 23:52:15,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:52:15,609 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262910616] [2024-11-07 23:52:15,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:52:15,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:52:15,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:52:15,614 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-07 23:52:15,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-07 23:52:15,617 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-07 23:52:15,617 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-07 23:52:15,617 INFO L85 PathProgramCache]: Analyzing trace with hash -1384860837, now seen corresponding path program 6 times [2024-11-07 23:52:15,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-07 23:52:15,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781600735] [2024-11-07 23:52:15,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-07 23:52:15,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-07 23:52:15,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-07 23:52:38,461 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-07 23:52:38,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-07 23:52:38,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781600735] [2024-11-07 23:52:38,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1781600735] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-07 23:52:38,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [136052096] [2024-11-07 23:52:38,462 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-07 23:52:38,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-07 23:52:38,462 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2024-11-07 23:52:38,465 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-07 23:52:38,466 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process