./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c7c6ca5d Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 --- Real Ultimate output --- This is Ultimate 0.2.5-?-c7c6ca5-m [2024-11-09 15:18:04,254 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-09 15:18:04,325 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-09 15:18:04,332 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-09 15:18:04,334 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-09 15:18:04,362 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-09 15:18:04,364 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-09 15:18:04,364 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-09 15:18:04,365 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-09 15:18:04,366 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-09 15:18:04,367 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-09 15:18:04,367 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-09 15:18:04,368 INFO L153 SettingsManager]: * Use SBE=true [2024-11-09 15:18:04,368 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-09 15:18:04,370 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-09 15:18:04,370 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-09 15:18:04,371 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-09 15:18:04,371 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-09 15:18:04,371 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-09 15:18:04,371 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-09 15:18:04,372 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-09 15:18:04,375 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-09 15:18:04,375 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-09 15:18:04,375 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-09 15:18:04,376 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-09 15:18:04,376 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-09 15:18:04,376 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-09 15:18:04,376 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-09 15:18:04,377 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-09 15:18:04,377 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-09 15:18:04,377 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-09 15:18:04,378 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-09 15:18:04,378 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-09 15:18:04,379 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-09 15:18:04,379 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-09 15:18:04,380 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-09 15:18:04,380 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 302c18c494f9017ecbb07643194b1d54ba0a6bba467355d4f775638dea57e539 [2024-11-09 15:18:04,664 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-09 15:18:04,691 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-09 15:18:04,694 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-09 15:18:04,696 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-09 15:18:04,696 INFO L274 PluginConnector]: CDTParser initialized [2024-11-09 15:18:04,698 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2024-11-09 15:18:06,092 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-09 15:18:06,259 INFO L384 CDTParser]: Found 1 translation units. [2024-11-09 15:18:06,259 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays03-ValueRestictsIndex-2.c [2024-11-09 15:18:06,266 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/179756dfd/69a6e11df1634fc5ab9559bb8cba5820/FLAGb9fa9162b [2024-11-09 15:18:06,278 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/179756dfd/69a6e11df1634fc5ab9559bb8cba5820 [2024-11-09 15:18:06,280 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-09 15:18:06,281 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-09 15:18:06,282 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-09 15:18:06,282 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-09 15:18:06,288 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-09 15:18:06,289 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,290 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1a788b24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06, skipping insertion in model container [2024-11-09 15:18:06,290 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,308 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-09 15:18:06,466 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-09 15:18:06,471 INFO L200 MainTranslator]: Completed pre-run [2024-11-09 15:18:06,489 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-09 15:18:06,509 INFO L204 MainTranslator]: Completed translation [2024-11-09 15:18:06,510 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06 WrapperNode [2024-11-09 15:18:06,511 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-09 15:18:06,512 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-09 15:18:06,512 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-09 15:18:06,512 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-09 15:18:06,518 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,525 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,544 INFO L138 Inliner]: procedures = 8, calls = 8, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 48 [2024-11-09 15:18:06,545 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-09 15:18:06,545 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-09 15:18:06,546 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-09 15:18:06,546 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-09 15:18:06,555 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,555 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,561 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,576 INFO L175 MemorySlicer]: Split 3 memory accesses to 1 slices as follows [3]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 1 writes are split as follows [1]. [2024-11-09 15:18:06,577 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,577 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,581 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,587 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,588 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,589 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,590 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-09 15:18:06,591 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-09 15:18:06,591 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-09 15:18:06,591 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-09 15:18:06,592 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (1/1) ... [2024-11-09 15:18:06,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:18:06,608 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:06,622 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:18:06,624 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-09 15:18:06,664 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-09 15:18:06,664 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-09 15:18:06,664 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-09 15:18:06,681 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-09 15:18:06,681 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-09 15:18:06,681 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-09 15:18:06,756 INFO L238 CfgBuilder]: Building ICFG [2024-11-09 15:18:06,758 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-09 15:18:06,867 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2024-11-09 15:18:06,867 INFO L287 CfgBuilder]: Performing block encoding [2024-11-09 15:18:06,880 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-09 15:18:06,882 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-09 15:18:06,883 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 03:18:06 BoogieIcfgContainer [2024-11-09 15:18:06,883 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-09 15:18:06,884 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-09 15:18:06,884 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-09 15:18:06,888 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-09 15:18:06,888 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-09 15:18:06,889 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.11 03:18:06" (1/3) ... [2024-11-09 15:18:06,889 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28c02bca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 03:18:06, skipping insertion in model container [2024-11-09 15:18:06,890 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-09 15:18:06,890 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:18:06" (2/3) ... [2024-11-09 15:18:06,891 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@28c02bca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 03:18:06, skipping insertion in model container [2024-11-09 15:18:06,892 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-09 15:18:06,892 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 03:18:06" (3/3) ... [2024-11-09 15:18:06,893 INFO L332 chiAutomizerObserver]: Analyzing ICFG Arrays03-ValueRestictsIndex-2.c [2024-11-09 15:18:06,933 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-09 15:18:06,933 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-09 15:18:06,933 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-09 15:18:06,933 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-09 15:18:06,933 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-09 15:18:06,933 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-09 15:18:06,934 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-09 15:18:06,934 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-09 15:18:06,937 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:06,947 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2024-11-09 15:18:06,947 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:06,948 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:06,951 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-09 15:18:06,951 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:18:06,951 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-09 15:18:06,951 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:06,953 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2024-11-09 15:18:06,953 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:06,953 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:06,953 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-09 15:18:06,953 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:18:06,959 INFO L745 eck$LassoCheckResult]: Stem: 11#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 3#L15-3true [2024-11-09 15:18:06,959 INFO L747 eck$LassoCheckResult]: Loop: 3#L15-3true assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 7#L15-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 3#L15-3true [2024-11-09 15:18:06,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:06,964 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-09 15:18:06,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:06,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836567202] [2024-11-09 15:18:06,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:06,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:07,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:07,077 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:07,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:07,107 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:07,110 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:07,110 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-11-09 15:18:07,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:07,111 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107185274] [2024-11-09 15:18:07,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:07,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:07,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:07,125 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:07,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:07,137 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:07,139 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:07,139 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-11-09 15:18:07,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:07,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507125674] [2024-11-09 15:18:07,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:07,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:07,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:07,165 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:07,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:07,188 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:07,466 INFO L204 LassoAnalysis]: Preferences: [2024-11-09 15:18:07,466 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-09 15:18:07,466 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-09 15:18:07,466 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-09 15:18:07,467 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-09 15:18:07,467 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:18:07,467 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-09 15:18:07,467 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-09 15:18:07,467 INFO L132 ssoRankerPreferences]: Filename of dumped script: Arrays03-ValueRestictsIndex-2.c_Iteration1_Lasso [2024-11-09 15:18:07,470 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-09 15:18:07,470 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-09 15:18:07,492 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,604 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,608 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,611 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,615 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,619 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,622 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,626 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,630 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,636 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,640 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:18:07,794 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-09 15:18:07,798 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-09 15:18:07,800 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:18:07,800 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:07,802 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:18:07,803 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-11-09 15:18:07,805 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:18:07,818 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:18:07,818 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:18:07,819 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:18:07,819 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:18:07,825 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:18:07,825 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:18:07,832 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:18:07,849 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-11-09 15:18:07,850 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:18:07,850 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:07,852 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:18:07,853 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-09 15:18:07,855 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:18:07,868 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:18:07,868 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:18:07,869 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:18:07,869 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:18:07,875 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:18:07,875 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:18:07,883 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-09 15:18:07,899 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-11-09 15:18:07,899 INFO L444 ModelExtractionUtils]: 1 out of 13 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-11-09 15:18:07,901 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:18:07,901 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:07,920 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:18:07,922 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-09 15:18:07,922 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-09 15:18:07,938 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-09 15:18:07,939 INFO L474 LassoAnalysis]: Proved termination. [2024-11-09 15:18:07,939 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 2095 Supporting invariants [] [2024-11-09 15:18:07,951 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-11-09 15:18:07,957 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2024-11-09 15:18:07,980 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:07,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:07,994 INFO L255 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-09 15:18:07,995 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:08,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,009 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-09 15:18:08,009 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:08,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,061 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-09 15:18:08,063 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,110 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 14 states, 13 states have (on average 1.5384615384615385) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 26 states and 39 transitions. Complement of second has 6 states. [2024-11-09 15:18:08,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-09 15:18:08,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 19 transitions. [2024-11-09 15:18:08,118 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 2 letters. Loop has 2 letters. [2024-11-09 15:18:08,119 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:18:08,119 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 4 letters. Loop has 2 letters. [2024-11-09 15:18:08,119 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:18:08,119 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 19 transitions. Stem has 2 letters. Loop has 4 letters. [2024-11-09 15:18:08,119 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:18:08,120 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 39 transitions. [2024-11-09 15:18:08,123 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,125 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 10 states and 13 transitions. [2024-11-09 15:18:08,126 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-11-09 15:18:08,126 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:08,126 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2024-11-09 15:18:08,127 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:08,127 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-09 15:18:08,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2024-11-09 15:18:08,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-11-09 15:18:08,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2024-11-09 15:18:08,145 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-09 15:18:08,145 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-09 15:18:08,145 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-09 15:18:08,145 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2024-11-09 15:18:08,146 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,146 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:08,146 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:08,146 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:08,147 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:08,147 INFO L745 eck$LassoCheckResult]: Stem: 87#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 88#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 82#L15-3 assume !(main_~i~0#1 < 1048); 80#L15-4 havoc main_~i~0#1; 81#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 89#L20 assume !main_#t~short5#1; 85#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 86#L22-2 [2024-11-09 15:18:08,147 INFO L747 eck$LassoCheckResult]: Loop: 86#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 86#L22-2 [2024-11-09 15:18:08,147 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1807952492, now seen corresponding path program 1 times [2024-11-09 15:18:08,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1868960261] [2024-11-09 15:18:08,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,233 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:08,234 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1868960261] [2024-11-09 15:18:08,234 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1868960261] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-09 15:18:08,234 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-09 15:18:08,235 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-09 15:18:08,235 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930721996] [2024-11-09 15:18:08,238 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-09 15:18:08,240 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:08,244 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,245 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 1 times [2024-11-09 15:18:08,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123923982] [2024-11-09 15:18:08,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:08,250 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:08,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:08,259 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:08,277 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:08,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-09 15:18:08,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-09 15:18:08,281 INFO L87 Difference]: Start difference. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:08,292 INFO L93 Difference]: Finished difference Result 11 states and 13 transitions. [2024-11-09 15:18:08,293 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 13 transitions. [2024-11-09 15:18:08,294 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,295 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 13 transitions. [2024-11-09 15:18:08,295 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:08,296 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:08,296 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 13 transitions. [2024-11-09 15:18:08,296 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:08,296 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 13 transitions. [2024-11-09 15:18:08,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 13 transitions. [2024-11-09 15:18:08,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2024-11-09 15:18:08,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2024-11-09 15:18:08,299 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-11-09 15:18:08,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-09 15:18:08,301 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-11-09 15:18:08,302 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-09 15:18:08,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2024-11-09 15:18:08,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:08,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:08,303 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:08,303 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:08,303 INFO L745 eck$LassoCheckResult]: Stem: 114#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 115#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 109#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 110#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 111#L15-3 assume !(main_~i~0#1 < 1048); 107#L15-4 havoc main_~i~0#1; 108#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 116#L20 assume !main_#t~short5#1; 112#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 113#L22-2 [2024-11-09 15:18:08,303 INFO L747 eck$LassoCheckResult]: Loop: 113#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 113#L22-2 [2024-11-09 15:18:08,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,304 INFO L85 PathProgramCache]: Analyzing trace with hash -369324246, now seen corresponding path program 1 times [2024-11-09 15:18:08,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207122954] [2024-11-09 15:18:08,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,399 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:08,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207122954] [2024-11-09 15:18:08,404 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1207122954] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:08,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1635240230] [2024-11-09 15:18:08,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,404 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:08,404 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:08,406 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:08,418 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-09 15:18:08,424 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-11-09 15:18:08,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,463 INFO L255 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-09 15:18:08,464 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:08,471 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:18:08,472 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-09 15:18:08,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1635240230] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-09 15:18:08,472 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-09 15:18:08,472 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [4] total 5 [2024-11-09 15:18:08,472 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1551957510] [2024-11-09 15:18:08,473 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-09 15:18:08,473 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:08,473 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,473 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 2 times [2024-11-09 15:18:08,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183019431] [2024-11-09 15:18:08,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:08,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:08,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:08,479 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:08,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:08,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-09 15:18:08,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-09 15:18:08,503 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 4.5) internal successors, (9), 3 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:08,512 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-11-09 15:18:08,512 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-11-09 15:18:08,515 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,515 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 10 states and 11 transitions. [2024-11-09 15:18:08,515 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:08,515 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:08,515 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2024-11-09 15:18:08,515 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:08,515 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-11-09 15:18:08,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2024-11-09 15:18:08,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-11-09 15:18:08,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2024-11-09 15:18:08,517 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-11-09 15:18:08,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-09 15:18:08,519 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-11-09 15:18:08,519 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-09 15:18:08,519 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2024-11-09 15:18:08,520 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,520 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:08,520 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:08,520 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:08,520 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:08,520 INFO L745 eck$LassoCheckResult]: Stem: 167#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 168#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 163#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 164#L15-3 assume !(main_~i~0#1 < 1048); 160#L15-4 havoc main_~i~0#1; 161#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 169#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 165#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 166#L22-2 [2024-11-09 15:18:08,521 INFO L747 eck$LassoCheckResult]: Loop: 166#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 166#L22-2 [2024-11-09 15:18:08,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,521 INFO L85 PathProgramCache]: Analyzing trace with hash -369324308, now seen corresponding path program 1 times [2024-11-09 15:18:08,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1176619592] [2024-11-09 15:18:08,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,605 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:08,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1176619592] [2024-11-09 15:18:08,606 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1176619592] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:08,606 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [915871497] [2024-11-09 15:18:08,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:08,606 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:08,608 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:08,610 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-09 15:18:08,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,652 INFO L255 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-09 15:18:08,652 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:08,672 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,672 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:18:08,692 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [915871497] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:18:08,693 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:18:08,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-09 15:18:08,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [936558939] [2024-11-09 15:18:08,693 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:18:08,693 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:08,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,694 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 3 times [2024-11-09 15:18:08,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620989596] [2024-11-09 15:18:08,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:08,699 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:08,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:08,703 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:08,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:08,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-09 15:18:08,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-11-09 15:18:08,721 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 2.2857142857142856) internal successors, (16), 7 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:08,750 INFO L93 Difference]: Finished difference Result 16 states and 17 transitions. [2024-11-09 15:18:08,750 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 16 states and 17 transitions. [2024-11-09 15:18:08,750 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,751 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 16 states to 16 states and 17 transitions. [2024-11-09 15:18:08,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:08,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:08,751 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 17 transitions. [2024-11-09 15:18:08,751 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:08,751 INFO L218 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-11-09 15:18:08,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 17 transitions. [2024-11-09 15:18:08,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 16. [2024-11-09 15:18:08,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:08,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2024-11-09 15:18:08,755 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-11-09 15:18:08,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-09 15:18:08,756 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-11-09 15:18:08,756 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-09 15:18:08,757 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2024-11-09 15:18:08,757 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:08,758 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:08,758 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:08,759 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:08,759 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:08,759 INFO L745 eck$LassoCheckResult]: Stem: 252#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 253#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 247#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 249#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 259#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 258#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 257#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 256#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 255#L15-3 assume !(main_~i~0#1 < 1048); 244#L15-4 havoc main_~i~0#1; 245#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 254#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 250#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 251#L22-2 [2024-11-09 15:18:08,760 INFO L747 eck$LassoCheckResult]: Loop: 251#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 251#L22-2 [2024-11-09 15:18:08,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:08,761 INFO L85 PathProgramCache]: Analyzing trace with hash 1716187174, now seen corresponding path program 2 times [2024-11-09 15:18:08,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:08,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249134899] [2024-11-09 15:18:08,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:08,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:08,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:08,910 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:08,910 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249134899] [2024-11-09 15:18:08,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1249134899] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:08,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [735386849] [2024-11-09 15:18:08,911 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-09 15:18:08,911 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:08,911 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:08,912 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:08,913 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-09 15:18:08,961 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-09 15:18:08,961 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:18:08,962 INFO L255 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-09 15:18:08,963 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:08,992 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:08,993 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:18:09,065 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:09,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [735386849] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:18:09,065 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:18:09,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-09 15:18:09,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [491474673] [2024-11-09 15:18:09,066 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:18:09,066 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:09,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:09,066 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 4 times [2024-11-09 15:18:09,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:09,067 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360665935] [2024-11-09 15:18:09,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:09,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:09,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:09,070 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:09,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:09,072 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:09,091 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:09,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-09 15:18:09,092 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-11-09 15:18:09,092 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 2.1538461538461537) internal successors, (28), 13 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:09,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:09,146 INFO L93 Difference]: Finished difference Result 28 states and 29 transitions. [2024-11-09 15:18:09,146 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 29 transitions. [2024-11-09 15:18:09,147 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:09,147 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 29 transitions. [2024-11-09 15:18:09,147 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:09,147 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:09,148 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 29 transitions. [2024-11-09 15:18:09,148 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:09,148 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-11-09 15:18:09,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 29 transitions. [2024-11-09 15:18:09,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2024-11-09 15:18:09,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:09,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2024-11-09 15:18:09,154 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-11-09 15:18:09,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-09 15:18:09,157 INFO L425 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-11-09 15:18:09,157 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-09 15:18:09,157 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2024-11-09 15:18:09,158 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:09,158 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:09,158 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:09,159 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:09,159 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:09,159 INFO L745 eck$LassoCheckResult]: Stem: 396#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 397#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 392#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 393#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 394#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 395#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 399#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 415#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 414#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 413#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 412#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 411#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 410#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 409#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 408#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 407#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 406#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 405#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 404#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 403#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 402#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 401#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 400#L15-3 assume !(main_~i~0#1 < 1048); 388#L15-4 havoc main_~i~0#1; 389#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 398#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 390#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 391#L22-2 [2024-11-09 15:18:09,159 INFO L747 eck$LassoCheckResult]: Loop: 391#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 391#L22-2 [2024-11-09 15:18:09,159 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:09,159 INFO L85 PathProgramCache]: Analyzing trace with hash 1328175130, now seen corresponding path program 3 times [2024-11-09 15:18:09,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:09,160 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581355864] [2024-11-09 15:18:09,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:09,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:09,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:09,442 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:09,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:09,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581355864] [2024-11-09 15:18:09,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1581355864] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:09,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1530659953] [2024-11-09 15:18:09,443 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-09 15:18:09,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:09,443 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:09,445 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:09,446 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-09 15:18:09,562 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-09 15:18:09,562 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:18:09,564 INFO L255 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-09 15:18:09,566 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:09,635 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:09,636 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:18:09,884 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:09,884 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1530659953] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:18:09,884 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:18:09,884 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-11-09 15:18:09,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [39946003] [2024-11-09 15:18:09,885 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:18:09,885 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:09,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:09,885 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 5 times [2024-11-09 15:18:09,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:09,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461641521] [2024-11-09 15:18:09,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:09,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:09,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:09,890 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:09,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:09,894 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:09,915 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:09,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-09 15:18:09,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-11-09 15:18:09,916 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 2.08) internal successors, (52), 25 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:09,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:09,999 INFO L93 Difference]: Finished difference Result 52 states and 53 transitions. [2024-11-09 15:18:10,002 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 53 transitions. [2024-11-09 15:18:10,003 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:10,004 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 52 states and 53 transitions. [2024-11-09 15:18:10,004 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:10,004 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:10,004 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 53 transitions. [2024-11-09 15:18:10,004 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:10,005 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-11-09 15:18:10,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 53 transitions. [2024-11-09 15:18:10,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2024-11-09 15:18:10,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:10,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2024-11-09 15:18:10,012 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-11-09 15:18:10,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-09 15:18:10,013 INFO L425 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-11-09 15:18:10,014 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-09 15:18:10,014 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2024-11-09 15:18:10,015 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:10,015 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:10,015 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:10,016 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:10,016 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:10,018 INFO L745 eck$LassoCheckResult]: Stem: 660#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 661#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 654#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 655#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 656#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 657#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 663#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 703#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 702#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 701#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 700#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 699#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 698#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 697#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 696#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 695#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 694#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 693#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 692#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 691#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 690#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 689#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 688#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 687#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 686#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 685#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 684#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 683#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 682#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 681#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 680#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 679#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 678#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 677#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 676#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 675#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 674#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 673#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 672#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 671#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 670#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 669#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 668#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 667#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 666#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 665#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 664#L15-3 assume !(main_~i~0#1 < 1048); 652#L15-4 havoc main_~i~0#1; 653#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 662#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 658#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 659#L22-2 [2024-11-09 15:18:10,018 INFO L747 eck$LassoCheckResult]: Loop: 659#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 659#L22-2 [2024-11-09 15:18:10,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:10,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1458388482, now seen corresponding path program 4 times [2024-11-09 15:18:10,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:10,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251118570] [2024-11-09 15:18:10,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:10,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:10,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:10,704 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:10,704 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:10,704 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251118570] [2024-11-09 15:18:10,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1251118570] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:10,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1058471123] [2024-11-09 15:18:10,705 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-09 15:18:10,705 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:10,705 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:10,707 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:10,708 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-09 15:18:10,811 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-09 15:18:10,811 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:18:10,813 INFO L255 TraceCheckSpWp]: Trace formula consists of 281 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-09 15:18:10,815 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:10,895 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:10,896 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:18:11,688 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:11,689 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1058471123] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:18:11,689 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:18:11,689 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-11-09 15:18:11,689 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034371879] [2024-11-09 15:18:11,689 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:18:11,690 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:11,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:11,690 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 6 times [2024-11-09 15:18:11,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:11,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311440672] [2024-11-09 15:18:11,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:11,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:11,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:11,697 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:11,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:11,700 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:11,718 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:11,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-11-09 15:18:11,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-11-09 15:18:11,720 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 2.0408163265306123) internal successors, (100), 49 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:11,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:11,889 INFO L93 Difference]: Finished difference Result 100 states and 101 transitions. [2024-11-09 15:18:11,889 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 101 transitions. [2024-11-09 15:18:11,890 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:11,891 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 101 transitions. [2024-11-09 15:18:11,895 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:11,895 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:11,895 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 101 transitions. [2024-11-09 15:18:11,895 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:11,895 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-11-09 15:18:11,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 101 transitions. [2024-11-09 15:18:11,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2024-11-09 15:18:11,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:11,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2024-11-09 15:18:11,902 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-11-09 15:18:11,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-11-09 15:18:11,904 INFO L425 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-11-09 15:18:11,905 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-09 15:18:11,905 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2024-11-09 15:18:11,906 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:11,906 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:11,906 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:11,911 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:11,911 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:11,911 INFO L745 eck$LassoCheckResult]: Stem: 1164#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1165#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 1158#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1159#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1160#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1161#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1167#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1255#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1253#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1251#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1249#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1247#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1245#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1243#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1241#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1239#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1237#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1235#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1233#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1231#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1229#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1227#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1225#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1223#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1221#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1219#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1217#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1215#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1213#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1211#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1209#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1207#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1205#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1203#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1201#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1199#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1197#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1195#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1193#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1191#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1189#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1187#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1185#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1183#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1181#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1179#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1177#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1175#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1173#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1172#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1171#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1170#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1169#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1168#L15-3 assume !(main_~i~0#1 < 1048); 1156#L15-4 havoc main_~i~0#1; 1157#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 1166#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 1162#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 1163#L22-2 [2024-11-09 15:18:11,912 INFO L747 eck$LassoCheckResult]: Loop: 1163#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 1163#L22-2 [2024-11-09 15:18:11,912 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:11,912 INFO L85 PathProgramCache]: Analyzing trace with hash 546267602, now seen corresponding path program 5 times [2024-11-09 15:18:11,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:11,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410323846] [2024-11-09 15:18:11,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:11,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:11,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:13,898 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:13,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:13,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410323846] [2024-11-09 15:18:13,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1410323846] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:13,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1154084667] [2024-11-09 15:18:13,899 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-09 15:18:13,899 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:13,899 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:13,902 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:13,904 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-09 15:18:24,199 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-09 15:18:24,199 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:18:24,211 INFO L255 TraceCheckSpWp]: Trace formula consists of 545 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-11-09 15:18:24,215 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:18:24,372 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:24,372 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:18:27,034 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:27,035 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1154084667] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:18:27,035 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:18:27,035 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-11-09 15:18:27,035 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [12546457] [2024-11-09 15:18:27,035 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:18:27,036 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:18:27,036 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:27,036 INFO L85 PathProgramCache]: Analyzing trace with hash 68, now seen corresponding path program 7 times [2024-11-09 15:18:27,036 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:27,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60107185] [2024-11-09 15:18:27,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:27,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:27,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:27,041 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:18:27,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:18:27,045 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:18:27,060 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:18:27,061 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-11-09 15:18:27,064 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-11-09 15:18:27,065 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 97 states, 97 states have (on average 2.020618556701031) internal successors, (196), 97 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:27,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:18:27,415 INFO L93 Difference]: Finished difference Result 196 states and 197 transitions. [2024-11-09 15:18:27,415 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 196 states and 197 transitions. [2024-11-09 15:18:27,418 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:27,419 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 196 states to 196 states and 197 transitions. [2024-11-09 15:18:27,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-09 15:18:27,419 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-09 15:18:27,419 INFO L73 IsDeterministic]: Start isDeterministic. Operand 196 states and 197 transitions. [2024-11-09 15:18:27,424 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:18:27,424 INFO L218 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-11-09 15:18:27,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states and 197 transitions. [2024-11-09 15:18:27,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 196. [2024-11-09 15:18:27,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:18:27,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2024-11-09 15:18:27,439 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-11-09 15:18:27,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-11-09 15:18:27,442 INFO L425 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-11-09 15:18:27,442 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-09 15:18:27,442 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2024-11-09 15:18:27,443 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2024-11-09 15:18:27,443 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:18:27,443 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:18:27,446 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:18:27,446 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-09 15:18:27,446 INFO L745 eck$LassoCheckResult]: Stem: 2148#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2149#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~nondet1#1, main_#t~post2#1, main_~i~0#1, main_#t~mem3#1, main_#t~mem4#1, main_#t~short5#1, main_#t~nondet6#1, main_~x~0#1, main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset;havoc main_#t~nondet0#1;main_~k~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0; 2142#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2143#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2144#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2145#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2151#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2335#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2334#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2333#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2332#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2331#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2330#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2329#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2328#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2327#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2326#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2325#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2324#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2323#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2322#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2321#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2320#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2319#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2318#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2317#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2316#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2315#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2314#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2313#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2312#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2311#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2310#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2309#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2308#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2307#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2306#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2305#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2304#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2303#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2302#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2301#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2300#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2299#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2298#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2297#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2296#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2295#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2294#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2293#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2292#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2291#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2290#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2289#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2288#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2287#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2286#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2285#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2284#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2283#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2282#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2281#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2280#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2279#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2278#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2277#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2276#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2275#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2274#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2273#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2272#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2271#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2270#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2269#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2268#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2267#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2266#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2265#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2264#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2263#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2262#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2261#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2260#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2259#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2258#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2257#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2256#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2255#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2254#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2253#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2252#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2251#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2250#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2249#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2248#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2247#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2246#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2245#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2244#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2243#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2242#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2241#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2240#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2239#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2238#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2237#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2236#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2235#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2234#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2233#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2232#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2231#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2230#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2229#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2228#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2227#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2226#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2225#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2224#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2223#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2222#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2221#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2220#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2219#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2218#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2217#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2216#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2215#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2214#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2213#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2212#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2211#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2210#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2209#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2208#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2207#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2206#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2205#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2204#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2203#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2202#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2201#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2200#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2199#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2198#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2197#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2196#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2195#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2194#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2193#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2192#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2191#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2190#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2189#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2188#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2187#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2186#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2185#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2184#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2183#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2182#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2181#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2180#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2179#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2178#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2177#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2176#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2175#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2174#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2173#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2172#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2171#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2170#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2169#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2168#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2167#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2166#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2165#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2164#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2163#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2162#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2161#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2160#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2159#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2158#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2157#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2156#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2155#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2154#L15-3 assume !!(main_~i~0#1 < 1048);havoc main_#t~nondet1#1;call write~int#0(main_#t~nondet1#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2153#L15-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2152#L15-3 assume !(main_~i~0#1 < 1048); 2140#L15-4 havoc main_~i~0#1; 2141#L19 assume main_~k~0#1 >= 0 && main_~k~0#1 < 1048;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset, 4);main_#t~short5#1 := 23 == main_#t~mem3#1; 2150#L20 assume main_#t~short5#1;call main_#t~mem4#1 := read~int#0(main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~k~0#1, 4);main_#t~short5#1 := 42 == main_#t~mem4#1; 2146#L20-2 assume main_#t~short5#1;havoc main_#t~mem3#1;havoc main_#t~mem4#1;havoc main_#t~short5#1;havoc main_#t~nondet6#1;main_~x~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1; 2147#L22-2 [2024-11-09 15:18:27,448 INFO L747 eck$LassoCheckResult]: Loop: 2147#L22-2 assume !!(main_~x~0#1 >= 0);main_~x~0#1 := main_~x~0#1 - main_~k~0#1; 2147#L22-2 [2024-11-09 15:18:27,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:18:27,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1352993138, now seen corresponding path program 6 times [2024-11-09 15:18:27,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:18:27,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911245037] [2024-11-09 15:18:27,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:18:27,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:18:27,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:18:33,527 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:18:33,527 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:18:33,527 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [911245037] [2024-11-09 15:18:33,527 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [911245037] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:18:33,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [732718087] [2024-11-09 15:18:33,528 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-09 15:18:33,528 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:18:33,528 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:18:33,529 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:18:33,530 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process