./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 023d838f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6ef2b56a2f4ebf2e6f7f4ededf8760f087ff726b08e36644d8dcb52a8d087cd1 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-023d838-m [2024-11-10 23:00:18,252 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-10 23:00:18,342 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-10 23:00:18,347 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-10 23:00:18,348 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-10 23:00:18,349 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2024-11-10 23:00:18,383 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-10 23:00:18,384 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-10 23:00:18,385 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-10 23:00:18,386 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-10 23:00:18,387 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-10 23:00:18,387 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-10 23:00:18,388 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-10 23:00:18,391 INFO L153 SettingsManager]: * Use SBE=true [2024-11-10 23:00:18,391 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-10 23:00:18,391 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-10 23:00:18,392 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-10 23:00:18,392 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-10 23:00:18,392 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-10 23:00:18,392 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-10 23:00:18,392 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-10 23:00:18,393 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-10 23:00:18,393 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-10 23:00:18,393 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-10 23:00:18,393 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-10 23:00:18,394 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-10 23:00:18,394 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-10 23:00:18,394 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-10 23:00:18,394 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-10 23:00:18,394 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-10 23:00:18,395 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-10 23:00:18,395 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-10 23:00:18,395 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-10 23:00:18,395 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-10 23:00:18,395 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-10 23:00:18,396 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-10 23:00:18,396 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-10 23:00:18,397 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-10 23:00:18,397 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-10 23:00:18,398 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-10 23:00:18,398 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6ef2b56a2f4ebf2e6f7f4ededf8760f087ff726b08e36644d8dcb52a8d087cd1 [2024-11-10 23:00:18,657 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-10 23:00:18,678 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-10 23:00:18,682 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-10 23:00:18,683 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-10 23:00:18,683 INFO L274 PluginConnector]: CDTParser initialized [2024-11-10 23:00:18,684 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c [2024-11-10 23:00:20,081 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-10 23:00:20,309 INFO L384 CDTParser]: Found 1 translation units. [2024-11-10 23:00:20,310 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-memsafety/ArraysOfVariableLength6.c [2024-11-10 23:00:20,323 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/304415580/c7631a22af3749d6897f6ed49c6f8b1c/FLAGb5e2f3a2a [2024-11-10 23:00:20,673 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/304415580/c7631a22af3749d6897f6ed49c6f8b1c [2024-11-10 23:00:20,677 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-10 23:00:20,679 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-10 23:00:20,685 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-10 23:00:20,686 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-10 23:00:20,691 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-10 23:00:20,692 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:20,693 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1bff1c16 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20, skipping insertion in model container [2024-11-10 23:00:20,694 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:20,715 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-10 23:00:20,917 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:00:20,931 INFO L200 MainTranslator]: Completed pre-run [2024-11-10 23:00:20,948 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:00:20,965 INFO L204 MainTranslator]: Completed translation [2024-11-10 23:00:20,965 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20 WrapperNode [2024-11-10 23:00:20,965 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-10 23:00:20,966 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-10 23:00:20,966 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-10 23:00:20,967 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-10 23:00:20,973 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:20,979 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:20,996 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 65 [2024-11-10 23:00:20,996 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-10 23:00:20,997 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-10 23:00:20,997 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-10 23:00:20,998 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-10 23:00:21,006 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,007 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,008 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,021 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [2, 1]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [1, 0]. [2024-11-10 23:00:21,022 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,022 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,031 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,031 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,033 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,034 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,036 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-10 23:00:21,037 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-11-10 23:00:21,037 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-11-10 23:00:21,037 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-11-10 23:00:21,038 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (1/1) ... [2024-11-10 23:00:21,044 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:21,057 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:21,070 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:21,072 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-10 23:00:21,116 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-10 23:00:21,117 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-10 23:00:21,117 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-10 23:00:21,117 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-10 23:00:21,118 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-10 23:00:21,118 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-10 23:00:21,118 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-10 23:00:21,118 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-10 23:00:21,182 INFO L256 CfgBuilder]: Building ICFG [2024-11-10 23:00:21,184 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-10 23:00:21,338 INFO L1247 $ProcedureCfgBuilder]: dead code at ProgramPoint L22: call ULTIMATE.dealloc(main_~#b~0#1.base, main_~#b~0#1.offset);havoc main_~#b~0#1.base, main_~#b~0#1.offset;call ULTIMATE.dealloc(main_~#mask~0#1.base, main_~#mask~0#1.offset);havoc main_~#mask~0#1.base, main_~#mask~0#1.offset; [2024-11-10 23:00:21,347 INFO L? ?]: Removed 12 outVars from TransFormulas that were not future-live. [2024-11-10 23:00:21,347 INFO L307 CfgBuilder]: Performing block encoding [2024-11-10 23:00:21,357 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-10 23:00:21,357 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-10 23:00:21,358 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:21 BoogieIcfgContainer [2024-11-10 23:00:21,358 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-11-10 23:00:21,359 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-10 23:00:21,359 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-10 23:00:21,362 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-10 23:00:21,362 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:21,363 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.11 11:00:20" (1/3) ... [2024-11-10 23:00:21,363 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3b46f80c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:00:21, skipping insertion in model container [2024-11-10 23:00:21,364 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:21,364 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:20" (2/3) ... [2024-11-10 23:00:21,364 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3b46f80c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:00:21, skipping insertion in model container [2024-11-10 23:00:21,364 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:21,364 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:21" (3/3) ... [2024-11-10 23:00:21,365 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysOfVariableLength6.c [2024-11-10 23:00:21,411 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-10 23:00:21,411 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-10 23:00:21,411 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-10 23:00:21,411 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-10 23:00:21,411 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-10 23:00:21,411 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-10 23:00:21,412 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-10 23:00:21,412 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-10 23:00:21,416 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:21,431 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:21,432 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:21,432 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:21,435 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:21,436 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-10 23:00:21,436 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-10 23:00:21,436 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:21,437 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:21,438 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:21,438 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:21,438 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:21,438 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-10 23:00:21,442 INFO L745 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 13#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 6#L25true [2024-11-10 23:00:21,442 INFO L747 eck$LassoCheckResult]: Loop: 6#L25true assume true; 7#L25-1true assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8#L15true assume !true; 4#L18-1true foo_#res#1 := foo_~i~0#1; 11#L18true assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6#L25true [2024-11-10 23:00:21,447 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:21,447 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 1 times [2024-11-10 23:00:21,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:21,455 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974752170] [2024-11-10 23:00:21,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:21,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:21,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:21,549 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:21,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:21,579 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:21,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:21,581 INFO L85 PathProgramCache]: Analyzing trace with hash 57223351, now seen corresponding path program 1 times [2024-11-10 23:00:21,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:21,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391639305] [2024-11-10 23:00:21,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:21,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:21,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:21,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:21,631 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:21,631 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391639305] [2024-11-10 23:00:21,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1391639305] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:21,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:21,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-10 23:00:21,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497429961] [2024-11-10 23:00:21,633 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:21,636 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:21,636 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:21,661 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-10 23:00:21,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-10 23:00:21,663 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:21,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:21,668 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2024-11-10 23:00:21,670 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 20 transitions. [2024-11-10 23:00:21,671 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:21,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 12 states and 14 transitions. [2024-11-10 23:00:21,674 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2024-11-10 23:00:21,674 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2024-11-10 23:00:21,674 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 14 transitions. [2024-11-10 23:00:21,675 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:21,675 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-10 23:00:21,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 14 transitions. [2024-11-10 23:00:21,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2024-11-10 23:00:21,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.1666666666666667) internal successors, (14), 11 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:21,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 14 transitions. [2024-11-10 23:00:21,694 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-10 23:00:21,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-10 23:00:21,699 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-10 23:00:21,699 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-10 23:00:21,699 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 14 transitions. [2024-11-10 23:00:21,699 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:21,700 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:21,700 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:21,700 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:21,700 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-10 23:00:21,700 INFO L745 eck$LassoCheckResult]: Stem: 47#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 48#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 43#L25 [2024-11-10 23:00:21,700 INFO L747 eck$LassoCheckResult]: Loop: 43#L25 assume true; 50#L25-1 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 51#L15 assume true; 52#L15-1 assume !(foo_~i~0#1 < foo_~size#1); 44#L18-1 foo_#res#1 := foo_~i~0#1; 42#L18 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 43#L25 [2024-11-10 23:00:21,703 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:21,703 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 2 times [2024-11-10 23:00:21,703 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:21,703 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877975466] [2024-11-10 23:00:21,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:21,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:21,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:21,721 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:21,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:21,730 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:21,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:21,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1773896091, now seen corresponding path program 1 times [2024-11-10 23:00:21,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:21,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286287383] [2024-11-10 23:00:21,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:21,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:21,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:21,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:21,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:21,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286287383] [2024-11-10 23:00:21,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [286287383] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:21,814 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:21,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-10 23:00:21,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287283327] [2024-11-10 23:00:21,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:21,815 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:21,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:21,816 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-10 23:00:21,816 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-10 23:00:21,817 INFO L87 Difference]: Start difference. First operand 12 states and 14 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:21,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:21,842 INFO L93 Difference]: Finished difference Result 14 states and 16 transitions. [2024-11-10 23:00:21,842 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 16 transitions. [2024-11-10 23:00:21,843 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2024-11-10 23:00:21,843 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 16 transitions. [2024-11-10 23:00:21,843 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2024-11-10 23:00:21,843 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2024-11-10 23:00:21,844 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 16 transitions. [2024-11-10 23:00:21,844 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:21,844 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-10 23:00:21,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 16 transitions. [2024-11-10 23:00:21,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2024-11-10 23:00:21,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:21,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 16 transitions. [2024-11-10 23:00:21,850 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-10 23:00:21,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-10 23:00:21,851 INFO L425 stractBuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-10 23:00:21,852 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-10 23:00:21,852 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 16 transitions. [2024-11-10 23:00:21,852 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2024-11-10 23:00:21,854 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:21,854 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:21,854 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:21,855 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:21,855 INFO L745 eck$LassoCheckResult]: Stem: 80#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 81#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 75#L25 [2024-11-10 23:00:21,855 INFO L747 eck$LassoCheckResult]: Loop: 75#L25 assume true; 82#L25-1 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 83#L15 assume true; 84#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 86#L15 assume true; 87#L15-1 assume !(foo_~i~0#1 < foo_~size#1); 79#L18-1 foo_#res#1 := foo_~i~0#1; 74#L18 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 75#L25 [2024-11-10 23:00:21,856 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:21,857 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 3 times [2024-11-10 23:00:21,857 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:21,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429926099] [2024-11-10 23:00:21,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:21,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:21,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:21,869 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:21,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:21,877 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:21,880 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:21,883 INFO L85 PathProgramCache]: Analyzing trace with hash -385872614, now seen corresponding path program 1 times [2024-11-10 23:00:21,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:21,884 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451380536] [2024-11-10 23:00:21,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:21,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:21,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:22,013 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:22,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451380536] [2024-11-10 23:00:22,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [451380536] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:22,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1532627413] [2024-11-10 23:00:22,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:22,015 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:22,016 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:22,018 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-10 23:00:22,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:22,077 INFO L255 TraceCheckSpWp]: Trace formula consists of 48 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 23:00:22,080 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:22,217 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,218 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:22,258 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,258 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1532627413] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:22,258 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:22,258 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2024-11-10 23:00:22,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2016634213] [2024-11-10 23:00:22,259 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:22,259 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:22,259 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:22,259 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-10 23:00:22,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2024-11-10 23:00:22,260 INFO L87 Difference]: Start difference. First operand 14 states and 16 transitions. cyclomatic complexity: 4 Second operand has 8 states, 8 states have (on average 2.25) internal successors, (18), 8 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:22,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:22,294 INFO L93 Difference]: Finished difference Result 20 states and 22 transitions. [2024-11-10 23:00:22,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 22 transitions. [2024-11-10 23:00:22,295 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-10 23:00:22,297 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 22 transitions. [2024-11-10 23:00:22,297 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2024-11-10 23:00:22,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2024-11-10 23:00:22,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 22 transitions. [2024-11-10 23:00:22,297 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:22,299 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 22 transitions. [2024-11-10 23:00:22,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 22 transitions. [2024-11-10 23:00:22,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2024-11-10 23:00:22,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.1) internal successors, (22), 19 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:22,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 22 transitions. [2024-11-10 23:00:22,302 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 22 transitions. [2024-11-10 23:00:22,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-10 23:00:22,304 INFO L425 stractBuchiCegarLoop]: Abstraction has 20 states and 22 transitions. [2024-11-10 23:00:22,304 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-10 23:00:22,305 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 22 transitions. [2024-11-10 23:00:22,305 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-10 23:00:22,307 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:22,307 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:22,307 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:22,308 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1, 1] [2024-11-10 23:00:22,308 INFO L745 eck$LassoCheckResult]: Stem: 163#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 164#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 162#L25 [2024-11-10 23:00:22,308 INFO L747 eck$LassoCheckResult]: Loop: 162#L25 assume true; 169#L25-1 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 170#L15 assume true; 174#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 171#L15 assume true; 172#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 180#L15 assume true; 179#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 178#L15 assume true; 177#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 176#L15 assume true; 175#L15-1 assume !(foo_~i~0#1 < foo_~size#1); 168#L18-1 foo_#res#1 := foo_~i~0#1; 161#L18 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 162#L25 [2024-11-10 23:00:22,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,308 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 4 times [2024-11-10 23:00:22,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669654893] [2024-11-10 23:00:22,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,319 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:22,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,327 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:22,327 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,328 INFO L85 PathProgramCache]: Analyzing trace with hash -788784873, now seen corresponding path program 2 times [2024-11-10 23:00:22,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414484540] [2024-11-10 23:00:22,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:22,611 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:22,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414484540] [2024-11-10 23:00:22,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1414484540] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:22,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [776022136] [2024-11-10 23:00:22,614 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-10 23:00:22,614 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:22,614 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:22,630 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:22,632 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-10 23:00:22,703 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-10 23:00:22,704 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:22,705 INFO L255 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-10 23:00:22,706 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:22,841 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,842 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:22,968 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [776022136] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:22,969 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:22,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 17 [2024-11-10 23:00:22,969 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029005633] [2024-11-10 23:00:22,970 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:22,970 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:22,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:22,971 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-10 23:00:22,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=146, Unknown=0, NotChecked=0, Total=272 [2024-11-10 23:00:22,973 INFO L87 Difference]: Start difference. First operand 20 states and 22 transitions. cyclomatic complexity: 4 Second operand has 17 states, 17 states have (on average 2.1176470588235294) internal successors, (36), 17 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:23,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:23,018 INFO L93 Difference]: Finished difference Result 32 states and 34 transitions. [2024-11-10 23:00:23,019 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 34 transitions. [2024-11-10 23:00:23,020 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 29 [2024-11-10 23:00:23,020 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 34 transitions. [2024-11-10 23:00:23,020 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-10 23:00:23,021 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-10 23:00:23,021 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 34 transitions. [2024-11-10 23:00:23,021 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:23,021 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 34 transitions. [2024-11-10 23:00:23,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 34 transitions. [2024-11-10 23:00:23,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2024-11-10 23:00:23,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.0625) internal successors, (34), 31 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:23,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 34 transitions. [2024-11-10 23:00:23,024 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 34 transitions. [2024-11-10 23:00:23,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-10 23:00:23,026 INFO L425 stractBuchiCegarLoop]: Abstraction has 32 states and 34 transitions. [2024-11-10 23:00:23,028 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-10 23:00:23,028 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 34 transitions. [2024-11-10 23:00:23,029 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 29 [2024-11-10 23:00:23,029 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:23,029 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:23,029 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:23,029 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1, 1] [2024-11-10 23:00:23,029 INFO L745 eck$LassoCheckResult]: Stem: 313#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 314#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 312#L25 [2024-11-10 23:00:23,030 INFO L747 eck$LassoCheckResult]: Loop: 312#L25 assume true; 319#L25-1 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 320#L15 assume true; 324#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 321#L15 assume true; 322#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 342#L15 assume true; 341#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 340#L15 assume true; 339#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 338#L15 assume true; 337#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 336#L15 assume true; 335#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 334#L15 assume true; 333#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 332#L15 assume true; 331#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 330#L15 assume true; 329#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 328#L15 assume true; 327#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 326#L15 assume true; 325#L15-1 assume !(foo_~i~0#1 < foo_~size#1); 318#L18-1 foo_#res#1 := foo_~i~0#1; 311#L18 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 312#L25 [2024-11-10 23:00:23,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,031 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 5 times [2024-11-10 23:00:23,031 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,032 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692838574] [2024-11-10 23:00:23,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,039 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:23,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,048 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:23,049 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,049 INFO L85 PathProgramCache]: Analyzing trace with hash 516778961, now seen corresponding path program 3 times [2024-11-10 23:00:23,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,050 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391641148] [2024-11-10 23:00:23,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:23,395 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:23,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:23,396 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391641148] [2024-11-10 23:00:23,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1391641148] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:23,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [387786737] [2024-11-10 23:00:23,397 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-10 23:00:23,397 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:23,398 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:23,400 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:23,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-10 23:00:23,493 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-10 23:00:23,493 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:23,495 INFO L255 TraceCheckSpWp]: Trace formula consists of 156 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-10 23:00:23,497 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:23,779 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:23,781 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:24,088 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:24,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [387786737] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:24,089 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:24,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 35 [2024-11-10 23:00:24,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [945623464] [2024-11-10 23:00:24,090 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:24,090 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:24,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:24,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-10 23:00:24,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=540, Invalid=650, Unknown=0, NotChecked=0, Total=1190 [2024-11-10 23:00:24,094 INFO L87 Difference]: Start difference. First operand 32 states and 34 transitions. cyclomatic complexity: 4 Second operand has 35 states, 35 states have (on average 2.057142857142857) internal successors, (72), 35 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:24,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:24,162 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2024-11-10 23:00:24,162 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 58 transitions. [2024-11-10 23:00:24,164 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 53 [2024-11-10 23:00:24,164 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 56 states and 58 transitions. [2024-11-10 23:00:24,165 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2024-11-10 23:00:24,165 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2024-11-10 23:00:24,165 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 58 transitions. [2024-11-10 23:00:24,165 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:24,166 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 58 transitions. [2024-11-10 23:00:24,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 58 transitions. [2024-11-10 23:00:24,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2024-11-10 23:00:24,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.0357142857142858) internal successors, (58), 55 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:24,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 58 transitions. [2024-11-10 23:00:24,170 INFO L240 hiAutomatonCegarLoop]: Abstraction has 56 states and 58 transitions. [2024-11-10 23:00:24,172 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-10 23:00:24,173 INFO L425 stractBuchiCegarLoop]: Abstraction has 56 states and 58 transitions. [2024-11-10 23:00:24,173 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-10 23:00:24,173 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 58 transitions. [2024-11-10 23:00:24,174 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 53 [2024-11-10 23:00:24,174 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:24,174 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:24,175 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:24,175 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1, 1] [2024-11-10 23:00:24,175 INFO L745 eck$LassoCheckResult]: Stem: 589#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 590#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 588#L25 [2024-11-10 23:00:24,175 INFO L747 eck$LassoCheckResult]: Loop: 588#L25 assume true; 595#L25-1 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 596#L15 assume true; 600#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 597#L15 assume true; 598#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 642#L15 assume true; 641#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 640#L15 assume true; 639#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 638#L15 assume true; 637#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 636#L15 assume true; 635#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 634#L15 assume true; 633#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 632#L15 assume true; 631#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 630#L15 assume true; 629#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 628#L15 assume true; 627#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 626#L15 assume true; 625#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 624#L15 assume true; 623#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 622#L15 assume true; 621#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 620#L15 assume true; 619#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 618#L15 assume true; 617#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 616#L15 assume true; 615#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 614#L15 assume true; 613#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 612#L15 assume true; 611#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 610#L15 assume true; 609#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 608#L15 assume true; 607#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 606#L15 assume true; 605#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 604#L15 assume true; 603#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 602#L15 assume true; 601#L15-1 assume !(foo_~i~0#1 < foo_~size#1); 594#L18-1 foo_#res#1 := foo_~i~0#1; 587#L18 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 588#L25 [2024-11-10 23:00:24,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:24,176 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 6 times [2024-11-10 23:00:24,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:24,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873195806] [2024-11-10 23:00:24,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:24,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:24,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,184 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:24,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,187 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:24,188 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:24,188 INFO L85 PathProgramCache]: Analyzing trace with hash 754564165, now seen corresponding path program 4 times [2024-11-10 23:00:24,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:24,189 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913451158] [2024-11-10 23:00:24,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:24,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:24,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:24,968 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:24,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:24,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913451158] [2024-11-10 23:00:24,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913451158] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:24,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2123223226] [2024-11-10 23:00:24,970 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-10 23:00:24,970 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:24,970 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:24,981 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:24,983 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-10 23:00:25,088 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-10 23:00:25,088 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:25,090 INFO L255 TraceCheckSpWp]: Trace formula consists of 300 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-10 23:00:25,093 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:25,663 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:25,664 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:26,252 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:26,253 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2123223226] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:26,253 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:26,253 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 57 [2024-11-10 23:00:26,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585218418] [2024-11-10 23:00:26,254 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:26,254 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:26,254 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:26,255 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2024-11-10 23:00:26,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1343, Invalid=1849, Unknown=0, NotChecked=0, Total=3192 [2024-11-10 23:00:26,257 INFO L87 Difference]: Start difference. First operand 56 states and 58 transitions. cyclomatic complexity: 4 Second operand has 57 states, 57 states have (on average 2.0526315789473686) internal successors, (117), 57 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:26,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:26,341 INFO L93 Difference]: Finished difference Result 76 states and 78 transitions. [2024-11-10 23:00:26,341 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 76 states and 78 transitions. [2024-11-10 23:00:26,342 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 73 [2024-11-10 23:00:26,343 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 76 states to 76 states and 78 transitions. [2024-11-10 23:00:26,343 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 76 [2024-11-10 23:00:26,343 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 76 [2024-11-10 23:00:26,343 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 78 transitions. [2024-11-10 23:00:26,344 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:26,344 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 78 transitions. [2024-11-10 23:00:26,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 78 transitions. [2024-11-10 23:00:26,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2024-11-10 23:00:26,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.0263157894736843) internal successors, (78), 75 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:26,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 78 transitions. [2024-11-10 23:00:26,355 INFO L240 hiAutomatonCegarLoop]: Abstraction has 76 states and 78 transitions. [2024-11-10 23:00:26,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-11-10 23:00:26,356 INFO L425 stractBuchiCegarLoop]: Abstraction has 76 states and 78 transitions. [2024-11-10 23:00:26,356 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-10 23:00:26,356 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 76 states and 78 transitions. [2024-11-10 23:00:26,357 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 73 [2024-11-10 23:00:26,360 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:26,360 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:26,361 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:26,361 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [33, 32, 1, 1, 1, 1, 1] [2024-11-10 23:00:26,361 INFO L745 eck$LassoCheckResult]: Stem: 1076#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1077#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~buffer~0#1, main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400);havoc main_~buffer~0#1;call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);havoc main_~c~0#1.base, main_~c~0#1.offset;main_~i~1#1 := 0; 1074#L25 [2024-11-10 23:00:26,361 INFO L747 eck$LassoCheckResult]: Loop: 1074#L25 assume true; 1081#L25-1 assume !!(main_~i~1#1 % 4294967296 < 32);main_~c~0#1.base, main_~c~0#1.offset := main_~#mask~0#1.base, main_~#mask~0#1.offset;assume { :begin_inline_foo } true;foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset := 32, main_~c~0#1.base, main_~c~0#1.offset;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;foo_~size#1 := foo_#in~size#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1084#L15 assume true; 1086#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1082#L15 assume true; 1083#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1148#L15 assume true; 1147#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1146#L15 assume true; 1145#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1144#L15 assume true; 1143#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1142#L15 assume true; 1141#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1140#L15 assume true; 1139#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1138#L15 assume true; 1137#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1136#L15 assume true; 1135#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1134#L15 assume true; 1133#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1132#L15 assume true; 1131#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1130#L15 assume true; 1129#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1128#L15 assume true; 1127#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1126#L15 assume true; 1125#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1124#L15 assume true; 1123#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1122#L15 assume true; 1121#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1120#L15 assume true; 1119#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1118#L15 assume true; 1117#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1116#L15 assume true; 1115#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1114#L15 assume true; 1113#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1112#L15 assume true; 1111#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1110#L15 assume true; 1109#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1108#L15 assume true; 1107#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1106#L15 assume true; 1105#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1104#L15 assume true; 1103#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1102#L15 assume true; 1101#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1100#L15 assume true; 1099#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1098#L15 assume true; 1097#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1096#L15 assume true; 1095#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1094#L15 assume true; 1093#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1092#L15 assume true; 1091#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1090#L15 assume true; 1089#L15-1 assume !!(foo_~i~0#1 < foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1088#L15 assume true; 1087#L15-1 assume !(foo_~i~0#1 < foo_~size#1); 1075#L18-1 foo_#res#1 := foo_~i~0#1; 1073#L18 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~size#1, foo_~b#1.base, foo_~b#1.offset, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~size#1, foo_#in~b#1.base, foo_#in~b#1.offset;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1074#L25 [2024-11-10 23:00:26,362 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,363 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 7 times [2024-11-10 23:00:26,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:26,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826751051] [2024-11-10 23:00:26,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:26,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:26,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,370 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:26,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,374 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:26,377 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,377 INFO L85 PathProgramCache]: Analyzing trace with hash -599937669, now seen corresponding path program 5 times [2024-11-10 23:00:26,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:26,377 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754146158] [2024-11-10 23:00:26,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:26,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:26,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,460 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:26,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,544 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:26,545 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,545 INFO L85 PathProgramCache]: Analyzing trace with hash -248145382, now seen corresponding path program 1 times [2024-11-10 23:00:26,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:26,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213639827] [2024-11-10 23:00:26,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:26,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:26,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,615 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:26,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,686 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace