./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 023d838f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-023d838-m [2024-11-10 23:00:19,428 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-10 23:00:19,509 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-10 23:00:19,516 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-10 23:00:19,518 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-10 23:00:19,519 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2024-11-10 23:00:19,551 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-10 23:00:19,552 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-10 23:00:19,553 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-10 23:00:19,554 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-10 23:00:19,554 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-10 23:00:19,555 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-10 23:00:19,556 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-10 23:00:19,557 INFO L153 SettingsManager]: * Use SBE=true [2024-11-10 23:00:19,558 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-10 23:00:19,558 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-10 23:00:19,558 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-10 23:00:19,558 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-10 23:00:19,559 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-10 23:00:19,561 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-10 23:00:19,562 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-10 23:00:19,562 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-10 23:00:19,563 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-10 23:00:19,563 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-10 23:00:19,563 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-10 23:00:19,564 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-10 23:00:19,564 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-10 23:00:19,564 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-10 23:00:19,564 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-10 23:00:19,565 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-10 23:00:19,565 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-10 23:00:19,565 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-10 23:00:19,565 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-10 23:00:19,566 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-10 23:00:19,566 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-10 23:00:19,566 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-10 23:00:19,567 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-10 23:00:19,567 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-10 23:00:19,567 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-10 23:00:19,568 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-10 23:00:19,568 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 [2024-11-10 23:00:19,796 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-10 23:00:19,822 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-10 23:00:19,825 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-10 23:00:19,826 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-10 23:00:19,827 INFO L274 PluginConnector]: CDTParser initialized [2024-11-10 23:00:19,828 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-10 23:00:21,334 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-10 23:00:21,516 INFO L384 CDTParser]: Found 1 translation units. [2024-11-10 23:00:21,517 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-10 23:00:21,524 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7195ec1d0/2e12c5a8b2d64afe9e33fff694f2aa97/FLAG5ff17fa8a [2024-11-10 23:00:21,536 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7195ec1d0/2e12c5a8b2d64afe9e33fff694f2aa97 [2024-11-10 23:00:21,539 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-10 23:00:21,540 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-10 23:00:21,546 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-10 23:00:21,547 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-10 23:00:21,552 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-10 23:00:21,553 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,554 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a1fc11a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21, skipping insertion in model container [2024-11-10 23:00:21,554 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,571 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-10 23:00:21,777 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:00:21,790 INFO L200 MainTranslator]: Completed pre-run [2024-11-10 23:00:21,806 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:00:21,824 INFO L204 MainTranslator]: Completed translation [2024-11-10 23:00:21,825 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21 WrapperNode [2024-11-10 23:00:21,825 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-10 23:00:21,827 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-10 23:00:21,827 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-10 23:00:21,827 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-10 23:00:21,833 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,840 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,859 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 62 [2024-11-10 23:00:21,859 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-10 23:00:21,860 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-10 23:00:21,860 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-10 23:00:21,860 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-10 23:00:21,869 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,869 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,871 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,882 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [2, 1]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [1, 0]. [2024-11-10 23:00:21,883 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,883 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,888 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,888 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,892 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,893 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,896 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-10 23:00:21,897 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-11-10 23:00:21,897 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-11-10 23:00:21,897 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-11-10 23:00:21,898 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (1/1) ... [2024-11-10 23:00:21,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:21,915 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:21,934 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:21,937 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-10 23:00:21,970 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-10 23:00:21,970 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-10 23:00:21,971 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-10 23:00:21,971 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-10 23:00:21,971 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-10 23:00:21,971 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-10 23:00:21,971 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-10 23:00:21,971 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-10 23:00:22,028 INFO L256 CfgBuilder]: Building ICFG [2024-11-10 23:00:22,030 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-10 23:00:22,198 INFO L1247 $ProcedureCfgBuilder]: dead code at ProgramPoint L24: call ULTIMATE.dealloc(main_~#b~0#1.base, main_~#b~0#1.offset);havoc main_~#b~0#1.base, main_~#b~0#1.offset;call ULTIMATE.dealloc(main_~#mask~0#1.base, main_~#mask~0#1.offset);havoc main_~#mask~0#1.base, main_~#mask~0#1.offset; [2024-11-10 23:00:22,209 INFO L? ?]: Removed 11 outVars from TransFormulas that were not future-live. [2024-11-10 23:00:22,209 INFO L307 CfgBuilder]: Performing block encoding [2024-11-10 23:00:22,220 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-10 23:00:22,220 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-10 23:00:22,222 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:22 BoogieIcfgContainer [2024-11-10 23:00:22,222 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-11-10 23:00:22,223 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-10 23:00:22,223 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-10 23:00:22,228 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-10 23:00:22,229 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:22,229 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.11 11:00:21" (1/3) ... [2024-11-10 23:00:22,231 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a8715d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:00:22, skipping insertion in model container [2024-11-10 23:00:22,231 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:22,231 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:21" (2/3) ... [2024-11-10 23:00:22,232 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a8715d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:00:22, skipping insertion in model container [2024-11-10 23:00:22,232 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:22,232 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:22" (3/3) ... [2024-11-10 23:00:22,234 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration.c [2024-11-10 23:00:22,295 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-10 23:00:22,295 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-10 23:00:22,295 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-10 23:00:22,296 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-10 23:00:22,297 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-10 23:00:22,297 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-10 23:00:22,298 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-10 23:00:22,298 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-10 23:00:22,302 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:22,319 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:22,319 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:22,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:22,324 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:22,324 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-10 23:00:22,324 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-10 23:00:22,325 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:22,326 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:22,326 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:22,326 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:22,327 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:22,327 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-10 23:00:22,331 INFO L745 eck$LassoCheckResult]: Stem: 3#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 7#L26true [2024-11-10 23:00:22,332 INFO L747 eck$LassoCheckResult]: Loop: 7#L26true assume true; 5#L26-1true assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9#L17true assume !true; 14#L20-1true foo_#res#1 := foo_~i~0#1; 16#L20true assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7#L26true [2024-11-10 23:00:22,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,341 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 1 times [2024-11-10 23:00:22,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754522230] [2024-11-10 23:00:22,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,494 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:22,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,523 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:22,526 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,526 INFO L85 PathProgramCache]: Analyzing trace with hash 57223351, now seen corresponding path program 1 times [2024-11-10 23:00:22,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [579888461] [2024-11-10 23:00:22,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:22,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,575 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:22,577 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [579888461] [2024-11-10 23:00:22,577 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [579888461] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:22,578 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:22,578 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-10 23:00:22,578 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [33133313] [2024-11-10 23:00:22,579 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:22,583 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:00:22,584 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:22,612 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-10 23:00:22,613 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-10 23:00:22,614 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:22,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:22,619 INFO L93 Difference]: Finished difference Result 17 states and 20 transitions. [2024-11-10 23:00:22,620 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 20 transitions. [2024-11-10 23:00:22,621 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:22,624 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 12 states and 14 transitions. [2024-11-10 23:00:22,625 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2024-11-10 23:00:22,625 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2024-11-10 23:00:22,625 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 14 transitions. [2024-11-10 23:00:22,626 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:22,626 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-10 23:00:22,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 14 transitions. [2024-11-10 23:00:22,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2024-11-10 23:00:22,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.1666666666666667) internal successors, (14), 11 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:22,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 14 transitions. [2024-11-10 23:00:22,649 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-10 23:00:22,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-10 23:00:22,653 INFO L425 stractBuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2024-11-10 23:00:22,653 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-10 23:00:22,653 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 14 transitions. [2024-11-10 23:00:22,653 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:22,654 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:22,654 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:22,654 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:00:22,654 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-10 23:00:22,654 INFO L745 eck$LassoCheckResult]: Stem: 46#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 47#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 49#L26 [2024-11-10 23:00:22,654 INFO L747 eck$LassoCheckResult]: Loop: 49#L26 assume true; 50#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 42#L17 assume true; 43#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 52#L20-1 foo_#res#1 := foo_~i~0#1; 53#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 49#L26 [2024-11-10 23:00:22,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,655 INFO L85 PathProgramCache]: Analyzing trace with hash 2016, now seen corresponding path program 2 times [2024-11-10 23:00:22,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138413471] [2024-11-10 23:00:22,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,667 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:22,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,674 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:22,675 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,676 INFO L85 PathProgramCache]: Analyzing trace with hash 1773896091, now seen corresponding path program 1 times [2024-11-10 23:00:22,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,676 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [44879020] [2024-11-10 23:00:22,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,706 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:22,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:22,720 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:22,720 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:22,721 INFO L85 PathProgramCache]: Analyzing trace with hash -907549126, now seen corresponding path program 1 times [2024-11-10 23:00:22,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:22,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281752889] [2024-11-10 23:00:22,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:22,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:22,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:22,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:22,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:22,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [281752889] [2024-11-10 23:00:22,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [281752889] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:22,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:22,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 23:00:22,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2097171528] [2024-11-10 23:00:22,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:23,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:23,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 23:00:23,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 23:00:23,068 INFO L87 Difference]: Start difference. First operand 12 states and 14 transitions. cyclomatic complexity: 4 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:23,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:23,115 INFO L93 Difference]: Finished difference Result 23 states and 26 transitions. [2024-11-10 23:00:23,115 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 26 transitions. [2024-11-10 23:00:23,116 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2024-11-10 23:00:23,117 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 26 transitions. [2024-11-10 23:00:23,117 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-10 23:00:23,117 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-10 23:00:23,117 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 26 transitions. [2024-11-10 23:00:23,118 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:23,118 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 26 transitions. [2024-11-10 23:00:23,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 26 transitions. [2024-11-10 23:00:23,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 16. [2024-11-10 23:00:23,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.125) internal successors, (18), 15 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:23,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2024-11-10 23:00:23,121 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 18 transitions. [2024-11-10 23:00:23,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 23:00:23,122 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 18 transitions. [2024-11-10 23:00:23,124 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-10 23:00:23,124 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 18 transitions. [2024-11-10 23:00:23,125 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:23,125 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:23,125 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:23,125 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-10 23:00:23,125 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-10 23:00:23,126 INFO L745 eck$LassoCheckResult]: Stem: 93#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 94#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 95#L26 assume true; 96#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 88#L17 assume true; 89#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 100#L17 [2024-11-10 23:00:23,126 INFO L747 eck$LassoCheckResult]: Loop: 100#L17 assume true; 103#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 100#L17 [2024-11-10 23:00:23,128 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1862740702, now seen corresponding path program 1 times [2024-11-10 23:00:23,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141867694] [2024-11-10 23:00:23,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,153 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:23,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,169 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:23,170 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,170 INFO L85 PathProgramCache]: Analyzing trace with hash 1728, now seen corresponding path program 1 times [2024-11-10 23:00:23,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,171 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333564306] [2024-11-10 23:00:23,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,183 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:23,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,193 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:23,197 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,197 INFO L85 PathProgramCache]: Analyzing trace with hash -907547043, now seen corresponding path program 2 times [2024-11-10 23:00:23,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388133761] [2024-11-10 23:00:23,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:23,332 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:23,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:23,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388133761] [2024-11-10 23:00:23,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [388133761] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:23,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [95752024] [2024-11-10 23:00:23,335 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-10 23:00:23,335 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:23,336 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:23,338 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:23,340 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-10 23:00:23,402 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-10 23:00:23,402 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:23,405 INFO L255 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-10 23:00:23,407 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:23,479 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:23,480 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-10 23:00:23,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [95752024] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:23,481 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-10 23:00:23,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 7 [2024-11-10 23:00:23,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307371543] [2024-11-10 23:00:23,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:23,545 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:23,545 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-10 23:00:23,546 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-10 23:00:23,546 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. cyclomatic complexity: 4 Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:23,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:23,605 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2024-11-10 23:00:23,605 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 25 transitions. [2024-11-10 23:00:23,606 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:23,606 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 25 transitions. [2024-11-10 23:00:23,606 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-10 23:00:23,606 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-10 23:00:23,607 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 25 transitions. [2024-11-10 23:00:23,607 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:23,607 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 25 transitions. [2024-11-10 23:00:23,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 25 transitions. [2024-11-10 23:00:23,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 18. [2024-11-10 23:00:23,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 17 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:23,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 20 transitions. [2024-11-10 23:00:23,612 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 20 transitions. [2024-11-10 23:00:23,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-10 23:00:23,615 INFO L425 stractBuchiCegarLoop]: Abstraction has 18 states and 20 transitions. [2024-11-10 23:00:23,615 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-10 23:00:23,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 20 transitions. [2024-11-10 23:00:23,616 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-10 23:00:23,616 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:23,616 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:23,618 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:23,618 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-10 23:00:23,618 INFO L745 eck$LassoCheckResult]: Stem: 169#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 170#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 172#L26 assume true; 173#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 174#L17 assume true; 178#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 179#L17 assume true; 182#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 176#L20-1 [2024-11-10 23:00:23,618 INFO L747 eck$LassoCheckResult]: Loop: 176#L20-1 foo_#res#1 := foo_~i~0#1; 177#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 180#L26 assume true; 181#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 165#L17 assume true; 166#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 176#L20-1 [2024-11-10 23:00:23,619 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,620 INFO L85 PathProgramCache]: Analyzing trace with hash -907547045, now seen corresponding path program 1 times [2024-11-10 23:00:23,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,620 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091221531] [2024-11-10 23:00:23,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,637 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:23,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,654 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:23,658 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,658 INFO L85 PathProgramCache]: Analyzing trace with hash 1448079771, now seen corresponding path program 2 times [2024-11-10 23:00:23,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1486253969] [2024-11-10 23:00:23,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,670 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:23,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:23,683 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:23,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:23,686 INFO L85 PathProgramCache]: Analyzing trace with hash 2063479925, now seen corresponding path program 1 times [2024-11-10 23:00:23,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:23,686 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472066519] [2024-11-10 23:00:23,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:23,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:23,857 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:23,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:23,859 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472066519] [2024-11-10 23:00:23,859 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472066519] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:23,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1718203428] [2024-11-10 23:00:23,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:23,861 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:23,861 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:23,863 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:23,867 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-10 23:00:23,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:23,929 INFO L255 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-10 23:00:23,932 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:23,990 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:23,991 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:24,059 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:24,060 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1718203428] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:24,060 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:24,060 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2024-11-10 23:00:24,061 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1413556527] [2024-11-10 23:00:24,061 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:24,181 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:24,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:00:24,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:00:24,183 INFO L87 Difference]: Start difference. First operand 18 states and 20 transitions. cyclomatic complexity: 4 Second operand has 9 states, 8 states have (on average 4.375) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:24,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:24,276 INFO L93 Difference]: Finished difference Result 27 states and 29 transitions. [2024-11-10 23:00:24,276 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 29 transitions. [2024-11-10 23:00:24,277 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 13 [2024-11-10 23:00:24,279 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 29 transitions. [2024-11-10 23:00:24,280 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2024-11-10 23:00:24,280 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2024-11-10 23:00:24,280 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 29 transitions. [2024-11-10 23:00:24,280 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:24,280 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 29 transitions. [2024-11-10 23:00:24,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 29 transitions. [2024-11-10 23:00:24,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 22. [2024-11-10 23:00:24,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.0909090909090908) internal successors, (24), 21 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:24,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 24 transitions. [2024-11-10 23:00:24,285 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 24 transitions. [2024-11-10 23:00:24,286 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-10 23:00:24,287 INFO L425 stractBuchiCegarLoop]: Abstraction has 22 states and 24 transitions. [2024-11-10 23:00:24,287 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-10 23:00:24,287 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 24 transitions. [2024-11-10 23:00:24,288 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 13 [2024-11-10 23:00:24,288 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:24,288 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:24,289 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:24,289 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 2, 1, 1, 1, 1, 1] [2024-11-10 23:00:24,289 INFO L745 eck$LassoCheckResult]: Stem: 310#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 311#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 315#L26 assume true; 316#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 317#L17 assume true; 329#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 328#L17 assume true; 324#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 319#L20-1 [2024-11-10 23:00:24,289 INFO L747 eck$LassoCheckResult]: Loop: 319#L20-1 foo_#res#1 := foo_~i~0#1; 320#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 322#L26 assume true; 323#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 308#L17 assume true; 309#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 321#L17 assume true; 327#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 325#L17 assume true; 326#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 319#L20-1 [2024-11-10 23:00:24,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:24,290 INFO L85 PathProgramCache]: Analyzing trace with hash -907547045, now seen corresponding path program 2 times [2024-11-10 23:00:24,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:24,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873737604] [2024-11-10 23:00:24,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:24,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:24,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,306 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:24,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,317 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:24,317 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:24,317 INFO L85 PathProgramCache]: Analyzing trace with hash -476111527, now seen corresponding path program 1 times [2024-11-10 23:00:24,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:24,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576619497] [2024-11-10 23:00:24,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:24,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:24,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,329 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:24,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,338 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:24,339 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:24,339 INFO L85 PathProgramCache]: Analyzing trace with hash -1352899789, now seen corresponding path program 2 times [2024-11-10 23:00:24,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:24,339 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1032291650] [2024-11-10 23:00:24,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:24,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:24,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,367 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:24,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:24,387 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:24,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2024-11-10 23:00:24,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2024-11-10 23:00:24,923 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 23:00:24,923 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 23:00:24,923 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 23:00:24,924 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 23:00:24,924 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 23:00:24,924 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:24,924 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 23:00:24,924 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 23:00:24,924 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration5_Lasso [2024-11-10 23:00:24,924 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 23:00:24,924 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 23:00:24,940 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:24,947 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:24,949 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,210 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,214 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,216 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,218 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,223 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,225 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,230 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,233 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,235 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,237 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,240 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:25,533 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 23:00:25,537 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 23:00:25,538 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,538 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,540 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,541 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-10 23:00:25,544 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,557 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,557 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:25,558 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,558 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,558 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,560 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:25,560 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:25,562 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,577 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-10 23:00:25,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,579 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,580 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,582 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-10 23:00:25,583 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,595 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,596 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:25,596 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,596 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,596 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,601 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:25,602 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:25,606 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,621 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-11-10 23:00:25,622 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,622 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,626 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,627 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-10 23:00:25,628 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,642 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,642 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,642 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,642 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,648 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,649 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,656 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,671 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-11-10 23:00:25,672 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,672 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,674 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,676 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-10 23:00:25,676 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,688 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,689 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:25,689 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,689 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,689 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,690 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:25,690 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:25,692 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,707 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-11-10 23:00:25,707 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,707 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,709 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,710 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-10 23:00:25,713 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,726 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,726 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,726 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,726 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,732 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,733 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,741 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,757 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:25,757 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,757 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,759 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,759 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-10 23:00:25,763 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,775 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,776 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,776 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,776 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,778 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,778 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,785 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,805 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:25,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,806 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,808 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-10 23:00:25,809 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,822 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,822 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,822 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,822 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,827 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,827 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,835 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,850 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2024-11-10 23:00:25,850 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,850 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,852 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,854 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-10 23:00:25,855 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,867 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,867 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,867 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,867 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,870 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,870 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,874 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,888 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-10 23:00:25,889 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,889 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,891 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,892 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-10 23:00:25,894 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,906 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,906 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,909 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,909 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,915 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,930 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-11-10 23:00:25,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,930 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,932 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,933 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-10 23:00:25,934 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,946 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,947 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,947 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,947 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,949 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,949 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:25,954 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:25,969 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-10 23:00:25,970 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:25,970 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:25,971 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:25,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-10 23:00:25,974 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:25,987 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:25,987 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:25,987 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:25,987 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:25,991 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:25,994 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:26,000 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:26,014 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-10 23:00:26,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,015 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,017 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,020 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-11-10 23:00:26,020 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:26,033 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:26,033 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:26,033 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:26,033 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:26,033 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:26,034 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:26,034 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:26,038 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:26,053 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:26,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,053 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,055 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,056 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-11-10 23:00:26,057 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:26,070 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:26,070 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:26,070 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:26,070 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:26,070 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:26,071 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:26,071 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:26,075 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:26,090 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-11-10 23:00:26,090 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,090 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,092 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,093 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-11-10 23:00:26,094 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:26,106 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:26,106 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:26,107 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:26,107 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:26,107 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:26,109 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:26,109 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:26,110 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:26,126 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-11-10 23:00:26,127 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,128 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,129 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,130 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-11-10 23:00:26,132 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:26,145 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:26,145 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:26,145 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:26,146 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:26,146 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:26,147 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:26,147 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:26,148 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:26,166 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:26,166 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,166 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,168 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,170 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-11-10 23:00:26,170 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:26,183 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:26,183 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:26,183 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:26,183 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:26,183 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:26,184 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:26,184 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:26,186 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:26,200 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2024-11-10 23:00:26,201 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,201 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,203 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,204 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-11-10 23:00:26,208 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:26,220 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:26,220 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:26,220 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:26,220 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:26,222 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:26,222 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:26,227 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 23:00:26,244 INFO L443 ModelExtractionUtils]: Simplification made 5 calls to the SMT solver. [2024-11-10 23:00:26,244 INFO L444 ModelExtractionUtils]: 2 out of 7 variables were initially zero. Simplification set additionally 2 variables to zero. [2024-11-10 23:00:26,245 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:26,246 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,257 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-10 23:00:26,259 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 23:00:26,272 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-10 23:00:26,272 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 23:00:26,273 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 1 Supporting invariants [] [2024-11-10 23:00:26,283 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:26,306 INFO L156 tatePredicateManager]: 6 out of 6 supporting invariants were superfluous and have been removed [2024-11-10 23:00:26,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:26,353 INFO L255 TraceCheckSpWp]: Trace formula consists of 59 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 23:00:26,353 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:26,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:26,382 INFO L255 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-10 23:00:26,383 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:26,483 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:26,487 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2024-11-10 23:00:26,489 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 22 states and 24 transitions. cyclomatic complexity: 4 Second operand has 7 states, 7 states have (on average 2.4285714285714284) internal successors, (17), 7 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:26,577 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 22 states and 24 transitions. cyclomatic complexity: 4. Second operand has 7 states, 7 states have (on average 2.4285714285714284) internal successors, (17), 7 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 40 states and 46 transitions. Complement of second has 13 states. [2024-11-10 23:00:26,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 1 stem states 5 non-accepting loop states 1 accepting loop states [2024-11-10 23:00:26,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.4285714285714284) internal successors, (17), 7 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:26,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 23 transitions. [2024-11-10 23:00:26,581 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 8 letters. Loop has 10 letters. [2024-11-10 23:00:26,582 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:26,582 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 18 letters. Loop has 10 letters. [2024-11-10 23:00:26,582 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:26,582 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 8 letters. Loop has 20 letters. [2024-11-10 23:00:26,583 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:26,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 46 transitions. [2024-11-10 23:00:26,586 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:26,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 46 transitions. [2024-11-10 23:00:26,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2024-11-10 23:00:26,588 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2024-11-10 23:00:26,588 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 46 transitions. [2024-11-10 23:00:26,588 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:26,589 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 46 transitions. [2024-11-10 23:00:26,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 46 transitions. [2024-11-10 23:00:26,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 38. [2024-11-10 23:00:26,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.1578947368421053) internal successors, (44), 37 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:26,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 44 transitions. [2024-11-10 23:00:26,592 INFO L240 hiAutomatonCegarLoop]: Abstraction has 38 states and 44 transitions. [2024-11-10 23:00:26,593 INFO L425 stractBuchiCegarLoop]: Abstraction has 38 states and 44 transitions. [2024-11-10 23:00:26,593 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-10 23:00:26,593 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 44 transitions. [2024-11-10 23:00:26,593 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:26,596 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:26,596 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:26,596 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:26,597 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 3, 1, 1, 1, 1, 1] [2024-11-10 23:00:26,597 INFO L745 eck$LassoCheckResult]: Stem: 490#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 491#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 492#L26 assume true; 493#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 494#L17 assume true; 518#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 516#L17 assume true; 512#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 513#L20-1 foo_#res#1 := foo_~i~0#1; 498#L20 [2024-11-10 23:00:26,597 INFO L747 eck$LassoCheckResult]: Loop: 498#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 504#L26 assume true; 505#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 483#L17 assume true; 484#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 502#L17 assume true; 520#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 519#L17 assume true; 517#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 515#L17 assume true; 514#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 497#L20-1 foo_#res#1 := foo_~i~0#1; 498#L20 [2024-11-10 23:00:26,597 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,597 INFO L85 PathProgramCache]: Analyzing trace with hash 1930812696, now seen corresponding path program 1 times [2024-11-10 23:00:26,597 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:26,597 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821667207] [2024-11-10 23:00:26,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:26,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:26,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:26,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,619 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:26,620 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,621 INFO L85 PathProgramCache]: Analyzing trace with hash -364560694, now seen corresponding path program 2 times [2024-11-10 23:00:26,622 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:26,622 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325942018] [2024-11-10 23:00:26,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:26,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:26,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,636 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:26,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:26,647 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:26,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:26,647 INFO L85 PathProgramCache]: Analyzing trace with hash -264425119, now seen corresponding path program 3 times [2024-11-10 23:00:26,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:26,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [495289786] [2024-11-10 23:00:26,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:26,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:26,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:26,779 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:26,814 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 13 proven. 18 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:26,815 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:26,815 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [495289786] [2024-11-10 23:00:26,815 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [495289786] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:26,815 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [367856298] [2024-11-10 23:00:26,815 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-10 23:00:26,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:26,816 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:26,818 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:26,819 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-11-10 23:00:26,883 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-10 23:00:26,883 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:26,884 INFO L255 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-10 23:00:26,885 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:26,960 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 14 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:26,961 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:27,021 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 14 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:27,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [367856298] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:27,022 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:27,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2024-11-10 23:00:27,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734791275] [2024-11-10 23:00:27,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:27,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 32 [2024-11-10 23:00:27,279 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:27,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-10 23:00:27,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2024-11-10 23:00:27,280 INFO L87 Difference]: Start difference. First operand 38 states and 44 transitions. cyclomatic complexity: 9 Second operand has 12 states, 12 states have (on average 3.1666666666666665) internal successors, (38), 12 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:27,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:27,366 INFO L93 Difference]: Finished difference Result 65 states and 72 transitions. [2024-11-10 23:00:27,366 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 72 transitions. [2024-11-10 23:00:27,367 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:27,368 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 59 states and 66 transitions. [2024-11-10 23:00:27,368 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2024-11-10 23:00:27,368 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2024-11-10 23:00:27,368 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 66 transitions. [2024-11-10 23:00:27,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:27,369 INFO L218 hiAutomatonCegarLoop]: Abstraction has 59 states and 66 transitions. [2024-11-10 23:00:27,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 66 transitions. [2024-11-10 23:00:27,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 50. [2024-11-10 23:00:27,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.12) internal successors, (56), 49 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:27,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 56 transitions. [2024-11-10 23:00:27,372 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 56 transitions. [2024-11-10 23:00:27,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-10 23:00:27,374 INFO L425 stractBuchiCegarLoop]: Abstraction has 50 states and 56 transitions. [2024-11-10 23:00:27,374 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-10 23:00:27,374 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 56 transitions. [2024-11-10 23:00:27,375 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:27,375 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:27,375 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:27,375 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:27,375 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:27,375 INFO L745 eck$LassoCheckResult]: Stem: 737#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 738#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 742#L26 assume true; 743#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 744#L17 assume true; 765#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 766#L17 assume true; 762#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 748#L20-1 foo_#res#1 := foo_~i~0#1; 749#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 757#L26 assume true; 759#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 739#L29-3 main_~i~1#1 := 0; 740#L29 [2024-11-10 23:00:27,375 INFO L747 eck$LassoCheckResult]: Loop: 740#L29 assume true; 747#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 741#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 740#L29 [2024-11-10 23:00:27,376 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:27,376 INFO L85 PathProgramCache]: Analyzing trace with hash 205111130, now seen corresponding path program 1 times [2024-11-10 23:00:27,376 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:27,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466873302] [2024-11-10 23:00:27,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:27,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:27,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:27,432 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:27,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:27,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466873302] [2024-11-10 23:00:27,432 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [466873302] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:27,433 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [131629185] [2024-11-10 23:00:27,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:27,433 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:27,433 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:27,435 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:27,436 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-11-10 23:00:27,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:27,490 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 23:00:27,491 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:27,509 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:27,509 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:27,540 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-11-10 23:00:27,541 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [131629185] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:27,541 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:27,541 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-10 23:00:27,541 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793472524] [2024-11-10 23:00:27,541 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:27,542 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:27,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:27,542 INFO L85 PathProgramCache]: Analyzing trace with hash 43657, now seen corresponding path program 1 times [2024-11-10 23:00:27,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:27,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276859148] [2024-11-10 23:00:27,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:27,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:27,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:27,546 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:27,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:27,548 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:27,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:27,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-10 23:00:27,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2024-11-10 23:00:27,592 INFO L87 Difference]: Start difference. First operand 50 states and 56 transitions. cyclomatic complexity: 9 Second operand has 7 states, 7 states have (on average 3.5714285714285716) internal successors, (25), 7 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:27,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:27,645 INFO L93 Difference]: Finished difference Result 93 states and 103 transitions. [2024-11-10 23:00:27,645 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 93 states and 103 transitions. [2024-11-10 23:00:27,646 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 17 [2024-11-10 23:00:27,646 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 93 states to 90 states and 100 transitions. [2024-11-10 23:00:27,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2024-11-10 23:00:27,647 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2024-11-10 23:00:27,647 INFO L73 IsDeterministic]: Start isDeterministic. Operand 90 states and 100 transitions. [2024-11-10 23:00:27,647 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:27,647 INFO L218 hiAutomatonCegarLoop]: Abstraction has 90 states and 100 transitions. [2024-11-10 23:00:27,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states and 100 transitions. [2024-11-10 23:00:27,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 73. [2024-11-10 23:00:27,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.1232876712328768) internal successors, (82), 72 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:27,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 82 transitions. [2024-11-10 23:00:27,651 INFO L240 hiAutomatonCegarLoop]: Abstraction has 73 states and 82 transitions. [2024-11-10 23:00:27,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-10 23:00:27,652 INFO L425 stractBuchiCegarLoop]: Abstraction has 73 states and 82 transitions. [2024-11-10 23:00:27,652 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-10 23:00:27,652 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 82 transitions. [2024-11-10 23:00:27,653 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 17 [2024-11-10 23:00:27,653 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:27,653 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:27,654 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 6, 3, 3, 2, 2, 2, 1, 1] [2024-11-10 23:00:27,654 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-10 23:00:27,654 INFO L745 eck$LassoCheckResult]: Stem: 967#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 968#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 969#L26 assume true; 1026#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1022#L17 assume true; 1018#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1015#L17 assume true; 1010#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 974#L20-1 foo_#res#1 := foo_~i~0#1; 975#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1031#L26 assume true; 1030#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1029#L17 assume true; 1025#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1021#L17 assume true; 1017#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1014#L17 assume true; 1009#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1005#L20-1 foo_#res#1 := foo_~i~0#1; 982#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 978#L26 assume true; 970#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 960#L17 assume true; 961#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 981#L17 assume true; 1027#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1023#L17 assume true; 1019#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1012#L17 [2024-11-10 23:00:27,654 INFO L747 eck$LassoCheckResult]: Loop: 1012#L17 assume true; 1011#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1012#L17 [2024-11-10 23:00:27,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:27,655 INFO L85 PathProgramCache]: Analyzing trace with hash -1782142451, now seen corresponding path program 4 times [2024-11-10 23:00:27,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:27,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [475513943] [2024-11-10 23:00:27,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:27,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:27,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:27,674 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:27,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:27,691 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:27,691 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:27,691 INFO L85 PathProgramCache]: Analyzing trace with hash 1728, now seen corresponding path program 2 times [2024-11-10 23:00:27,691 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:27,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603727920] [2024-11-10 23:00:27,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:27,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:27,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:27,695 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:27,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:27,698 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:27,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:27,698 INFO L85 PathProgramCache]: Analyzing trace with hash 1053056460, now seen corresponding path program 5 times [2024-11-10 23:00:27,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:27,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963257426] [2024-11-10 23:00:27,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:27,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:27,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:27,857 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 6 proven. 66 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-10 23:00:27,858 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:27,858 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963257426] [2024-11-10 23:00:27,858 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [963257426] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:27,858 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [402330813] [2024-11-10 23:00:27,858 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-10 23:00:27,858 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:27,859 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:27,860 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:27,862 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2024-11-10 23:00:27,943 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2024-11-10 23:00:27,943 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:27,945 INFO L255 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-10 23:00:27,946 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:28,057 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 12 proven. 60 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-10 23:00:28,058 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:28,144 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 12 proven. 60 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-10 23:00:28,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [402330813] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:28,144 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:28,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 14 [2024-11-10 23:00:28,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860279920] [2024-11-10 23:00:28,145 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:28,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:28,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-10 23:00:28,192 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2024-11-10 23:00:28,192 INFO L87 Difference]: Start difference. First operand 73 states and 82 transitions. cyclomatic complexity: 13 Second operand has 15 states, 14 states have (on average 3.2857142857142856) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:28,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:28,342 INFO L93 Difference]: Finished difference Result 86 states and 94 transitions. [2024-11-10 23:00:28,342 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 94 transitions. [2024-11-10 23:00:28,343 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:28,344 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 86 states and 94 transitions. [2024-11-10 23:00:28,344 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 49 [2024-11-10 23:00:28,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 49 [2024-11-10 23:00:28,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 94 transitions. [2024-11-10 23:00:28,344 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:28,344 INFO L218 hiAutomatonCegarLoop]: Abstraction has 86 states and 94 transitions. [2024-11-10 23:00:28,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 94 transitions. [2024-11-10 23:00:28,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 75. [2024-11-10 23:00:28,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.1066666666666667) internal successors, (83), 74 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:28,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 83 transitions. [2024-11-10 23:00:28,352 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 83 transitions. [2024-11-10 23:00:28,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-10 23:00:28,353 INFO L425 stractBuchiCegarLoop]: Abstraction has 75 states and 83 transitions. [2024-11-10 23:00:28,353 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-10 23:00:28,353 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 83 transitions. [2024-11-10 23:00:28,354 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:28,354 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:28,354 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:28,355 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [8, 5, 4, 4, 3, 3, 3, 1, 1] [2024-11-10 23:00:28,355 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 3, 1, 1, 1, 1, 1] [2024-11-10 23:00:28,355 INFO L745 eck$LassoCheckResult]: Stem: 1338#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1339#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1340#L26 assume true; 1396#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1393#L17 assume true; 1390#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1387#L17 assume true; 1383#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1345#L20-1 foo_#res#1 := foo_~i~0#1; 1346#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1351#L26 assume true; 1342#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1343#L17 assume true; 1405#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1404#L17 assume true; 1403#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1402#L17 assume true; 1401#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1347#L20-1 foo_#res#1 := foo_~i~0#1; 1349#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1400#L26 assume true; 1399#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1398#L17 assume true; 1397#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1395#L17 assume true; 1392#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1389#L17 assume true; 1385#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1382#L20-1 foo_#res#1 := foo_~i~0#1; 1379#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1378#L26 assume true; 1377#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1356#L17 [2024-11-10 23:00:28,355 INFO L747 eck$LassoCheckResult]: Loop: 1356#L17 assume true; 1374#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1372#L17 assume true; 1370#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1368#L17 assume true; 1366#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1363#L17 assume true; 1362#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1359#L20-1 foo_#res#1 := foo_~i~0#1; 1358#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1357#L26 assume true; 1355#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1356#L17 [2024-11-10 23:00:28,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:28,357 INFO L85 PathProgramCache]: Analyzing trace with hash -1627024600, now seen corresponding path program 6 times [2024-11-10 23:00:28,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:28,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245222547] [2024-11-10 23:00:28,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:28,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:28,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:28,528 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 18 proven. 48 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-10 23:00:28,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:28,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245222547] [2024-11-10 23:00:28,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245222547] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:28,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [393457956] [2024-11-10 23:00:28,529 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-10 23:00:28,529 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:28,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:28,531 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:28,532 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2024-11-10 23:00:28,632 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2024-11-10 23:00:28,633 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:28,634 INFO L255 TraceCheckSpWp]: Trace formula consists of 195 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-10 23:00:28,636 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:28,731 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 30 proven. 36 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-10 23:00:28,731 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:28,819 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 30 proven. 36 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-10 23:00:28,819 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [393457956] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:28,820 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:28,820 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2024-11-10 23:00:28,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463132702] [2024-11-10 23:00:28,820 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:28,821 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:28,821 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:28,821 INFO L85 PathProgramCache]: Analyzing trace with hash -391129704, now seen corresponding path program 3 times [2024-11-10 23:00:28,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:28,821 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698711288] [2024-11-10 23:00:28,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:28,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:28,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:28,831 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:28,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:28,839 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:29,126 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:29,127 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-10 23:00:29,127 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-11-10 23:00:29,127 INFO L87 Difference]: Start difference. First operand 75 states and 83 transitions. cyclomatic complexity: 11 Second operand has 15 states, 15 states have (on average 3.3333333333333335) internal successors, (50), 15 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:29,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:29,261 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2024-11-10 23:00:29,261 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 83 transitions. [2024-11-10 23:00:29,262 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:29,262 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 56 states and 58 transitions. [2024-11-10 23:00:29,262 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2024-11-10 23:00:29,262 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2024-11-10 23:00:29,262 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 58 transitions. [2024-11-10 23:00:29,263 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:29,263 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 58 transitions. [2024-11-10 23:00:29,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 58 transitions. [2024-11-10 23:00:29,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 50. [2024-11-10 23:00:29,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.04) internal successors, (52), 49 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:29,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 52 transitions. [2024-11-10 23:00:29,265 INFO L240 hiAutomatonCegarLoop]: Abstraction has 50 states and 52 transitions. [2024-11-10 23:00:29,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-10 23:00:29,266 INFO L425 stractBuchiCegarLoop]: Abstraction has 50 states and 52 transitions. [2024-11-10 23:00:29,266 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-10 23:00:29,266 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 52 transitions. [2024-11-10 23:00:29,267 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-10 23:00:29,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:29,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:29,267 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 6, 4, 4, 3, 3, 3, 1, 1] [2024-11-10 23:00:29,267 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 3, 1, 1, 1, 1, 1] [2024-11-10 23:00:29,268 INFO L745 eck$LassoCheckResult]: Stem: 1704#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1705#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1706#L26 assume true; 1747#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1746#L17 assume true; 1745#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1742#L17 assume true; 1740#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1709#L20-1 foo_#res#1 := foo_~i~0#1; 1710#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1711#L26 assume true; 1707#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1699#L17 assume true; 1700#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1712#L17 assume true; 1748#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1744#L17 assume true; 1743#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1741#L20-1 foo_#res#1 := foo_~i~0#1; 1739#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1738#L26 assume true; 1737#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1736#L17 assume true; 1735#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1734#L17 assume true; 1733#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1732#L17 assume true; 1731#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1730#L17 assume true; 1729#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1728#L20-1 foo_#res#1 := foo_~i~0#1; 1727#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1726#L26 assume true; 1725#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1714#L17 [2024-11-10 23:00:29,268 INFO L747 eck$LassoCheckResult]: Loop: 1714#L17 assume true; 1724#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1723#L17 assume true; 1722#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1721#L17 assume true; 1720#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1719#L17 assume true; 1718#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 1717#L20-1 foo_#res#1 := foo_~i~0#1; 1716#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1715#L26 assume true; 1713#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1714#L17 [2024-11-10 23:00:29,268 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:29,268 INFO L85 PathProgramCache]: Analyzing trace with hash 1718964071, now seen corresponding path program 7 times [2024-11-10 23:00:29,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:29,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806847185] [2024-11-10 23:00:29,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:29,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:29,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:29,288 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:29,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:29,304 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:29,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:29,304 INFO L85 PathProgramCache]: Analyzing trace with hash -391129704, now seen corresponding path program 4 times [2024-11-10 23:00:29,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:29,305 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190165836] [2024-11-10 23:00:29,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:29,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:29,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:29,312 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:29,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:29,318 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:29,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:29,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1092928514, now seen corresponding path program 8 times [2024-11-10 23:00:29,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:29,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641411206] [2024-11-10 23:00:29,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:29,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:29,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:29,586 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 60 proven. 108 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-10 23:00:29,586 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:29,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641411206] [2024-11-10 23:00:29,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1641411206] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:29,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [491612074] [2024-11-10 23:00:29,587 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-10 23:00:29,587 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:29,587 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:29,589 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:29,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2024-11-10 23:00:29,687 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-10 23:00:29,687 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:29,689 INFO L255 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-10 23:00:29,691 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:29,813 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 84 proven. 84 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-10 23:00:29,813 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:29,947 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 84 proven. 84 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-10 23:00:29,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [491612074] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:29,947 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:29,947 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2024-11-10 23:00:29,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1848412260] [2024-11-10 23:00:29,948 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:30,253 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:30,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-10 23:00:30,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=254, Unknown=0, NotChecked=0, Total=342 [2024-11-10 23:00:30,254 INFO L87 Difference]: Start difference. First operand 50 states and 52 transitions. cyclomatic complexity: 4 Second operand has 19 states, 19 states have (on average 3.3157894736842106) internal successors, (63), 19 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:30,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:30,487 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2024-11-10 23:00:30,487 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 63 transitions. [2024-11-10 23:00:30,488 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-10 23:00:30,488 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 61 states and 63 transitions. [2024-11-10 23:00:30,488 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 61 [2024-11-10 23:00:30,488 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2024-11-10 23:00:30,488 INFO L73 IsDeterministic]: Start isDeterministic. Operand 61 states and 63 transitions. [2024-11-10 23:00:30,488 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:30,489 INFO L218 hiAutomatonCegarLoop]: Abstraction has 61 states and 63 transitions. [2024-11-10 23:00:30,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states and 63 transitions. [2024-11-10 23:00:30,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 52. [2024-11-10 23:00:30,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0384615384615385) internal successors, (54), 51 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:30,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 54 transitions. [2024-11-10 23:00:30,491 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 54 transitions. [2024-11-10 23:00:30,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-10 23:00:30,492 INFO L425 stractBuchiCegarLoop]: Abstraction has 52 states and 54 transitions. [2024-11-10 23:00:30,492 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-10 23:00:30,492 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 54 transitions. [2024-11-10 23:00:30,492 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-10 23:00:30,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:30,493 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:30,493 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [9, 6, 4, 4, 3, 3, 3, 1, 1] [2024-11-10 23:00:30,493 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1, 1] [2024-11-10 23:00:30,494 INFO L745 eck$LassoCheckResult]: Stem: 2127#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2128#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2129#L26 assume true; 2130#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2122#L17 assume true; 2123#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2170#L17 assume true; 2168#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2166#L20-1 foo_#res#1 := foo_~i~0#1; 2136#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2137#L26 assume true; 2173#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2172#L17 assume true; 2134#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2135#L17 assume true; 2171#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2169#L17 assume true; 2167#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2132#L20-1 foo_#res#1 := foo_~i~0#1; 2133#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2165#L26 assume true; 2164#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2163#L17 assume true; 2162#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2161#L17 assume true; 2160#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2159#L17 assume true; 2158#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2157#L17 assume true; 2156#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2155#L20-1 foo_#res#1 := foo_~i~0#1; 2154#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2153#L26 assume true; 2152#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2139#L17 [2024-11-10 23:00:30,494 INFO L747 eck$LassoCheckResult]: Loop: 2139#L17 assume true; 2151#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2150#L17 assume true; 2149#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2148#L17 assume true; 2147#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2146#L17 assume true; 2145#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2144#L17 assume true; 2143#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2142#L20-1 foo_#res#1 := foo_~i~0#1; 2141#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2140#L26 assume true; 2138#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2139#L17 [2024-11-10 23:00:30,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:30,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1718964071, now seen corresponding path program 9 times [2024-11-10 23:00:30,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:30,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324546438] [2024-11-10 23:00:30,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:30,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:30,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:30,517 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:30,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:30,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:30,539 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:30,539 INFO L85 PathProgramCache]: Analyzing trace with hash -291981865, now seen corresponding path program 5 times [2024-11-10 23:00:30,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:30,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325150560] [2024-11-10 23:00:30,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:30,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:30,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:30,550 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:30,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:30,557 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:30,557 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:30,557 INFO L85 PathProgramCache]: Analyzing trace with hash -410772803, now seen corresponding path program 10 times [2024-11-10 23:00:30,557 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:30,557 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316186250] [2024-11-10 23:00:30,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:30,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:30,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:30,580 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:30,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:30,601 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:31,988 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 23:00:31,988 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 23:00:31,988 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 23:00:31,988 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 23:00:31,988 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 23:00:31,988 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:31,989 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 23:00:31,989 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 23:00:31,989 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration11_Lasso [2024-11-10 23:00:31,989 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 23:00:31,989 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 23:00:31,991 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:31,993 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:31,995 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:31,998 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,000 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,002 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,004 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,006 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,008 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,010 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,237 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,239 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,241 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:32,622 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 23:00:32,623 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 23:00:32,623 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,623 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,646 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,648 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-11-10 23:00:32,649 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,661 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,661 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,661 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,661 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,662 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,662 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,662 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,683 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,698 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:32,698 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,698 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,700 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,701 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2024-11-10 23:00:32,702 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,714 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,714 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,714 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,714 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,714 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,715 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,715 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,716 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,731 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2024-11-10 23:00:32,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,731 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,733 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,734 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2024-11-10 23:00:32,735 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,747 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,747 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,747 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,747 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,747 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,747 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,747 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,749 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,762 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2024-11-10 23:00:32,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,764 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,765 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2024-11-10 23:00:32,766 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,777 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,777 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,777 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,777 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,777 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,778 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,778 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,781 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,795 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2024-11-10 23:00:32,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,796 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,797 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,798 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2024-11-10 23:00:32,799 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,811 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,812 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,812 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,812 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,812 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,812 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,813 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,814 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,829 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:32,830 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,830 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,832 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,833 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-11-10 23:00:32,834 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,846 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,846 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,846 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,846 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,846 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,847 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,847 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,849 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,862 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:32,863 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,863 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,864 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,866 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-11-10 23:00:32,866 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,878 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,879 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,879 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,879 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,879 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,879 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,879 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,882 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,896 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:32,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,896 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,898 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,899 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2024-11-10 23:00:32,900 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,911 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,912 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:32,912 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,912 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,912 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,913 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:32,913 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:32,915 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,929 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Ended with exit code 0 [2024-11-10 23:00:32,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,930 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,932 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,933 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2024-11-10 23:00:32,934 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,946 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,946 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,946 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,946 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,948 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:32,948 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:32,951 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:32,965 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:32,965 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:32,966 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:32,967 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:32,968 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2024-11-10 23:00:32,970 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:32,981 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:32,982 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:32,982 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:32,982 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:32,983 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:32,984 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:32,989 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:33,003 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:33,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:33,004 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:33,005 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:33,008 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2024-11-10 23:00:33,009 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:33,021 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:33,021 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:33,021 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:33,021 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:33,024 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:33,024 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:33,029 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:33,043 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:33,043 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:33,043 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:33,045 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:33,046 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2024-11-10 23:00:33,047 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:33,059 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:33,059 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:33,059 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:33,059 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:33,065 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:33,065 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:33,072 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:33,086 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:33,086 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:33,087 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:33,088 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:33,089 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2024-11-10 23:00:33,090 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:33,103 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:33,103 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:33,103 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:33,103 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:33,116 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:33,116 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:33,138 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 23:00:33,193 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2024-11-10 23:00:33,193 INFO L444 ModelExtractionUtils]: 5 out of 31 variables were initially zero. Simplification set additionally 18 variables to zero. [2024-11-10 23:00:33,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:33,193 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:33,195 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:33,197 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2024-11-10 23:00:33,197 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 23:00:33,210 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-10 23:00:33,210 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 23:00:33,210 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~b#1.offset, ULTIMATE.start_foo_~size#1, v_rep(select #length ULTIMATE.start_foo_~b#1.base)_2) = -1*ULTIMATE.start_foo_~b#1.offset - 1*ULTIMATE.start_foo_~size#1 + 1*v_rep(select #length ULTIMATE.start_foo_~b#1.base)_2 Supporting invariants [-1*ULTIMATE.start_foo_~b#1.offset - 1*ULTIMATE.start_foo_~size#1 + 1*ULTIMATE.start_main_~#mask~0#1.offset + 1*ULTIMATE.start_main_~i~1#1 >= 0] [2024-11-10 23:00:33,221 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:33,243 INFO L156 tatePredicateManager]: 5 out of 7 supporting invariants were superfluous and have been removed [2024-11-10 23:00:33,249 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-10 23:00:33,250 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-10 23:00:33,250 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~b!offset [2024-11-10 23:00:33,273 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:33,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:33,316 INFO L255 TraceCheckSpWp]: Trace formula consists of 207 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-10 23:00:33,318 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:33,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:33,376 INFO L255 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-11-10 23:00:33,379 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:33,508 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:33,577 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-10 23:00:33,578 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 4 loop predicates [2024-11-10 23:00:33,578 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 52 states and 54 transitions. cyclomatic complexity: 4 Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:33,679 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 52 states and 54 transitions. cyclomatic complexity: 4. Second operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 92 states and 95 transitions. Complement of second has 11 states. [2024-11-10 23:00:33,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 6 states 1 stem states 4 non-accepting loop states 1 accepting loop states [2024-11-10 23:00:33,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 6 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:33,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 13 transitions. [2024-11-10 23:00:33,682 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 13 transitions. Stem has 34 letters. Loop has 14 letters. [2024-11-10 23:00:33,682 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:33,682 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 13 transitions. Stem has 48 letters. Loop has 14 letters. [2024-11-10 23:00:33,682 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:33,682 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 6 states and 13 transitions. Stem has 34 letters. Loop has 28 letters. [2024-11-10 23:00:33,683 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:33,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 92 states and 95 transitions. [2024-11-10 23:00:33,684 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-10 23:00:33,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 92 states to 65 states and 68 transitions. [2024-11-10 23:00:33,688 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-11-10 23:00:33,688 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-10 23:00:33,688 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 68 transitions. [2024-11-10 23:00:33,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:33,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 68 transitions. [2024-11-10 23:00:33,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 68 transitions. [2024-11-10 23:00:33,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 61. [2024-11-10 23:00:33,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.0491803278688525) internal successors, (64), 60 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:33,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 64 transitions. [2024-11-10 23:00:33,694 INFO L240 hiAutomatonCegarLoop]: Abstraction has 61 states and 64 transitions. [2024-11-10 23:00:33,694 INFO L425 stractBuchiCegarLoop]: Abstraction has 61 states and 64 transitions. [2024-11-10 23:00:33,694 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-10 23:00:33,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 64 transitions. [2024-11-10 23:00:33,695 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-10 23:00:33,697 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:33,697 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:33,697 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [13, 10, 4, 4, 3, 3, 3, 1, 1] [2024-11-10 23:00:33,698 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-10 23:00:33,698 INFO L745 eck$LassoCheckResult]: Stem: 2482#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2483#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2484#L26 assume true; 2485#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2475#L17 assume true; 2476#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2534#L17 assume true; 2533#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2532#L20-1 foo_#res#1 := foo_~i~0#1; 2531#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2530#L26 assume true; 2486#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2477#L17 assume true; 2478#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2496#L17 assume true; 2535#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2516#L17 assume true; 2513#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2490#L20-1 foo_#res#1 := foo_~i~0#1; 2491#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2492#L26 assume true; 2493#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2528#L17 assume true; 2526#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2524#L17 assume true; 2522#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2520#L17 assume true; 2519#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2518#L17 assume true; 2512#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2511#L20-1 foo_#res#1 := foo_~i~0#1; 2510#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2509#L26 assume true; 2508#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2506#L17 assume true; 2494#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2495#L17 assume true; 2505#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2504#L17 assume true; 2503#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2502#L17 assume true; 2501#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2500#L17 [2024-11-10 23:00:33,698 INFO L747 eck$LassoCheckResult]: Loop: 2500#L17 assume true; 2499#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2500#L17 [2024-11-10 23:00:33,699 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:33,699 INFO L85 PathProgramCache]: Analyzing trace with hash -1890701853, now seen corresponding path program 11 times [2024-11-10 23:00:33,699 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:33,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478750856] [2024-11-10 23:00:33,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:33,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:33,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:33,731 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:33,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:33,757 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:33,759 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:33,760 INFO L85 PathProgramCache]: Analyzing trace with hash 1728, now seen corresponding path program 3 times [2024-11-10 23:00:33,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:33,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1965378449] [2024-11-10 23:00:33,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:33,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:33,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:33,765 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:33,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:33,767 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:33,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:33,768 INFO L85 PathProgramCache]: Analyzing trace with hash -193313758, now seen corresponding path program 12 times [2024-11-10 23:00:33,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:33,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173733753] [2024-11-10 23:00:33,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:33,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:33,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:33,963 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 12 proven. 168 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-10 23:00:33,964 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:33,964 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173733753] [2024-11-10 23:00:33,964 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [173733753] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:33,964 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1447553067] [2024-11-10 23:00:33,964 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-10 23:00:33,964 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:33,964 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:33,966 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:33,967 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2024-11-10 23:00:34,076 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2024-11-10 23:00:34,076 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:34,078 INFO L255 TraceCheckSpWp]: Trace formula consists of 267 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-10 23:00:34,080 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:34,233 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 20 proven. 160 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-10 23:00:34,234 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:34,352 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 20 proven. 160 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-11-10 23:00:34,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1447553067] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:34,353 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:34,353 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 17 [2024-11-10 23:00:34,353 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589403327] [2024-11-10 23:00:34,353 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:34,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:34,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-10 23:00:34,396 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=226, Unknown=0, NotChecked=0, Total=306 [2024-11-10 23:00:34,396 INFO L87 Difference]: Start difference. First operand 61 states and 64 transitions. cyclomatic complexity: 6 Second operand has 18 states, 17 states have (on average 3.3529411764705883) internal successors, (57), 18 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:34,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:34,622 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2024-11-10 23:00:34,622 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 100 states and 104 transitions. [2024-11-10 23:00:34,623 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-10 23:00:34,624 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 100 states to 100 states and 104 transitions. [2024-11-10 23:00:34,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2024-11-10 23:00:34,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2024-11-10 23:00:34,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 104 transitions. [2024-11-10 23:00:34,624 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:34,624 INFO L218 hiAutomatonCegarLoop]: Abstraction has 100 states and 104 transitions. [2024-11-10 23:00:34,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 104 transitions. [2024-11-10 23:00:34,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 84. [2024-11-10 23:00:34,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 84 states have (on average 1.0476190476190477) internal successors, (88), 83 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:34,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 88 transitions. [2024-11-10 23:00:34,627 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84 states and 88 transitions. [2024-11-10 23:00:34,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-10 23:00:34,631 INFO L425 stractBuchiCegarLoop]: Abstraction has 84 states and 88 transitions. [2024-11-10 23:00:34,631 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-10 23:00:34,631 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84 states and 88 transitions. [2024-11-10 23:00:34,631 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-10 23:00:34,631 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:34,631 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:34,632 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 10, 5, 4, 4, 4, 4, 1, 1, 1, 1] [2024-11-10 23:00:34,632 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:34,632 INFO L745 eck$LassoCheckResult]: Stem: 2949#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2950#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2954#L26 assume true; 2955#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2945#L17 assume true; 2946#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3014#L17 assume true; 3013#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 3012#L20-1 foo_#res#1 := foo_~i~0#1; 3011#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2963#L26 assume true; 2964#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3010#L17 assume true; 3009#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3008#L17 assume true; 3007#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3006#L17 assume true; 3005#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 3004#L20-1 foo_#res#1 := foo_~i~0#1; 3003#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3002#L26 assume true; 3001#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3000#L17 assume true; 2999#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2998#L17 assume true; 2997#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2996#L17 assume true; 2995#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2994#L17 assume true; 2993#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2992#L20-1 foo_#res#1 := foo_~i~0#1; 2991#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2990#L26 assume true; 2989#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2987#L17 assume true; 2986#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2985#L17 assume true; 2983#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2981#L17 assume true; 2979#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2977#L17 assume true; 2974#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2975#L17 assume true; 2971#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 2959#L20-1 foo_#res#1 := foo_~i~0#1; 2960#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2968#L26 assume true; 2970#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 2951#L29-3 main_~i~1#1 := 0; 2952#L29 [2024-11-10 23:00:34,633 INFO L747 eck$LassoCheckResult]: Loop: 2952#L29 assume true; 2958#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 2953#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 2952#L29 [2024-11-10 23:00:34,633 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:34,633 INFO L85 PathProgramCache]: Analyzing trace with hash 150944949, now seen corresponding path program 2 times [2024-11-10 23:00:34,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:34,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644267171] [2024-11-10 23:00:34,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:34,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:34,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:34,818 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 0 proven. 174 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-10 23:00:34,819 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:34,819 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1644267171] [2024-11-10 23:00:34,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1644267171] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:34,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [168260997] [2024-11-10 23:00:34,820 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-10 23:00:34,820 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:34,820 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:34,822 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:34,824 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2024-11-10 23:00:34,934 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-10 23:00:34,934 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:34,938 INFO L255 TraceCheckSpWp]: Trace formula consists of 273 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-10 23:00:34,939 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:35,003 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 0 proven. 174 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-10 23:00:35,003 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:35,127 INFO L134 CoverageAnalysis]: Checked inductivity of 214 backedges. 0 proven. 174 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-10 23:00:35,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [168260997] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:35,127 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:35,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-10 23:00:35,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042505652] [2024-11-10 23:00:35,127 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:35,128 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:35,128 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:35,128 INFO L85 PathProgramCache]: Analyzing trace with hash 43657, now seen corresponding path program 2 times [2024-11-10 23:00:35,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:35,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841558613] [2024-11-10 23:00:35,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:35,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:35,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,132 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:35,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,137 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:35,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:35,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-10 23:00:35,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2024-11-10 23:00:35,177 INFO L87 Difference]: Start difference. First operand 84 states and 88 transitions. cyclomatic complexity: 7 Second operand has 13 states, 13 states have (on average 5.153846153846154) internal successors, (67), 13 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:35,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:35,434 INFO L93 Difference]: Finished difference Result 256 states and 269 transitions. [2024-11-10 23:00:35,435 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 256 states and 269 transitions. [2024-11-10 23:00:35,436 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 15 [2024-11-10 23:00:35,437 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 256 states to 223 states and 236 transitions. [2024-11-10 23:00:35,437 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 96 [2024-11-10 23:00:35,437 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 96 [2024-11-10 23:00:35,437 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 236 transitions. [2024-11-10 23:00:35,438 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:35,438 INFO L218 hiAutomatonCegarLoop]: Abstraction has 223 states and 236 transitions. [2024-11-10 23:00:35,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 236 transitions. [2024-11-10 23:00:35,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 138. [2024-11-10 23:00:35,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 138 states have (on average 1.0869565217391304) internal successors, (150), 137 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:35,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 150 transitions. [2024-11-10 23:00:35,442 INFO L240 hiAutomatonCegarLoop]: Abstraction has 138 states and 150 transitions. [2024-11-10 23:00:35,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-10 23:00:35,442 INFO L425 stractBuchiCegarLoop]: Abstraction has 138 states and 150 transitions. [2024-11-10 23:00:35,442 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-10 23:00:35,442 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 138 states and 150 transitions. [2024-11-10 23:00:35,443 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 7 [2024-11-10 23:00:35,443 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:35,443 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:35,444 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 10, 5, 5, 4, 4, 4, 1, 1] [2024-11-10 23:00:35,445 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-10 23:00:35,445 INFO L745 eck$LassoCheckResult]: Stem: 3603#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3604#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3606#L26 assume true; 3607#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3608#L17 assume true; 3733#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3731#L17 assume true; 3729#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 3613#L20-1 foo_#res#1 := foo_~i~0#1; 3614#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3615#L26 assume true; 3609#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3599#L17 assume true; 3600#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3616#L17 assume true; 3734#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3732#L17 assume true; 3730#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 3728#L20-1 foo_#res#1 := foo_~i~0#1; 3618#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3619#L26 assume true; 3727#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3726#L17 assume true; 3725#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3724#L17 assume true; 3723#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3722#L17 assume true; 3721#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3720#L17 assume true; 3719#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 3718#L20-1 foo_#res#1 := foo_~i~0#1; 3717#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3716#L26 assume true; 3715#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3714#L17 assume true; 3713#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3712#L17 assume true; 3711#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3710#L17 assume true; 3709#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3708#L17 assume true; 3707#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3706#L17 assume true; 3705#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 3704#L20-1 foo_#res#1 := foo_~i~0#1; 3703#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3702#L26 assume true; 3701#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3700#L17 assume true; 3598#L17-1 [2024-11-10 23:00:35,448 INFO L747 eck$LassoCheckResult]: Loop: 3598#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3597#L17 assume true; 3598#L17-1 [2024-11-10 23:00:35,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:35,449 INFO L85 PathProgramCache]: Analyzing trace with hash 150945019, now seen corresponding path program 13 times [2024-11-10 23:00:35,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:35,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930375836] [2024-11-10 23:00:35,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:35,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:35,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,471 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:35,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,492 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:35,493 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:35,493 INFO L85 PathProgramCache]: Analyzing trace with hash 1698, now seen corresponding path program 4 times [2024-11-10 23:00:35,493 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:35,493 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551419552] [2024-11-10 23:00:35,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:35,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:35,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,496 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:35,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,498 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:35,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:35,499 INFO L85 PathProgramCache]: Analyzing trace with hash -970724068, now seen corresponding path program 14 times [2024-11-10 23:00:35,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:35,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624764230] [2024-11-10 23:00:35,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:35,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:35,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,524 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:35,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:35,546 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:37,652 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 23:00:37,652 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 23:00:37,652 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 23:00:37,652 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 23:00:37,652 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 23:00:37,652 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:37,652 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 23:00:37,652 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 23:00:37,652 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration14_Lasso [2024-11-10 23:00:37,652 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 23:00:37,652 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 23:00:37,654 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,656 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,658 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,660 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,664 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,666 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,859 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,862 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,863 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,865 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,867 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,869 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:37,871 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 23:00:38,187 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 23:00:38,188 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 23:00:38,188 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,188 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,190 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,191 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2024-11-10 23:00:38,193 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,205 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,205 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:38,206 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,206 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,206 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,206 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:38,206 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:38,207 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,222 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:38,222 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,222 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,224 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,227 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2024-11-10 23:00:38,228 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,240 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,240 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:38,240 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,240 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,241 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,241 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:38,241 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:38,245 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,259 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:38,260 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,260 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,261 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,263 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2024-11-10 23:00:38,263 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,276 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,276 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:38,276 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,276 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,276 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,277 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:38,277 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:38,280 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,294 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Ended with exit code 0 [2024-11-10 23:00:38,294 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,294 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,296 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,297 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2024-11-10 23:00:38,299 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,311 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,311 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:38,311 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,311 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,312 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,312 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:38,312 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:38,315 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,326 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:38,326 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,326 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,327 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,328 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2024-11-10 23:00:38,329 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,338 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,338 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,338 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,338 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,339 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:38,339 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:38,341 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,352 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Ended with exit code 0 [2024-11-10 23:00:38,352 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,352 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,353 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,354 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2024-11-10 23:00:38,354 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,364 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,364 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:38,364 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,364 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,364 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,364 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:38,365 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:38,365 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,375 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:38,376 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,376 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,377 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,377 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2024-11-10 23:00:38,378 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,388 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,388 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 23:00:38,388 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,388 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,388 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,388 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 23:00:38,388 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 23:00:38,389 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 23:00:38,399 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:38,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,400 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,401 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,402 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2024-11-10 23:00:38,403 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 23:00:38,414 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 23:00:38,414 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 23:00:38,414 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 23:00:38,414 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 23:00:38,420 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 23:00:38,420 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 23:00:38,436 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 23:00:38,464 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2024-11-10 23:00:38,465 INFO L444 ModelExtractionUtils]: 12 out of 28 variables were initially zero. Simplification set additionally 11 variables to zero. [2024-11-10 23:00:38,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:38,465 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:38,466 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:38,467 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2024-11-10 23:00:38,467 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 23:00:38,477 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-10 23:00:38,477 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 23:00:38,478 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~size#1, ULTIMATE.start_foo_~i~0#1) = 19*ULTIMATE.start_foo_~size#1 - 3*ULTIMATE.start_foo_~i~0#1 Supporting invariants [-3*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_3 + 32*ULTIMATE.start_foo_~size#1 >= 0] [2024-11-10 23:00:38,489 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:38,510 INFO L156 tatePredicateManager]: 6 out of 8 supporting invariants were superfluous and have been removed [2024-11-10 23:00:38,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:38,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:38,593 INFO L255 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-10 23:00:38,594 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:38,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-10 23:00:38,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:38,949 WARN L253 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-10 23:00:38,949 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:38,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:38,990 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.7 stem predicates 2 loop predicates [2024-11-10 23:00:38,990 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 138 states and 150 transitions. cyclomatic complexity: 20 Second operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:39,012 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 138 states and 150 transitions. cyclomatic complexity: 20. Second operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 138 states and 150 transitions. Complement of second has 4 states. [2024-11-10 23:00:39,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 2 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-10 23:00:39,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:39,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5 transitions. [2024-11-10 23:00:39,014 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 49 letters. Loop has 2 letters. [2024-11-10 23:00:39,014 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:39,014 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-10 23:00:39,031 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:39,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:39,089 INFO L255 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-10 23:00:39,091 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:39,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2024-11-10 23:00:39,180 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Forceful destruction successful, exit code 0 [2024-11-10 23:00:39,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:39,486 WARN L253 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-10 23:00:39,487 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:39,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:39,521 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.7 stem predicates 2 loop predicates [2024-11-10 23:00:39,522 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 138 states and 150 transitions. cyclomatic complexity: 20 Second operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:39,546 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 138 states and 150 transitions. cyclomatic complexity: 20. Second operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 138 states and 150 transitions. Complement of second has 4 states. [2024-11-10 23:00:39,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 2 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-10 23:00:39,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:39,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5 transitions. [2024-11-10 23:00:39,548 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 49 letters. Loop has 2 letters. [2024-11-10 23:00:39,548 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:39,548 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-10 23:00:39,568 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:39,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:39,619 INFO L255 TraceCheckSpWp]: Trace formula consists of 286 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-10 23:00:39,620 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:39,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-10 23:00:39,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:39,918 WARN L253 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-10 23:00:39,918 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:39,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:39,959 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.7 stem predicates 2 loop predicates [2024-11-10 23:00:39,960 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 138 states and 150 transitions. cyclomatic complexity: 20 Second operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:40,128 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 138 states and 150 transitions. cyclomatic complexity: 20. Second operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 164 states and 176 transitions. Complement of second has 14 states. [2024-11-10 23:00:40,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 10 states 7 stem states 1 non-accepting loop states 2 accepting loop states [2024-11-10 23:00:40,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 3.888888888888889) internal successors, (35), 9 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:40,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 50 transitions. [2024-11-10 23:00:40,130 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 50 transitions. Stem has 49 letters. Loop has 2 letters. [2024-11-10 23:00:40,130 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:40,130 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 50 transitions. Stem has 51 letters. Loop has 2 letters. [2024-11-10 23:00:40,130 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:40,130 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 10 states and 50 transitions. Stem has 49 letters. Loop has 4 letters. [2024-11-10 23:00:40,130 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 23:00:40,131 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 164 states and 176 transitions. [2024-11-10 23:00:40,134 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:40,134 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 164 states to 142 states and 149 transitions. [2024-11-10 23:00:40,135 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2024-11-10 23:00:40,135 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-10 23:00:40,135 INFO L73 IsDeterministic]: Start isDeterministic. Operand 142 states and 149 transitions. [2024-11-10 23:00:40,135 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:40,135 INFO L218 hiAutomatonCegarLoop]: Abstraction has 142 states and 149 transitions. [2024-11-10 23:00:40,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states and 149 transitions. [2024-11-10 23:00:40,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 136. [2024-11-10 23:00:40,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 136 states, 136 states have (on average 1.0514705882352942) internal successors, (143), 135 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:40,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 143 transitions. [2024-11-10 23:00:40,139 INFO L240 hiAutomatonCegarLoop]: Abstraction has 136 states and 143 transitions. [2024-11-10 23:00:40,139 INFO L425 stractBuchiCegarLoop]: Abstraction has 136 states and 143 transitions. [2024-11-10 23:00:40,139 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-10 23:00:40,139 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 136 states and 143 transitions. [2024-11-10 23:00:40,141 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:40,142 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:40,142 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:40,143 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [44, 34, 11, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-10 23:00:40,143 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:40,143 INFO L745 eck$LassoCheckResult]: Stem: 4747#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4748#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 4749#L26 assume true; 4762#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4740#L17 assume true; 4741#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4874#L17 assume true; 4872#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4755#L20-1 foo_#res#1 := foo_~i~0#1; 4756#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4758#L26 assume true; 4751#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4742#L17 assume true; 4743#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4761#L17 assume true; 4875#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4873#L17 assume true; 4871#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4870#L20-1 foo_#res#1 := foo_~i~0#1; 4869#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4868#L26 assume true; 4867#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4866#L17 assume true; 4865#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4864#L17 assume true; 4863#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4862#L17 assume true; 4861#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4860#L17 assume true; 4859#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4858#L20-1 foo_#res#1 := foo_~i~0#1; 4857#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4856#L26 assume true; 4855#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4854#L17 assume true; 4853#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4852#L17 assume true; 4851#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4850#L17 assume true; 4849#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4848#L17 assume true; 4847#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4846#L17 assume true; 4845#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4844#L20-1 foo_#res#1 := foo_~i~0#1; 4843#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4842#L26 assume true; 4841#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4840#L17 assume true; 4839#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4838#L17 assume true; 4837#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4836#L17 assume true; 4835#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4834#L17 assume true; 4833#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4832#L17 assume true; 4831#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4830#L20-1 foo_#res#1 := foo_~i~0#1; 4829#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4828#L26 assume true; 4827#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4826#L17 assume true; 4825#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4824#L17 assume true; 4823#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4822#L17 assume true; 4821#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4820#L17 assume true; 4819#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4818#L17 assume true; 4817#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4816#L20-1 foo_#res#1 := foo_~i~0#1; 4815#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4814#L26 assume true; 4813#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4812#L17 assume true; 4811#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4810#L17 assume true; 4809#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4808#L17 assume true; 4807#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4806#L17 assume true; 4805#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4804#L17 assume true; 4803#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4802#L20-1 foo_#res#1 := foo_~i~0#1; 4801#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4800#L26 assume true; 4799#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4798#L17 assume true; 4797#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4796#L17 assume true; 4795#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4794#L17 assume true; 4793#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4792#L17 assume true; 4791#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4790#L17 assume true; 4789#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4788#L20-1 foo_#res#1 := foo_~i~0#1; 4787#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4786#L26 assume true; 4785#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4784#L17 assume true; 4767#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4783#L17 assume true; 4782#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4781#L17 assume true; 4780#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4779#L17 assume true; 4774#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4773#L17 assume true; 4772#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4771#L20-1 foo_#res#1 := foo_~i~0#1; 4770#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4769#L26 assume true; 4768#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4766#L17 assume true; 4759#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4760#L17 assume true; 4778#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4777#L17 assume true; 4776#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4775#L17 assume true; 4765#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4764#L17 assume true; 4763#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 4753#L20-1 foo_#res#1 := foo_~i~0#1; 4754#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4757#L26 assume true; 4750#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 4744#L29-3 main_~i~1#1 := 0; 4745#L29 [2024-11-10 23:00:40,144 INFO L747 eck$LassoCheckResult]: Loop: 4745#L29 assume true; 4752#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 4746#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 4745#L29 [2024-11-10 23:00:40,144 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:40,144 INFO L85 PathProgramCache]: Analyzing trace with hash -1037076047, now seen corresponding path program 3 times [2024-11-10 23:00:40,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:40,144 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497798789] [2024-11-10 23:00:40,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:40,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:40,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:40,724 INFO L134 CoverageAnalysis]: Checked inductivity of 2092 backedges. 758 proven. 84 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2024-11-10 23:00:40,724 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:40,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497798789] [2024-11-10 23:00:40,725 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [497798789] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:40,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [979122777] [2024-11-10 23:00:40,725 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-10 23:00:40,725 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:40,725 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:40,727 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:40,728 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2024-11-10 23:00:40,876 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-10 23:00:40,876 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:40,878 INFO L255 TraceCheckSpWp]: Trace formula consists of 177 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-10 23:00:40,881 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:41,187 INFO L134 CoverageAnalysis]: Checked inductivity of 2092 backedges. 408 proven. 40 refuted. 0 times theorem prover too weak. 1644 trivial. 0 not checked. [2024-11-10 23:00:41,187 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:41,647 INFO L134 CoverageAnalysis]: Checked inductivity of 2092 backedges. 0 proven. 448 refuted. 0 times theorem prover too weak. 1644 trivial. 0 not checked. [2024-11-10 23:00:41,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [979122777] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:41,648 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:41,648 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 10, 10] total 30 [2024-11-10 23:00:41,648 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580753436] [2024-11-10 23:00:41,648 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:41,648 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:41,648 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:41,648 INFO L85 PathProgramCache]: Analyzing trace with hash 43657, now seen corresponding path program 3 times [2024-11-10 23:00:41,649 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:41,649 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144546301] [2024-11-10 23:00:41,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:41,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:41,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:41,653 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:41,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:41,656 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:41,694 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:41,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2024-11-10 23:00:41,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=707, Unknown=0, NotChecked=0, Total=870 [2024-11-10 23:00:41,695 INFO L87 Difference]: Start difference. First operand 136 states and 143 transitions. cyclomatic complexity: 14 Second operand has 30 states, 30 states have (on average 2.8333333333333335) internal successors, (85), 30 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:42,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:42,751 INFO L93 Difference]: Finished difference Result 242 states and 268 transitions. [2024-11-10 23:00:42,751 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 242 states and 268 transitions. [2024-11-10 23:00:42,752 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:42,753 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 242 states to 227 states and 249 transitions. [2024-11-10 23:00:42,754 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-11-10 23:00:42,754 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2024-11-10 23:00:42,754 INFO L73 IsDeterministic]: Start isDeterministic. Operand 227 states and 249 transitions. [2024-11-10 23:00:42,754 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:42,754 INFO L218 hiAutomatonCegarLoop]: Abstraction has 227 states and 249 transitions. [2024-11-10 23:00:42,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states and 249 transitions. [2024-11-10 23:00:42,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 158. [2024-11-10 23:00:42,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 158 states, 158 states have (on average 1.0443037974683544) internal successors, (165), 157 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:42,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2024-11-10 23:00:42,758 INFO L240 hiAutomatonCegarLoop]: Abstraction has 158 states and 165 transitions. [2024-11-10 23:00:42,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-11-10 23:00:42,759 INFO L425 stractBuchiCegarLoop]: Abstraction has 158 states and 165 transitions. [2024-11-10 23:00:42,759 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-10 23:00:42,759 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 158 states and 165 transitions. [2024-11-10 23:00:42,760 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:42,760 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:42,760 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:42,762 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [55, 45, 11, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-10 23:00:42,762 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:42,762 INFO L745 eck$LassoCheckResult]: Stem: 6030#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6031#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 6035#L26 assume true; 6049#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6026#L17 assume true; 6027#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6111#L17 assume true; 6112#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6042#L20-1 foo_#res#1 := foo_~i~0#1; 6043#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6045#L26 assume true; 6037#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6038#L17 assume true; 6048#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6028#L17 assume true; 6029#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6183#L17 assume true; 6109#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6110#L20-1 foo_#res#1 := foo_~i~0#1; 6182#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6181#L26 assume true; 6180#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6179#L17 assume true; 6178#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6177#L17 assume true; 6176#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6175#L17 assume true; 6174#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6173#L17 assume true; 6172#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6171#L20-1 foo_#res#1 := foo_~i~0#1; 6170#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6169#L26 assume true; 6168#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6167#L17 assume true; 6166#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6165#L17 assume true; 6164#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6163#L17 assume true; 6162#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6161#L17 assume true; 6160#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6159#L17 assume true; 6158#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6157#L20-1 foo_#res#1 := foo_~i~0#1; 6156#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6155#L26 assume true; 6154#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6153#L17 assume true; 6152#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6151#L17 assume true; 6150#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6149#L17 assume true; 6148#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6147#L17 assume true; 6146#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6145#L17 assume true; 6144#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6143#L17 assume true; 6142#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6141#L20-1 foo_#res#1 := foo_~i~0#1; 6140#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6139#L26 assume true; 6138#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6137#L17 assume true; 6136#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6135#L17 assume true; 6134#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6133#L17 assume true; 6132#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6131#L17 assume true; 6130#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6129#L17 assume true; 6128#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6127#L17 assume true; 6126#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6125#L20-1 foo_#res#1 := foo_~i~0#1; 6124#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6123#L26 assume true; 6122#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6121#L17 assume true; 6120#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6119#L17 assume true; 6118#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6117#L17 assume true; 6116#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6115#L17 assume true; 6114#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6113#L17 assume true; 6108#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6107#L17 assume true; 6106#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6105#L20-1 foo_#res#1 := foo_~i~0#1; 6104#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6103#L26 assume true; 6102#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6101#L17 assume true; 6100#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6099#L17 assume true; 6098#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6097#L17 assume true; 6096#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6095#L17 assume true; 6094#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6093#L17 assume true; 6092#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6091#L17 assume true; 6090#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6089#L20-1 foo_#res#1 := foo_~i~0#1; 6088#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6087#L26 assume true; 6086#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6085#L17 assume true; 6054#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6084#L17 assume true; 6083#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6082#L17 assume true; 6081#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6080#L17 assume true; 6079#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6078#L17 assume true; 6077#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6076#L17 assume true; 6075#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6074#L20-1 foo_#res#1 := foo_~i~0#1; 6073#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6056#L26 assume true; 6055#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6053#L17 assume true; 6046#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6047#L17 assume true; 6072#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6071#L17 assume true; 6070#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6069#L17 assume true; 6068#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6067#L17 assume true; 6066#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6065#L17 assume true; 6064#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6063#L17 assume true; 6062#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6061#L17 assume true; 6060#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6059#L17 assume true; 6058#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6057#L17 assume true; 6052#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6051#L17 assume true; 6050#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 6040#L20-1 foo_#res#1 := foo_~i~0#1; 6041#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6044#L26 assume true; 6036#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 6032#L29-3 main_~i~1#1 := 0; 6033#L29 [2024-11-10 23:00:42,763 INFO L747 eck$LassoCheckResult]: Loop: 6033#L29 assume true; 6039#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 6034#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 6033#L29 [2024-11-10 23:00:42,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:42,763 INFO L85 PathProgramCache]: Analyzing trace with hash 1647486940, now seen corresponding path program 4 times [2024-11-10 23:00:42,763 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:42,763 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202113951] [2024-11-10 23:00:42,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:42,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:42,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:43,525 INFO L134 CoverageAnalysis]: Checked inductivity of 3170 backedges. 1850 proven. 116 refuted. 0 times theorem prover too weak. 1204 trivial. 0 not checked. [2024-11-10 23:00:43,525 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:43,525 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202113951] [2024-11-10 23:00:43,525 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1202113951] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:43,525 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1552694677] [2024-11-10 23:00:43,525 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-10 23:00:43,525 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:43,525 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:43,528 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:43,529 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2024-11-10 23:00:43,821 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-10 23:00:43,822 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:43,829 INFO L255 TraceCheckSpWp]: Trace formula consists of 873 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-10 23:00:43,833 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:44,100 INFO L134 CoverageAnalysis]: Checked inductivity of 3170 backedges. 1978 proven. 270 refuted. 0 times theorem prover too weak. 922 trivial. 0 not checked. [2024-11-10 23:00:44,100 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:44,371 INFO L134 CoverageAnalysis]: Checked inductivity of 3170 backedges. 1978 proven. 270 refuted. 0 times theorem prover too weak. 922 trivial. 0 not checked. [2024-11-10 23:00:44,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1552694677] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:44,371 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:44,372 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14] total 32 [2024-11-10 23:00:44,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329303221] [2024-11-10 23:00:44,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:44,372 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:44,374 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:44,375 INFO L85 PathProgramCache]: Analyzing trace with hash 43657, now seen corresponding path program 4 times [2024-11-10 23:00:44,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:44,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263313787] [2024-11-10 23:00:44,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:44,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:44,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:44,380 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:44,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:44,384 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:44,425 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:44,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2024-11-10 23:00:44,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=188, Invalid=804, Unknown=0, NotChecked=0, Total=992 [2024-11-10 23:00:44,427 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. cyclomatic complexity: 14 Second operand has 32 states, 32 states have (on average 3.34375) internal successors, (107), 32 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:45,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:45,064 INFO L93 Difference]: Finished difference Result 190 states and 197 transitions. [2024-11-10 23:00:45,064 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 190 states and 197 transitions. [2024-11-10 23:00:45,065 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:45,066 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 190 states to 186 states and 193 transitions. [2024-11-10 23:00:45,066 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 30 [2024-11-10 23:00:45,066 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 30 [2024-11-10 23:00:45,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 186 states and 193 transitions. [2024-11-10 23:00:45,066 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:45,066 INFO L218 hiAutomatonCegarLoop]: Abstraction has 186 states and 193 transitions. [2024-11-10 23:00:45,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states and 193 transitions. [2024-11-10 23:00:45,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 166. [2024-11-10 23:00:45,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 166 states have (on average 1.0421686746987953) internal successors, (173), 165 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:45,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 173 transitions. [2024-11-10 23:00:45,071 INFO L240 hiAutomatonCegarLoop]: Abstraction has 166 states and 173 transitions. [2024-11-10 23:00:45,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-11-10 23:00:45,072 INFO L425 stractBuchiCegarLoop]: Abstraction has 166 states and 173 transitions. [2024-11-10 23:00:45,072 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-10 23:00:45,072 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 166 states and 173 transitions. [2024-11-10 23:00:45,073 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:45,073 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:45,073 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:45,075 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [59, 49, 11, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-10 23:00:45,075 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:45,080 INFO L745 eck$LassoCheckResult]: Stem: 7392#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7393#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 7394#L26 assume true; 7409#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7385#L17 assume true; 7386#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7548#L17 assume true; 7546#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7400#L20-1 foo_#res#1 := foo_~i~0#1; 7401#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7544#L26 assume true; 7396#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7387#L17 assume true; 7388#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7407#L17 assume true; 7550#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7549#L17 assume true; 7547#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7545#L20-1 foo_#res#1 := foo_~i~0#1; 7408#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7403#L26 assume true; 7404#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7543#L17 assume true; 7542#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7541#L17 assume true; 7540#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7539#L17 assume true; 7538#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7537#L17 assume true; 7536#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7535#L20-1 foo_#res#1 := foo_~i~0#1; 7534#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7533#L26 assume true; 7532#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7531#L17 assume true; 7530#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7529#L17 assume true; 7528#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7527#L17 assume true; 7526#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7525#L17 assume true; 7524#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7523#L17 assume true; 7522#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7521#L20-1 foo_#res#1 := foo_~i~0#1; 7520#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7519#L26 assume true; 7518#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7517#L17 assume true; 7516#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7515#L17 assume true; 7514#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7513#L17 assume true; 7512#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7511#L17 assume true; 7510#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7509#L17 assume true; 7508#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7507#L17 assume true; 7506#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7505#L20-1 foo_#res#1 := foo_~i~0#1; 7504#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7503#L26 assume true; 7502#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7501#L17 assume true; 7500#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7499#L17 assume true; 7498#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7497#L17 assume true; 7496#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7495#L17 assume true; 7494#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7493#L17 assume true; 7492#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7491#L17 assume true; 7490#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7489#L17 assume true; 7488#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7487#L20-1 foo_#res#1 := foo_~i~0#1; 7486#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7485#L26 assume true; 7484#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7483#L17 assume true; 7482#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7481#L17 assume true; 7480#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7479#L17 assume true; 7478#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7477#L17 assume true; 7476#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7475#L17 assume true; 7474#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7473#L17 assume true; 7472#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7471#L17 assume true; 7470#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7469#L20-1 foo_#res#1 := foo_~i~0#1; 7468#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7467#L26 assume true; 7466#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7465#L17 assume true; 7464#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7463#L17 assume true; 7462#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7461#L17 assume true; 7460#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7459#L17 assume true; 7458#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7457#L17 assume true; 7456#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7455#L17 assume true; 7454#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7453#L17 assume true; 7452#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7451#L20-1 foo_#res#1 := foo_~i~0#1; 7450#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7449#L26 assume true; 7448#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7447#L17 assume true; 7414#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7446#L17 assume true; 7445#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7444#L17 assume true; 7443#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7442#L17 assume true; 7441#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7440#L17 assume true; 7439#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7438#L17 assume true; 7427#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7426#L17 assume true; 7424#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7422#L20-1 foo_#res#1 := foo_~i~0#1; 7420#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7418#L26 assume true; 7416#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7413#L17 assume true; 7405#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7406#L17 assume true; 7437#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7436#L17 assume true; 7435#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7434#L17 assume true; 7433#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7432#L17 assume true; 7431#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7430#L17 assume true; 7429#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7428#L17 assume true; 7425#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7423#L17 assume true; 7421#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7419#L17 assume true; 7417#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7415#L17 assume true; 7412#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7411#L17 assume true; 7410#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 7398#L20-1 foo_#res#1 := foo_~i~0#1; 7399#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7402#L26 assume true; 7395#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 7389#L29-3 main_~i~1#1 := 0; 7390#L29 [2024-11-10 23:00:45,080 INFO L747 eck$LassoCheckResult]: Loop: 7390#L29 assume true; 7397#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 7391#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 7390#L29 [2024-11-10 23:00:45,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:45,081 INFO L85 PathProgramCache]: Analyzing trace with hash 989690464, now seen corresponding path program 5 times [2024-11-10 23:00:45,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:45,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30001638] [2024-11-10 23:00:45,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:45,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:45,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:45,766 INFO L134 CoverageAnalysis]: Checked inductivity of 3622 backedges. 2126 proven. 162 refuted. 0 times theorem prover too weak. 1334 trivial. 0 not checked. [2024-11-10 23:00:45,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:45,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30001638] [2024-11-10 23:00:45,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30001638] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:45,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [866407930] [2024-11-10 23:00:45,767 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-10 23:00:45,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:45,767 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:45,769 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:45,770 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2024-11-10 23:00:46,072 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2024-11-10 23:00:46,072 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:46,075 INFO L255 TraceCheckSpWp]: Trace formula consists of 650 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-10 23:00:46,077 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:46,349 INFO L134 CoverageAnalysis]: Checked inductivity of 3622 backedges. 2414 proven. 464 refuted. 0 times theorem prover too weak. 744 trivial. 0 not checked. [2024-11-10 23:00:46,349 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:46,622 INFO L134 CoverageAnalysis]: Checked inductivity of 3622 backedges. 2528 proven. 350 refuted. 0 times theorem prover too weak. 744 trivial. 0 not checked. [2024-11-10 23:00:46,623 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [866407930] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:46,623 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:46,623 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 17] total 35 [2024-11-10 23:00:46,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1776772396] [2024-11-10 23:00:46,623 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:46,624 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:46,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:46,624 INFO L85 PathProgramCache]: Analyzing trace with hash 43657, now seen corresponding path program 5 times [2024-11-10 23:00:46,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:46,625 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095735197] [2024-11-10 23:00:46,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:46,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:46,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:46,629 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:46,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:46,631 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:46,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:46,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-10 23:00:46,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=235, Invalid=955, Unknown=0, NotChecked=0, Total=1190 [2024-11-10 23:00:46,666 INFO L87 Difference]: Start difference. First operand 166 states and 173 transitions. cyclomatic complexity: 14 Second operand has 35 states, 35 states have (on average 3.0285714285714285) internal successors, (106), 35 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:47,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:47,220 INFO L93 Difference]: Finished difference Result 207 states and 216 transitions. [2024-11-10 23:00:47,220 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 207 states and 216 transitions. [2024-11-10 23:00:47,222 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:47,223 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 207 states to 203 states and 212 transitions. [2024-11-10 23:00:47,223 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-10 23:00:47,223 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-10 23:00:47,223 INFO L73 IsDeterministic]: Start isDeterministic. Operand 203 states and 212 transitions. [2024-11-10 23:00:47,223 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:00:47,223 INFO L218 hiAutomatonCegarLoop]: Abstraction has 203 states and 212 transitions. [2024-11-10 23:00:47,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states and 212 transitions. [2024-11-10 23:00:47,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 181. [2024-11-10 23:00:47,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 181 states, 181 states have (on average 1.0441988950276244) internal successors, (189), 180 states have internal predecessors, (189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:47,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 189 transitions. [2024-11-10 23:00:47,226 INFO L240 hiAutomatonCegarLoop]: Abstraction has 181 states and 189 transitions. [2024-11-10 23:00:47,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2024-11-10 23:00:47,227 INFO L425 stractBuchiCegarLoop]: Abstraction has 181 states and 189 transitions. [2024-11-10 23:00:47,227 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-10 23:00:47,227 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 181 states and 189 transitions. [2024-11-10 23:00:47,228 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:00:47,228 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:47,228 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:47,229 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [62, 52, 11, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-10 23:00:47,229 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:47,230 INFO L745 eck$LassoCheckResult]: Stem: 8829#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8830#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 8831#L26 assume true; 8844#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8822#L17 assume true; 8823#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9001#L17 assume true; 8999#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8837#L20-1 foo_#res#1 := foo_~i~0#1; 8838#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8840#L26 assume true; 8833#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8824#L17 assume true; 8825#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8843#L17 assume true; 9002#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9000#L17 assume true; 8998#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8997#L20-1 foo_#res#1 := foo_~i~0#1; 8996#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8995#L26 assume true; 8994#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8993#L17 assume true; 8992#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8991#L17 assume true; 8990#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8989#L17 assume true; 8988#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8987#L17 assume true; 8986#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8985#L20-1 foo_#res#1 := foo_~i~0#1; 8984#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8983#L26 assume true; 8982#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8981#L17 assume true; 8980#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8979#L17 assume true; 8978#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8977#L17 assume true; 8976#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8975#L17 assume true; 8974#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8973#L17 assume true; 8972#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8971#L20-1 foo_#res#1 := foo_~i~0#1; 8970#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8969#L26 assume true; 8968#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8967#L17 assume true; 8966#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8965#L17 assume true; 8964#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8963#L17 assume true; 8962#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8961#L17 assume true; 8960#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8959#L17 assume true; 8957#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8954#L17 assume true; 8952#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8950#L20-1 foo_#res#1 := foo_~i~0#1; 8948#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8946#L26 assume true; 8944#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8942#L17 assume true; 8941#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8940#L17 assume true; 8939#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8938#L17 assume true; 8937#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8936#L17 assume true; 8935#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8934#L17 assume true; 8933#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8932#L17 assume true; 8931#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8930#L17 assume true; 8929#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8928#L20-1 foo_#res#1 := foo_~i~0#1; 8927#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8926#L26 assume true; 8925#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8924#L17 assume true; 8923#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8922#L17 assume true; 8921#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8920#L17 assume true; 8919#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8918#L17 assume true; 8917#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8916#L17 assume true; 8915#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8914#L17 assume true; 8913#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8912#L17 assume true; 8911#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8910#L17 assume true; 8909#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8908#L20-1 foo_#res#1 := foo_~i~0#1; 8907#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8906#L26 assume true; 8905#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8904#L17 assume true; 8903#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8902#L17 assume true; 8901#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8900#L17 assume true; 8899#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8898#L17 assume true; 8897#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8896#L17 assume true; 8895#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8894#L17 assume true; 8893#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8892#L17 assume true; 8891#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8890#L17 assume true; 8889#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8888#L20-1 foo_#res#1 := foo_~i~0#1; 8887#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8886#L26 assume true; 8885#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8884#L17 assume true; 8849#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8883#L17 assume true; 8882#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8881#L17 assume true; 8880#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8879#L17 assume true; 8878#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8877#L17 assume true; 8876#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8875#L17 assume true; 8874#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8873#L17 assume true; 8861#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8860#L17 assume true; 8858#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8856#L20-1 foo_#res#1 := foo_~i~0#1; 8854#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8852#L26 assume true; 8850#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8848#L17 assume true; 8841#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8842#L17 assume true; 8872#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8871#L17 assume true; 8870#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8869#L17 assume true; 8868#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8867#L17 assume true; 8866#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8865#L17 assume true; 8864#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8863#L17 assume true; 8862#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8859#L17 assume true; 8857#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8855#L17 assume true; 8853#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8851#L17 assume true; 8847#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8846#L17 assume true; 8845#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 8835#L20-1 foo_#res#1 := foo_~i~0#1; 8836#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8839#L26 assume true; 8832#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 8826#L29-3 main_~i~1#1 := 0; 8827#L29 [2024-11-10 23:00:47,230 INFO L747 eck$LassoCheckResult]: Loop: 8827#L29 assume true; 8834#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 8828#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 8827#L29 [2024-11-10 23:00:47,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:47,231 INFO L85 PathProgramCache]: Analyzing trace with hash 1962679427, now seen corresponding path program 6 times [2024-11-10 23:00:47,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:47,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781540249] [2024-11-10 23:00:47,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:47,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:47,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:48,013 INFO L134 CoverageAnalysis]: Checked inductivity of 3982 backedges. 2374 proven. 206 refuted. 0 times theorem prover too weak. 1402 trivial. 0 not checked. [2024-11-10 23:00:48,013 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:48,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781540249] [2024-11-10 23:00:48,013 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1781540249] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:00:48,013 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1749448413] [2024-11-10 23:00:48,013 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-10 23:00:48,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:00:48,014 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:48,015 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:00:48,017 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2024-11-10 23:00:48,932 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2024-11-10 23:00:48,932 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 23:00:48,936 INFO L255 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-10 23:00:48,938 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 23:00:49,246 INFO L134 CoverageAnalysis]: Checked inductivity of 3982 backedges. 0 proven. 3592 refuted. 0 times theorem prover too weak. 390 trivial. 0 not checked. [2024-11-10 23:00:49,246 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 23:00:49,748 INFO L134 CoverageAnalysis]: Checked inductivity of 3982 backedges. 0 proven. 3592 refuted. 0 times theorem prover too weak. 390 trivial. 0 not checked. [2024-11-10 23:00:49,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1749448413] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 23:00:49,749 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 23:00:49,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 13, 13] total 41 [2024-11-10 23:00:49,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2031235273] [2024-11-10 23:00:49,749 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 23:00:49,750 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:49,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:49,750 INFO L85 PathProgramCache]: Analyzing trace with hash 43657, now seen corresponding path program 6 times [2024-11-10 23:00:49,751 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:49,751 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569840417] [2024-11-10 23:00:49,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:49,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:49,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:49,756 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:49,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:49,758 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:49,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:49,801 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2024-11-10 23:00:49,802 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=256, Invalid=1384, Unknown=0, NotChecked=0, Total=1640 [2024-11-10 23:00:49,802 INFO L87 Difference]: Start difference. First operand 181 states and 189 transitions. cyclomatic complexity: 15 Second operand has 41 states, 41 states have (on average 4.902439024390244) internal successors, (201), 41 states have internal predecessors, (201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:01:42,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:01:42,997 INFO L93 Difference]: Finished difference Result 859 states and 889 transitions. [2024-11-10 23:01:42,997 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 859 states and 889 transitions. [2024-11-10 23:01:43,003 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:01:43,008 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 859 states to 542 states and 560 transitions. [2024-11-10 23:01:43,008 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 80 [2024-11-10 23:01:43,008 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 80 [2024-11-10 23:01:43,008 INFO L73 IsDeterministic]: Start isDeterministic. Operand 542 states and 560 transitions. [2024-11-10 23:01:43,009 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 23:01:43,009 INFO L218 hiAutomatonCegarLoop]: Abstraction has 542 states and 560 transitions. [2024-11-10 23:01:43,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 542 states and 560 transitions. [2024-11-10 23:01:43,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 542 to 440. [2024-11-10 23:01:43,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 440 states, 440 states have (on average 1.0386363636363636) internal successors, (457), 439 states have internal predecessors, (457), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:01:43,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 440 states to 440 states and 457 transitions. [2024-11-10 23:01:43,015 INFO L240 hiAutomatonCegarLoop]: Abstraction has 440 states and 457 transitions. [2024-11-10 23:01:43,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 195 states. [2024-11-10 23:01:43,016 INFO L425 stractBuchiCegarLoop]: Abstraction has 440 states and 457 transitions. [2024-11-10 23:01:43,016 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-10 23:01:43,017 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 440 states and 457 transitions. [2024-11-10 23:01:43,018 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 23:01:43,018 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:01:43,018 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:01:43,024 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [172, 150, 23, 22, 22, 22, 22, 1, 1, 1, 1] [2024-11-10 23:01:43,024 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:01:43,025 INFO L745 eck$LassoCheckResult]: Stem: 11293#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11294#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 11296#L26 assume true; 11312#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11287#L17 assume true; 11288#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11725#L17 assume true; 11723#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11303#L20-1 foo_#res#1 := foo_~i~0#1; 11304#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11721#L26 assume true; 11298#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11299#L17 assume true; 11310#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11289#L17 assume true; 11290#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11726#L17 assume true; 11724#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11722#L20-1 foo_#res#1 := foo_~i~0#1; 11311#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11306#L26 assume true; 11307#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11720#L17 assume true; 11719#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11718#L17 assume true; 11717#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11716#L17 assume true; 11715#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11714#L17 assume true; 11713#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11712#L20-1 foo_#res#1 := foo_~i~0#1; 11711#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11710#L26 assume true; 11709#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11708#L17 assume true; 11707#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11706#L17 assume true; 11705#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11704#L17 assume true; 11703#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11702#L17 assume true; 11701#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11700#L17 assume true; 11699#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11698#L20-1 foo_#res#1 := foo_~i~0#1; 11697#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11696#L26 assume true; 11695#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11694#L17 assume true; 11693#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11692#L17 assume true; 11691#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11690#L17 assume true; 11689#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11688#L17 assume true; 11687#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11686#L17 assume true; 11685#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11684#L17 assume true; 11683#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11682#L20-1 foo_#res#1 := foo_~i~0#1; 11681#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11680#L26 assume true; 11679#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11678#L17 assume true; 11677#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11676#L17 assume true; 11675#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11674#L17 assume true; 11673#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11672#L17 assume true; 11671#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11670#L17 assume true; 11669#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11668#L17 assume true; 11667#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11666#L17 assume true; 11665#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11664#L20-1 foo_#res#1 := foo_~i~0#1; 11663#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11662#L26 assume true; 11661#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11660#L17 assume true; 11659#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11658#L17 assume true; 11657#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11656#L17 assume true; 11655#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11654#L17 assume true; 11653#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11652#L17 assume true; 11651#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11650#L17 assume true; 11649#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11648#L17 assume true; 11647#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11646#L17 assume true; 11645#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11644#L20-1 foo_#res#1 := foo_~i~0#1; 11643#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11642#L26 assume true; 11641#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11640#L17 assume true; 11639#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11638#L17 assume true; 11637#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11636#L17 assume true; 11635#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11634#L17 assume true; 11633#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11632#L17 assume true; 11631#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11630#L17 assume true; 11629#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11628#L17 assume true; 11627#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11626#L17 assume true; 11625#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11624#L17 assume true; 11623#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11622#L20-1 foo_#res#1 := foo_~i~0#1; 11621#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11620#L26 assume true; 11619#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11618#L17 assume true; 11617#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11616#L17 assume true; 11615#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11614#L17 assume true; 11613#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11612#L17 assume true; 11611#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11610#L17 assume true; 11609#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11608#L17 assume true; 11607#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11606#L17 assume true; 11605#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11604#L17 assume true; 11603#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11602#L17 assume true; 11601#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11600#L20-1 foo_#res#1 := foo_~i~0#1; 11599#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11598#L26 assume true; 11597#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11596#L17 assume true; 11595#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11594#L17 assume true; 11593#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11592#L17 assume true; 11591#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11590#L17 assume true; 11589#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11588#L17 assume true; 11587#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11586#L17 assume true; 11585#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11584#L17 assume true; 11583#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11582#L17 assume true; 11581#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11580#L17 assume true; 11579#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11578#L20-1 foo_#res#1 := foo_~i~0#1; 11577#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11576#L26 assume true; 11575#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11574#L17 assume true; 11573#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11572#L17 assume true; 11571#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11570#L17 assume true; 11569#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11568#L17 assume true; 11567#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11566#L17 assume true; 11565#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11564#L17 assume true; 11563#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11562#L17 assume true; 11561#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11560#L17 assume true; 11559#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11558#L17 assume true; 11557#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11556#L20-1 foo_#res#1 := foo_~i~0#1; 11555#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11554#L26 assume true; 11553#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11552#L17 assume true; 11551#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11550#L17 assume true; 11549#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11548#L17 assume true; 11547#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11546#L17 assume true; 11545#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11544#L17 assume true; 11543#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11542#L17 assume true; 11541#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11540#L17 assume true; 11539#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11538#L17 assume true; 11537#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11536#L17 assume true; 11535#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11534#L20-1 foo_#res#1 := foo_~i~0#1; 11533#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11532#L26 assume true; 11531#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11530#L17 assume true; 11529#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11528#L17 assume true; 11527#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11526#L17 assume true; 11525#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11524#L17 assume true; 11523#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11522#L17 assume true; 11521#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11520#L17 assume true; 11519#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11518#L17 assume true; 11517#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11516#L17 assume true; 11515#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11514#L17 assume true; 11513#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11512#L20-1 foo_#res#1 := foo_~i~0#1; 11511#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11510#L26 assume true; 11509#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11508#L17 assume true; 11507#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11506#L17 assume true; 11505#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11504#L17 assume true; 11503#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11502#L17 assume true; 11501#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11500#L17 assume true; 11499#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11498#L17 assume true; 11497#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11496#L17 assume true; 11495#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11494#L17 assume true; 11493#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11492#L17 assume true; 11491#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11490#L20-1 foo_#res#1 := foo_~i~0#1; 11489#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11488#L26 assume true; 11487#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11486#L17 assume true; 11485#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11484#L17 assume true; 11483#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11482#L17 assume true; 11481#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11480#L17 assume true; 11479#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11478#L17 assume true; 11477#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11476#L17 assume true; 11475#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11474#L17 assume true; 11473#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11472#L17 assume true; 11471#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11470#L17 assume true; 11469#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11468#L20-1 foo_#res#1 := foo_~i~0#1; 11467#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11466#L26 assume true; 11465#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11464#L17 assume true; 11463#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11462#L17 assume true; 11461#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11460#L17 assume true; 11459#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11458#L17 assume true; 11457#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11456#L17 assume true; 11455#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11454#L17 assume true; 11453#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11452#L17 assume true; 11451#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11450#L17 assume true; 11449#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11448#L17 assume true; 11447#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11446#L20-1 foo_#res#1 := foo_~i~0#1; 11445#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11444#L26 assume true; 11443#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11442#L17 assume true; 11441#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11440#L17 assume true; 11439#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11438#L17 assume true; 11437#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11436#L17 assume true; 11435#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11434#L17 assume true; 11433#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11432#L17 assume true; 11431#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11430#L17 assume true; 11429#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11428#L17 assume true; 11427#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11426#L17 assume true; 11425#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11424#L20-1 foo_#res#1 := foo_~i~0#1; 11423#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11422#L26 assume true; 11421#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11420#L17 assume true; 11419#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11418#L17 assume true; 11417#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11416#L17 assume true; 11415#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11414#L17 assume true; 11413#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11412#L17 assume true; 11411#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11410#L17 assume true; 11409#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11408#L17 assume true; 11407#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11406#L17 assume true; 11405#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11404#L17 assume true; 11403#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11402#L20-1 foo_#res#1 := foo_~i~0#1; 11401#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11400#L26 assume true; 11399#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11398#L17 assume true; 11397#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11396#L17 assume true; 11395#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11394#L17 assume true; 11393#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11392#L17 assume true; 11391#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11390#L17 assume true; 11389#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11388#L17 assume true; 11387#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11386#L17 assume true; 11385#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11384#L17 assume true; 11383#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11382#L17 assume true; 11381#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11380#L20-1 foo_#res#1 := foo_~i~0#1; 11379#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11378#L26 assume true; 11377#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11376#L17 assume true; 11375#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11374#L17 assume true; 11373#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11372#L17 assume true; 11371#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11370#L17 assume true; 11369#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11368#L17 assume true; 11367#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11366#L17 assume true; 11365#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11364#L17 assume true; 11363#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11362#L17 assume true; 11361#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11360#L17 assume true; 11359#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11358#L20-1 foo_#res#1 := foo_~i~0#1; 11357#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11356#L26 assume true; 11355#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11354#L17 assume true; 11317#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11353#L17 assume true; 11352#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11351#L17 assume true; 11350#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11349#L17 assume true; 11348#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11347#L17 assume true; 11346#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11345#L17 assume true; 11344#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11343#L17 assume true; 11342#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11341#L17 assume true; 11340#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11339#L17 assume true; 11338#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11337#L20-1 foo_#res#1 := foo_~i~0#1; 11336#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11335#L26 assume true; 11318#L26-1 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11316#L17 assume true; 11308#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11309#L17 assume true; 11334#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11333#L17 assume true; 11332#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11331#L17 assume true; 11330#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11329#L17 assume true; 11328#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11327#L17 assume true; 11326#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11325#L17 assume true; 11324#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11323#L17 assume true; 11322#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11321#L17 assume true; 11320#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11319#L17 assume true; 11315#L17-1 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1;foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11314#L17 assume true; 11313#L17-1 assume !(foo_~i~0#1 <= foo_~size#1); 11301#L20-1 foo_#res#1 := foo_~i~0#1; 11302#L20 assume true;main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1;main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11305#L26 assume true; 11297#L26-1 assume !(main_~i~1#1 % 4294967296 < 32); 11295#L29-3 main_~i~1#1 := 0; 11292#L29 [2024-11-10 23:01:43,026 INFO L747 eck$LassoCheckResult]: Loop: 11292#L29 assume true; 11300#L29-2 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 11291#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1;main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 11292#L29 [2024-11-10 23:01:43,026 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:01:43,027 INFO L85 PathProgramCache]: Analyzing trace with hash 686993773, now seen corresponding path program 7 times [2024-11-10 23:01:43,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:01:43,027 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922899981] [2024-11-10 23:01:43,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:01:43,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:01:43,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:01:44,685 INFO L134 CoverageAnalysis]: Checked inductivity of 30380 backedges. 8974 proven. 264 refuted. 0 times theorem prover too weak. 21142 trivial. 0 not checked. [2024-11-10 23:01:44,687 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:01:44,688 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922899981] [2024-11-10 23:01:44,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [922899981] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 23:01:44,688 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [794138483] [2024-11-10 23:01:44,688 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-10 23:01:44,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 23:01:44,688 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:01:44,690 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 23:01:44,691 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2024-11-10 23:01:45,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:01:45,200 INFO L255 TraceCheckSpWp]: Trace formula consists of 2493 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-11-10 23:01:45,206 INFO L278 TraceCheckSpWp]: Computing forward predicates...