./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-restricted-15/NarrowKonv.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 023d838f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-restricted-15/NarrowKonv.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2c8d79b985e49ac5d6f27b4e25f4e3597dadc4ec57e262caec7782b796e874b7 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-023d838-m [2024-11-10 22:34:34,302 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-10 22:34:34,400 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-10 22:34:34,406 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-10 22:34:34,407 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-10 22:34:34,408 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2024-11-10 22:34:34,428 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-10 22:34:34,429 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-10 22:34:34,429 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-10 22:34:34,431 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-10 22:34:34,431 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-10 22:34:34,432 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-10 22:34:34,433 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-10 22:34:34,435 INFO L153 SettingsManager]: * Use SBE=true [2024-11-10 22:34:34,435 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-10 22:34:34,436 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-10 22:34:34,436 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-10 22:34:34,436 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-10 22:34:34,436 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-10 22:34:34,437 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-10 22:34:34,437 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-10 22:34:34,438 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-10 22:34:34,438 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-10 22:34:34,442 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-10 22:34:34,442 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-10 22:34:34,442 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-10 22:34:34,443 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-10 22:34:34,443 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-10 22:34:34,443 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-10 22:34:34,443 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-10 22:34:34,444 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-10 22:34:34,444 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-10 22:34:34,444 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-10 22:34:34,444 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-10 22:34:34,445 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-10 22:34:34,445 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-10 22:34:34,445 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-10 22:34:34,446 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2c8d79b985e49ac5d6f27b4e25f4e3597dadc4ec57e262caec7782b796e874b7 [2024-11-10 22:34:34,708 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-10 22:34:34,731 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-10 22:34:34,735 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-10 22:34:34,737 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-10 22:34:34,737 INFO L274 PluginConnector]: CDTParser initialized [2024-11-10 22:34:34,739 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-restricted-15/NarrowKonv.c [2024-11-10 22:34:36,255 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-10 22:34:36,428 INFO L384 CDTParser]: Found 1 translation units. [2024-11-10 22:34:36,429 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-restricted-15/NarrowKonv.c [2024-11-10 22:34:36,435 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdf7e2a0a/d26242a3484b49a08d34c1136fa2235f/FLAG3dae7f626 [2024-11-10 22:34:36,449 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/cdf7e2a0a/d26242a3484b49a08d34c1136fa2235f [2024-11-10 22:34:36,452 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-10 22:34:36,453 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-10 22:34:36,455 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-10 22:34:36,455 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-10 22:34:36,461 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-10 22:34:36,462 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,463 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b4c7786 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36, skipping insertion in model container [2024-11-10 22:34:36,463 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,483 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-10 22:34:36,670 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 22:34:36,677 INFO L200 MainTranslator]: Completed pre-run [2024-11-10 22:34:36,690 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 22:34:36,707 INFO L204 MainTranslator]: Completed translation [2024-11-10 22:34:36,707 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36 WrapperNode [2024-11-10 22:34:36,708 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-10 22:34:36,710 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-10 22:34:36,710 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-10 22:34:36,710 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-10 22:34:36,717 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,720 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,736 INFO L138 Inliner]: procedures = 4, calls = 2, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 18 [2024-11-10 22:34:36,737 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-10 22:34:36,737 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-10 22:34:36,738 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-10 22:34:36,738 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-10 22:34:36,747 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,747 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,748 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,752 INFO L175 MemorySlicer]: No memory access in input program. [2024-11-10 22:34:36,752 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,753 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,754 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,754 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,755 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,755 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,757 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-10 22:34:36,758 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-11-10 22:34:36,758 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-11-10 22:34:36,758 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-11-10 22:34:36,759 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (1/1) ... [2024-11-10 22:34:36,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:36,776 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:36,798 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:36,807 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-10 22:34:36,854 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-10 22:34:36,855 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-10 22:34:36,933 INFO L256 CfgBuilder]: Building ICFG [2024-11-10 22:34:36,936 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-10 22:34:37,017 INFO L? ?]: Removed 4 outVars from TransFormulas that were not future-live. [2024-11-10 22:34:37,017 INFO L307 CfgBuilder]: Performing block encoding [2024-11-10 22:34:37,033 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-10 22:34:37,034 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-10 22:34:37,034 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 10:34:37 BoogieIcfgContainer [2024-11-10 22:34:37,034 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-11-10 22:34:37,036 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-10 22:34:37,036 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-10 22:34:37,040 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-10 22:34:37,041 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 22:34:37,042 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.11 10:34:36" (1/3) ... [2024-11-10 22:34:37,044 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@bace421 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 10:34:37, skipping insertion in model container [2024-11-10 22:34:37,045 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 22:34:37,045 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 10:34:36" (2/3) ... [2024-11-10 22:34:37,045 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@bace421 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 10:34:37, skipping insertion in model container [2024-11-10 22:34:37,045 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 22:34:37,046 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 10:34:37" (3/3) ... [2024-11-10 22:34:37,047 INFO L332 chiAutomizerObserver]: Analyzing ICFG NarrowKonv.c [2024-11-10 22:34:37,118 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-10 22:34:37,118 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-10 22:34:37,119 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-10 22:34:37,119 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-10 22:34:37,119 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-10 22:34:37,120 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-10 22:34:37,120 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-10 22:34:37,120 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-10 22:34:37,126 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:37,144 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-10 22:34:37,144 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:37,144 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:37,149 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 22:34:37,150 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:37,150 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-10 22:34:37,150 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:37,151 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-10 22:34:37,151 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:37,151 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:37,152 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 22:34:37,152 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:37,158 INFO L745 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true; 8#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 9#L11true [2024-11-10 22:34:37,159 INFO L747 eck$LassoCheckResult]: Loop: 9#L11true assume true; 5#L11-1true assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 10#L12true assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 9#L11true [2024-11-10 22:34:37,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:37,165 INFO L85 PathProgramCache]: Analyzing trace with hash 1344, now seen corresponding path program 1 times [2024-11-10 22:34:37,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:37,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948608139] [2024-11-10 22:34:37,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:37,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:37,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,250 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:37,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,270 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:37,274 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:37,275 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 1 times [2024-11-10 22:34:37,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:37,275 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1871494714] [2024-11-10 22:34:37,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:37,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:37,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,289 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:37,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,293 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:37,295 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:37,295 INFO L85 PathProgramCache]: Analyzing trace with hash 40048007, now seen corresponding path program 1 times [2024-11-10 22:34:37,295 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:37,296 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159974432] [2024-11-10 22:34:37,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:37,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:37,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:37,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:37,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:37,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159974432] [2024-11-10 22:34:37,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159974432] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 22:34:37,383 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 22:34:37,384 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-10 22:34:37,384 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128982558] [2024-11-10 22:34:37,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 22:34:37,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:37,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-10 22:34:37,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-10 22:34:37,468 INFO L87 Difference]: Start difference. First operand has 10 states, 9 states have (on average 1.4444444444444444) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 2 states have (on average 2.5) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:37,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:37,504 INFO L93 Difference]: Finished difference Result 14 states and 18 transitions. [2024-11-10 22:34:37,520 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 18 transitions. [2024-11-10 22:34:37,523 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-10 22:34:37,534 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 10 states and 13 transitions. [2024-11-10 22:34:37,537 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2024-11-10 22:34:37,538 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2024-11-10 22:34:37,539 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 13 transitions. [2024-11-10 22:34:37,539 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 22:34:37,540 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-10 22:34:37,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 13 transitions. [2024-11-10 22:34:37,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-11-10 22:34:37,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 9 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:37,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 13 transitions. [2024-11-10 22:34:37,574 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-10 22:34:37,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-10 22:34:37,583 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 13 transitions. [2024-11-10 22:34:37,583 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-10 22:34:37,584 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 13 transitions. [2024-11-10 22:34:37,584 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-10 22:34:37,584 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:37,584 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:37,585 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 22:34:37,585 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-10 22:34:37,585 INFO L745 eck$LassoCheckResult]: Stem: 40#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 41#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 39#L11 [2024-11-10 22:34:37,585 INFO L747 eck$LassoCheckResult]: Loop: 39#L11 assume true; 35#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 36#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 37#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 39#L11 [2024-11-10 22:34:37,586 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:37,586 INFO L85 PathProgramCache]: Analyzing trace with hash 1344, now seen corresponding path program 2 times [2024-11-10 22:34:37,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:37,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793621609] [2024-11-10 22:34:37,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:37,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:37,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,596 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:37,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,600 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:37,600 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:37,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1199487, now seen corresponding path program 1 times [2024-11-10 22:34:37,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:37,601 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682573847] [2024-11-10 22:34:37,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:37,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:37,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,612 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:37,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,619 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:37,620 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:37,620 INFO L85 PathProgramCache]: Analyzing trace with hash 1241488190, now seen corresponding path program 1 times [2024-11-10 22:34:37,620 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:37,621 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555774135] [2024-11-10 22:34:37,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:37,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:37,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,629 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:37,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:37,636 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:37,710 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:37,711 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:37,711 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:37,711 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:37,715 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-10 22:34:37,715 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:37,716 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:37,716 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:37,716 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration2_Loop [2024-11-10 22:34:37,716 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:37,716 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:37,733 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:37,744 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:37,749 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:37,849 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:37,852 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-11-10 22:34:37,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:37,855 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:37,857 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:37,860 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-11-10 22:34:37,862 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:37,862 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:37,886 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-11-10 22:34:37,886 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_1=1} Honda state: {v_rep~unnamed0~0~true_1=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-11-10 22:34:37,898 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-11-10 22:34:37,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:37,898 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:37,900 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:37,903 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-10 22:34:37,904 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:37,904 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:37,929 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-11-10 22:34:37,929 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_1=0} Honda state: {v_rep~unnamed0~0~false_1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-11-10 22:34:37,945 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2024-11-10 22:34:37,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:37,946 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:37,949 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:37,951 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-10 22:34:37,952 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:37,952 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:37,988 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-10 22:34:37,988 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:37,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:37,991 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:37,995 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-10 22:34:37,996 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-11-10 22:34:37,996 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:38,059 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-11-10 22:34:38,065 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-11-10 22:34:38,066 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:38,066 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:38,066 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:38,066 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:38,066 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 22:34:38,067 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:38,067 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:38,067 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:38,067 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration2_Loop [2024-11-10 22:34:38,067 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:38,067 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:38,069 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:38,075 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:38,079 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:38,158 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:38,162 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 22:34:38,164 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:38,164 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:38,166 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:38,168 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-10 22:34:38,170 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:38,183 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:38,183 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:38,183 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:38,184 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:38,188 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 22:34:38,188 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 22:34:38,196 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 22:34:38,211 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:38,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:38,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:38,212 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:38,213 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-10 22:34:38,214 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:38,225 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:38,226 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:38,226 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:38,226 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:38,229 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 22:34:38,229 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 22:34:38,237 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 22:34:38,253 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-11-10 22:34:38,254 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:38,255 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:38,257 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:38,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-10 22:34:38,259 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:38,272 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:38,272 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 22:34:38,273 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:38,273 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:38,273 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:38,275 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 22:34:38,275 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 22:34:38,278 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 22:34:38,285 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2024-11-10 22:34:38,285 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 0 variables to zero. [2024-11-10 22:34:38,287 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:38,287 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:38,291 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:38,298 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 22:34:38,298 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2024-11-10 22:34:38,298 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 22:34:38,299 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0#1, ULTIMATE.start_main_~i~0#1) = 1*ULTIMATE.start_main_~range~0#1 - 1*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-11-10 22:34:38,299 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-10 22:34:38,312 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-11-10 22:34:38,316 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2024-11-10 22:34:38,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:38,357 INFO L255 TraceCheckSpWp]: Trace formula consists of 5 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 22:34:38,358 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:38,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:38,375 WARN L253 TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 22:34:38,376 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:38,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:38,418 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-10 22:34:38,419 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 10 states and 13 transitions. cyclomatic complexity: 5 Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:38,467 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 10 states and 13 transitions. cyclomatic complexity: 5. Second operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 14 states and 18 transitions. Complement of second has 7 states. [2024-11-10 22:34:38,469 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-10 22:34:38,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 1.5) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:38,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 6 transitions. [2024-11-10 22:34:38,472 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 6 transitions. Stem has 2 letters. Loop has 4 letters. [2024-11-10 22:34:38,473 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:38,473 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 6 transitions. Stem has 6 letters. Loop has 4 letters. [2024-11-10 22:34:38,473 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:38,473 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 6 transitions. Stem has 2 letters. Loop has 8 letters. [2024-11-10 22:34:38,474 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:38,474 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 18 transitions. [2024-11-10 22:34:38,475 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-10 22:34:38,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 18 transitions. [2024-11-10 22:34:38,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-11-10 22:34:38,476 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2024-11-10 22:34:38,476 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 18 transitions. [2024-11-10 22:34:38,476 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:38,476 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 18 transitions. [2024-11-10 22:34:38,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 18 transitions. [2024-11-10 22:34:38,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2024-11-10 22:34:38,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 13 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:38,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 18 transitions. [2024-11-10 22:34:38,481 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 18 transitions. [2024-11-10 22:34:38,481 INFO L425 stractBuchiCegarLoop]: Abstraction has 14 states and 18 transitions. [2024-11-10 22:34:38,481 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-10 22:34:38,481 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 18 transitions. [2024-11-10 22:34:38,482 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-10 22:34:38,482 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:38,482 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:38,486 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-10 22:34:38,486 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:38,487 INFO L745 eck$LassoCheckResult]: Stem: 108#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 109#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 110#L11 assume true; 100#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 101#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 104#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 105#L11 [2024-11-10 22:34:38,487 INFO L747 eck$LassoCheckResult]: Loop: 105#L11 assume true; 111#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 113#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 105#L11 [2024-11-10 22:34:38,487 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,487 INFO L85 PathProgramCache]: Analyzing trace with hash 1241488189, now seen corresponding path program 1 times [2024-11-10 22:34:38,487 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:38,488 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2010737971] [2024-11-10 22:34:38,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:38,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,501 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:38,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,506 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:38,507 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,507 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 2 times [2024-11-10 22:34:38,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:38,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487858817] [2024-11-10 22:34:38,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:38,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,512 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:38,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,516 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:38,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,517 INFO L85 PathProgramCache]: Analyzing trace with hash 1211261546, now seen corresponding path program 1 times [2024-11-10 22:34:38,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:38,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962419054] [2024-11-10 22:34:38,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:38,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:38,575 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:38,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:38,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962419054] [2024-11-10 22:34:38,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [962419054] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:38,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1143228751] [2024-11-10 22:34:38,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:38,580 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:38,583 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:38,584 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-10 22:34:38,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:38,617 INFO L255 TraceCheckSpWp]: Trace formula consists of 22 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-10 22:34:38,618 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:38,686 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:38,687 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:38,726 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:38,726 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1143228751] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:38,726 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:38,727 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2024-11-10 22:34:38,727 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2013089293] [2024-11-10 22:34:38,727 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:38,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:38,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-10 22:34:38,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2024-11-10 22:34:38,751 INFO L87 Difference]: Start difference. First operand 14 states and 18 transitions. cyclomatic complexity: 6 Second operand has 7 states, 6 states have (on average 3.5) internal successors, (21), 7 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:38,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:38,818 INFO L93 Difference]: Finished difference Result 30 states and 35 transitions. [2024-11-10 22:34:38,818 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 35 transitions. [2024-11-10 22:34:38,820 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-10 22:34:38,821 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 30 states and 35 transitions. [2024-11-10 22:34:38,822 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 [2024-11-10 22:34:38,823 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2024-11-10 22:34:38,823 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 35 transitions. [2024-11-10 22:34:38,823 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:38,824 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 35 transitions. [2024-11-10 22:34:38,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 35 transitions. [2024-11-10 22:34:38,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2024-11-10 22:34:38,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.1666666666666667) internal successors, (35), 29 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:38,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 35 transitions. [2024-11-10 22:34:38,828 INFO L240 hiAutomatonCegarLoop]: Abstraction has 30 states and 35 transitions. [2024-11-10 22:34:38,828 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-10 22:34:38,829 INFO L425 stractBuchiCegarLoop]: Abstraction has 30 states and 35 transitions. [2024-11-10 22:34:38,830 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-10 22:34:38,830 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 35 transitions. [2024-11-10 22:34:38,831 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-10 22:34:38,832 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:38,833 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:38,833 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 1, 1, 1] [2024-11-10 22:34:38,833 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-10 22:34:38,833 INFO L745 eck$LassoCheckResult]: Stem: 214#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 215#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 216#L11 assume true; 218#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 235#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 219#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 217#L11 assume true; 210#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 211#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 206#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 207#L11 assume true; 234#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 232#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 222#L11 [2024-11-10 22:34:38,834 INFO L747 eck$LassoCheckResult]: Loop: 222#L11 assume true; 230#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 228#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 220#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 222#L11 [2024-11-10 22:34:38,834 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,834 INFO L85 PathProgramCache]: Analyzing trace with hash -177976519, now seen corresponding path program 1 times [2024-11-10 22:34:38,834 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:38,835 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030596506] [2024-11-10 22:34:38,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:38,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,854 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:38,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,865 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:38,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,869 INFO L85 PathProgramCache]: Analyzing trace with hash 1199487, now seen corresponding path program 2 times [2024-11-10 22:34:38,869 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:38,869 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683260376] [2024-11-10 22:34:38,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:38,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,873 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:38,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,881 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:38,881 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:38,881 INFO L85 PathProgramCache]: Analyzing trace with hash -949076809, now seen corresponding path program 2 times [2024-11-10 22:34:38,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:38,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843317912] [2024-11-10 22:34:38,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:38,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:38,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,890 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:38,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:38,899 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:38,936 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:38,936 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:38,936 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:38,936 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:38,936 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-10 22:34:38,936 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:38,937 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:38,937 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:38,937 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration4_Loop [2024-11-10 22:34:38,937 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:38,937 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:38,938 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:38,941 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:38,944 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,003 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:39,003 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-11-10 22:34:39,003 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,004 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,005 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,007 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-10 22:34:39,008 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:39,008 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,032 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-11-10 22:34:39,032 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_3=0} Honda state: {v_rep~unnamed0~0~false_3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-11-10 22:34:39,047 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:39,047 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,047 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,048 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,049 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-10 22:34:39,050 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:39,050 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,068 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-11-10 22:34:39,068 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_3=1} Honda state: {v_rep~unnamed0~0~true_3=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-11-10 22:34:39,078 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-11-10 22:34:39,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,080 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,081 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-10 22:34:39,081 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:39,081 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,104 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:39,104 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,105 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,106 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,107 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-10 22:34:39,107 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-11-10 22:34:39,107 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,162 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-11-10 22:34:39,168 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-10 22:34:39,168 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:39,168 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:39,168 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:39,168 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:39,168 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 22:34:39,169 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,169 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:39,169 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:39,169 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration4_Loop [2024-11-10 22:34:39,169 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:39,169 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:39,170 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,174 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,183 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,239 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:39,239 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 22:34:39,239 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,239 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,241 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,242 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-11-10 22:34:39,244 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:39,256 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:39,256 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:39,256 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:39,256 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:39,260 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-10 22:34:39,260 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-10 22:34:39,264 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-10 22:34:39,279 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-11-10 22:34:39,280 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,280 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,282 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-11-10 22:34:39,286 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:39,297 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:39,297 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 22:34:39,297 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:39,297 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:39,297 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:39,298 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 22:34:39,298 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 22:34:39,301 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 22:34:39,304 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2024-11-10 22:34:39,304 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 0 variables to zero. [2024-11-10 22:34:39,304 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,304 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,306 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,308 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-11-10 22:34:39,308 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 22:34:39,308 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2024-11-10 22:34:39,308 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 22:34:39,309 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0#1, ULTIMATE.start_main_~i~0#1) = 1*ULTIMATE.start_main_~range~0#1 - 1*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-11-10 22:34:39,323 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:39,325 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2024-11-10 22:34:39,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:39,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:39,352 INFO L255 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 22:34:39,352 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:39,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:39,387 WARN L253 TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 22:34:39,387 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:39,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:39,415 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-10 22:34:39,415 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 30 states and 35 transitions. cyclomatic complexity: 8 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:39,442 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 30 states and 35 transitions. cyclomatic complexity: 8. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 60 states and 66 transitions. Complement of second has 7 states. [2024-11-10 22:34:39,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-10 22:34:39,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:39,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2024-11-10 22:34:39,445 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 14 letters. Loop has 4 letters. [2024-11-10 22:34:39,445 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:39,445 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 18 letters. Loop has 4 letters. [2024-11-10 22:34:39,446 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:39,446 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 14 letters. Loop has 8 letters. [2024-11-10 22:34:39,446 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:39,446 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 60 states and 66 transitions. [2024-11-10 22:34:39,451 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-10 22:34:39,453 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 60 states to 51 states and 57 transitions. [2024-11-10 22:34:39,454 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2024-11-10 22:34:39,454 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 37 [2024-11-10 22:34:39,454 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 57 transitions. [2024-11-10 22:34:39,454 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:39,454 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 57 transitions. [2024-11-10 22:34:39,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 57 transitions. [2024-11-10 22:34:39,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 45. [2024-11-10 22:34:39,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.1333333333333333) internal successors, (51), 44 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:39,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 51 transitions. [2024-11-10 22:34:39,459 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 51 transitions. [2024-11-10 22:34:39,460 INFO L425 stractBuchiCegarLoop]: Abstraction has 45 states and 51 transitions. [2024-11-10 22:34:39,460 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-10 22:34:39,460 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 51 transitions. [2024-11-10 22:34:39,461 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-10 22:34:39,461 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:39,461 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:39,462 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 1, 1, 1] [2024-11-10 22:34:39,462 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-10 22:34:39,462 INFO L745 eck$LassoCheckResult]: Stem: 373#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 374#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 383#L11 assume true; 386#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 417#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 381#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 382#L11 assume true; 375#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 376#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 387#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 384#L11 assume true; 385#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 416#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 379#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 380#L11 assume true; 413#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 411#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 409#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 399#L11 [2024-11-10 22:34:39,462 INFO L747 eck$LassoCheckResult]: Loop: 399#L11 assume true; 407#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 405#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 397#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 399#L11 [2024-11-10 22:34:39,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:39,463 INFO L85 PathProgramCache]: Analyzing trace with hash 564974647, now seen corresponding path program 3 times [2024-11-10 22:34:39,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:39,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777469191] [2024-11-10 22:34:39,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:39,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:39,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:39,474 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:39,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:39,481 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:39,482 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:39,482 INFO L85 PathProgramCache]: Analyzing trace with hash 1199487, now seen corresponding path program 3 times [2024-11-10 22:34:39,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:39,482 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527486477] [2024-11-10 22:34:39,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:39,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:39,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:39,486 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:39,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:39,489 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:39,490 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:39,490 INFO L85 PathProgramCache]: Analyzing trace with hash 439228085, now seen corresponding path program 4 times [2024-11-10 22:34:39,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:39,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434118335] [2024-11-10 22:34:39,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:39,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:39,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:39,499 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:39,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:39,506 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:39,538 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:39,538 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:39,538 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:39,538 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:39,538 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-10 22:34:39,539 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,539 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:39,539 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:39,539 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration5_Loop [2024-11-10 22:34:39,539 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:39,539 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:39,540 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,543 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,552 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,597 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:39,597 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-11-10 22:34:39,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,598 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,599 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,601 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-11-10 22:34:39,601 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:39,601 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,619 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2024-11-10 22:34:39,619 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_5=1} Honda state: {v_rep~unnamed0~0~true_5=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2024-11-10 22:34:39,631 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:39,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,633 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,633 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-11-10 22:34:39,634 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:39,634 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,656 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2024-11-10 22:34:39,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,657 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-11-10 22:34:39,660 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-11-10 22:34:39,660 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:39,702 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-11-10 22:34:39,707 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:39,707 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:39,707 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:39,707 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:39,707 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:39,707 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 22:34:39,707 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,707 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:39,708 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:39,708 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration5_Loop [2024-11-10 22:34:39,708 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:39,708 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:39,709 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,722 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,726 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:39,771 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:39,771 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 22:34:39,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,772 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,773 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,775 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-10 22:34:39,775 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:39,788 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:39,788 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 22:34:39,789 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:39,789 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:39,789 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:39,790 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 22:34:39,790 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 22:34:39,792 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 22:34:39,797 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2024-11-10 22:34:39,797 INFO L444 ModelExtractionUtils]: 0 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2024-11-10 22:34:39,797 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:39,797 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:39,799 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:39,800 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-11-10 22:34:39,801 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 22:34:39,801 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2024-11-10 22:34:39,802 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 22:34:39,802 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~range~0#1) = -1*ULTIMATE.start_main_~i~0#1 + 1*ULTIMATE.start_main_~range~0#1 Supporting invariants [] [2024-11-10 22:34:39,814 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2024-11-10 22:34:39,815 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2024-11-10 22:34:39,828 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:39,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:39,838 INFO L255 TraceCheckSpWp]: Trace formula consists of 36 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 22:34:39,839 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:39,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:39,871 WARN L253 TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 22:34:39,872 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:39,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:39,902 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-10 22:34:39,902 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 45 states and 51 transitions. cyclomatic complexity: 10 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:39,925 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 45 states and 51 transitions. cyclomatic complexity: 10. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 60 states and 67 transitions. Complement of second has 7 states. [2024-11-10 22:34:39,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-10 22:34:39,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:39,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2024-11-10 22:34:39,927 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 18 letters. Loop has 4 letters. [2024-11-10 22:34:39,927 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:39,927 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-10 22:34:39,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:39,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:39,955 INFO L255 TraceCheckSpWp]: Trace formula consists of 36 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 22:34:39,955 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:39,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:39,992 WARN L253 TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 22:34:39,992 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:40,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:40,016 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-10 22:34:40,016 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 45 states and 51 transitions. cyclomatic complexity: 10 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:40,036 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 45 states and 51 transitions. cyclomatic complexity: 10. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 60 states and 67 transitions. Complement of second has 7 states. [2024-11-10 22:34:40,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-10 22:34:40,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:40,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2024-11-10 22:34:40,038 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 18 letters. Loop has 4 letters. [2024-11-10 22:34:40,038 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:40,038 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-10 22:34:40,051 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:40,106 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-11-10 22:34:40,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:40,138 INFO L255 TraceCheckSpWp]: Trace formula consists of 36 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 22:34:40,140 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-11-10 22:34:40,141 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:40,159 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2024-11-10 22:34:40,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:40,214 WARN L253 TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-10 22:34:40,215 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:40,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:40,239 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-10 22:34:40,239 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 45 states and 51 transitions. cyclomatic complexity: 10 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:40,265 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 45 states and 51 transitions. cyclomatic complexity: 10. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 78 states and 89 transitions. Complement of second has 6 states. [2024-11-10 22:34:40,265 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-10 22:34:40,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:40,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 16 transitions. [2024-11-10 22:34:40,266 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 18 letters. Loop has 4 letters. [2024-11-10 22:34:40,267 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:40,267 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 22 letters. Loop has 4 letters. [2024-11-10 22:34:40,267 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:40,267 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 16 transitions. Stem has 18 letters. Loop has 8 letters. [2024-11-10 22:34:40,267 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:40,268 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 78 states and 89 transitions. [2024-11-10 22:34:40,269 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2024-11-10 22:34:40,270 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 78 states to 63 states and 73 transitions. [2024-11-10 22:34:40,270 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2024-11-10 22:34:40,270 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2024-11-10 22:34:40,270 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 73 transitions. [2024-11-10 22:34:40,270 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:40,270 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 73 transitions. [2024-11-10 22:34:40,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 73 transitions. [2024-11-10 22:34:40,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 40. [2024-11-10 22:34:40,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.225) internal successors, (49), 39 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:40,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 49 transitions. [2024-11-10 22:34:40,274 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 49 transitions. [2024-11-10 22:34:40,274 INFO L425 stractBuchiCegarLoop]: Abstraction has 40 states and 49 transitions. [2024-11-10 22:34:40,274 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-10 22:34:40,274 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 49 transitions. [2024-11-10 22:34:40,274 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 14 [2024-11-10 22:34:40,275 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:40,275 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:40,275 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 3, 2, 1, 1] [2024-11-10 22:34:40,275 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 2, 1, 1] [2024-11-10 22:34:40,275 INFO L745 eck$LassoCheckResult]: Stem: 860#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 861#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 862#L11 assume true; 865#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 891#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 890#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 863#L11 assume true; 852#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 853#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 856#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 857#L11 assume true; 854#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 855#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 858#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 859#L11 assume true; 887#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 884#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 883#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 878#L11 assume true; 879#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 875#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 873#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 871#L11 [2024-11-10 22:34:40,275 INFO L747 eck$LassoCheckResult]: Loop: 871#L11 assume true; 872#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 885#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 880#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 881#L11 assume true; 876#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 877#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 882#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 871#L11 [2024-11-10 22:34:40,276 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:40,276 INFO L85 PathProgramCache]: Analyzing trace with hash -1208408140, now seen corresponding path program 5 times [2024-11-10 22:34:40,276 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:40,276 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [618177072] [2024-11-10 22:34:40,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:40,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:40,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:40,388 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 16 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:40,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:40,389 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [618177072] [2024-11-10 22:34:40,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [618177072] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:40,389 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1052863349] [2024-11-10 22:34:40,389 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-10 22:34:40,389 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:40,389 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:40,391 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:40,393 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-11-10 22:34:40,422 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-11-10 22:34:40,423 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:40,424 INFO L255 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-10 22:34:40,425 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:40,501 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 16 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:40,502 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:40,564 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 16 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:40,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1052863349] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:40,564 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:40,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 13 [2024-11-10 22:34:40,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694369772] [2024-11-10 22:34:40,565 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:40,565 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:40,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:40,565 INFO L85 PathProgramCache]: Analyzing trace with hash -350776196, now seen corresponding path program 1 times [2024-11-10 22:34:40,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:40,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399611446] [2024-11-10 22:34:40,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:40,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:40,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:40,570 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:40,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:40,573 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:40,626 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:40,627 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:40,627 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:40,627 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:40,627 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-10 22:34:40,627 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:40,627 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:40,627 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:40,627 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration6_Loop [2024-11-10 22:34:40,627 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:40,628 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:40,628 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:40,638 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:40,641 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:40,702 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:40,702 INFO L365 LassoAnalysis]: Checking for nontermination... [2024-11-10 22:34:40,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:40,703 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:40,704 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:40,706 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-11-10 22:34:40,707 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2024-11-10 22:34:40,707 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:40,735 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:40,736 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:40,736 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:40,737 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:40,738 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-11-10 22:34:40,740 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2024-11-10 22:34:40,740 INFO L160 nArgumentSynthesizer]: Using integer mode. [2024-11-10 22:34:40,838 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2024-11-10 22:34:40,843 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:40,844 INFO L204 LassoAnalysis]: Preferences: [2024-11-10 22:34:40,844 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-10 22:34:40,844 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-10 22:34:40,844 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-10 22:34:40,844 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-10 22:34:40,844 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:40,844 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-10 22:34:40,844 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-10 22:34:40,844 INFO L132 ssoRankerPreferences]: Filename of dumped script: NarrowKonv.c_Iteration6_Loop [2024-11-10 22:34:40,844 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-10 22:34:40,844 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-10 22:34:40,845 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:40,856 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:40,860 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-10 22:34:40,921 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-10 22:34:40,921 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-10 22:34:40,921 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:40,921 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:40,923 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:40,924 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-11-10 22:34:40,925 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-10 22:34:40,937 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-10 22:34:40,938 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-10 22:34:40,938 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-10 22:34:40,938 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-10 22:34:40,938 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-10 22:34:40,939 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-10 22:34:40,939 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-10 22:34:40,942 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-10 22:34:40,947 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2024-11-10 22:34:40,948 INFO L444 ModelExtractionUtils]: 1 out of 4 variables were initially zero. Simplification set additionally 1 variables to zero. [2024-11-10 22:34:40,948 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 22:34:40,948 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:40,950 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 22:34:40,951 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-11-10 22:34:40,952 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-10 22:34:40,952 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2024-11-10 22:34:40,952 INFO L474 LassoAnalysis]: Proved termination. [2024-11-10 22:34:40,952 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~range~0#1) = 1*ULTIMATE.start_main_~range~0#1 Supporting invariants [] [2024-11-10 22:34:40,965 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2024-11-10 22:34:40,966 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2024-11-10 22:34:40,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:40,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:40,986 INFO L255 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-10 22:34:40,987 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:41,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:41,016 INFO L255 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-10 22:34:41,017 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:41,068 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 22:34:41,069 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2024-11-10 22:34:41,069 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 40 states and 49 transitions. cyclomatic complexity: 12 Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:41,093 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 40 states and 49 transitions. cyclomatic complexity: 12. Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 95 states and 119 transitions. Complement of second has 6 states. [2024-11-10 22:34:41,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-10 22:34:41,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:41,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 18 transitions. [2024-11-10 22:34:41,095 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 22 letters. Loop has 8 letters. [2024-11-10 22:34:41,096 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:41,096 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 30 letters. Loop has 8 letters. [2024-11-10 22:34:41,096 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:41,096 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 18 transitions. Stem has 22 letters. Loop has 16 letters. [2024-11-10 22:34:41,096 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-10 22:34:41,096 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 119 transitions. [2024-11-10 22:34:41,102 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:41,103 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 71 states and 89 transitions. [2024-11-10 22:34:41,103 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2024-11-10 22:34:41,103 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-10 22:34:41,103 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71 states and 89 transitions. [2024-11-10 22:34:41,103 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:41,103 INFO L218 hiAutomatonCegarLoop]: Abstraction has 71 states and 89 transitions. [2024-11-10 22:34:41,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states and 89 transitions. [2024-11-10 22:34:41,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 62. [2024-11-10 22:34:41,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.2580645161290323) internal successors, (78), 61 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:41,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 78 transitions. [2024-11-10 22:34:41,110 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 78 transitions. [2024-11-10 22:34:41,110 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:41,111 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-10 22:34:41,111 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2024-11-10 22:34:41,111 INFO L87 Difference]: Start difference. First operand 62 states and 78 transitions. Second operand has 13 states, 13 states have (on average 4.0) internal successors, (52), 13 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:41,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:41,200 INFO L93 Difference]: Finished difference Result 121 states and 137 transitions. [2024-11-10 22:34:41,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 137 transitions. [2024-11-10 22:34:41,201 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:41,202 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 99 states and 115 transitions. [2024-11-10 22:34:41,203 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2024-11-10 22:34:41,203 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-10 22:34:41,203 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 115 transitions. [2024-11-10 22:34:41,203 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:41,203 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 115 transitions. [2024-11-10 22:34:41,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 115 transitions. [2024-11-10 22:34:41,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 94. [2024-11-10 22:34:41,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.1702127659574468) internal successors, (110), 93 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:41,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 110 transitions. [2024-11-10 22:34:41,209 INFO L240 hiAutomatonCegarLoop]: Abstraction has 94 states and 110 transitions. [2024-11-10 22:34:41,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-10 22:34:41,210 INFO L425 stractBuchiCegarLoop]: Abstraction has 94 states and 110 transitions. [2024-11-10 22:34:41,210 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-10 22:34:41,210 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 110 transitions. [2024-11-10 22:34:41,211 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:41,211 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:41,211 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:41,212 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [12, 11, 11, 9, 2, 1, 1] [2024-11-10 22:34:41,212 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:41,213 INFO L745 eck$LassoCheckResult]: Stem: 1424#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 1425#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 1434#L11 assume true; 1487#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1443#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1444#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 1489#L11 assume true; 1474#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1475#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1430#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1431#L11 assume true; 1435#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1504#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1503#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1502#L11 assume true; 1501#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1500#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1499#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1498#L11 assume true; 1497#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1496#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1495#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1494#L11 assume true; 1493#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1492#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1491#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1490#L11 assume true; 1467#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1470#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1468#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1466#L11 assume true; 1464#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1461#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1460#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 1459#L11 assume true; 1457#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1440#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1441#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1480#L11 assume true; 1479#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1478#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1476#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1471#L11 assume true; 1472#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1462#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1448#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 1446#L11 assume true; 1445#L11-1 [2024-11-10 22:34:41,213 INFO L747 eck$LassoCheckResult]: Loop: 1445#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 1437#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 1438#L11 assume true; 1445#L11-1 [2024-11-10 22:34:41,213 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:41,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1805314145, now seen corresponding path program 6 times [2024-11-10 22:34:41,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:41,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134520862] [2024-11-10 22:34:41,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:41,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:41,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:41,425 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 104 proven. 112 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-10 22:34:41,425 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:41,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134520862] [2024-11-10 22:34:41,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [134520862] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:41,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1266901537] [2024-11-10 22:34:41,426 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-10 22:34:41,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:41,426 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:41,428 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:41,432 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-11-10 22:34:41,477 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2024-11-10 22:34:41,477 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:41,478 INFO L255 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-10 22:34:41,479 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:41,653 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 104 proven. 112 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-10 22:34:41,654 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:41,813 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 104 proven. 112 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-11-10 22:34:41,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1266901537] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:41,814 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:41,814 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 25 [2024-11-10 22:34:41,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1153051921] [2024-11-10 22:34:41,814 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:41,814 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:41,815 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:41,815 INFO L85 PathProgramCache]: Analyzing trace with hash 37674, now seen corresponding path program 3 times [2024-11-10 22:34:41,815 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:41,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993406196] [2024-11-10 22:34:41,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:41,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:41,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:41,818 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:41,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:41,819 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:41,841 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:41,842 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-10 22:34:41,842 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=244, Invalid=356, Unknown=0, NotChecked=0, Total=600 [2024-11-10 22:34:41,843 INFO L87 Difference]: Start difference. First operand 94 states and 110 transitions. cyclomatic complexity: 22 Second operand has 25 states, 25 states have (on average 4.0) internal successors, (100), 25 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:41,874 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2024-11-10 22:34:42,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:42,079 INFO L93 Difference]: Finished difference Result 207 states and 223 transitions. [2024-11-10 22:34:42,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 207 states and 223 transitions. [2024-11-10 22:34:42,081 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:42,082 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 207 states to 163 states and 179 transitions. [2024-11-10 22:34:42,082 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2024-11-10 22:34:42,084 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-10 22:34:42,084 INFO L73 IsDeterministic]: Start isDeterministic. Operand 163 states and 179 transitions. [2024-11-10 22:34:42,085 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:42,086 INFO L218 hiAutomatonCegarLoop]: Abstraction has 163 states and 179 transitions. [2024-11-10 22:34:42,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states and 179 transitions. [2024-11-10 22:34:42,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 158. [2024-11-10 22:34:42,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 158 states, 158 states have (on average 1.1012658227848102) internal successors, (174), 157 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:42,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 174 transitions. [2024-11-10 22:34:42,097 INFO L240 hiAutomatonCegarLoop]: Abstraction has 158 states and 174 transitions. [2024-11-10 22:34:42,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-11-10 22:34:42,098 INFO L425 stractBuchiCegarLoop]: Abstraction has 158 states and 174 transitions. [2024-11-10 22:34:42,098 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-10 22:34:42,098 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 158 states and 174 transitions. [2024-11-10 22:34:42,100 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:42,100 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:42,100 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:42,102 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [24, 23, 23, 21, 2, 1, 1] [2024-11-10 22:34:42,102 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:42,102 INFO L745 eck$LassoCheckResult]: Stem: 2043#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 2044#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 2053#L11 assume true; 2119#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2060#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2061#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 2120#L11 assume true; 2091#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2092#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2049#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2050#L11 assume true; 2054#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2167#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2166#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2165#L11 assume true; 2164#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2163#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2162#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2161#L11 assume true; 2160#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2159#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2158#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2157#L11 assume true; 2156#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2155#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2154#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2153#L11 assume true; 2152#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2151#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2150#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2149#L11 assume true; 2148#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2147#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2146#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2145#L11 assume true; 2144#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2143#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2142#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2141#L11 assume true; 2140#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2139#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2138#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2137#L11 assume true; 2136#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2135#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2134#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2133#L11 assume true; 2132#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2131#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2130#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2129#L11 assume true; 2128#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2127#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2126#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2125#L11 assume true; 2124#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2123#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2122#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2121#L11 assume true; 2084#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2087#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2085#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2083#L11 assume true; 2081#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2077#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 2076#L11 assume true; 2074#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2058#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2059#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2113#L11 assume true; 2112#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2111#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2110#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2109#L11 assume true; 2108#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2107#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2106#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2105#L11 assume true; 2104#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2103#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2102#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2101#L11 assume true; 2100#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2099#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2098#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2097#L11 assume true; 2096#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2095#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2093#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2088#L11 assume true; 2089#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2079#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2065#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 2063#L11 assume true; 2062#L11-1 [2024-11-10 22:34:42,103 INFO L747 eck$LassoCheckResult]: Loop: 2062#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 2055#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 2056#L11 assume true; 2062#L11-1 [2024-11-10 22:34:42,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:42,103 INFO L85 PathProgramCache]: Analyzing trace with hash -894668935, now seen corresponding path program 7 times [2024-11-10 22:34:42,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:42,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841160131] [2024-11-10 22:34:42,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:42,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:42,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:42,517 INFO L134 CoverageAnalysis]: Checked inductivity of 1035 backedges. 464 proven. 480 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-10 22:34:42,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:42,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841160131] [2024-11-10 22:34:42,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841160131] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:42,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1349684997] [2024-11-10 22:34:42,518 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-10 22:34:42,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:42,518 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:42,520 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:42,522 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2024-11-10 22:34:42,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:42,574 INFO L255 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-10 22:34:42,576 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:42,976 INFO L134 CoverageAnalysis]: Checked inductivity of 1035 backedges. 464 proven. 480 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-10 22:34:42,977 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:43,320 INFO L134 CoverageAnalysis]: Checked inductivity of 1035 backedges. 464 proven. 480 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-10 22:34:43,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1349684997] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:43,321 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:43,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 38 [2024-11-10 22:34:43,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436726342] [2024-11-10 22:34:43,321 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:43,322 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:43,322 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:43,322 INFO L85 PathProgramCache]: Analyzing trace with hash 37674, now seen corresponding path program 4 times [2024-11-10 22:34:43,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:43,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757728755] [2024-11-10 22:34:43,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:43,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:43,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:43,325 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:43,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:43,327 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:43,345 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:43,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2024-11-10 22:34:43,346 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=545, Invalid=861, Unknown=0, NotChecked=0, Total=1406 [2024-11-10 22:34:43,346 INFO L87 Difference]: Start difference. First operand 158 states and 174 transitions. cyclomatic complexity: 22 Second operand has 38 states, 38 states have (on average 4.026315789473684) internal successors, (153), 38 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:43,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:43,554 INFO L93 Difference]: Finished difference Result 302 states and 318 transitions. [2024-11-10 22:34:43,554 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 302 states and 318 transitions. [2024-11-10 22:34:43,556 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:43,557 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 302 states to 247 states and 263 transitions. [2024-11-10 22:34:43,557 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2024-11-10 22:34:43,557 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-10 22:34:43,557 INFO L73 IsDeterministic]: Start isDeterministic. Operand 247 states and 263 transitions. [2024-11-10 22:34:43,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:43,558 INFO L218 hiAutomatonCegarLoop]: Abstraction has 247 states and 263 transitions. [2024-11-10 22:34:43,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states and 263 transitions. [2024-11-10 22:34:43,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 242. [2024-11-10 22:34:43,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 242 states, 242 states have (on average 1.0661157024793388) internal successors, (258), 241 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:43,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 258 transitions. [2024-11-10 22:34:43,575 INFO L240 hiAutomatonCegarLoop]: Abstraction has 242 states and 258 transitions. [2024-11-10 22:34:43,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-11-10 22:34:43,580 INFO L425 stractBuchiCegarLoop]: Abstraction has 242 states and 258 transitions. [2024-11-10 22:34:43,581 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-10 22:34:43,582 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 242 states and 258 transitions. [2024-11-10 22:34:43,583 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-10 22:34:43,583 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:43,583 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:43,585 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [37, 36, 36, 34, 2, 1, 1] [2024-11-10 22:34:43,586 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:43,586 INFO L745 eck$LassoCheckResult]: Stem: 3124#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 3125#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 3126#L11 assume true; 3176#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3134#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3135#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3226#L11 assume true; 3164#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3165#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3116#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3117#L11 assume true; 3127#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3293#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3292#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3291#L11 assume true; 3290#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3289#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3288#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3287#L11 assume true; 3286#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3285#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3284#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3283#L11 assume true; 3282#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3281#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3280#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3279#L11 assume true; 3278#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3277#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3276#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3275#L11 assume true; 3274#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3273#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3272#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3271#L11 assume true; 3270#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3269#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3268#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3267#L11 assume true; 3266#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3265#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3264#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3263#L11 assume true; 3262#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3261#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3260#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3259#L11 assume true; 3258#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3257#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3256#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3255#L11 assume true; 3254#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3253#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3252#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3251#L11 assume true; 3250#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3249#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3248#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3247#L11 assume true; 3246#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3245#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3244#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3243#L11 assume true; 3242#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3241#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3240#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3239#L11 assume true; 3238#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3237#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3236#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3235#L11 assume true; 3234#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3232#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3231#L11 assume true; 3230#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3229#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3228#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3227#L11 assume true; 3158#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3161#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3159#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3157#L11 assume true; 3155#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3152#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3151#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3150#L11 assume true; 3148#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3131#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3133#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3224#L11 assume true; 3223#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3222#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3221#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3220#L11 assume true; 3219#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3218#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3217#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3216#L11 assume true; 3215#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3214#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3213#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3212#L11 assume true; 3211#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3210#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3209#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3208#L11 assume true; 3207#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3206#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3205#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3204#L11 assume true; 3203#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3202#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3201#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3200#L11 assume true; 3199#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3198#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3197#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3196#L11 assume true; 3195#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3194#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3193#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3192#L11 assume true; 3191#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3190#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3189#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3188#L11 assume true; 3187#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3186#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3185#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3184#L11 assume true; 3183#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3182#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3181#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3180#L11 assume true; 3179#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3178#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3177#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3175#L11 assume true; 3170#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3169#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3166#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3162#L11 assume true; 3160#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3153#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3139#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3137#L11 assume true; 3136#L11-1 [2024-11-10 22:34:43,587 INFO L747 eck$LassoCheckResult]: Loop: 3136#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3128#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3129#L11 assume true; 3136#L11-1 [2024-11-10 22:34:43,587 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:43,590 INFO L85 PathProgramCache]: Analyzing trace with hash -23485741, now seen corresponding path program 8 times [2024-11-10 22:34:43,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:43,590 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853918756] [2024-11-10 22:34:43,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:43,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:43,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:43,623 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:43,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:43,658 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:43,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:43,659 INFO L85 PathProgramCache]: Analyzing trace with hash 37674, now seen corresponding path program 5 times [2024-11-10 22:34:43,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:43,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912916903] [2024-11-10 22:34:43,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:43,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:43,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:43,664 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:43,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:43,666 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:43,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:43,669 INFO L85 PathProgramCache]: Analyzing trace with hash 415967000, now seen corresponding path program 1 times [2024-11-10 22:34:43,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:43,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585478268] [2024-11-10 22:34:43,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:43,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:43,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:43,773 INFO L134 CoverageAnalysis]: Checked inductivity of 2665 backedges. 215 proven. 0 refuted. 0 times theorem prover too weak. 2450 trivial. 0 not checked. [2024-11-10 22:34:43,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:43,774 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585478268] [2024-11-10 22:34:43,774 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1585478268] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 22:34:43,774 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 22:34:43,774 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 22:34:43,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [652763701] [2024-11-10 22:34:43,774 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 22:34:43,789 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:43,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 22:34:43,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-10 22:34:43,790 INFO L87 Difference]: Start difference. First operand 242 states and 258 transitions. cyclomatic complexity: 22 Second operand has 4 states, 4 states have (on average 3.5) internal successors, (14), 4 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:43,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:43,805 INFO L93 Difference]: Finished difference Result 241 states and 253 transitions. [2024-11-10 22:34:43,805 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 241 states and 253 transitions. [2024-11-10 22:34:43,806 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:43,807 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 241 states to 177 states and 185 transitions. [2024-11-10 22:34:43,807 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-10 22:34:43,807 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-10 22:34:43,807 INFO L73 IsDeterministic]: Start isDeterministic. Operand 177 states and 185 transitions. [2024-11-10 22:34:43,807 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:43,808 INFO L218 hiAutomatonCegarLoop]: Abstraction has 177 states and 185 transitions. [2024-11-10 22:34:43,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states and 185 transitions. [2024-11-10 22:34:43,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 172. [2024-11-10 22:34:43,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 172 states have (on average 1.0465116279069768) internal successors, (180), 171 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:43,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 180 transitions. [2024-11-10 22:34:43,821 INFO L240 hiAutomatonCegarLoop]: Abstraction has 172 states and 180 transitions. [2024-11-10 22:34:43,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 22:34:43,822 INFO L425 stractBuchiCegarLoop]: Abstraction has 172 states and 180 transitions. [2024-11-10 22:34:43,822 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-10 22:34:43,822 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 180 transitions. [2024-11-10 22:34:43,823 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:43,823 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:43,823 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:43,824 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [38, 38, 37, 34, 3, 1, 1, 1] [2024-11-10 22:34:43,824 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:43,825 INFO L745 eck$LassoCheckResult]: Stem: 3616#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 3617#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 3618#L11 assume true; 3632#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3633#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3612#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3613#L11 assume true; 3638#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3623#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3624#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3619#L11 assume true; 3620#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3777#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3776#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3775#L11 assume true; 3774#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3773#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3772#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3771#L11 assume true; 3770#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3769#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3768#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3767#L11 assume true; 3766#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3765#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3764#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3763#L11 assume true; 3762#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3761#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3760#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3759#L11 assume true; 3758#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3757#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3756#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3755#L11 assume true; 3754#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3753#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3752#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3751#L11 assume true; 3750#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3749#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3748#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3747#L11 assume true; 3746#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3745#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3744#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3743#L11 assume true; 3742#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3741#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3740#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3739#L11 assume true; 3738#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3737#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3736#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3735#L11 assume true; 3734#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3733#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3732#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3731#L11 assume true; 3730#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3729#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3728#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3727#L11 assume true; 3726#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3725#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3724#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3723#L11 assume true; 3722#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3721#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3720#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3719#L11 assume true; 3718#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3717#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3716#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3715#L11 assume true; 3714#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3713#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3712#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3711#L11 assume true; 3708#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3710#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3709#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3707#L11 assume true; 3706#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3705#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3704#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3703#L11 assume true; 3702#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3701#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3700#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3699#L11 assume true; 3698#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3697#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3696#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3695#L11 assume true; 3694#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3693#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3692#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3691#L11 assume true; 3690#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3689#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3688#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3687#L11 assume true; 3686#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3685#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3684#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3683#L11 assume true; 3682#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3681#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3680#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3679#L11 assume true; 3678#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3677#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3676#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3675#L11 assume true; 3674#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3673#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3672#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3671#L11 assume true; 3670#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3669#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3668#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3667#L11 assume true; 3666#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3665#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3664#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3663#L11 assume true; 3662#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3661#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3660#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3659#L11 assume true; 3658#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3657#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3656#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3655#L11 assume true; 3654#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3653#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3652#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3651#L11 assume true; 3650#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3649#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3648#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3647#L11 assume true; 3643#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3646#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3645#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 3641#L11 assume true; 3642#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3634#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3631#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 3630#L11 assume true; 3629#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3626#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3622#L11 [2024-11-10 22:34:43,825 INFO L747 eck$LassoCheckResult]: Loop: 3622#L11 assume true; 3625#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 3621#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 3622#L11 [2024-11-10 22:34:43,825 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:43,825 INFO L85 PathProgramCache]: Analyzing trace with hash 1091154676, now seen corresponding path program 2 times [2024-11-10 22:34:43,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:43,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857338762] [2024-11-10 22:34:43,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:43,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:43,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:44,337 INFO L134 CoverageAnalysis]: Checked inductivity of 2775 backedges. 111 proven. 1904 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2024-11-10 22:34:44,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:44,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857338762] [2024-11-10 22:34:44,338 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857338762] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:44,338 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1970920245] [2024-11-10 22:34:44,338 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-10 22:34:44,338 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:44,338 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:44,340 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:44,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2024-11-10 22:34:44,406 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-10 22:34:44,407 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:44,408 INFO L255 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-10 22:34:44,411 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:44,966 INFO L134 CoverageAnalysis]: Checked inductivity of 2775 backedges. 111 proven. 1904 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2024-11-10 22:34:44,966 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:45,424 INFO L134 CoverageAnalysis]: Checked inductivity of 2775 backedges. 111 proven. 1904 refuted. 0 times theorem prover too weak. 760 trivial. 0 not checked. [2024-11-10 22:34:45,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1970920245] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:45,424 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:45,425 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20] total 40 [2024-11-10 22:34:45,425 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256275449] [2024-11-10 22:34:45,425 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:45,427 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:45,428 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:45,428 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 6 times [2024-11-10 22:34:45,428 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:45,428 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7155648] [2024-11-10 22:34:45,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:45,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:45,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:45,432 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:45,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:45,434 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:45,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:45,450 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2024-11-10 22:34:45,451 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=556, Invalid=1004, Unknown=0, NotChecked=0, Total=1560 [2024-11-10 22:34:45,451 INFO L87 Difference]: Start difference. First operand 172 states and 180 transitions. cyclomatic complexity: 12 Second operand has 40 states, 40 states have (on average 4.05) internal successors, (162), 40 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:46,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:46,391 INFO L93 Difference]: Finished difference Result 438 states and 448 transitions. [2024-11-10 22:34:46,391 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 438 states and 448 transitions. [2024-11-10 22:34:46,394 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:46,396 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 438 states to 336 states and 346 transitions. [2024-11-10 22:34:46,396 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-10 22:34:46,396 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-10 22:34:46,396 INFO L73 IsDeterministic]: Start isDeterministic. Operand 336 states and 346 transitions. [2024-11-10 22:34:46,396 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:46,397 INFO L218 hiAutomatonCegarLoop]: Abstraction has 336 states and 346 transitions. [2024-11-10 22:34:46,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states and 346 transitions. [2024-11-10 22:34:46,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 324. [2024-11-10 22:34:46,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 324 states have (on average 1.0308641975308641) internal successors, (334), 323 states have internal predecessors, (334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:46,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 334 transitions. [2024-11-10 22:34:46,402 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 334 transitions. [2024-11-10 22:34:46,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2024-11-10 22:34:46,403 INFO L425 stractBuchiCegarLoop]: Abstraction has 324 states and 334 transitions. [2024-11-10 22:34:46,404 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-10 22:34:46,404 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 334 transitions. [2024-11-10 22:34:46,405 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:46,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:46,406 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:46,409 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [76, 76, 75, 70, 5, 1, 1, 1] [2024-11-10 22:34:46,410 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:46,410 INFO L745 eck$LassoCheckResult]: Stem: 5257#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 5258#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 5259#L11 assume true; 5278#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5283#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5282#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5279#L11 assume true; 5272#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5264#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5249#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5250#L11 assume true; 5260#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5571#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5570#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5569#L11 assume true; 5568#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5567#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5566#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5565#L11 assume true; 5564#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5563#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5562#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5561#L11 assume true; 5560#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5559#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5558#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5557#L11 assume true; 5556#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5555#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5554#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5553#L11 assume true; 5552#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5551#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5550#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5549#L11 assume true; 5548#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5547#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5546#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5545#L11 assume true; 5544#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5543#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5542#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5541#L11 assume true; 5540#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5539#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5538#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5537#L11 assume true; 5536#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5535#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5534#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5533#L11 assume true; 5532#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5531#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5530#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5529#L11 assume true; 5528#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5527#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5526#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5525#L11 assume true; 5524#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5523#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5522#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5521#L11 assume true; 5520#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5519#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5518#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5517#L11 assume true; 5516#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5515#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5514#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5513#L11 assume true; 5512#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5511#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5510#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5509#L11 assume true; 5508#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5507#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5506#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5505#L11 assume true; 5502#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5504#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5503#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5501#L11 assume true; 5500#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5499#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5498#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5497#L11 assume true; 5496#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5495#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5494#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5493#L11 assume true; 5492#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5491#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5490#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5489#L11 assume true; 5488#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5487#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5486#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5485#L11 assume true; 5484#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5483#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5482#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5481#L11 assume true; 5480#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5479#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5478#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5477#L11 assume true; 5476#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5475#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5474#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5473#L11 assume true; 5472#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5471#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5470#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5469#L11 assume true; 5468#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5467#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5466#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5465#L11 assume true; 5464#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5463#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5462#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5461#L11 assume true; 5460#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5459#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5458#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5457#L11 assume true; 5456#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5455#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5454#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5453#L11 assume true; 5452#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5451#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5450#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5449#L11 assume true; 5448#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5447#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5446#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5445#L11 assume true; 5444#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5443#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5442#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5441#L11 assume true; 5440#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5439#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5438#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5437#L11 assume true; 5436#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5435#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5434#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5433#L11 assume true; 5432#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5431#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5430#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5429#L11 assume true; 5426#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5428#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5427#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5425#L11 assume true; 5424#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5423#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5422#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5421#L11 assume true; 5420#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5419#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5418#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5417#L11 assume true; 5416#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5415#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5414#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5413#L11 assume true; 5412#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5411#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5410#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5409#L11 assume true; 5408#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5407#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5406#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5405#L11 assume true; 5404#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5403#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5402#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5401#L11 assume true; 5400#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5399#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5398#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5397#L11 assume true; 5396#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5395#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5394#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5393#L11 assume true; 5392#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5391#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5390#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5389#L11 assume true; 5388#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5387#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5386#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5385#L11 assume true; 5384#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5383#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5382#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5381#L11 assume true; 5380#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5379#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5378#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5377#L11 assume true; 5376#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5375#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5374#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5373#L11 assume true; 5372#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5371#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5370#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5369#L11 assume true; 5368#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5367#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5366#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5365#L11 assume true; 5364#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5363#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5362#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5361#L11 assume true; 5360#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5359#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5358#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5357#L11 assume true; 5354#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5356#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5355#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5353#L11 assume true; 5352#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5351#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5350#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5349#L11 assume true; 5348#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5347#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5346#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5345#L11 assume true; 5344#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5343#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5342#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5341#L11 assume true; 5340#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5339#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5338#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5337#L11 assume true; 5336#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5335#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5334#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5333#L11 assume true; 5332#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5331#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5330#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5329#L11 assume true; 5328#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5327#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5326#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5325#L11 assume true; 5324#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5323#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5322#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5321#L11 assume true; 5320#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5319#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5318#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5317#L11 assume true; 5316#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5315#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5314#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5313#L11 assume true; 5312#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5311#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5310#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5309#L11 assume true; 5308#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5307#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5306#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5305#L11 assume true; 5304#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5303#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5302#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5301#L11 assume true; 5300#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5299#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5298#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5297#L11 assume true; 5296#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5295#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5294#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5293#L11 assume true; 5292#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5291#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5290#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5289#L11 assume true; 5286#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5288#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5287#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 5284#L11 assume true; 5285#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5273#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5271#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 5270#L11 assume true; 5269#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5266#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5263#L11 [2024-11-10 22:34:46,410 INFO L747 eck$LassoCheckResult]: Loop: 5263#L11 assume true; 5265#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 5262#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 5263#L11 [2024-11-10 22:34:46,411 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:46,411 INFO L85 PathProgramCache]: Analyzing trace with hash -1038349054, now seen corresponding path program 3 times [2024-11-10 22:34:46,411 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:46,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1362586159] [2024-11-10 22:34:46,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:46,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:46,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:46,754 INFO L134 CoverageAnalysis]: Checked inductivity of 11325 backedges. 0 proven. 8725 refuted. 0 times theorem prover too weak. 2600 trivial. 0 not checked. [2024-11-10 22:34:46,754 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:46,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1362586159] [2024-11-10 22:34:46,754 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1362586159] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:46,754 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1839429522] [2024-11-10 22:34:46,754 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-10 22:34:46,755 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:46,755 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:46,757 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:46,758 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2024-11-10 22:34:46,800 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2024-11-10 22:34:46,801 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:46,801 INFO L255 TraceCheckSpWp]: Trace formula consists of 46 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-10 22:34:46,804 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:46,870 INFO L134 CoverageAnalysis]: Checked inductivity of 11325 backedges. 946 proven. 11 refuted. 0 times theorem prover too weak. 10368 trivial. 0 not checked. [2024-11-10 22:34:46,871 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:46,931 INFO L134 CoverageAnalysis]: Checked inductivity of 11325 backedges. 946 proven. 11 refuted. 0 times theorem prover too weak. 10368 trivial. 0 not checked. [2024-11-10 22:34:46,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1839429522] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:46,932 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:46,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 12 [2024-11-10 22:34:46,932 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572458669] [2024-11-10 22:34:46,933 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:46,933 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:46,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:46,934 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 7 times [2024-11-10 22:34:46,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:46,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60488785] [2024-11-10 22:34:46,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:46,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:46,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:46,937 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:46,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:46,940 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:46,953 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:46,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-10 22:34:46,954 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2024-11-10 22:34:46,954 INFO L87 Difference]: Start difference. First operand 324 states and 334 transitions. cyclomatic complexity: 16 Second operand has 13 states, 12 states have (on average 4.083333333333333) internal successors, (49), 13 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:47,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:47,232 INFO L93 Difference]: Finished difference Result 369 states and 386 transitions. [2024-11-10 22:34:47,232 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 369 states and 386 transitions. [2024-11-10 22:34:47,234 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:47,236 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 369 states to 369 states and 386 transitions. [2024-11-10 22:34:47,236 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2024-11-10 22:34:47,237 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-11-10 22:34:47,237 INFO L73 IsDeterministic]: Start isDeterministic. Operand 369 states and 386 transitions. [2024-11-10 22:34:47,237 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:47,237 INFO L218 hiAutomatonCegarLoop]: Abstraction has 369 states and 386 transitions. [2024-11-10 22:34:47,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states and 386 transitions. [2024-11-10 22:34:47,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 339. [2024-11-10 22:34:47,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 339 states, 339 states have (on average 1.0353982300884956) internal successors, (351), 338 states have internal predecessors, (351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:47,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 351 transitions. [2024-11-10 22:34:47,242 INFO L240 hiAutomatonCegarLoop]: Abstraction has 339 states and 351 transitions. [2024-11-10 22:34:47,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2024-11-10 22:34:47,243 INFO L425 stractBuchiCegarLoop]: Abstraction has 339 states and 351 transitions. [2024-11-10 22:34:47,243 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-10 22:34:47,243 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 339 states and 351 transitions. [2024-11-10 22:34:47,245 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:47,245 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:47,245 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:47,261 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [79, 79, 78, 71, 7, 1, 1, 1] [2024-11-10 22:34:47,261 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:47,261 INFO L745 eck$LassoCheckResult]: Stem: 7832#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 7833#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 7834#L11 assume true; 7852#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7840#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7841#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 7853#L11 assume true; 7849#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7850#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7824#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7825#L11 assume true; 7835#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8162#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8161#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8160#L11 assume true; 8159#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8158#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8157#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8156#L11 assume true; 8155#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8154#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8153#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8152#L11 assume true; 8151#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8150#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8149#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8148#L11 assume true; 8147#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8146#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8145#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8144#L11 assume true; 8143#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8142#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8141#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8140#L11 assume true; 8139#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8138#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8137#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8136#L11 assume true; 8135#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8134#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8133#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8132#L11 assume true; 8131#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8130#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8129#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8128#L11 assume true; 8127#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8126#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8125#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8124#L11 assume true; 8123#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8122#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8121#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8120#L11 assume true; 8119#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8118#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8117#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8116#L11 assume true; 8115#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8114#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8113#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8112#L11 assume true; 8111#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8110#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8109#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8108#L11 assume true; 8107#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8106#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8105#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8104#L11 assume true; 8103#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8102#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8101#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8100#L11 assume true; 8099#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8098#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8097#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8096#L11 assume true; 8093#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8095#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8094#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8092#L11 assume true; 8091#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8090#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8089#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8088#L11 assume true; 8087#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8086#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8085#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8084#L11 assume true; 8083#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8082#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8081#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8080#L11 assume true; 8079#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8077#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8076#L11 assume true; 8075#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8074#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8073#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8072#L11 assume true; 8071#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8070#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8069#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8068#L11 assume true; 8067#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8066#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8065#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8064#L11 assume true; 8063#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8062#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8061#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8060#L11 assume true; 8059#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8058#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8057#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8056#L11 assume true; 8055#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8054#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8053#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8052#L11 assume true; 8051#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8050#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8049#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8048#L11 assume true; 8047#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8046#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8045#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8044#L11 assume true; 8043#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8042#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8041#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8040#L11 assume true; 8039#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8038#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8037#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8036#L11 assume true; 8035#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8034#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8033#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8032#L11 assume true; 8031#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8030#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8029#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8028#L11 assume true; 8027#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8026#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8025#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8024#L11 assume true; 8023#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8022#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8021#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8020#L11 assume true; 8017#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8019#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8018#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8016#L11 assume true; 8015#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8014#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8013#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8012#L11 assume true; 8011#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8010#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8009#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8008#L11 assume true; 8007#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8006#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8005#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8004#L11 assume true; 8003#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8002#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8001#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8000#L11 assume true; 7999#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7998#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7997#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7996#L11 assume true; 7995#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7994#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7993#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7992#L11 assume true; 7991#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7990#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7989#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7988#L11 assume true; 7987#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7986#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7985#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7984#L11 assume true; 7983#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7982#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7981#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7980#L11 assume true; 7979#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7978#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7977#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7976#L11 assume true; 7975#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7974#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7973#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7972#L11 assume true; 7971#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7970#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7969#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7968#L11 assume true; 7967#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7966#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7965#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7964#L11 assume true; 7963#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7962#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7961#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7960#L11 assume true; 7959#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7958#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7957#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7956#L11 assume true; 7955#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7954#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7953#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7952#L11 assume true; 7951#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7950#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7949#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7948#L11 assume true; 7945#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7947#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7946#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7944#L11 assume true; 7943#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7942#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7941#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 7940#L11 assume true; 7939#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7938#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7937#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7936#L11 assume true; 7935#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7934#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7933#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7932#L11 assume true; 7931#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7930#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7929#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7928#L11 assume true; 7927#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7926#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7925#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7924#L11 assume true; 7923#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7922#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7921#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7920#L11 assume true; 7919#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7918#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7917#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7916#L11 assume true; 7915#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7914#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7913#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7912#L11 assume true; 7911#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7910#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7909#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7908#L11 assume true; 7907#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7906#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7905#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7904#L11 assume true; 7903#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7902#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7901#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7900#L11 assume true; 7899#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7898#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7897#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7896#L11 assume true; 7895#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7894#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7893#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7892#L11 assume true; 7891#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7890#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7889#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7888#L11 assume true; 7887#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7886#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7885#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7884#L11 assume true; 7883#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7882#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7881#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7880#L11 assume true; 7877#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7879#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7878#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7876#L11 assume true; 7875#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7874#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7873#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 7872#L11 assume true; 7861#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7871#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7870#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 7869#L11 assume true; 7868#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7867#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7862#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 7863#L11 assume true; 7866#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7856#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7844#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 7847#L11 assume true; 7846#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7843#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7838#L11 [2024-11-10 22:34:47,262 INFO L747 eck$LassoCheckResult]: Loop: 7838#L11 assume true; 7842#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 7837#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 7838#L11 [2024-11-10 22:34:47,262 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:47,262 INFO L85 PathProgramCache]: Analyzing trace with hash 303070218, now seen corresponding path program 4 times [2024-11-10 22:34:47,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:47,262 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083744789] [2024-11-10 22:34:47,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:47,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:47,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:47,379 INFO L134 CoverageAnalysis]: Checked inductivity of 12246 backedges. 542 proven. 0 refuted. 0 times theorem prover too weak. 11704 trivial. 0 not checked. [2024-11-10 22:34:47,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:47,380 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083744789] [2024-11-10 22:34:47,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2083744789] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 22:34:47,380 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 22:34:47,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 22:34:47,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1290887419] [2024-11-10 22:34:47,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 22:34:47,380 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:47,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:47,381 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 8 times [2024-11-10 22:34:47,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:47,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581190611] [2024-11-10 22:34:47,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:47,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:47,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:47,383 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:47,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:47,387 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:47,400 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:47,400 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 22:34:47,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 22:34:47,401 INFO L87 Difference]: Start difference. First operand 339 states and 351 transitions. cyclomatic complexity: 19 Second operand has 4 states, 4 states have (on average 3.75) internal successors, (15), 4 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:47,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:47,418 INFO L93 Difference]: Finished difference Result 342 states and 353 transitions. [2024-11-10 22:34:47,418 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 342 states and 353 transitions. [2024-11-10 22:34:47,420 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:47,422 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 342 states to 342 states and 353 transitions. [2024-11-10 22:34:47,422 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-10 22:34:47,422 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-10 22:34:47,422 INFO L73 IsDeterministic]: Start isDeterministic. Operand 342 states and 353 transitions. [2024-11-10 22:34:47,423 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:47,423 INFO L218 hiAutomatonCegarLoop]: Abstraction has 342 states and 353 transitions. [2024-11-10 22:34:47,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 342 states and 353 transitions. [2024-11-10 22:34:47,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 342 to 339. [2024-11-10 22:34:47,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 339 states, 339 states have (on average 1.0324483775811208) internal successors, (350), 338 states have internal predecessors, (350), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:47,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 339 states to 339 states and 350 transitions. [2024-11-10 22:34:47,428 INFO L240 hiAutomatonCegarLoop]: Abstraction has 339 states and 350 transitions. [2024-11-10 22:34:47,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 22:34:47,429 INFO L425 stractBuchiCegarLoop]: Abstraction has 339 states and 350 transitions. [2024-11-10 22:34:47,429 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-10 22:34:47,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 339 states and 350 transitions. [2024-11-10 22:34:47,430 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:47,430 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:47,430 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:47,434 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [80, 80, 79, 72, 7, 1, 1, 1] [2024-11-10 22:34:47,434 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:47,435 INFO L745 eck$LassoCheckResult]: Stem: 8522#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 8523#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 8524#L11 assume true; 8548#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8552#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8551#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8549#L11 assume true; 8542#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8529#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8518#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8519#L11 assume true; 8525#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8851#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8850#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8849#L11 assume true; 8848#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8847#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8846#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8845#L11 assume true; 8844#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8843#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8842#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8841#L11 assume true; 8840#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8839#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8838#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8837#L11 assume true; 8836#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8835#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8834#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8833#L11 assume true; 8832#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8831#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8830#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8829#L11 assume true; 8828#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8827#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8826#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8825#L11 assume true; 8824#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8823#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8822#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8821#L11 assume true; 8820#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8819#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8818#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8817#L11 assume true; 8816#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8815#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8814#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8813#L11 assume true; 8812#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8811#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8810#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8809#L11 assume true; 8808#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8807#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8806#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8805#L11 assume true; 8804#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8803#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8802#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8801#L11 assume true; 8800#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8799#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8798#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8797#L11 assume true; 8796#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8795#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8794#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8793#L11 assume true; 8792#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8791#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8790#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8789#L11 assume true; 8788#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8787#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8786#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8785#L11 assume true; 8782#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8784#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8783#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8781#L11 assume true; 8780#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8779#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8778#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8777#L11 assume true; 8776#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8775#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8774#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8773#L11 assume true; 8772#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8771#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8770#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8769#L11 assume true; 8768#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8767#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8766#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8765#L11 assume true; 8764#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8763#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8762#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8761#L11 assume true; 8760#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8759#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8758#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8757#L11 assume true; 8756#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8755#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8754#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8753#L11 assume true; 8752#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8751#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8750#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8749#L11 assume true; 8748#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8747#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8746#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8745#L11 assume true; 8744#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8743#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8742#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8741#L11 assume true; 8740#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8739#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8738#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8737#L11 assume true; 8736#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8735#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8734#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8733#L11 assume true; 8732#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8731#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8730#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8729#L11 assume true; 8728#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8727#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8726#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8725#L11 assume true; 8724#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8723#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8722#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8721#L11 assume true; 8720#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8719#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8718#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8717#L11 assume true; 8716#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8715#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8714#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8713#L11 assume true; 8712#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8711#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8710#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8709#L11 assume true; 8706#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8708#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8707#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8705#L11 assume true; 8704#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8703#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8702#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8701#L11 assume true; 8700#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8699#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8698#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8697#L11 assume true; 8696#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8695#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8694#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8693#L11 assume true; 8692#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8691#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8690#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8689#L11 assume true; 8688#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8687#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8686#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8685#L11 assume true; 8684#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8683#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8682#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8681#L11 assume true; 8680#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8679#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8678#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8677#L11 assume true; 8676#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8675#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8674#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8673#L11 assume true; 8672#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8671#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8670#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8669#L11 assume true; 8668#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8667#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8666#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8665#L11 assume true; 8664#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8663#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8662#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8661#L11 assume true; 8660#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8659#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8658#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8657#L11 assume true; 8656#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8655#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8654#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8653#L11 assume true; 8652#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8651#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8650#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8649#L11 assume true; 8648#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8647#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8646#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8645#L11 assume true; 8644#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8643#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8642#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8641#L11 assume true; 8640#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8639#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8638#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8637#L11 assume true; 8634#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8636#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8635#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8633#L11 assume true; 8632#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8631#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8630#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8629#L11 assume true; 8628#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8627#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8626#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8625#L11 assume true; 8624#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8623#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8622#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8621#L11 assume true; 8620#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8619#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8618#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8617#L11 assume true; 8616#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8615#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8614#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8613#L11 assume true; 8612#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8611#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8610#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8609#L11 assume true; 8608#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8607#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8606#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8605#L11 assume true; 8604#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8603#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8602#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8601#L11 assume true; 8600#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8599#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8598#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8597#L11 assume true; 8596#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8595#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8594#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8593#L11 assume true; 8592#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8591#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8590#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8589#L11 assume true; 8588#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8587#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8586#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8585#L11 assume true; 8584#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8583#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8582#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8581#L11 assume true; 8580#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8579#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8578#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8577#L11 assume true; 8576#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8575#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8574#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8573#L11 assume true; 8572#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8571#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8570#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8569#L11 assume true; 8566#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8568#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8567#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8565#L11 assume true; 8564#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8563#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8562#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8561#L11 assume true; 8540#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8560#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8559#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8558#L11 assume true; 8557#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8555#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8553#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8550#L11 assume true; 8543#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8541#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8532#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 8539#L11 assume true; 8538#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8537#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8536#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 8535#L11 assume true; 8534#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8531#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8528#L11 [2024-11-10 22:34:47,435 INFO L747 eck$LassoCheckResult]: Loop: 8528#L11 assume true; 8530#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 8527#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 8528#L11 [2024-11-10 22:34:47,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:47,435 INFO L85 PathProgramCache]: Analyzing trace with hash -975963060, now seen corresponding path program 5 times [2024-11-10 22:34:47,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:47,436 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272329553] [2024-11-10 22:34:47,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:47,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:47,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:47,746 INFO L134 CoverageAnalysis]: Checked inductivity of 12561 backedges. 847 proven. 9104 refuted. 0 times theorem prover too weak. 2610 trivial. 0 not checked. [2024-11-10 22:34:47,746 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:47,747 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272329553] [2024-11-10 22:34:47,747 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1272329553] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:47,747 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1249825915] [2024-11-10 22:34:47,747 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-10 22:34:47,747 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:47,747 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:47,749 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:47,751 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2024-11-10 22:34:47,951 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 77 check-sat command(s) [2024-11-10 22:34:47,951 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:47,956 INFO L255 TraceCheckSpWp]: Trace formula consists of 559 conjuncts, 26 conjuncts are in the unsatisfiable core [2024-11-10 22:34:47,959 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:48,522 INFO L134 CoverageAnalysis]: Checked inductivity of 12561 backedges. 6235 proven. 4320 refuted. 0 times theorem prover too weak. 2006 trivial. 0 not checked. [2024-11-10 22:34:48,523 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:49,141 INFO L134 CoverageAnalysis]: Checked inductivity of 12561 backedges. 6235 proven. 4320 refuted. 0 times theorem prover too weak. 2006 trivial. 0 not checked. [2024-11-10 22:34:49,142 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1249825915] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:49,142 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:49,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 25, 25] total 47 [2024-11-10 22:34:49,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1794506769] [2024-11-10 22:34:49,143 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:49,143 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:49,144 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:49,144 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 9 times [2024-11-10 22:34:49,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:49,144 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967245726] [2024-11-10 22:34:49,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:49,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:49,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:49,148 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:49,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:49,150 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:49,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:49,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2024-11-10 22:34:49,167 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=626, Invalid=1536, Unknown=0, NotChecked=0, Total=2162 [2024-11-10 22:34:49,167 INFO L87 Difference]: Start difference. First operand 339 states and 350 transitions. cyclomatic complexity: 18 Second operand has 47 states, 47 states have (on average 4.340425531914893) internal successors, (204), 47 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:51,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:51,112 INFO L93 Difference]: Finished difference Result 1047 states and 1128 transitions. [2024-11-10 22:34:51,112 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1047 states and 1128 transitions. [2024-11-10 22:34:51,118 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:51,122 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1047 states to 987 states and 1068 transitions. [2024-11-10 22:34:51,123 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-10 22:34:51,123 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-10 22:34:51,123 INFO L73 IsDeterministic]: Start isDeterministic. Operand 987 states and 1068 transitions. [2024-11-10 22:34:51,123 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:51,123 INFO L218 hiAutomatonCegarLoop]: Abstraction has 987 states and 1068 transitions. [2024-11-10 22:34:51,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 987 states and 1068 transitions. [2024-11-10 22:34:51,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 987 to 659. [2024-11-10 22:34:51,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 659 states, 659 states have (on average 1.078907435508346) internal successors, (711), 658 states have internal predecessors, (711), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:51,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 711 transitions. [2024-11-10 22:34:51,134 INFO L240 hiAutomatonCegarLoop]: Abstraction has 659 states and 711 transitions. [2024-11-10 22:34:51,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 133 states. [2024-11-10 22:34:51,137 INFO L425 stractBuchiCegarLoop]: Abstraction has 659 states and 711 transitions. [2024-11-10 22:34:51,137 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-10 22:34:51,137 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 659 states and 711 transitions. [2024-11-10 22:34:51,140 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:51,140 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:51,140 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:51,144 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [89, 89, 88, 79, 9, 1, 1, 1] [2024-11-10 22:34:51,144 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:51,144 INFO L745 eck$LassoCheckResult]: Stem: 12122#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 12123#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 12132#L11 assume true; 12150#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12151#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12128#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12129#L11 assume true; 12153#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12137#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12138#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12133#L11 assume true; 12134#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12630#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12629#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12628#L11 assume true; 12627#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12626#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12625#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12624#L11 assume true; 12623#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12622#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12621#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12620#L11 assume true; 12619#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12618#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12617#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12616#L11 assume true; 12615#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12614#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12613#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12612#L11 assume true; 12611#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12610#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12609#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12608#L11 assume true; 12607#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12606#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12605#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12604#L11 assume true; 12603#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12602#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12601#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12600#L11 assume true; 12599#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12598#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12597#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12596#L11 assume true; 12595#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12594#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12593#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12592#L11 assume true; 12591#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12590#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12589#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12588#L11 assume true; 12587#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12586#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12585#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12584#L11 assume true; 12583#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12582#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12581#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12580#L11 assume true; 12579#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12578#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12577#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12576#L11 assume true; 12575#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12574#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12573#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12572#L11 assume true; 12571#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12570#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12569#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12568#L11 assume true; 12567#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12566#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12565#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12564#L11 assume true; 12561#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12563#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12562#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12560#L11 assume true; 12559#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12558#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12557#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12556#L11 assume true; 12555#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12554#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12553#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12552#L11 assume true; 12551#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12550#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12549#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12548#L11 assume true; 12547#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12546#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12545#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12544#L11 assume true; 12543#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12542#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12541#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12540#L11 assume true; 12539#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12538#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12537#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12536#L11 assume true; 12535#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12534#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12533#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12532#L11 assume true; 12531#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12530#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12529#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12528#L11 assume true; 12527#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12526#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12525#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12524#L11 assume true; 12523#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12522#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12521#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12520#L11 assume true; 12519#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12518#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12517#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12516#L11 assume true; 12515#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12514#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12513#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12512#L11 assume true; 12511#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12510#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12509#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12508#L11 assume true; 12507#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12506#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12505#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12504#L11 assume true; 12503#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12502#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12501#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12500#L11 assume true; 12499#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12498#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12497#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12496#L11 assume true; 12495#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12494#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12493#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12492#L11 assume true; 12491#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12490#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12489#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12488#L11 assume true; 12483#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12485#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12484#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12482#L11 assume true; 12481#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12480#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12479#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12478#L11 assume true; 12477#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12476#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12475#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12474#L11 assume true; 12473#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12472#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12471#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12470#L11 assume true; 12469#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12468#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12467#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12466#L11 assume true; 12465#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12464#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12463#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12462#L11 assume true; 12461#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12460#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12459#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12458#L11 assume true; 12457#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12456#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12455#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12454#L11 assume true; 12453#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12452#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12451#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12450#L11 assume true; 12449#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12448#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12447#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12446#L11 assume true; 12445#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12444#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12443#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12442#L11 assume true; 12441#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12440#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12439#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12438#L11 assume true; 12437#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12436#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12435#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12434#L11 assume true; 12433#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12432#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12431#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12430#L11 assume true; 12429#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12428#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12427#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12426#L11 assume true; 12425#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12424#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12423#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12422#L11 assume true; 12421#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12420#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12419#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12418#L11 assume true; 12417#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12416#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12415#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12414#L11 assume true; 12413#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12412#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12411#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12409#L11 assume true; 12408#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12407#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12406#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12405#L11 assume true; 12404#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12403#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12402#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12401#L11 assume true; 12400#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12399#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12398#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12397#L11 assume true; 12396#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12395#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12394#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12393#L11 assume true; 12392#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12391#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12390#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12389#L11 assume true; 12388#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12387#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12386#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12385#L11 assume true; 12384#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12382#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12380#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12378#L11 assume true; 12376#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12374#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12372#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12370#L11 assume true; 12368#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12366#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12364#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12362#L11 assume true; 12360#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12358#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12356#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12354#L11 assume true; 12352#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12350#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12348#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12346#L11 assume true; 12344#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12342#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12340#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12338#L11 assume true; 12336#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12334#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12332#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12330#L11 assume true; 12309#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12310#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12305#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12306#L11 assume true; 12301#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12302#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12297#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12298#L11 assume true; 12293#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12294#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12289#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12290#L11 assume true; 12229#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12315#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12313#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12281#L11 assume true; 12280#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12279#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12277#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12276#L11 assume true; 12275#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12274#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12273#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12214#L11 assume true; 12212#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12210#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12208#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12206#L11 assume true; 12204#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12202#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12201#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12197#L11 assume true; 12174#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12193#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12194#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12189#L11 assume true; 12188#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12187#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12186#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12185#L11 assume true; 12184#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12183#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12181#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12178#L11 assume true; 12179#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12182#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12180#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12177#L11 assume true; 12172#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12171#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12170#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12169#L11 assume true; 12168#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12167#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12166#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12165#L11 assume true; 12149#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12164#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12163#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12161#L11 assume true; 12160#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12159#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12156#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12157#L11 assume true; 12154#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12152#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12141#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 12148#L11 assume true; 12147#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12146#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12145#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 12144#L11 assume true; 12143#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12140#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12136#L11 [2024-11-10 22:34:51,145 INFO L747 eck$LassoCheckResult]: Loop: 12136#L11 assume true; 12139#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 12135#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 12136#L11 [2024-11-10 22:34:51,145 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:51,145 INFO L85 PathProgramCache]: Analyzing trace with hash -217819424, now seen corresponding path program 6 times [2024-11-10 22:34:51,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:51,145 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493162395] [2024-11-10 22:34:51,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:51,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:51,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:51,603 INFO L134 CoverageAnalysis]: Checked inductivity of 15576 backedges. 2800 proven. 10040 refuted. 0 times theorem prover too weak. 2736 trivial. 0 not checked. [2024-11-10 22:34:51,604 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:51,604 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1493162395] [2024-11-10 22:34:51,604 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1493162395] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:51,604 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1891331125] [2024-11-10 22:34:51,604 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-10 22:34:51,605 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:51,605 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:51,607 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:51,609 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2024-11-10 22:34:51,679 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2024-11-10 22:34:51,679 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:51,680 INFO L255 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-10 22:34:51,684 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:51,783 INFO L134 CoverageAnalysis]: Checked inductivity of 15576 backedges. 2842 proven. 78 refuted. 0 times theorem prover too weak. 12656 trivial. 0 not checked. [2024-11-10 22:34:51,783 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:51,884 INFO L134 CoverageAnalysis]: Checked inductivity of 15576 backedges. 2842 proven. 78 refuted. 0 times theorem prover too weak. 12656 trivial. 0 not checked. [2024-11-10 22:34:51,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1891331125] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:51,885 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:51,885 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 18 [2024-11-10 22:34:51,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715883567] [2024-11-10 22:34:51,885 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:51,886 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:51,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:51,886 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 10 times [2024-11-10 22:34:51,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:51,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [944593965] [2024-11-10 22:34:51,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:51,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:51,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:51,888 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:51,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:51,889 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:51,904 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:51,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-10 22:34:51,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2024-11-10 22:34:51,905 INFO L87 Difference]: Start difference. First operand 659 states and 711 transitions. cyclomatic complexity: 58 Second operand has 18 states, 18 states have (on average 4.611111111111111) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:52,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:52,467 INFO L93 Difference]: Finished difference Result 1152 states and 1260 transitions. [2024-11-10 22:34:52,467 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1152 states and 1260 transitions. [2024-11-10 22:34:52,474 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:52,478 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1152 states to 741 states and 791 transitions. [2024-11-10 22:34:52,478 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-10 22:34:52,478 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2024-11-10 22:34:52,478 INFO L73 IsDeterministic]: Start isDeterministic. Operand 741 states and 791 transitions. [2024-11-10 22:34:52,479 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:52,479 INFO L218 hiAutomatonCegarLoop]: Abstraction has 741 states and 791 transitions. [2024-11-10 22:34:52,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 741 states and 791 transitions. [2024-11-10 22:34:52,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 741 to 665. [2024-11-10 22:34:52,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 665 states, 665 states have (on average 1.0706766917293233) internal successors, (712), 664 states have internal predecessors, (712), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:52,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 665 states to 665 states and 712 transitions. [2024-11-10 22:34:52,488 INFO L240 hiAutomatonCegarLoop]: Abstraction has 665 states and 712 transitions. [2024-11-10 22:34:52,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-11-10 22:34:52,489 INFO L425 stractBuchiCegarLoop]: Abstraction has 665 states and 712 transitions. [2024-11-10 22:34:52,489 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-10 22:34:52,490 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 665 states and 712 transitions. [2024-11-10 22:34:52,492 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:52,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:52,492 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:52,497 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 94, 84, 10, 1, 1] [2024-11-10 22:34:52,497 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:52,498 INFO L745 eck$LassoCheckResult]: Stem: 16175#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 16176#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 16177#L11 assume true; 16229#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16230#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16171#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16172#L11 assume true; 16233#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16184#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16185#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16178#L11 assume true; 16179#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16625#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16624#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16623#L11 assume true; 16622#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16621#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16620#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16619#L11 assume true; 16618#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16617#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16616#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16615#L11 assume true; 16614#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16613#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16612#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16611#L11 assume true; 16610#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16609#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16608#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16607#L11 assume true; 16606#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16605#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16604#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16603#L11 assume true; 16602#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16601#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16600#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16599#L11 assume true; 16598#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16597#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16596#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16595#L11 assume true; 16594#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16593#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16592#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16591#L11 assume true; 16590#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16589#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16588#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16587#L11 assume true; 16586#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16585#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16584#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16583#L11 assume true; 16582#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16581#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16580#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16579#L11 assume true; 16578#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16577#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16576#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16575#L11 assume true; 16574#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16573#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16572#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16571#L11 assume true; 16570#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16569#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16568#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16567#L11 assume true; 16566#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16565#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16564#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16563#L11 assume true; 16562#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16561#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16560#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16559#L11 assume true; 16556#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16558#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16557#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16555#L11 assume true; 16554#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16553#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16552#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16551#L11 assume true; 16550#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16549#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16548#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16547#L11 assume true; 16546#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16545#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16544#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16543#L11 assume true; 16542#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16541#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16540#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16539#L11 assume true; 16538#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16537#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16536#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16535#L11 assume true; 16534#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16533#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16532#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16531#L11 assume true; 16530#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16529#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16528#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16527#L11 assume true; 16526#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16525#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16524#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16523#L11 assume true; 16522#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16521#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16520#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16519#L11 assume true; 16518#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16517#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16516#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16515#L11 assume true; 16514#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16513#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16512#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16511#L11 assume true; 16510#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16509#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16508#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16507#L11 assume true; 16506#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16505#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16504#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16503#L11 assume true; 16502#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16501#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16500#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16499#L11 assume true; 16498#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16497#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16496#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16495#L11 assume true; 16494#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16493#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16492#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16491#L11 assume true; 16490#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16489#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16488#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16487#L11 assume true; 16486#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16485#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16484#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16483#L11 assume true; 16480#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16482#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16481#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16479#L11 assume true; 16478#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16477#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16476#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16475#L11 assume true; 16474#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16473#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16472#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16471#L11 assume true; 16470#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16469#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16468#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16467#L11 assume true; 16466#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16465#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16464#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16463#L11 assume true; 16462#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16461#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16460#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16459#L11 assume true; 16458#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16457#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16456#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16455#L11 assume true; 16454#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16453#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16452#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16451#L11 assume true; 16450#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16449#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16448#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16447#L11 assume true; 16446#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16445#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16444#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16443#L11 assume true; 16442#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16441#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16440#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16439#L11 assume true; 16438#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16437#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16436#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16435#L11 assume true; 16434#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16433#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16432#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16431#L11 assume true; 16430#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16429#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16428#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16427#L11 assume true; 16426#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16425#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16424#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16423#L11 assume true; 16422#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16421#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16420#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16419#L11 assume true; 16418#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16417#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16416#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16415#L11 assume true; 16414#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16413#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16412#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16411#L11 assume true; 16410#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16409#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16408#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16406#L11 assume true; 16405#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16404#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16403#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16402#L11 assume true; 16401#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16400#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16399#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16398#L11 assume true; 16397#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16396#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16395#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16394#L11 assume true; 16393#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16392#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16391#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16390#L11 assume true; 16389#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16388#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16387#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16386#L11 assume true; 16385#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16384#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16383#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16382#L11 assume true; 16381#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16380#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16379#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16378#L11 assume true; 16377#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16376#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16375#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16374#L11 assume true; 16373#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16372#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16371#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16370#L11 assume true; 16369#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16368#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16367#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16366#L11 assume true; 16365#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16364#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16363#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16362#L11 assume true; 16361#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16360#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16359#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16358#L11 assume true; 16357#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16356#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16354#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16352#L11 assume true; 16350#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16348#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16346#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16344#L11 assume true; 16342#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16340#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16338#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16336#L11 assume true; 16334#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16332#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16330#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16328#L11 assume true; 16326#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16324#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16322#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16320#L11 assume true; 16318#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16316#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16314#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16312#L11 assume true; 16310#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16308#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16306#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16304#L11 assume true; 16302#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16300#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16298#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16296#L11 assume true; 16294#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16292#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16290#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16288#L11 assume true; 16286#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16284#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16282#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16280#L11 assume true; 16228#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16278#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16274#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16275#L11 assume true; 16271#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16270#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16269#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16268#L11 assume true; 16267#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16266#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16265#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16264#L11 assume true; 16263#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16262#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16261#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16240#L11 assume true; 16239#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16234#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16231#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16232#L11 assume true; 16226#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16225#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16224#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16223#L11 assume true; 16222#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16221#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16220#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16219#L11 assume true; 16218#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16217#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16216#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16215#L11 assume true; 16199#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16214#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16213#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16211#L11 assume true; 16210#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16209#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16208#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16207#L11 assume true; 16206#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16205#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16204#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16203#L11 assume true; 16202#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16201#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16200#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16198#L11 assume true; 16197#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16196#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16195#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16194#L11 assume true; 16193#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16192#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16191#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 16190#L11 assume true; 16189#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16188#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16187#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 16183#L11 [2024-11-10 22:34:52,498 INFO L747 eck$LassoCheckResult]: Loop: 16183#L11 assume true; 16186#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 16182#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 16183#L11 [2024-11-10 22:34:52,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:52,499 INFO L85 PathProgramCache]: Analyzing trace with hash -1959529606, now seen corresponding path program 9 times [2024-11-10 22:34:52,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:52,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991265164] [2024-11-10 22:34:52,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:52,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:52,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:52,903 INFO L134 CoverageAnalysis]: Checked inductivity of 17484 backedges. 4351 proven. 136 refuted. 0 times theorem prover too weak. 12997 trivial. 0 not checked. [2024-11-10 22:34:52,903 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:52,903 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991265164] [2024-11-10 22:34:52,904 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1991265164] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:52,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1879337526] [2024-11-10 22:34:52,904 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-10 22:34:52,904 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:52,904 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:52,906 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:52,908 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2024-11-10 22:34:52,979 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2024-11-10 22:34:52,980 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:52,981 INFO L255 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-10 22:34:52,984 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:53,087 INFO L134 CoverageAnalysis]: Checked inductivity of 17484 backedges. 4328 proven. 160 refuted. 0 times theorem prover too weak. 12996 trivial. 0 not checked. [2024-11-10 22:34:53,087 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:53,205 INFO L134 CoverageAnalysis]: Checked inductivity of 17484 backedges. 4298 proven. 190 refuted. 0 times theorem prover too weak. 12996 trivial. 0 not checked. [2024-11-10 22:34:53,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1879337526] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:53,206 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:53,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 15 [2024-11-10 22:34:53,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924735100] [2024-11-10 22:34:53,206 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:53,207 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:53,207 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:53,207 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 11 times [2024-11-10 22:34:53,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:53,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951260922] [2024-11-10 22:34:53,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:53,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:53,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:53,210 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:53,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:53,211 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:53,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:53,226 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-10 22:34:53,226 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2024-11-10 22:34:53,227 INFO L87 Difference]: Start difference. First operand 665 states and 712 transitions. cyclomatic complexity: 53 Second operand has 15 states, 15 states have (on average 3.6) internal successors, (54), 15 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:53,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:34:53,355 INFO L93 Difference]: Finished difference Result 1037 states and 1133 transitions. [2024-11-10 22:34:53,356 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1037 states and 1133 transitions. [2024-11-10 22:34:53,361 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:53,363 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1037 states to 667 states and 712 transitions. [2024-11-10 22:34:53,364 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2024-11-10 22:34:53,364 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2024-11-10 22:34:53,364 INFO L73 IsDeterministic]: Start isDeterministic. Operand 667 states and 712 transitions. [2024-11-10 22:34:53,366 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:34:53,367 INFO L218 hiAutomatonCegarLoop]: Abstraction has 667 states and 712 transitions. [2024-11-10 22:34:53,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 667 states and 712 transitions. [2024-11-10 22:34:53,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 667 to 513. [2024-11-10 22:34:53,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 513 states, 513 states have (on average 1.0623781676413255) internal successors, (545), 512 states have internal predecessors, (545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:34:53,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 513 states to 513 states and 545 transitions. [2024-11-10 22:34:53,375 INFO L240 hiAutomatonCegarLoop]: Abstraction has 513 states and 545 transitions. [2024-11-10 22:34:53,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-10 22:34:53,376 INFO L425 stractBuchiCegarLoop]: Abstraction has 513 states and 545 transitions. [2024-11-10 22:34:53,376 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-10 22:34:53,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 513 states and 545 transitions. [2024-11-10 22:34:53,378 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:34:53,378 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:34:53,378 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:34:53,380 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 95, 95, 85, 10, 1, 1] [2024-11-10 22:34:53,380 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:34:53,381 INFO L745 eck$LassoCheckResult]: Stem: 20171#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 20172#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 20173#L11 assume true; 20227#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20228#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20163#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20164#L11 assume true; 20230#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20179#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20180#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20174#L11 assume true; 20175#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20674#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20673#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20672#L11 assume true; 20671#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20670#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20669#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20668#L11 assume true; 20667#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20666#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20665#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20664#L11 assume true; 20663#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20662#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20661#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20660#L11 assume true; 20659#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20658#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20657#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20656#L11 assume true; 20655#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20654#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20653#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20652#L11 assume true; 20651#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20650#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20649#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20648#L11 assume true; 20647#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20646#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20645#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20644#L11 assume true; 20643#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20642#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20641#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20640#L11 assume true; 20639#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20638#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20637#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20636#L11 assume true; 20635#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20634#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20633#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20632#L11 assume true; 20631#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20630#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20629#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20628#L11 assume true; 20627#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20626#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20625#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20624#L11 assume true; 20623#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20622#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20621#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20620#L11 assume true; 20619#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20618#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20617#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20616#L11 assume true; 20615#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20614#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20613#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20612#L11 assume true; 20611#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20610#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20609#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20608#L11 assume true; 20605#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20607#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20606#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20604#L11 assume true; 20603#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20602#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20601#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20600#L11 assume true; 20599#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20598#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20597#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20596#L11 assume true; 20595#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20594#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20593#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20592#L11 assume true; 20591#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20590#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20589#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20588#L11 assume true; 20587#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20586#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20585#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20584#L11 assume true; 20583#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20582#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20581#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20580#L11 assume true; 20579#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20578#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20577#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20576#L11 assume true; 20575#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20574#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20573#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20572#L11 assume true; 20571#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20570#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20569#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20568#L11 assume true; 20567#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20566#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20565#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20564#L11 assume true; 20563#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20562#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20561#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20560#L11 assume true; 20559#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20558#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20557#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20556#L11 assume true; 20555#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20554#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20553#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20552#L11 assume true; 20551#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20550#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20549#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20548#L11 assume true; 20547#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20546#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20545#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20544#L11 assume true; 20543#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20542#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20541#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20540#L11 assume true; 20539#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20538#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20537#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20536#L11 assume true; 20535#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20534#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20533#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20532#L11 assume true; 20529#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20531#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20530#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20528#L11 assume true; 20527#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20526#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20525#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20524#L11 assume true; 20523#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20522#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20521#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20520#L11 assume true; 20519#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20518#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20517#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20516#L11 assume true; 20515#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20514#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20513#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20512#L11 assume true; 20511#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20510#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20509#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20508#L11 assume true; 20507#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20506#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20505#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20504#L11 assume true; 20503#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20502#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20501#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20500#L11 assume true; 20499#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20498#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20497#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20496#L11 assume true; 20495#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20494#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20493#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20492#L11 assume true; 20491#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20490#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20489#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20488#L11 assume true; 20487#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20486#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20485#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20484#L11 assume true; 20483#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20482#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20481#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20480#L11 assume true; 20479#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20478#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20477#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20476#L11 assume true; 20475#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20474#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20473#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20472#L11 assume true; 20471#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20470#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20469#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20468#L11 assume true; 20467#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20466#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20465#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20464#L11 assume true; 20463#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20462#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20461#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20460#L11 assume true; 20457#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20459#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20458#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20456#L11 assume true; 20455#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20454#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20453#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20452#L11 assume true; 20451#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20450#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20449#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20448#L11 assume true; 20447#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20446#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20445#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20444#L11 assume true; 20443#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20442#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20441#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20440#L11 assume true; 20439#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20438#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20437#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20436#L11 assume true; 20435#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20434#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20433#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20432#L11 assume true; 20431#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20430#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20429#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20428#L11 assume true; 20427#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20426#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20425#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20424#L11 assume true; 20423#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20422#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20421#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20420#L11 assume true; 20419#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20418#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20417#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20416#L11 assume true; 20415#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20414#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20413#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20412#L11 assume true; 20411#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20410#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20409#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20408#L11 assume true; 20407#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20406#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20405#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20404#L11 assume true; 20403#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20402#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20401#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20400#L11 assume true; 20399#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20398#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20397#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20396#L11 assume true; 20395#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20394#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20393#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20332#L11 assume true; 20331#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20330#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20329#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20328#L11 assume true; 20298#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20296#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20294#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20292#L11 assume true; 20290#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20288#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20286#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20284#L11 assume true; 20282#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20280#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20278#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20276#L11 assume true; 20274#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20272#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20270#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20268#L11 assume true; 20266#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20264#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20262#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20257#L11 assume true; 20223#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20254#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20318#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20255#L11 assume true; 20248#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20247#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20246#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20245#L11 assume true; 20244#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20243#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20242#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20241#L11 assume true; 20240#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20239#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20238#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20237#L11 assume true; 20236#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20231#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20229#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20226#L11 assume true; 20206#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20225#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20224#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20222#L11 assume true; 20221#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20220#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20219#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20218#L11 assume true; 20217#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20216#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20215#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20214#L11 assume true; 20213#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20212#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20211#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20210#L11 assume true; 20209#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20208#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20207#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20205#L11 assume true; 20204#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20203#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20202#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20201#L11 assume true; 20200#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20199#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20198#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20197#L11 assume true; 20196#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20195#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20194#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20193#L11 assume true; 20192#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20191#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20190#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20189#L11 assume true; 20188#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20187#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20186#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 20185#L11 assume true; 20184#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20183#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20182#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 20178#L11 [2024-11-10 22:34:53,381 INFO L747 eck$LassoCheckResult]: Loop: 20178#L11 assume true; 20181#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 20177#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 20178#L11 [2024-11-10 22:34:53,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:53,382 INFO L85 PathProgramCache]: Analyzing trace with hash 1805269624, now seen corresponding path program 10 times [2024-11-10 22:34:53,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:53,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830181995] [2024-11-10 22:34:53,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:53,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:53,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:34:53,800 INFO L134 CoverageAnalysis]: Checked inductivity of 17860 backedges. 4536 proven. 10360 refuted. 0 times theorem prover too weak. 2964 trivial. 0 not checked. [2024-11-10 22:34:53,800 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:34:53,800 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830181995] [2024-11-10 22:34:53,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830181995] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:34:53,800 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2046373879] [2024-11-10 22:34:53,801 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-10 22:34:53,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:34:53,801 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:34:53,819 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:34:53,821 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2024-11-10 22:34:53,938 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-10 22:34:53,938 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:34:53,942 INFO L255 TraceCheckSpWp]: Trace formula consists of 698 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-10 22:34:53,946 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:34:54,726 INFO L134 CoverageAnalysis]: Checked inductivity of 17860 backedges. 5578 proven. 10078 refuted. 0 times theorem prover too weak. 2204 trivial. 0 not checked. [2024-11-10 22:34:54,727 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:34:55,476 INFO L134 CoverageAnalysis]: Checked inductivity of 17860 backedges. 5578 proven. 10078 refuted. 0 times theorem prover too weak. 2204 trivial. 0 not checked. [2024-11-10 22:34:55,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2046373879] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:34:55,477 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:34:55,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 32, 32] total 58 [2024-11-10 22:34:55,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138818227] [2024-11-10 22:34:55,477 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:34:55,478 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:34:55,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:34:55,478 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 12 times [2024-11-10 22:34:55,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:34:55,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457158335] [2024-11-10 22:34:55,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:34:55,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:34:55,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:55,481 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:34:55,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:34:55,482 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:34:55,501 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:34:55,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2024-11-10 22:34:55,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=717, Invalid=2589, Unknown=0, NotChecked=0, Total=3306 [2024-11-10 22:34:55,504 INFO L87 Difference]: Start difference. First operand 513 states and 545 transitions. cyclomatic complexity: 38 Second operand has 58 states, 58 states have (on average 4.172413793103448) internal successors, (242), 58 states have internal predecessors, (242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:35:00,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:35:00,441 INFO L93 Difference]: Finished difference Result 1850 states and 1927 transitions. [2024-11-10 22:35:00,442 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1850 states and 1927 transitions. [2024-11-10 22:35:00,449 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:35:00,455 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1850 states to 1619 states and 1696 transitions. [2024-11-10 22:35:00,456 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 56 [2024-11-10 22:35:00,456 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 56 [2024-11-10 22:35:00,456 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1619 states and 1696 transitions. [2024-11-10 22:35:00,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:35:00,456 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1619 states and 1696 transitions. [2024-11-10 22:35:00,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1619 states and 1696 transitions. [2024-11-10 22:35:00,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1619 to 1225. [2024-11-10 22:35:00,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1225 states, 1225 states have (on average 1.0359183673469388) internal successors, (1269), 1224 states have internal predecessors, (1269), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:35:00,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1225 states to 1225 states and 1269 transitions. [2024-11-10 22:35:00,473 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1225 states and 1269 transitions. [2024-11-10 22:35:00,473 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 226 states. [2024-11-10 22:35:00,474 INFO L425 stractBuchiCegarLoop]: Abstraction has 1225 states and 1269 transitions. [2024-11-10 22:35:00,474 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-10 22:35:00,474 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1225 states and 1269 transitions. [2024-11-10 22:35:00,478 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:35:00,478 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:35:00,478 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:35:00,481 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [145, 145, 145, 129, 16, 1, 1] [2024-11-10 22:35:00,482 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:35:00,482 INFO L745 eck$LassoCheckResult]: Stem: 25525#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 25526#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 25527#L11 assume true; 25578#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25579#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25521#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25522#L11 assume true; 25581#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25532#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25533#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25528#L11 assume true; 25529#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26361#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26360#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26359#L11 assume true; 26358#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26357#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26356#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26355#L11 assume true; 26354#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26353#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26352#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26351#L11 assume true; 26350#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26349#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26348#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26347#L11 assume true; 26346#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26345#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26344#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26343#L11 assume true; 26342#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26341#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26340#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26339#L11 assume true; 26338#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26337#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26336#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26335#L11 assume true; 26334#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26333#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26332#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26331#L11 assume true; 26330#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26329#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26328#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26327#L11 assume true; 26326#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26325#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26324#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26323#L11 assume true; 26322#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26321#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26320#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26319#L11 assume true; 26318#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26317#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26316#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26315#L11 assume true; 26314#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26313#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26312#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26311#L11 assume true; 26310#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26309#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26308#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26307#L11 assume true; 26306#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26305#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26304#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26303#L11 assume true; 26302#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26301#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26300#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26299#L11 assume true; 26298#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26297#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26296#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26295#L11 assume true; 26289#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26292#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26290#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26288#L11 assume true; 26287#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26286#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26285#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 26284#L11 assume true; 26283#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26282#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26281#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26280#L11 assume true; 26279#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26278#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26277#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26276#L11 assume true; 26275#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26274#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26273#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26272#L11 assume true; 26271#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26270#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26269#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26268#L11 assume true; 26267#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26266#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26265#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26264#L11 assume true; 26263#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26262#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26261#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26260#L11 assume true; 26259#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26258#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26257#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26256#L11 assume true; 26255#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26254#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26253#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26252#L11 assume true; 26251#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26250#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26249#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26248#L11 assume true; 26247#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26246#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26245#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26244#L11 assume true; 26243#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26242#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26241#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26240#L11 assume true; 26239#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26238#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26237#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26236#L11 assume true; 26235#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26234#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26233#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26232#L11 assume true; 26231#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26230#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26229#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26228#L11 assume true; 26227#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26226#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26225#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26224#L11 assume true; 26223#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26222#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26221#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26220#L11 assume true; 26219#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26218#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26217#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26216#L11 assume true; 26215#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26214#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26213#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26211#L11 assume true; 26210#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26209#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26208#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 26207#L11 assume true; 26206#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26205#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26204#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26203#L11 assume true; 26202#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26201#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26200#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26199#L11 assume true; 26198#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26197#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26196#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26195#L11 assume true; 26194#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26193#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26192#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26191#L11 assume true; 26190#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26189#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26188#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26187#L11 assume true; 26186#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26185#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26184#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26183#L11 assume true; 26182#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26181#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26180#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26179#L11 assume true; 26178#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26177#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26176#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26175#L11 assume true; 26174#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26173#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26172#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26171#L11 assume true; 26170#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26169#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26168#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26167#L11 assume true; 26166#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26165#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26164#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26163#L11 assume true; 26162#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26161#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26160#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26159#L11 assume true; 26158#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26157#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26156#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26155#L11 assume true; 26154#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26153#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26152#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26151#L11 assume true; 26150#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26149#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26148#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26147#L11 assume true; 26146#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26145#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26144#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26143#L11 assume true; 26142#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26141#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26140#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26138#L11 assume true; 26137#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26136#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26135#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 26134#L11 assume true; 26133#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26132#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26131#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26130#L11 assume true; 26129#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26128#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26127#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26126#L11 assume true; 26125#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26124#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26123#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26122#L11 assume true; 26121#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26120#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26119#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26118#L11 assume true; 26117#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26116#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26115#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26114#L11 assume true; 26113#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26112#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26111#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26110#L11 assume true; 26109#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26108#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26107#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26106#L11 assume true; 26105#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26104#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26103#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26102#L11 assume true; 26101#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26100#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26099#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26098#L11 assume true; 26097#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26096#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26095#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26094#L11 assume true; 26093#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26092#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26091#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26090#L11 assume true; 26089#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26088#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26087#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26086#L11 assume true; 26085#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26084#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26083#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26044#L11 assume true; 26045#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26041#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26040#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26038#L11 assume true; 26039#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26034#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26035#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26031#L11 assume true; 26017#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26026#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 26027#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 26022#L11 assume true; 26021#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 26020#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25971#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25970#L11 assume true; 25969#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25968#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25967#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25966#L11 assume true; 25965#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25964#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25963#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25962#L11 assume true; 25961#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25960#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25959#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25958#L11 assume true; 25957#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25956#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25955#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25954#L11 assume true; 25953#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25952#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25951#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25950#L11 assume true; 25949#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25948#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25947#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25946#L11 assume true; 25945#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25944#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25943#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25942#L11 assume true; 25941#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25940#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25939#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25938#L11 assume true; 25937#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25936#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25935#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25934#L11 assume true; 25933#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25932#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25931#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25930#L11 assume true; 25929#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25928#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25927#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25926#L11 assume true; 25827#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25825#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25823#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25821#L11 assume true; 25822#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25925#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25924#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25923#L11 assume true; 25922#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25921#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25920#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25919#L11 assume true; 25918#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25917#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25916#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25915#L11 assume true; 25914#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25913#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25912#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25911#L11 assume true; 25910#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25909#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25908#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25907#L11 assume true; 25906#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25905#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25904#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25903#L11 assume true; 25902#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25901#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25899#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25898#L11 assume true; 25897#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25895#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25768#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25765#L11 assume true; 25763#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25762#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25760#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25761#L11 assume true; 25757#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25756#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25747#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25746#L11 assume true; 25745#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25744#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25743#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25742#L11 assume true; 25741#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25740#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25739#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25738#L11 assume true; 25737#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25736#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25735#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25734#L11 assume true; 25733#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25732#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25731#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25730#L11 assume true; 25729#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25728#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25727#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25725#L11 assume true; 25726#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25755#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25720#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25721#L11 assume true; 25717#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25716#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25711#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25710#L11 assume true; 25709#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25708#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25707#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25706#L11 assume true; 25705#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25704#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25703#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25702#L11 assume true; 25701#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25700#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25699#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25698#L11 assume true; 25697#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25696#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25695#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25694#L11 assume true; 25693#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25692#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25691#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25688#L11 assume true; 25689#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25714#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25712#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25713#L11 assume true; 25681#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25680#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25679#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25678#L11 assume true; 25677#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25676#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25675#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25674#L11 assume true; 25673#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25672#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25671#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25670#L11 assume true; 25669#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25668#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25667#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25666#L11 assume true; 25665#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25664#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25663#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25662#L11 assume true; 25661#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25659#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25657#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25654#L11 assume true; 25655#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25660#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25658#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25656#L11 assume true; 25649#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25648#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25647#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25646#L11 assume true; 25645#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25644#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25643#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25642#L11 assume true; 25641#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25640#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25639#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25638#L11 assume true; 25637#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25636#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25635#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25634#L11 assume true; 25633#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25632#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25631#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25630#L11 assume true; 25629#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25628#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25627#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25626#L11 assume true; 25599#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25625#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25624#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25622#L11 assume true; 25621#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25620#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25619#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25618#L11 assume true; 25617#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25616#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25615#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25614#L11 assume true; 25613#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25612#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25611#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25610#L11 assume true; 25609#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25608#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25607#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25606#L11 assume true; 25605#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25604#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25603#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25602#L11 assume true; 25576#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25601#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25600#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25598#L11 assume true; 25597#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25596#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25595#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25594#L11 assume true; 25593#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25592#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25591#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25590#L11 assume true; 25589#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25588#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25587#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25586#L11 assume true; 25585#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25584#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25583#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25582#L11 assume true; 25559#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25580#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25577#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25575#L11 assume true; 25574#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25573#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25572#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25571#L11 assume true; 25570#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25569#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25568#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25567#L11 assume true; 25566#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25565#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25564#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25563#L11 assume true; 25562#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25561#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25560#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25558#L11 assume true; 25557#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25556#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25555#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25554#L11 assume true; 25553#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25552#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25551#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25550#L11 assume true; 25549#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25548#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25547#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25546#L11 assume true; 25545#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25544#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25543#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25542#L11 assume true; 25541#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25540#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25539#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 25538#L11 assume true; 25537#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25536#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25535#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 25531#L11 [2024-11-10 22:35:00,482 INFO L747 eck$LassoCheckResult]: Loop: 25531#L11 assume true; 25534#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 25530#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 25531#L11 [2024-11-10 22:35:00,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:00,483 INFO L85 PathProgramCache]: Analyzing trace with hash 712278926, now seen corresponding path program 11 times [2024-11-10 22:35:00,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:00,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065616300] [2024-11-10 22:35:00,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:00,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:00,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:35:01,789 INFO L134 CoverageAnalysis]: Checked inductivity of 41760 backedges. 20192 proven. 15894 refuted. 0 times theorem prover too weak. 5674 trivial. 0 not checked. [2024-11-10 22:35:01,790 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:35:01,790 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065616300] [2024-11-10 22:35:01,790 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1065616300] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:35:01,790 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1798646616] [2024-11-10 22:35:01,790 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-10 22:35:01,791 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:35:01,791 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:35:01,793 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:35:01,795 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2024-11-10 22:35:02,016 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 70 check-sat command(s) [2024-11-10 22:35:02,017 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:35:02,020 INFO L255 TraceCheckSpWp]: Trace formula consists of 507 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-10 22:35:02,026 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:35:02,675 INFO L134 CoverageAnalysis]: Checked inductivity of 41760 backedges. 28322 proven. 3390 refuted. 0 times theorem prover too weak. 10048 trivial. 0 not checked. [2024-11-10 22:35:02,676 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:35:03,251 INFO L134 CoverageAnalysis]: Checked inductivity of 41760 backedges. 28322 proven. 3390 refuted. 0 times theorem prover too weak. 10048 trivial. 0 not checked. [2024-11-10 22:35:03,251 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1798646616] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:35:03,251 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:35:03,252 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 35, 35] total 60 [2024-11-10 22:35:03,252 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714357403] [2024-11-10 22:35:03,252 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:35:03,253 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:35:03,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:03,253 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 13 times [2024-11-10 22:35:03,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:03,253 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953651961] [2024-11-10 22:35:03,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:03,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:03,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:03,256 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:35:03,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:03,257 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:35:03,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:35:03,273 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2024-11-10 22:35:03,274 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=733, Invalid=2807, Unknown=0, NotChecked=0, Total=3540 [2024-11-10 22:35:03,275 INFO L87 Difference]: Start difference. First operand 1225 states and 1269 transitions. cyclomatic complexity: 50 Second operand has 60 states, 60 states have (on average 4.1) internal successors, (246), 60 states have internal predecessors, (246), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:35:07,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:35:07,216 INFO L93 Difference]: Finished difference Result 1889 states and 1944 transitions. [2024-11-10 22:35:07,216 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1889 states and 1944 transitions. [2024-11-10 22:35:07,222 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:35:07,228 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1889 states to 1790 states and 1845 transitions. [2024-11-10 22:35:07,228 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2024-11-10 22:35:07,228 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2024-11-10 22:35:07,228 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1790 states and 1845 transitions. [2024-11-10 22:35:07,228 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:35:07,230 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1790 states and 1845 transitions. [2024-11-10 22:35:07,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1790 states and 1845 transitions. [2024-11-10 22:35:07,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1790 to 857. [2024-11-10 22:35:07,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 857 states, 857 states have (on average 1.0233372228704785) internal successors, (877), 856 states have internal predecessors, (877), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:35:07,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 857 states to 857 states and 877 transitions. [2024-11-10 22:35:07,242 INFO L240 hiAutomatonCegarLoop]: Abstraction has 857 states and 877 transitions. [2024-11-10 22:35:07,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 181 states. [2024-11-10 22:35:07,243 INFO L425 stractBuchiCegarLoop]: Abstraction has 857 states and 877 transitions. [2024-11-10 22:35:07,243 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-10 22:35:07,243 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 857 states and 877 transitions. [2024-11-10 22:35:07,245 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:35:07,245 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:35:07,245 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:35:07,251 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [209, 209, 209, 189, 20, 1, 1] [2024-11-10 22:35:07,251 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:35:07,252 INFO L745 eck$LassoCheckResult]: Stem: 32519#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 32520#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 32529#L11 assume true; 32580#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32581#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32525#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32526#L11 assume true; 32583#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32534#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32535#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32530#L11 assume true; 32531#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33369#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33368#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33367#L11 assume true; 33366#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33365#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33364#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33363#L11 assume true; 33362#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33361#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33360#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33359#L11 assume true; 33358#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33357#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33356#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33355#L11 assume true; 33354#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33353#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33352#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33351#L11 assume true; 33350#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33349#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33348#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33347#L11 assume true; 33346#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33345#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33344#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33343#L11 assume true; 33342#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33341#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33340#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33339#L11 assume true; 33338#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33337#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33336#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33335#L11 assume true; 33334#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33333#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33332#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33331#L11 assume true; 33330#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33329#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33328#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33327#L11 assume true; 33326#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33325#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33324#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33323#L11 assume true; 33322#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33321#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33320#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33319#L11 assume true; 33318#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33317#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33316#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33315#L11 assume true; 33314#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33313#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33312#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33311#L11 assume true; 33310#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33309#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33308#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33307#L11 assume true; 33306#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33305#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33304#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33303#L11 assume true; 33300#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33302#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33301#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33299#L11 assume true; 33298#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33297#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33296#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 33295#L11 assume true; 33294#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33293#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33292#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33291#L11 assume true; 33290#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33289#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33288#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33287#L11 assume true; 33286#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33285#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33284#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33283#L11 assume true; 33282#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33281#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33280#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33279#L11 assume true; 33278#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33277#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33276#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33275#L11 assume true; 33274#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33273#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33272#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33271#L11 assume true; 33270#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33269#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33268#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33267#L11 assume true; 33266#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33265#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33264#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33263#L11 assume true; 33262#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33261#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33260#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33259#L11 assume true; 33258#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33257#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33256#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33255#L11 assume true; 33254#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33253#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33252#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33251#L11 assume true; 33250#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33249#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33248#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33247#L11 assume true; 33246#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33245#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33244#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33243#L11 assume true; 33242#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33241#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33240#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33239#L11 assume true; 33238#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33237#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33236#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33235#L11 assume true; 33234#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33232#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33231#L11 assume true; 33230#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33229#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33228#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33227#L11 assume true; 33224#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33226#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33225#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33223#L11 assume true; 33222#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33221#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33220#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 33219#L11 assume true; 33218#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33217#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33216#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33215#L11 assume true; 33214#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33213#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33212#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33211#L11 assume true; 33210#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33209#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33208#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33207#L11 assume true; 33206#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33205#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33204#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33203#L11 assume true; 33202#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33201#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33200#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33199#L11 assume true; 33198#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33197#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33196#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33195#L11 assume true; 33194#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33193#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33192#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33191#L11 assume true; 33190#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33189#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33188#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33187#L11 assume true; 33186#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33185#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33184#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33183#L11 assume true; 33182#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33181#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33180#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33179#L11 assume true; 33178#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33177#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33176#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33175#L11 assume true; 33174#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33173#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33172#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33171#L11 assume true; 33170#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33169#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33168#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33167#L11 assume true; 33166#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33165#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33164#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33163#L11 assume true; 33162#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33161#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33160#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33159#L11 assume true; 33158#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33157#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33156#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33155#L11 assume true; 33085#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33154#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33153#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33152#L11 assume true; 33151#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33150#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33149#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 33148#L11 assume true; 33147#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33146#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33145#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33144#L11 assume true; 33143#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33142#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33141#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33140#L11 assume true; 33139#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33138#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33137#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33136#L11 assume true; 33135#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33134#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33133#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33132#L11 assume true; 33131#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33130#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33129#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33128#L11 assume true; 33127#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33126#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33125#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33124#L11 assume true; 33123#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33122#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33121#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33120#L11 assume true; 33119#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33118#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33117#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33116#L11 assume true; 33115#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33114#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33113#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33112#L11 assume true; 33111#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33110#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33109#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33108#L11 assume true; 33107#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33106#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33105#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33104#L11 assume true; 33103#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33102#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33101#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33100#L11 assume true; 33099#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33098#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33097#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33096#L11 assume true; 33095#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33094#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33093#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33092#L11 assume true; 33091#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33090#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33089#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33088#L11 assume true; 33021#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33087#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33086#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33084#L11 assume true; 33083#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33082#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33081#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 33080#L11 assume true; 33079#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33077#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33076#L11 assume true; 33075#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33074#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33073#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33072#L11 assume true; 33071#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33070#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33069#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33068#L11 assume true; 33067#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33066#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33065#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33064#L11 assume true; 33063#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33062#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33061#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33060#L11 assume true; 33059#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33058#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33057#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33056#L11 assume true; 33055#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33054#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33053#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33052#L11 assume true; 33051#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33050#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33049#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33048#L11 assume true; 33047#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33046#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33045#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33044#L11 assume true; 33043#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33042#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33041#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33040#L11 assume true; 33039#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33038#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33037#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33036#L11 assume true; 33035#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33034#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33033#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33032#L11 assume true; 33031#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33030#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33029#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33028#L11 assume true; 33027#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33026#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33025#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33024#L11 assume true; 32961#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33023#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33022#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33020#L11 assume true; 33019#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33018#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33017#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 33016#L11 assume true; 33015#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33014#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33013#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33012#L11 assume true; 33011#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33010#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33009#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33008#L11 assume true; 33007#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33006#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33005#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33004#L11 assume true; 33003#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 33002#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 33001#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 33000#L11 assume true; 32999#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32998#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32997#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32996#L11 assume true; 32995#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32994#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32993#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32992#L11 assume true; 32991#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32990#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32989#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32988#L11 assume true; 32987#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32986#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32985#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32984#L11 assume true; 32983#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32982#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32981#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32980#L11 assume true; 32979#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32978#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32977#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32976#L11 assume true; 32975#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32974#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32973#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32972#L11 assume true; 32971#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32970#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32968#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32966#L11 assume true; 32967#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32969#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32962#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32963#L11 assume true; 32959#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32958#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32957#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32956#L11 assume true; 32955#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32954#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32953#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32952#L11 assume true; 32951#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32950#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32949#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32948#L11 assume true; 32947#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32946#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32945#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32944#L11 assume true; 32943#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32942#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32941#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32940#L11 assume true; 32939#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32938#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32937#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32936#L11 assume true; 32935#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32934#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32933#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32932#L11 assume true; 32931#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32930#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32929#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32928#L11 assume true; 32927#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32926#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32925#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32924#L11 assume true; 32923#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32922#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32921#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32920#L11 assume true; 32919#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32918#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32917#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32916#L11 assume true; 32915#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32914#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32913#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32912#L11 assume true; 32911#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32910#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32909#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32908#L11 assume true; 32853#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32907#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32906#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32904#L11 assume true; 32903#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32902#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32901#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32900#L11 assume true; 32899#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32898#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32897#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32896#L11 assume true; 32895#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32894#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32893#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32892#L11 assume true; 32891#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32890#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32889#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32888#L11 assume true; 32887#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32886#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32885#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32884#L11 assume true; 32883#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32882#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32881#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32880#L11 assume true; 32879#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32878#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32877#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32876#L11 assume true; 32875#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32874#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32873#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32872#L11 assume true; 32871#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32870#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32869#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32868#L11 assume true; 32867#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32866#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32865#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32864#L11 assume true; 32863#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32862#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32861#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32860#L11 assume true; 32859#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32858#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32857#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32856#L11 assume true; 32805#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32855#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32854#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32852#L11 assume true; 32851#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32850#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32849#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32848#L11 assume true; 32847#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32846#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32845#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32844#L11 assume true; 32843#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32842#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32841#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32840#L11 assume true; 32839#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32838#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32837#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32836#L11 assume true; 32835#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32834#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32833#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32832#L11 assume true; 32831#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32830#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32829#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32828#L11 assume true; 32827#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32826#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32825#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32824#L11 assume true; 32823#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32822#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32821#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32820#L11 assume true; 32819#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32818#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32817#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32816#L11 assume true; 32815#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32814#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32813#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32812#L11 assume true; 32811#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32810#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32809#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32808#L11 assume true; 32761#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32807#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32806#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32804#L11 assume true; 32803#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32802#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32801#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32800#L11 assume true; 32799#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32798#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32797#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32796#L11 assume true; 32795#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32794#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32793#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32792#L11 assume true; 32791#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32790#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32789#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32788#L11 assume true; 32787#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32786#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32785#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32784#L11 assume true; 32783#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32782#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32781#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32780#L11 assume true; 32779#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32778#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32777#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32776#L11 assume true; 32775#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32774#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32773#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32772#L11 assume true; 32771#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32770#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32769#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32768#L11 assume true; 32767#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32766#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32765#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32764#L11 assume true; 32721#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32763#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32762#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32760#L11 assume true; 32759#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32758#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32757#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32756#L11 assume true; 32755#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32754#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32753#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32752#L11 assume true; 32751#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32750#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32749#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32748#L11 assume true; 32747#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32746#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32745#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32744#L11 assume true; 32743#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32742#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32741#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32740#L11 assume true; 32739#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32738#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32737#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32736#L11 assume true; 32735#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32734#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32733#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32732#L11 assume true; 32731#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32730#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32729#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32728#L11 assume true; 32727#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32726#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32725#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32724#L11 assume true; 32685#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32723#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32722#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32720#L11 assume true; 32719#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32718#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32717#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32716#L11 assume true; 32715#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32714#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32713#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32712#L11 assume true; 32711#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32710#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32709#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32708#L11 assume true; 32707#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32706#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32705#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32704#L11 assume true; 32703#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32702#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32701#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32700#L11 assume true; 32699#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32698#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32697#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32696#L11 assume true; 32695#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32694#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32693#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32692#L11 assume true; 32691#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32690#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32689#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32688#L11 assume true; 32653#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32687#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32686#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32684#L11 assume true; 32683#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32682#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32681#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32680#L11 assume true; 32679#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32678#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32677#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32676#L11 assume true; 32675#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32674#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32673#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32672#L11 assume true; 32671#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32670#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32669#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32668#L11 assume true; 32667#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32666#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32665#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32664#L11 assume true; 32663#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32662#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32661#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32660#L11 assume true; 32659#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32658#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32657#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32656#L11 assume true; 32625#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32655#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32654#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32652#L11 assume true; 32651#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32650#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32649#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32648#L11 assume true; 32647#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32646#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32645#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32644#L11 assume true; 32643#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32642#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32641#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32640#L11 assume true; 32639#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32638#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32637#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32636#L11 assume true; 32635#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32634#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32633#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32632#L11 assume true; 32631#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32630#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32629#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32628#L11 assume true; 32601#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32627#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32626#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32624#L11 assume true; 32623#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32622#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32621#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32620#L11 assume true; 32619#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32618#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32617#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32616#L11 assume true; 32615#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32614#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32613#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32612#L11 assume true; 32611#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32610#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32609#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32608#L11 assume true; 32607#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32606#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32605#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32604#L11 assume true; 32578#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32603#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32602#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32600#L11 assume true; 32599#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32598#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32597#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32596#L11 assume true; 32595#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32594#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32593#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32592#L11 assume true; 32591#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32590#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32589#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32588#L11 assume true; 32587#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32586#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32585#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32584#L11 assume true; 32561#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32582#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32579#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32577#L11 assume true; 32576#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32575#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32574#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32573#L11 assume true; 32572#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32571#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32570#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32569#L11 assume true; 32568#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32567#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32566#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32565#L11 assume true; 32564#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32563#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32562#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32560#L11 assume true; 32559#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32558#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32557#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32556#L11 assume true; 32555#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32554#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32553#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32552#L11 assume true; 32551#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32550#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32549#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32548#L11 assume true; 32547#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32546#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32545#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32544#L11 assume true; 32543#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32542#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32541#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 32540#L11 assume true; 32539#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32538#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32537#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 32533#L11 [2024-11-10 22:35:07,253 INFO L747 eck$LassoCheckResult]: Loop: 32533#L11 assume true; 32536#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 32532#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 32533#L11 [2024-11-10 22:35:07,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:07,253 INFO L85 PathProgramCache]: Analyzing trace with hash -1268701558, now seen corresponding path program 12 times [2024-11-10 22:35:07,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:07,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2057018182] [2024-11-10 22:35:07,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:07,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:07,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 22:35:08,545 INFO L134 CoverageAnalysis]: Checked inductivity of 86944 backedges. 43680 proven. 18760 refuted. 0 times theorem prover too weak. 24504 trivial. 0 not checked. [2024-11-10 22:35:08,546 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 22:35:08,546 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2057018182] [2024-11-10 22:35:08,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2057018182] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-10 22:35:08,546 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1590360343] [2024-11-10 22:35:08,546 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-10 22:35:08,546 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-10 22:35:08,546 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 22:35:08,548 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-10 22:35:08,549 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2024-11-10 22:35:09,043 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 142 check-sat command(s) [2024-11-10 22:35:09,044 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-10 22:35:09,047 INFO L255 TraceCheckSpWp]: Trace formula consists of 1044 conjuncts, 35 conjuncts are in the unsatisfiable core [2024-11-10 22:35:09,056 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-10 22:35:09,813 INFO L134 CoverageAnalysis]: Checked inductivity of 86944 backedges. 55096 proven. 3332 refuted. 0 times theorem prover too weak. 28516 trivial. 0 not checked. [2024-11-10 22:35:09,814 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-10 22:35:10,379 INFO L134 CoverageAnalysis]: Checked inductivity of 86944 backedges. 55096 proven. 3332 refuted. 0 times theorem prover too weak. 28516 trivial. 0 not checked. [2024-11-10 22:35:10,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1590360343] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-10 22:35:10,379 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-10 22:35:10,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 35, 35] total 53 [2024-11-10 22:35:10,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506766972] [2024-11-10 22:35:10,380 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-10 22:35:10,381 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 22:35:10,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:10,381 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 14 times [2024-11-10 22:35:10,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:10,381 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735710116] [2024-11-10 22:35:10,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:10,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:10,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:10,383 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:35:10,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:10,384 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:35:10,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 22:35:10,396 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2024-11-10 22:35:10,397 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=541, Invalid=2215, Unknown=0, NotChecked=0, Total=2756 [2024-11-10 22:35:10,397 INFO L87 Difference]: Start difference. First operand 857 states and 877 transitions. cyclomatic complexity: 25 Second operand has 53 states, 53 states have (on average 4.188679245283019) internal successors, (222), 53 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:35:15,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 22:35:15,743 INFO L93 Difference]: Finished difference Result 1090 states and 1127 transitions. [2024-11-10 22:35:15,743 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1090 states and 1127 transitions. [2024-11-10 22:35:15,747 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:35:15,751 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1090 states to 1087 states and 1124 transitions. [2024-11-10 22:35:15,751 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 53 [2024-11-10 22:35:15,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 53 [2024-11-10 22:35:15,751 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1087 states and 1124 transitions. [2024-11-10 22:35:15,752 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-10 22:35:15,752 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1087 states and 1124 transitions. [2024-11-10 22:35:15,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1087 states and 1124 transitions. [2024-11-10 22:35:15,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1087 to 857. [2024-11-10 22:35:15,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 857 states, 857 states have (on average 1.0221703617269544) internal successors, (876), 856 states have internal predecessors, (876), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 22:35:15,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 857 states to 857 states and 876 transitions. [2024-11-10 22:35:15,763 INFO L240 hiAutomatonCegarLoop]: Abstraction has 857 states and 876 transitions. [2024-11-10 22:35:15,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 232 states. [2024-11-10 22:35:15,764 INFO L425 stractBuchiCegarLoop]: Abstraction has 857 states and 876 transitions. [2024-11-10 22:35:15,764 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-10 22:35:15,764 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 857 states and 876 transitions. [2024-11-10 22:35:15,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-10 22:35:15,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 22:35:15,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 22:35:15,772 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [210, 210, 210, 190, 20, 1, 1] [2024-11-10 22:35:15,772 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 22:35:15,773 INFO L745 eck$LassoCheckResult]: Stem: 39978#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true; 39979#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_~i~0#1, main_~range~0#1;havoc main_~i~0#1;havoc main_~range~0#1;havoc main_#t~nondet0#1;main_~i~0#1 := main_#t~nondet0#1;havoc main_#t~nondet0#1;main_~range~0#1 := 20; 39980#L11 assume true; 40031#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40032#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 39970#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 39971#L11 assume true; 40034#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 39985#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 39986#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 39981#L11 assume true; 39982#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40820#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40819#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40818#L11 assume true; 40817#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40816#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40815#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40814#L11 assume true; 40813#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40812#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40811#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40810#L11 assume true; 40809#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40808#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40807#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40806#L11 assume true; 40805#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40804#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40803#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40802#L11 assume true; 40801#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40800#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40799#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40798#L11 assume true; 40797#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40796#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40795#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40794#L11 assume true; 40793#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40792#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40791#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40790#L11 assume true; 40789#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40788#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40787#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40786#L11 assume true; 40785#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40784#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40783#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40782#L11 assume true; 40781#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40780#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40779#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40778#L11 assume true; 40777#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40776#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40775#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40774#L11 assume true; 40773#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40772#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40771#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40770#L11 assume true; 40769#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40768#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40767#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40766#L11 assume true; 40765#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40764#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40763#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40762#L11 assume true; 40761#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40760#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40759#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40758#L11 assume true; 40757#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40756#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40755#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40754#L11 assume true; 40751#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40753#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40752#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40750#L11 assume true; 40749#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40748#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40747#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40746#L11 assume true; 40745#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40744#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40743#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40742#L11 assume true; 40741#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40740#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40739#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40738#L11 assume true; 40737#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40736#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40735#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40734#L11 assume true; 40733#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40732#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40731#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40730#L11 assume true; 40729#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40728#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40727#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40726#L11 assume true; 40725#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40724#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40723#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40722#L11 assume true; 40721#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40720#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40719#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40718#L11 assume true; 40717#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40716#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40715#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40714#L11 assume true; 40713#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40712#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40711#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40710#L11 assume true; 40709#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40708#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40707#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40706#L11 assume true; 40705#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40704#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40703#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40702#L11 assume true; 40701#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40700#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40699#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40698#L11 assume true; 40697#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40696#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40695#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40694#L11 assume true; 40693#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40692#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40691#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40690#L11 assume true; 40689#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40688#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40687#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40686#L11 assume true; 40685#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40684#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40683#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40682#L11 assume true; 40681#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40680#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40679#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40678#L11 assume true; 40675#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40677#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40676#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40674#L11 assume true; 40673#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40672#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40671#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40670#L11 assume true; 40669#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40668#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40667#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40666#L11 assume true; 40665#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40664#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40663#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40662#L11 assume true; 40661#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40660#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40659#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40658#L11 assume true; 40657#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40656#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40655#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40654#L11 assume true; 40653#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40652#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40651#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40650#L11 assume true; 40649#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40648#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40647#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40646#L11 assume true; 40645#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40644#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40643#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40642#L11 assume true; 40641#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40640#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40639#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40638#L11 assume true; 40637#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40636#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40635#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40634#L11 assume true; 40633#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40632#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40631#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40630#L11 assume true; 40629#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40628#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40627#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40626#L11 assume true; 40625#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40624#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40623#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40622#L11 assume true; 40621#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40620#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40619#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40618#L11 assume true; 40617#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40616#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40615#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40614#L11 assume true; 40613#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40612#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40611#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40610#L11 assume true; 40609#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40608#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40607#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40606#L11 assume true; 40536#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40605#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40604#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40603#L11 assume true; 40602#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40601#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40600#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40599#L11 assume true; 40598#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40597#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40596#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40595#L11 assume true; 40594#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40593#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40592#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40591#L11 assume true; 40590#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40589#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40588#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40587#L11 assume true; 40586#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40585#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40584#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40583#L11 assume true; 40582#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40581#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40580#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40579#L11 assume true; 40578#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40577#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40576#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40575#L11 assume true; 40574#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40573#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40572#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40571#L11 assume true; 40570#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40569#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40568#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40567#L11 assume true; 40566#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40565#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40564#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40563#L11 assume true; 40562#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40561#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40560#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40559#L11 assume true; 40558#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40557#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40556#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40555#L11 assume true; 40554#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40553#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40552#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40551#L11 assume true; 40550#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40549#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40548#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40547#L11 assume true; 40546#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40545#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40544#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40543#L11 assume true; 40542#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40541#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40540#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40539#L11 assume true; 40472#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40538#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40537#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40535#L11 assume true; 40534#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40533#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40532#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40531#L11 assume true; 40530#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40529#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40528#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40527#L11 assume true; 40526#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40525#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40524#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40523#L11 assume true; 40522#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40521#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40520#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40519#L11 assume true; 40518#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40517#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40516#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40515#L11 assume true; 40514#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40513#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40512#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40511#L11 assume true; 40510#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40509#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40508#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40507#L11 assume true; 40506#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40505#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40504#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40503#L11 assume true; 40502#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40501#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40500#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40499#L11 assume true; 40498#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40497#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40496#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40495#L11 assume true; 40494#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40493#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40492#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40491#L11 assume true; 40490#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40489#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40488#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40487#L11 assume true; 40486#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40485#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40484#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40483#L11 assume true; 40482#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40481#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40480#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40479#L11 assume true; 40478#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40477#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40476#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40475#L11 assume true; 40412#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40474#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40473#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40471#L11 assume true; 40470#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40469#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40468#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40467#L11 assume true; 40466#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40465#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40464#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40463#L11 assume true; 40462#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40461#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40460#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40459#L11 assume true; 40458#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40457#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40456#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40455#L11 assume true; 40454#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40453#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40452#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40451#L11 assume true; 40450#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40449#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40448#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40447#L11 assume true; 40446#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40445#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40444#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40443#L11 assume true; 40442#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40441#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40440#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40439#L11 assume true; 40438#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40437#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40436#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40435#L11 assume true; 40434#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40433#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40432#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40431#L11 assume true; 40430#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40429#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40428#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40427#L11 assume true; 40426#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40425#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40424#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40423#L11 assume true; 40422#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40421#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40420#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40419#L11 assume true; 40418#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40417#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40416#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40415#L11 assume true; 40356#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40414#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40413#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40411#L11 assume true; 40410#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40409#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40408#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40407#L11 assume true; 40406#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40405#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40404#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40403#L11 assume true; 40402#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40401#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40400#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40399#L11 assume true; 40398#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40397#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40396#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40395#L11 assume true; 40394#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40393#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40392#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40391#L11 assume true; 40390#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40389#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40388#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40387#L11 assume true; 40386#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40385#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40384#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40383#L11 assume true; 40382#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40381#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40380#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40379#L11 assume true; 40378#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40377#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40376#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40375#L11 assume true; 40374#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40373#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40372#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40371#L11 assume true; 40370#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40369#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40368#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40367#L11 assume true; 40366#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40365#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40364#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40363#L11 assume true; 40362#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40361#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40360#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40359#L11 assume true; 40304#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40358#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40357#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40355#L11 assume true; 40354#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40353#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40352#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40351#L11 assume true; 40350#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40349#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40348#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40347#L11 assume true; 40346#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40345#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40344#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40343#L11 assume true; 40342#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40341#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40340#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40339#L11 assume true; 40338#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40337#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40336#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40335#L11 assume true; 40334#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40333#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40332#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40331#L11 assume true; 40330#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40329#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40328#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40327#L11 assume true; 40326#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40325#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40324#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40323#L11 assume true; 40322#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40321#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40320#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40319#L11 assume true; 40318#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40317#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40316#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40315#L11 assume true; 40314#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40313#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40312#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40311#L11 assume true; 40310#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40309#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40308#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40307#L11 assume true; 40256#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40306#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40305#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40303#L11 assume true; 40302#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40301#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40300#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40299#L11 assume true; 40298#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40297#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40296#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40295#L11 assume true; 40294#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40293#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40292#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40291#L11 assume true; 40290#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40289#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40288#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40287#L11 assume true; 40286#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40285#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40284#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40283#L11 assume true; 40282#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40281#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40280#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40279#L11 assume true; 40278#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40277#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40276#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40275#L11 assume true; 40274#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40273#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40272#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40271#L11 assume true; 40270#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40269#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40268#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40267#L11 assume true; 40266#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40265#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40264#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40263#L11 assume true; 40262#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40261#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40260#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40259#L11 assume true; 40212#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40258#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40257#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40255#L11 assume true; 40254#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40253#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40252#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40251#L11 assume true; 40250#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40249#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40248#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40247#L11 assume true; 40246#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40245#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40244#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40243#L11 assume true; 40242#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40241#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40240#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40239#L11 assume true; 40238#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40237#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40236#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40235#L11 assume true; 40234#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40233#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40232#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40231#L11 assume true; 40230#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40229#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40228#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40227#L11 assume true; 40226#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40225#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40224#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40223#L11 assume true; 40222#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40221#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40220#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40219#L11 assume true; 40218#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40217#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40216#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40215#L11 assume true; 40172#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40214#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40213#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40211#L11 assume true; 40210#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40209#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40208#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40207#L11 assume true; 40206#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40205#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40204#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40203#L11 assume true; 40202#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40201#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40200#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40199#L11 assume true; 40198#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40197#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40196#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40195#L11 assume true; 40194#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40193#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40192#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40191#L11 assume true; 40190#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40189#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40188#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40187#L11 assume true; 40186#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40185#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40184#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40183#L11 assume true; 40182#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40181#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40180#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40179#L11 assume true; 40178#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40177#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40176#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40175#L11 assume true; 40136#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40174#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40173#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40171#L11 assume true; 40170#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40169#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40168#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40167#L11 assume true; 40166#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40165#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40164#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40163#L11 assume true; 40162#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40161#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40160#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40159#L11 assume true; 40158#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40157#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40156#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40155#L11 assume true; 40154#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40153#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40152#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40151#L11 assume true; 40150#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40149#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40148#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40147#L11 assume true; 40146#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40145#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40144#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40143#L11 assume true; 40142#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40141#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40140#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40139#L11 assume true; 40104#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40138#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40137#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40135#L11 assume true; 40134#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40133#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40132#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40131#L11 assume true; 40130#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40129#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40128#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40127#L11 assume true; 40126#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40125#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40124#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40123#L11 assume true; 40122#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40121#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40120#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40119#L11 assume true; 40118#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40117#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40116#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40115#L11 assume true; 40114#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40113#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40112#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40111#L11 assume true; 40110#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40109#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40108#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40107#L11 assume true; 40076#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40106#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40105#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40103#L11 assume true; 40102#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40101#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40100#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40099#L11 assume true; 40098#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40097#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40096#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40095#L11 assume true; 40094#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40093#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40092#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40091#L11 assume true; 40090#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40089#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40088#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40087#L11 assume true; 40086#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40085#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40084#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40083#L11 assume true; 40082#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40081#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40080#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40079#L11 assume true; 40052#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40078#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40077#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40075#L11 assume true; 40074#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40073#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40072#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40071#L11 assume true; 40070#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40069#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40068#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40067#L11 assume true; 40066#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40065#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40064#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40063#L11 assume true; 40062#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40061#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40060#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40059#L11 assume true; 40058#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40057#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40056#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40055#L11 assume true; 40029#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40054#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40053#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40051#L11 assume true; 40050#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40049#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40048#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40047#L11 assume true; 40046#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40045#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40044#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40043#L11 assume true; 40042#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40041#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40040#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40039#L11 assume true; 40038#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40037#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40036#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40035#L11 assume true; 40012#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40033#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40030#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40028#L11 assume true; 40027#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40026#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40025#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40024#L11 assume true; 40023#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40022#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40021#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40020#L11 assume true; 40019#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40018#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40017#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40016#L11 assume true; 40015#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40014#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40013#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40011#L11 assume true; 40010#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40009#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40008#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 40007#L11 assume true; 40006#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40005#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40004#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 40003#L11 assume true; 40002#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 40001#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 40000#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 39999#L11 assume true; 39998#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 39997#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 39996#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 39995#L11 assume true; 39994#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 39993#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 39992#L13 assume !(main_~i~0#1 == main_~range~0#1);main_~i~0#1 := 1 + main_~i~0#1; 39991#L11 assume true; 39990#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 39989#L12 assume !(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 39988#L13 assume main_~i~0#1 == main_~range~0#1;main_~i~0#1 := 0;main_~range~0#1 := main_~range~0#1 - 1; 39984#L11 [2024-11-10 22:35:15,774 INFO L747 eck$LassoCheckResult]: Loop: 39984#L11 assume true; 39987#L11-1 assume !!(0 <= main_~i~0#1 && main_~i~0#1 <= main_~range~0#1); 39983#L12 assume !!(0 == main_~i~0#1 && main_~i~0#1 == main_~range~0#1); 39984#L11 [2024-11-10 22:35:15,774 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:15,774 INFO L85 PathProgramCache]: Analyzing trace with hash -1319579512, now seen corresponding path program 13 times [2024-11-10 22:35:15,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:15,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306114129] [2024-11-10 22:35:15,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:15,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:15,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:15,919 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:35:16,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:16,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:35:16,091 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:16,091 INFO L85 PathProgramCache]: Analyzing trace with hash 38694, now seen corresponding path program 15 times [2024-11-10 22:35:16,091 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:16,091 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497419869] [2024-11-10 22:35:16,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:16,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:16,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:16,093 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:35:16,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:16,094 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:35:16,096 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 22:35:16,096 INFO L85 PathProgramCache]: Analyzing trace with hash 242427199, now seen corresponding path program 7 times [2024-11-10 22:35:16,096 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 22:35:16,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154544762] [2024-11-10 22:35:16,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 22:35:16,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 22:35:16,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:16,224 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 22:35:16,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 22:35:16,380 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 22:35:56,748 WARN L286 SmtUtils]: Spent 39.99s on a formula simplification. DAG size of input: 2128 DAG size of output: 667 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition)