./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 023d838f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-023d838-m [2024-11-10 23:00:07,137 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-10 23:00:07,217 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-10 23:00:07,222 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-10 23:00:07,223 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-10 23:00:07,223 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2024-11-10 23:00:07,251 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-10 23:00:07,252 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-10 23:00:07,253 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-10 23:00:07,255 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-10 23:00:07,257 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-10 23:00:07,258 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-10 23:00:07,258 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-10 23:00:07,258 INFO L153 SettingsManager]: * Use SBE=true [2024-11-10 23:00:07,259 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-10 23:00:07,259 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-10 23:00:07,261 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-10 23:00:07,262 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-10 23:00:07,262 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-10 23:00:07,262 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-10 23:00:07,263 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-10 23:00:07,263 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-10 23:00:07,263 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-10 23:00:07,264 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-10 23:00:07,264 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-10 23:00:07,264 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-10 23:00:07,265 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-10 23:00:07,265 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-10 23:00:07,265 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-10 23:00:07,265 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-10 23:00:07,266 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-10 23:00:07,266 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-10 23:00:07,266 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-10 23:00:07,266 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-10 23:00:07,266 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-10 23:00:07,267 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-10 23:00:07,267 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-10 23:00:07,267 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-10 23:00:07,268 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-10 23:00:07,269 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-10 23:00:07,269 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 869ef2ac3e655b6efbdfa5c05d637a0f622008da83d6042d15962fe695aee939 [2024-11-10 23:00:07,525 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-10 23:00:07,549 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-10 23:00:07,554 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-10 23:00:07,555 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-10 23:00:07,555 INFO L274 PluginConnector]: CDTParser initialized [2024-11-10 23:00:07,556 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2024-11-10 23:00:08,944 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-10 23:00:09,232 INFO L384 CDTParser]: Found 1 translation units. [2024-11-10 23:00:09,232 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-sets/test_mutex_double_lock.i [2024-11-10 23:00:09,252 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/02e4eddf9/eefbe8f6c3d446009eb20b7c217bc8e2/FLAGbc92edf5c [2024-11-10 23:00:09,269 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/02e4eddf9/eefbe8f6c3d446009eb20b7c217bc8e2 [2024-11-10 23:00:09,273 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-10 23:00:09,274 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-10 23:00:09,278 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-10 23:00:09,278 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-10 23:00:09,283 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-10 23:00:09,283 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,284 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42b1b517 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09, skipping insertion in model container [2024-11-10 23:00:09,284 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,339 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-10 23:00:09,744 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:00:09,759 INFO L200 MainTranslator]: Completed pre-run [2024-11-10 23:00:09,824 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:00:09,864 INFO L204 MainTranslator]: Completed translation [2024-11-10 23:00:09,864 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09 WrapperNode [2024-11-10 23:00:09,864 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-10 23:00:09,865 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-10 23:00:09,866 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-10 23:00:09,866 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-10 23:00:09,872 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,890 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,931 INFO L138 Inliner]: procedures = 139, calls = 60, calls flagged for inlining = 29, calls inlined = 42, statements flattened = 435 [2024-11-10 23:00:09,931 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-10 23:00:09,932 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-10 23:00:09,932 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-10 23:00:09,932 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-10 23:00:09,943 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,944 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,953 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,997 INFO L175 MemorySlicer]: Split 51 memory accesses to 2 slices as follows [2, 49]. 96 percent of accesses are in the largest equivalence class. The 4 initializations are split as follows [2, 2]. The 14 writes are split as follows [0, 14]. [2024-11-10 23:00:09,998 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:09,998 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:10,018 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:10,019 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:10,025 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:10,029 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:10,034 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-10 23:00:10,037 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-11-10 23:00:10,037 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-11-10 23:00:10,037 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-11-10 23:00:10,038 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (1/1) ... [2024-11-10 23:00:10,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:00:10,058 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:00:10,071 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:00:10,074 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-10 23:00:10,119 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#0 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#1 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-10 23:00:10,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-10 23:00:10,121 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-10 23:00:10,121 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-10 23:00:10,244 INFO L256 CfgBuilder]: Building ICFG [2024-11-10 23:00:10,246 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-10 23:00:10,762 INFO L1247 $ProcedureCfgBuilder]: dead code at ProgramPoint L663: havoc ldv_set_empty_#t~ret31#1; [2024-11-10 23:00:10,762 INFO L1247 $ProcedureCfgBuilder]: dead code at ProgramPoint L620: havoc ldv_list_empty_#t~mem10#1.base, ldv_list_empty_#t~mem10#1.offset; [2024-11-10 23:00:10,818 INFO L? ?]: Removed 244 outVars from TransFormulas that were not future-live. [2024-11-10 23:00:10,818 INFO L307 CfgBuilder]: Performing block encoding [2024-11-10 23:00:10,831 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-10 23:00:10,831 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-10 23:00:10,832 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:10 BoogieIcfgContainer [2024-11-10 23:00:10,832 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-11-10 23:00:10,834 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-10 23:00:10,835 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-10 23:00:10,838 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-10 23:00:10,839 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:10,839 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.11 11:00:09" (1/3) ... [2024-11-10 23:00:10,840 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6220a5c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:00:10, skipping insertion in model container [2024-11-10 23:00:10,840 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:10,840 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:00:09" (2/3) ... [2024-11-10 23:00:10,840 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6220a5c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:00:10, skipping insertion in model container [2024-11-10 23:00:10,840 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:00:10,840 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:10" (3/3) ... [2024-11-10 23:00:10,842 INFO L332 chiAutomizerObserver]: Analyzing ICFG test_mutex_double_lock.i [2024-11-10 23:00:10,887 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-10 23:00:10,888 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-10 23:00:10,888 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-10 23:00:10,888 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-10 23:00:10,888 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-10 23:00:10,888 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-10 23:00:10,888 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-10 23:00:10,888 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-10 23:00:10,893 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.4166666666666667) internal successors, (136), 96 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:10,913 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 30 [2024-11-10 23:00:10,913 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:10,913 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:10,918 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:10,919 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:10,919 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-10 23:00:10,919 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 97 states, 96 states have (on average 1.4166666666666667) internal successors, (136), 96 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:10,925 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 30 [2024-11-10 23:00:10,925 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:10,926 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:10,926 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:10,926 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:10,931 INFO L745 eck$LassoCheckResult]: Stem: 84#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 18#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 44#ldv_initialize_returnLabel#1true assume true;assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 8#L565-3true assume !(0 == assume_abort_if_not_~cond#1); 14#assume_abort_if_not_returnLabel#1true assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 9#L578-3true assume true;foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 40#L565-2true assume !(0 == assume_abort_if_not_~cond#1); 70#assume_abort_if_not_returnLabel#2true assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 85#L578-2true assume true;foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 81#L655-15true [2024-11-10 23:00:10,932 INFO L747 eck$LassoCheckResult]: Loop: 81#L655-15true assume true; 52#L655-17true assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 75#L656-10true assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 81#L655-15true [2024-11-10 23:00:10,936 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:10,936 INFO L85 PathProgramCache]: Analyzing trace with hash 1868162480, now seen corresponding path program 1 times [2024-11-10 23:00:10,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:10,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477598897] [2024-11-10 23:00:10,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:10,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:11,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:11,090 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:11,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:11,164 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:11,166 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:11,166 INFO L85 PathProgramCache]: Analyzing trace with hash 197572, now seen corresponding path program 1 times [2024-11-10 23:00:11,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:11,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209385867] [2024-11-10 23:00:11,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:11,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:11,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:11,181 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:11,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:11,196 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:11,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:11,204 INFO L85 PathProgramCache]: Analyzing trace with hash 242387893, now seen corresponding path program 1 times [2024-11-10 23:00:11,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:11,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415281386] [2024-11-10 23:00:11,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:11,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:11,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:11,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:11,603 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:11,603 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415281386] [2024-11-10 23:00:11,603 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [415281386] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:11,603 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:11,604 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-10 23:00:11,604 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1754458974] [2024-11-10 23:00:11,605 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:11,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:11,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 23:00:11,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 23:00:11,803 INFO L87 Difference]: Start difference. First operand has 97 states, 96 states have (on average 1.4166666666666667) internal successors, (136), 96 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:12,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:12,052 INFO L93 Difference]: Finished difference Result 144 states and 161 transitions. [2024-11-10 23:00:12,054 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 144 states and 161 transitions. [2024-11-10 23:00:12,059 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 32 [2024-11-10 23:00:12,064 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 144 states to 115 states and 132 transitions. [2024-11-10 23:00:12,065 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 115 [2024-11-10 23:00:12,066 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 115 [2024-11-10 23:00:12,066 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 132 transitions. [2024-11-10 23:00:12,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:12,067 INFO L218 hiAutomatonCegarLoop]: Abstraction has 115 states and 132 transitions. [2024-11-10 23:00:12,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 132 transitions. [2024-11-10 23:00:12,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 104. [2024-11-10 23:00:12,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.1538461538461537) internal successors, (120), 103 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:12,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 120 transitions. [2024-11-10 23:00:12,100 INFO L240 hiAutomatonCegarLoop]: Abstraction has 104 states and 120 transitions. [2024-11-10 23:00:12,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 23:00:12,104 INFO L425 stractBuchiCegarLoop]: Abstraction has 104 states and 120 transitions. [2024-11-10 23:00:12,105 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-10 23:00:12,106 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 120 transitions. [2024-11-10 23:00:12,107 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 28 [2024-11-10 23:00:12,108 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:12,108 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:12,108 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:12,108 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:12,109 INFO L745 eck$LassoCheckResult]: Stem: 336#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 300#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 301#ldv_initialize_returnLabel#1 assume true;assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 267#L565-3 assume !(0 == assume_abort_if_not_~cond#1); 268#assume_abort_if_not_returnLabel#1 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 279#L578-3 assume true;foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 280#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 306#assume_abort_if_not_returnLabel#2 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 307#L578-2 assume true;foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 331#L655-15 assume true; 271#L655-17 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 272#L660-11 ldv_is_in_set_#res#1 := 0; 283#L657-5 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 315#L669-1 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 275#L670-1 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 261#L655-12 assume true; 262#L655-14 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 338#L660-9 ldv_is_in_set_#res#1 := 0; 332#L657-4 assume true;ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 289#L636-1 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 281#L565-1 assume !(0 == assume_abort_if_not_~cond#1); 282#assume_abort_if_not_returnLabel#3 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 329#L578-1 assume true;ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 330#__ldv_list_add_returnLabel#1 assume true;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 294#ldv_list_add_returnLabel#1 assume true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 295#ldv_set_add_returnLabel#1 assume true;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 348#mutex_lock_returnLabel#1 assume true;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 320#L655-9 [2024-11-10 23:00:12,115 INFO L747 eck$LassoCheckResult]: Loop: 320#L655-9 assume true; 343#L655-11 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 318#L656-6 assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 320#L655-9 [2024-11-10 23:00:12,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:12,116 INFO L85 PathProgramCache]: Analyzing trace with hash -705451972, now seen corresponding path program 1 times [2024-11-10 23:00:12,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:12,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962399736] [2024-11-10 23:00:12,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:12,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:12,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:12,269 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:12,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:12,327 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:12,328 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:12,328 INFO L85 PathProgramCache]: Analyzing trace with hash 152887, now seen corresponding path program 1 times [2024-11-10 23:00:12,328 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:12,328 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673283070] [2024-11-10 23:00:12,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:12,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:12,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:12,337 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:12,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:12,344 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:12,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:12,345 INFO L85 PathProgramCache]: Analyzing trace with hash -844595428, now seen corresponding path program 1 times [2024-11-10 23:00:12,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:12,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879912045] [2024-11-10 23:00:12,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:12,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:12,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:14,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:14,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:14,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [879912045] [2024-11-10 23:00:14,314 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [879912045] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:14,314 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:14,314 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-10 23:00:14,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1789490182] [2024-11-10 23:00:14,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:14,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:14,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-10 23:00:14,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-10 23:00:14,420 INFO L87 Difference]: Start difference. First operand 104 states and 120 transitions. cyclomatic complexity: 23 Second operand has 12 states, 11 states have (on average 2.727272727272727) internal successors, (30), 11 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:15,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:15,333 INFO L93 Difference]: Finished difference Result 135 states and 156 transitions. [2024-11-10 23:00:15,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 156 transitions. [2024-11-10 23:00:15,336 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 36 [2024-11-10 23:00:15,337 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 135 states and 156 transitions. [2024-11-10 23:00:15,337 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 135 [2024-11-10 23:00:15,338 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 135 [2024-11-10 23:00:15,338 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 156 transitions. [2024-11-10 23:00:15,338 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:15,339 INFO L218 hiAutomatonCegarLoop]: Abstraction has 135 states and 156 transitions. [2024-11-10 23:00:15,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 156 transitions. [2024-11-10 23:00:15,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 127. [2024-11-10 23:00:15,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.1574803149606299) internal successors, (147), 126 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:15,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 147 transitions. [2024-11-10 23:00:15,347 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 147 transitions. [2024-11-10 23:00:15,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-10 23:00:15,348 INFO L425 stractBuchiCegarLoop]: Abstraction has 127 states and 147 transitions. [2024-11-10 23:00:15,348 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-10 23:00:15,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 147 transitions. [2024-11-10 23:00:15,349 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 32 [2024-11-10 23:00:15,350 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:15,350 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:15,350 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:15,350 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:15,351 INFO L745 eck$LassoCheckResult]: Stem: 606#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 575#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 576#ldv_initialize_returnLabel#1 assume true;assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 540#L565-3 assume !(0 == assume_abort_if_not_~cond#1); 541#assume_abort_if_not_returnLabel#1 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 553#L578-3 assume true;foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 554#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 580#assume_abort_if_not_returnLabel#2 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 581#L578-2 assume true;foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 602#L655-15 assume true; 544#L655-17 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 545#L660-11 ldv_is_in_set_#res#1 := 0; 559#L657-5 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 590#L669-1 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 551#L670-1 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 534#L655-12 assume true; 535#L655-14 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 608#L660-9 ldv_is_in_set_#res#1 := 0; 603#L657-4 assume true;ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 563#L636-1 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 555#L565-1 assume !(0 == assume_abort_if_not_~cond#1); 556#assume_abort_if_not_returnLabel#3 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 600#L578-1 assume true;ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 601#__ldv_list_add_returnLabel#1 assume true;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 568#ldv_list_add_returnLabel#1 assume true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 569#ldv_set_add_returnLabel#1 assume true;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 614#mutex_lock_returnLabel#1 assume true;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 613#L655-9 assume true; 611#L655-11 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 612#L660-7 ldv_is_in_set_#res#1 := 0; 594#L657-3 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 617#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 616#L670 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 605#L655-6 [2024-11-10 23:00:15,352 INFO L747 eck$LassoCheckResult]: Loop: 605#L655-6 assume true; 615#L655-8 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 604#L656-4 assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 605#L655-6 [2024-11-10 23:00:15,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:15,353 INFO L85 PathProgramCache]: Analyzing trace with hash -1425860398, now seen corresponding path program 1 times [2024-11-10 23:00:15,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:15,353 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127904257] [2024-11-10 23:00:15,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:15,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:15,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:15,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:15,774 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:15,774 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127904257] [2024-11-10 23:00:15,775 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2127904257] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:15,775 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:15,775 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:00:15,775 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473726383] [2024-11-10 23:00:15,776 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:15,776 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:15,776 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:15,777 INFO L85 PathProgramCache]: Analyzing trace with hash 133027, now seen corresponding path program 1 times [2024-11-10 23:00:15,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:15,777 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288139623] [2024-11-10 23:00:15,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:15,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:15,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:15,783 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:15,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:15,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:15,905 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:15,906 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:00:15,906 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:00:15,906 INFO L87 Difference]: Start difference. First operand 127 states and 147 transitions. cyclomatic complexity: 28 Second operand has 9 states, 9 states have (on average 3.6666666666666665) internal successors, (33), 9 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:16,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:16,860 INFO L93 Difference]: Finished difference Result 173 states and 201 transitions. [2024-11-10 23:00:16,860 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 173 states and 201 transitions. [2024-11-10 23:00:16,861 INFO L131 ngComponentsAnalysis]: Automaton has 12 accepting balls. 47 [2024-11-10 23:00:16,862 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 173 states to 173 states and 201 transitions. [2024-11-10 23:00:16,863 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 173 [2024-11-10 23:00:16,863 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 173 [2024-11-10 23:00:16,863 INFO L73 IsDeterministic]: Start isDeterministic. Operand 173 states and 201 transitions. [2024-11-10 23:00:16,864 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:16,864 INFO L218 hiAutomatonCegarLoop]: Abstraction has 173 states and 201 transitions. [2024-11-10 23:00:16,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states and 201 transitions. [2024-11-10 23:00:16,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 140. [2024-11-10 23:00:16,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 140 states have (on average 1.1428571428571428) internal successors, (160), 139 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:16,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 160 transitions. [2024-11-10 23:00:16,876 INFO L240 hiAutomatonCegarLoop]: Abstraction has 140 states and 160 transitions. [2024-11-10 23:00:16,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-10 23:00:16,879 INFO L425 stractBuchiCegarLoop]: Abstraction has 140 states and 160 transitions. [2024-11-10 23:00:16,880 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-10 23:00:16,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 140 states and 160 transitions. [2024-11-10 23:00:16,881 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 36 [2024-11-10 23:00:16,881 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:16,881 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:16,882 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:16,882 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-10 23:00:16,883 INFO L745 eck$LassoCheckResult]: Stem: 949#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 910#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 911#ldv_initialize_returnLabel#1 assume true;assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 873#L565-3 assume !(0 == assume_abort_if_not_~cond#1); 874#assume_abort_if_not_returnLabel#1 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 886#L578-3 assume true;foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 887#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 918#assume_abort_if_not_returnLabel#2 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 919#L578-2 assume true;foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 944#L655-15 assume true; 877#L655-17 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 878#L660-11 ldv_is_in_set_#res#1 := 0; 892#L657-5 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 927#L669-1 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 884#L670-1 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 869#L655-12 assume true; 870#L655-14 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 955#L660-9 ldv_is_in_set_#res#1 := 0; 947#L657-4 assume true;ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 896#L636-1 assume 0 == ldv_set_add_#t~ret17#1;havoc ldv_set_add_#t~ret17#1;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 12;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 888#L565-1 assume !(0 == assume_abort_if_not_~cond#1); 889#assume_abort_if_not_returnLabel#3 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 942#L578-1 assume true;ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset := ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;havoc ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset;call write~$Pointer$#1(ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, 4);assume { :begin_inline_ldv_list_add } true;ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset := ldv_set_add_~le~0#1.base, 4 + ldv_set_add_~le~0#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset := ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset;ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset := ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;call ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset := read~$Pointer$#1(ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, 4);assume { :begin_inline___ldv_list_add } true;__ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset := ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset, ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset := __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset;__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset := __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset;__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset := __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~next#1.base, 4 + __ldv_list_add_~next#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset, __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~new#1.base, 4 + __ldv_list_add_~new#1.offset, 4);call write~$Pointer$#1(__ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, 4); 943#__ldv_list_add_returnLabel#1 assume true;havoc __ldv_list_add_~new#1.base, __ldv_list_add_~new#1.offset, __ldv_list_add_~prev#1.base, __ldv_list_add_~prev#1.offset, __ldv_list_add_~next#1.base, __ldv_list_add_~next#1.offset;havoc __ldv_list_add_#in~new#1.base, __ldv_list_add_#in~new#1.offset, __ldv_list_add_#in~prev#1.base, __ldv_list_add_#in~prev#1.offset, __ldv_list_add_#in~next#1.base, __ldv_list_add_#in~next#1.offset;assume { :end_inline___ldv_list_add } true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset; 902#ldv_list_add_returnLabel#1 assume true;havoc ldv_list_add_#t~mem6#1.base, ldv_list_add_#t~mem6#1.offset, ldv_list_add_~new#1.base, ldv_list_add_~new#1.offset, ldv_list_add_~head#1.base, ldv_list_add_~head#1.offset;havoc ldv_list_add_#in~new#1.base, ldv_list_add_#in~new#1.offset, ldv_list_add_#in~head#1.base, ldv_list_add_#in~head#1.offset;assume { :end_inline_ldv_list_add } true;havoc ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset; 903#ldv_set_add_returnLabel#1 assume true;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 928#mutex_lock_returnLabel#1 assume true;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 900#L655-9 assume true; 901#L655-11 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 932#L656-6 assume ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset;havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;ldv_is_in_set_#res#1 := 1; 933#L657-3 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 938#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 939#L670 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 934#L655-6 assume true; 920#L655-8 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 921#L656-4 [2024-11-10 23:00:16,883 INFO L747 eck$LassoCheckResult]: Loop: 921#L656-4 assume !(ldv_is_in_set_#t~mem28#1.base == ldv_is_in_set_~e#1.base && ldv_is_in_set_#t~mem28#1.offset == ldv_is_in_set_~e#1.offset);havoc ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset;call ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, 4 + ldv_is_in_set_~m~1#1.offset, 4);ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset := ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;havoc ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset;ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset := ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset - 4;havoc ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset;havoc ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset; 948#L655-6 assume true; 965#L655-8 assume !!(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset);call ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset := read~$Pointer$#1(ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset, 4); 921#L656-4 [2024-11-10 23:00:16,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:16,885 INFO L85 PathProgramCache]: Analyzing trace with hash 1703623088, now seen corresponding path program 1 times [2024-11-10 23:00:16,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:16,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7258380] [2024-11-10 23:00:16,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:16,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:16,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:16,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:16,970 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:16,970 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [7258380] [2024-11-10 23:00:16,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [7258380] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:16,971 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:16,971 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 23:00:16,971 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241218920] [2024-11-10 23:00:16,971 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:16,972 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:16,972 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:16,972 INFO L85 PathProgramCache]: Analyzing trace with hash 128257, now seen corresponding path program 2 times [2024-11-10 23:00:16,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:16,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100127269] [2024-11-10 23:00:16,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:16,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:16,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:16,978 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:16,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:16,983 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:17,105 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:17,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 23:00:17,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 23:00:17,106 INFO L87 Difference]: Start difference. First operand 140 states and 160 transitions. cyclomatic complexity: 29 Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:17,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:17,144 INFO L93 Difference]: Finished difference Result 109 states and 121 transitions. [2024-11-10 23:00:17,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 109 states and 121 transitions. [2024-11-10 23:00:17,145 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 26 [2024-11-10 23:00:17,145 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 109 states to 97 states and 109 transitions. [2024-11-10 23:00:17,146 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 97 [2024-11-10 23:00:17,146 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-11-10 23:00:17,146 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 109 transitions. [2024-11-10 23:00:17,146 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:17,146 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 109 transitions. [2024-11-10 23:00:17,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 109 transitions. [2024-11-10 23:00:17,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 95. [2024-11-10 23:00:17,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.1263157894736842) internal successors, (107), 94 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:17,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 107 transitions. [2024-11-10 23:00:17,156 INFO L240 hiAutomatonCegarLoop]: Abstraction has 95 states and 107 transitions. [2024-11-10 23:00:17,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 23:00:17,160 INFO L425 stractBuchiCegarLoop]: Abstraction has 95 states and 107 transitions. [2024-11-10 23:00:17,160 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-10 23:00:17,160 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 107 transitions. [2024-11-10 23:00:17,161 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 26 [2024-11-10 23:00:17,161 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:00:17,161 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:00:17,161 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:00:17,162 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-10 23:00:17,162 INFO L745 eck$LassoCheckResult]: Stem: 1186#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);call #Ultimate.allocInit(8, 3);~#mutexes~0.base, ~#mutexes~0.offset := 3, 0;call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, ~#mutexes~0.offset, 4);call write~init~$Pointer$#1(~#mutexes~0.base, ~#mutexes~0.offset, ~#mutexes~0.base, 4 + ~#mutexes~0.offset, 4); 1158#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;assume { :begin_inline_foo } true;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset, foo_#t~ret36#1.base, foo_#t~ret36#1.offset, foo_~m1~0#1.base, foo_~m1~0#1.offset, foo_~m2~0#1.base, foo_~m2~0#1.offset;assume { :begin_inline_ldv_initialize } true; 1159#ldv_initialize_returnLabel#1 assume true;assume { :end_inline_ldv_initialize } true;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1131#L565-3 assume !(0 == assume_abort_if_not_~cond#1); 1132#assume_abort_if_not_returnLabel#1 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1141#L578-3 assume true;foo_#t~ret35#1.base, foo_#t~ret35#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m1~0#1.base, foo_~m1~0#1.offset := foo_#t~ret35#1.base, foo_#t~ret35#1.offset;havoc foo_#t~ret35#1.base, foo_#t~ret35#1.offset;assume { :begin_inline_ldv_successful_malloc } true;ldv_successful_malloc_#in~size#1 := 8;havoc ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;ldv_successful_malloc_~size#1 := ldv_successful_malloc_#in~size#1;call ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset := #Ultimate.allocOnHeap(ldv_successful_malloc_~size#1 % 4294967296);ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset := ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if ldv_successful_malloc_~ptr~0#1.base != 0 || ldv_successful_malloc_~ptr~0#1.offset != 0 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; 1142#L565-2 assume !(0 == assume_abort_if_not_~cond#1); 1165#assume_abort_if_not_returnLabel#2 assume true;havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset := ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset; 1166#L578-2 assume true;foo_#t~ret36#1.base, foo_#t~ret36#1.offset := ldv_successful_malloc_#res#1.base, ldv_successful_malloc_#res#1.offset;havoc ldv_successful_malloc_#t~malloc5#1.base, ldv_successful_malloc_#t~malloc5#1.offset, ldv_successful_malloc_~size#1, ldv_successful_malloc_~ptr~0#1.base, ldv_successful_malloc_~ptr~0#1.offset;havoc ldv_successful_malloc_#in~size#1;assume { :end_inline_ldv_successful_malloc } true;foo_~m2~0#1.base, foo_~m2~0#1.offset := foo_#t~ret36#1.base, foo_#t~ret36#1.offset;havoc foo_#t~ret36#1.base, foo_#t~ret36#1.offset;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1183#L655-15 assume true; 1133#L655-17 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1134#L660-11 ldv_is_in_set_#res#1 := 0; 1145#L657-5 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1173#L669-1 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 1139#L670-1 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1125#L655-12 assume true; 1126#L655-14 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1188#L660-9 ldv_is_in_set_#res#1 := 0; 1184#L657-4 assume true;ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1149#L636-1 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1150#ldv_set_add_returnLabel#1 assume true;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 1172#mutex_lock_returnLabel#1 assume true;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_lock } true;mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset := foo_~m1~0#1.base, foo_~m1~0#1.offset;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;mutex_lock_~m#1.base, mutex_lock_~m#1.offset := mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1151#L655-9 assume true; 1152#L655-11 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1189#L660-7 ldv_is_in_set_#res#1 := 0; 1187#L657-3 assume true;mutex_lock_#t~ret32#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1180#L669 assume !(0 != mutex_lock_#t~ret32#1);havoc mutex_lock_#t~ret32#1; 1181#L670 assume { :begin_inline_ldv_set_add } true;ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset := mutex_lock_~m#1.base, mutex_lock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset := ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset;ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset := ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1175#L655-6 assume true; 1167#L655-8 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1129#L660-5 ldv_is_in_set_#res#1 := 0; 1130#L657-2 assume true;ldv_set_add_#t~ret17#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1154#L636 assume !(0 == ldv_set_add_#t~ret17#1);havoc ldv_set_add_#t~ret17#1; 1155#ldv_set_add_returnLabel#2 assume true;havoc ldv_set_add_#t~ret17#1, ldv_set_add_#t~ret18#1.base, ldv_set_add_#t~ret18#1.offset, ldv_set_add_~le~0#1.base, ldv_set_add_~le~0#1.offset, ldv_set_add_~new#1.base, ldv_set_add_~new#1.offset, ldv_set_add_~s#1.base, ldv_set_add_~s#1.offset;havoc ldv_set_add_#in~new#1.base, ldv_set_add_#in~new#1.offset, ldv_set_add_#in~s#1.base, ldv_set_add_#in~s#1.offset;assume { :end_inline_ldv_set_add } true; 1192#mutex_lock_returnLabel#2 assume true;havoc mutex_lock_#t~ret32#1, mutex_lock_~m#1.base, mutex_lock_~m#1.offset;havoc mutex_lock_#in~m#1.base, mutex_lock_#in~m#1.offset;assume { :end_inline_mutex_lock } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset := foo_~m2~0#1.base, foo_~m2~0#1.offset;havoc mutex_unlock_#t~ret33#1, mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset;mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset := mutex_unlock_#in~m#1.base, mutex_unlock_#in~m#1.offset;assume { :begin_inline_ldv_is_in_set } true;ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset := ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset;ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset := ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;havoc ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;call ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset := read~$Pointer$#1(ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, 4);ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset := ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset;ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset := ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset - 4;havoc ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset;ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset := ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset;havoc ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset; 1191#L655-3 assume true; 1121#L655-5 assume !(ldv_is_in_set_~m~1#1.base != ldv_is_in_set_~s#1.base || 4 + ldv_is_in_set_~m~1#1.offset != ldv_is_in_set_~s#1.offset); 1122#L660-3 ldv_is_in_set_#res#1 := 0; 1136#L657-1 assume true;mutex_unlock_#t~ret33#1 := ldv_is_in_set_#res#1;havoc ldv_is_in_set_#t~mem26#1.base, ldv_is_in_set_#t~mem26#1.offset, ldv_is_in_set_#t~ret27#1.base, ldv_is_in_set_#t~ret27#1.offset, ldv_is_in_set_~__mptr~3#1.base, ldv_is_in_set_~__mptr~3#1.offset, ldv_is_in_set_#t~mem28#1.base, ldv_is_in_set_#t~mem28#1.offset, ldv_is_in_set_#t~mem29#1.base, ldv_is_in_set_#t~mem29#1.offset, ldv_is_in_set_#t~ret30#1.base, ldv_is_in_set_#t~ret30#1.offset, ldv_is_in_set_~__mptr~4#1.base, ldv_is_in_set_~__mptr~4#1.offset, ldv_is_in_set_~e#1.base, ldv_is_in_set_~e#1.offset, ldv_is_in_set_~s#1.base, ldv_is_in_set_~s#1.offset, ldv_is_in_set_~m~1#1.base, ldv_is_in_set_~m~1#1.offset;havoc ldv_is_in_set_#in~e#1.base, ldv_is_in_set_#in~e#1.offset, ldv_is_in_set_#in~s#1.base, ldv_is_in_set_#in~s#1.offset;assume { :end_inline_ldv_is_in_set } true; 1153#L673-1 assume !(0 == mutex_unlock_#t~ret33#1);havoc mutex_unlock_#t~ret33#1; 1119#L674-1 assume { :begin_inline_ldv_set_del } true;ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset, ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset := mutex_unlock_~m#1.base, mutex_unlock_~m#1.offset, ~#mutexes~0.base, ~#mutexes~0.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset, ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset, ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset, ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset, ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset, ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset, ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset, ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset, ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset, ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset, ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset, ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;ldv_set_del_~e#1.base, ldv_set_del_~e#1.offset := ldv_set_del_#in~e#1.base, ldv_set_del_#in~e#1.offset;ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset := ldv_set_del_#in~s#1.base, ldv_set_del_#in~s#1.offset;havoc ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset;havoc ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset := read~$Pointer$#1(ldv_set_del_~s#1.base, ldv_set_del_~s#1.offset, 4);ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset := ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;havoc ldv_set_del_#t~mem19#1.base, ldv_set_del_#t~mem19#1.offset;ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset := ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset - 4;havoc ldv_set_del_~__mptr~0#1.base, ldv_set_del_~__mptr~0#1.offset;ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset;call ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset := read~$Pointer$#1(ldv_set_del_~m~0#1.base, 4 + ldv_set_del_~m~0#1.offset, 4);ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset := ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;havoc ldv_set_del_#t~mem21#1.base, ldv_set_del_#t~mem21#1.offset;ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset := ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset - 4;havoc ldv_set_del_~__mptr~1#1.base, ldv_set_del_~__mptr~1#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset;havoc ldv_set_del_#t~ret20#1.base, ldv_set_del_#t~ret20#1.offset;havoc ldv_set_del_#t~ret22#1.base, ldv_set_del_#t~ret22#1.offset; 1120#L646-3 [2024-11-10 23:00:17,164 INFO L747 eck$LassoCheckResult]: Loop: 1120#L646-3 assume true; 1135#L646-5 assume !!(ldv_set_del_~m~0#1.base != ldv_set_del_~s#1.base || 4 + ldv_set_del_~m~0#1.offset != ldv_set_del_~s#1.offset);call ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset := read~$Pointer$#1(ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset, 4); 1156#L647-2 assume !(ldv_set_del_#t~mem23#1.base == ldv_set_del_~e#1.base && ldv_set_del_#t~mem23#1.offset == ldv_set_del_~e#1.offset);havoc ldv_set_del_#t~mem23#1.base, ldv_set_del_#t~mem23#1.offset; 1164#L646-4 ldv_set_del_~m~0#1.base, ldv_set_del_~m~0#1.offset := ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset;call ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset := read~$Pointer$#1(ldv_set_del_~n~0#1.base, 4 + ldv_set_del_~n~0#1.offset, 4);ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset := ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset;havoc ldv_set_del_#t~mem24#1.base, ldv_set_del_#t~mem24#1.offset;ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset := ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset - 4;havoc ldv_set_del_~__mptr~2#1.base, ldv_set_del_~__mptr~2#1.offset;ldv_set_del_~n~0#1.base, ldv_set_del_~n~0#1.offset := ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset;havoc ldv_set_del_#t~ret25#1.base, ldv_set_del_#t~ret25#1.offset; 1120#L646-3 [2024-11-10 23:00:17,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:17,165 INFO L85 PathProgramCache]: Analyzing trace with hash 269960569, now seen corresponding path program 1 times [2024-11-10 23:00:17,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:17,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295878410] [2024-11-10 23:00:17,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:17,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:17,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:00:17,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:00:17,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:00:17,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295878410] [2024-11-10 23:00:17,218 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [295878410] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:00:17,218 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:00:17,218 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 23:00:17,218 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168212061] [2024-11-10 23:00:17,218 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:00:17,219 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-10 23:00:17,219 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:00:17,220 INFO L85 PathProgramCache]: Analyzing trace with hash 2738652, now seen corresponding path program 1 times [2024-11-10 23:00:17,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:00:17,220 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927731047] [2024-11-10 23:00:17,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:00:17,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:00:17,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:17,225 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:00:17,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:00:17,230 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:00:17,342 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:00:17,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 23:00:17,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 23:00:17,344 INFO L87 Difference]: Start difference. First operand 95 states and 107 transitions. cyclomatic complexity: 18 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:00:17,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:00:17,351 INFO L93 Difference]: Finished difference Result 20 states and 19 transitions. [2024-11-10 23:00:17,351 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 19 transitions. [2024-11-10 23:00:17,352 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2024-11-10 23:00:17,352 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 0 states and 0 transitions. [2024-11-10 23:00:17,352 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2024-11-10 23:00:17,352 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2024-11-10 23:00:17,352 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2024-11-10 23:00:17,352 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:00:17,352 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-11-10 23:00:17,353 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-11-10 23:00:17,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 23:00:17,353 INFO L425 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2024-11-10 23:00:17,354 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-10 23:00:17,355 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2024-11-10 23:00:17,355 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2024-11-10 23:00:17,355 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2024-11-10 23:00:17,361 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 10.11 11:00:17 BoogieIcfgContainer [2024-11-10 23:00:17,361 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2024-11-10 23:00:17,362 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-10 23:00:17,362 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-10 23:00:17,363 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-10 23:00:17,363 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:00:10" (3/4) ... [2024-11-10 23:00:17,367 INFO L146 WitnessPrinter]: No result that supports witness generation found [2024-11-10 23:00:17,368 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-10 23:00:17,369 INFO L158 Benchmark]: Toolchain (without parser) took 8094.96ms. Allocated memory was 176.2MB in the beginning and 297.8MB in the end (delta: 121.6MB). Free memory was 108.1MB in the beginning and 97.1MB in the end (delta: 11.0MB). Peak memory consumption was 135.1MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,370 INFO L158 Benchmark]: CDTParser took 0.16ms. Allocated memory is still 109.1MB. Free memory is still 70.8MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-10 23:00:17,370 INFO L158 Benchmark]: CACSL2BoogieTranslator took 587.09ms. Allocated memory is still 176.2MB. Free memory was 107.7MB in the beginning and 136.9MB in the end (delta: -29.1MB). Peak memory consumption was 13.1MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,371 INFO L158 Benchmark]: Boogie Procedure Inliner took 66.10ms. Allocated memory is still 176.2MB. Free memory was 136.9MB in the beginning and 133.4MB in the end (delta: 3.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,371 INFO L158 Benchmark]: Boogie Preprocessor took 102.29ms. Allocated memory is still 176.2MB. Free memory was 133.4MB in the beginning and 126.4MB in the end (delta: 7.0MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,372 INFO L158 Benchmark]: IcfgBuilder took 795.32ms. Allocated memory is still 176.2MB. Free memory was 125.7MB in the beginning and 81.7MB in the end (delta: 44.0MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,372 INFO L158 Benchmark]: BuchiAutomizer took 6527.76ms. Allocated memory was 176.2MB in the beginning and 297.8MB in the end (delta: 121.6MB). Free memory was 81.7MB in the beginning and 98.1MB in the end (delta: -16.4MB). Peak memory consumption was 107.3MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,372 INFO L158 Benchmark]: Witness Printer took 6.59ms. Allocated memory is still 297.8MB. Free memory was 98.1MB in the beginning and 97.1MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. [2024-11-10 23:00:17,375 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16ms. Allocated memory is still 109.1MB. Free memory is still 70.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 587.09ms. Allocated memory is still 176.2MB. Free memory was 107.7MB in the beginning and 136.9MB in the end (delta: -29.1MB). Peak memory consumption was 13.1MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 66.10ms. Allocated memory is still 176.2MB. Free memory was 136.9MB in the beginning and 133.4MB in the end (delta: 3.5MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 102.29ms. Allocated memory is still 176.2MB. Free memory was 133.4MB in the beginning and 126.4MB in the end (delta: 7.0MB). Peak memory consumption was 6.3MB. Max. memory is 16.1GB. * IcfgBuilder took 795.32ms. Allocated memory is still 176.2MB. Free memory was 125.7MB in the beginning and 81.7MB in the end (delta: 44.0MB). Peak memory consumption was 44.0MB. Max. memory is 16.1GB. * BuchiAutomizer took 6527.76ms. Allocated memory was 176.2MB in the beginning and 297.8MB in the end (delta: 121.6MB). Free memory was 81.7MB in the beginning and 98.1MB in the end (delta: -16.4MB). Peak memory consumption was 107.3MB. Max. memory is 16.1GB. * Witness Printer took 6.59ms. Allocated memory is still 297.8MB. Free memory was 98.1MB in the beginning and 97.1MB in the end (delta: 1.1MB). Peak memory consumption was 2.1MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 5 terminating modules (5 trivial, 0 deterministic, 0 nondeterministic). 5 modules have a trivial ranking function, the largest among these consists of 12 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 6.4s and 6 iterations. TraceHistogramMax:1. Analysis of lassos took 4.1s. Construction of modules took 1.5s. Büchi inclusion checks took 0.7s. Highest rank in rank-based complementation 0. Minimization of det autom 5. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 4 MinimizatonAttempts, 54 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 371 SdHoareTripleChecker+Valid, 1.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 371 mSDsluCounter, 1480 SdHoareTripleChecker+Invalid, 1.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1146 mSDsCounter, 53 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 943 IncrementalHoareTripleChecker+Invalid, 996 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 53 mSolverCounterUnsat, 334 mSDtfsCounter, 943 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU3 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2024-11-10 23:00:17,415 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE